diff options
author | Jason Ekstrand <jason.ekstrand@intel.com> | 2017-06-15 22:17:13 -0700 |
---|---|---|
committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2017-06-23 12:30:24 -0700 |
commit | a7059a764e571fed6276f6376e48c6726889f10a (patch) | |
tree | b73c14cf143f52cb46fb732866f055c7a4741d55 | |
parent | 7896dee349bf747f5c03a9f5206a548b7482e72c (diff) |
i965/miptree: Delete the layered rendering resolve
We never fast-clear more than the base slice (LOD 0, layer 0) anyway, so
layered rendering without a resolve is always perfectly safe. Should
this ever change in the future, we'll have to put some sort of resolve
back in but we can cross that bridge when we come to it.
Reviewed-by: Chad Versace <chadversary@chromium.org>
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 7996ca7cc9..366e45c518 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2536,20 +2536,6 @@ intel_miptree_prepare_render(struct brw_context *brw, intel_miptree_prepare_access(brw, mt, level, 1, start_layer, layer_count, false, false); } - - /* For layered rendering non-compressed fast cleared buffers need to be - * resolved. Surface state can carry only one fast color clear value - * while each layer may have its own fast clear color value. For - * compressed buffers color value is available in the color buffer. - */ - if (layer_count > 1 && - !(mt->aux_disable & INTEL_AUX_DISABLE_CCS) && - !intel_miptree_is_lossless_compressed(brw, mt)) { - assert(brw->gen >= 8); - - intel_miptree_prepare_access(brw, mt, level, 1, start_layer, layer_count, - false, false); - } } void |