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| author | Samuel Iglesias Gonsalvez <siglesias@igalia.com> | 2015-12-03 18:05:39 +0100 |
|---|---|---|
| committer | Samuel Iglesias Gonsálvez <siglesias@igalia.com> | 2016-03-17 08:23:25 +0100 |
| commit | 2fafc6b98ccc5b0aecc54eadceef8760bbff4233 (patch) | |
| tree | 0aa1ff9ddd974b4799ce070d5f0a394dd65e03a8 | |
| parent | f6342b56456582340f622ec6e23627ee07ba711d (diff) | |
i965/gs/gen6: fix execsize for instructions with width of 4 in gen6_sol_program()
v2:
- Add assert (Topi).
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_ff_gs_emit.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c index 8589dabe4c..fea2b93471 100644 --- a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c @@ -406,9 +406,13 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key, : 0x00020001)); /* (1, 0, 2) */ brw_inst_set_pred_control(p->devinfo, inst, BRW_PREDICATE_NORMAL); } + + assert(c->reg.destination_indices.width == BRW_EXECUTE_4); + brw_push_insn_state(p); + brw_set_default_exec_size(p, BRW_EXECUTE_4); brw_ADD(p, c->reg.destination_indices, c->reg.destination_indices, get_element_ud(c->reg.SVBI, 0)); - + brw_pop_insn_state(p); /* For each vertex, generate code to output each varying using the * appropriate binding table entry. */ @@ -438,8 +442,13 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key, vertex_slot.swizzle = varying == VARYING_SLOT_PSIZ ? BRW_SWIZZLE_WWWW : key->transform_feedback_swizzles[binding]; brw_set_default_access_mode(p, BRW_ALIGN_16); + brw_push_insn_state(p); + brw_set_default_exec_size(p, BRW_EXECUTE_4); + brw_MOV(p, stride(c->reg.header, 4, 4, 1), retype(vertex_slot, BRW_REGISTER_TYPE_UD)); + brw_pop_insn_state(p); + brw_set_default_access_mode(p, BRW_ALIGN_1); brw_svb_write(p, final_write ? c->reg.temp : brw_null_reg(), /* dest */ |