~nh/llvm - Misc LLVM things, mostly radeonsi (AMDGPU)

Age	Commit message (Expand)	Author	Files	Lines
2015-03-03	[X86][Haswell][SchedModel] Fix patterns for scalar FMA3 variants.	Michael Kuperstein	1	-2/+2
2015-02-26	[X86][Haswell][SchedModel] Fix WriteMULm latency.	Michael Kuperstein	1	-1/+1
2014-09-26	[X86][SchedModel] SSE reciprocal square root instruction latencies.	Andrea Di Biagio	1	-0/+1
2014-08-18	[X86][Haswell][SchedModel] Tidy up.	Quentin Colombet	1	-56/+63
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+30
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+9
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+68
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+170
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+170
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+144
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+9
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+31
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+63
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+251
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+16
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+70
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+126
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+37
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+26
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+42
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+60
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+216
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+192
2014-08-18	[X86][Haswell][SchedModel] Add architecture specific scheduling models.	Quentin Colombet	1	-0/+145
2014-05-08	Move late partial-unrolling thresholds into the processor definitions	Hal Finkel	1	-0/+3
2014-04-04	Revert r205599, the commit was not intended to have so many changes	Quentin Colombet	1	-912/+0
2014-04-04	[RegAllocGreedy][Last Chance Recoloring] Emit diagnostics when last chance	Quentin Colombet	1	-0/+912
2014-02-24	[X86][SchedModel] Add missing scheduling model for SSE related instructions.	Quentin Colombet	1	-0/+123
2014-01-29	[X86][SchedModel] Fix typos in the definitions of the ports for Haswell.	Quentin Colombet	1	-6/+8
2013-09-25	Mark the x86 machine model as incomplete. PR17367.	Andrew Trick	1	-0/+4
2013-06-21	Fix IMULX machine model. Multiple def operands require multiple SchedWrites.	Andrew Trick	1	-0/+1
2013-06-15	Support BufferSize on ProcResGroup for unified MOp schedulers.	Andrew Trick	1	-0/+6
2013-06-15	Update machine models. Specify buffer sizes for OOO processors.	Andrew Trick	1	-1/+1
2013-06-15	Machine Model: Add MicroOpBufferSize and resource BufferSize.	Andrew Trick	1	-1/+0
2013-04-13	X86 machine model: reduce SandyBridge and Haswell ILPWindow.	Andrew Trick	1	-1/+1
2013-04-02	The divide unit is not pipeline, but it is still buffered.	Andrew Trick	1	-2/+2
2013-03-28	Add the Haswell machine model.	Nadav Rotem	1	-0/+126