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path: root/lib/Target/X86/X86InstrTSX.td
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2015-01-06[X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.Craig Topper1-3/+6
Requires new AsmParserOperand types that detect 16-bit and 32/64-bit mode so that we choose the right instruction based on default sizing without predicates. This is necessary since predicates mess up the disassembler table building. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225256 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12Mark XACQUIRE_PREFIX/XRELEASE_PREFIX as isAsmParserOnly so they'll disappear ↵Craig Topper1-1/+2
from the disassembler table build without custom filtering code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-18Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.Stefanus Du Toit1-0/+7
For decoding, keep the current behavior of always decoding these as their REP versions. In the future, this could be improved to recognize the cases where these behave as XACQUIRE and XRELEASE and decode them as such. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184207 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Add XTEST codegen supportMichael Liao1-1/+5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178083 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-25x86 -- add the XTEST instructionDave Zarzycki1-0/+3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11Fixes disassembler crashes on 2013 Haswell RTM instructions.Kevin Enderby1-1/+1
rdar://13318048 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176828 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08Add support of RTM from TSX extensionMichael Liao1-0/+32
- Add RTM code generation support throught 3 X86 intrinsics: xbegin()/xend() to start/end a transaction region, and xabort() to abort a tranaction region git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8