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path: root/lib/Target/X86/X86InstrArithmetic.td
AgeCommit message (Expand)AuthorFilesLines
2015-10-11[X86] Fix CMP and TEST with al/ax/eax/rax to not mark EFLAGS as a use or al/a...Craig Topper1-27/+34
2015-08-11[X86] Allow merging of immediates within a basic block for code size savingsMichael Kuperstein1-4/+4
2015-03-31Fix the operand encoding in the test instruction.Rafael Espindola1-4/+4
2015-01-08[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LE...Craig Topper1-2/+2
2015-01-06[X86] Make isel select the 2-byte register form of INC/DEC even in non-64-bit...Craig Topper1-72/+42
2015-01-05[X86] Remove the predicates from the register forms of the 2-byte inc and dec...Craig Topper1-43/+22
2014-12-29[X86] Fix some cases where some 8-bit instructions were marked as being conve...Craig Topper1-18/+24
2014-12-29[X86] Add the 0x82 instructions to the disassebmler. They are identical in fu...Craig Topper1-6/+35
2014-12-29[x86] Refactor some tablegen instruction info classes slightly to prepare for...Craig Topper1-29/+28
2014-12-29[x86] Remove unused classes from tablegen instruction info.Craig Topper1-23/+0
2014-12-18[X86] Remove unnecessary 'In64BitMode' predicate for instructions that alread...Craig Topper1-14/+11
2014-12-04[X86] Clean up whitespace as well as minor coding styleMichael Liao1-1/+1
2014-11-26Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.Craig Topper1-8/+8
2014-08-21[x86] Broadwell: ADOX/ADCX. Added _addcarryx_u{32|64} intrinsics to LLVM.Robert Khasanov1-20/+28
2014-07-10[X86] Mark pseudo instruction TEST8ri_NOEREX as hasSIdeEffects=0.Akira Hatanaka1-2/+4
2014-02-18Add an x86 prefix encoding for instructions that would decode to a different ...Craig Topper1-2/+2
2014-02-02Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 ...Craig Topper1-75/+69
2014-01-30[x86] Fix signed relocations for i64i32imm operandsDavid Woodhouse1-9/+9
2014-01-17Switch a few instructions to use RI instead I so they don't require REX_W to ...Craig Topper1-8/+8
2014-01-15Add OpSize16 to the two byte forms of INC/DEC that we only use in 64-bit mode...Craig Topper1-5/+5
2014-01-14Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix ...Craig Topper1-4/+4
2014-01-08[x86] Add OpSize16 to instructions that need itDavid Woodhouse1-31/+40
2014-01-05Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode ...Craig Topper1-2/+3
2014-01-05Add a new x86 specific instruction flag to force some isCodeGenOnly instructi...Craig Topper1-0/+2
2013-12-20[x86] Rename In32BitMode predicate to Not64BitModeEric Christopher1-13/+13
2013-10-07Add disassembler support for long encodings for INC/DEC in 32-bit mode.Craig Topper1-1/+15
2013-09-13Adds support for Atom Silvermont (SLM) - -march=slmPreston Gurd1-28/+40
2013-07-31Changed register names (and pointer keywords) to be lower case when using Int...Craig Topper1-16/+16
2013-06-21Fix IMULX machine model. Multiple def operands require multiple SchedWrites.Andrew Trick1-4/+4
2013-06-11Correct the def registers for the 8bit x86 divide instructions toEric Christopher1-4/+4
2013-05-29X86: Fix Defs/Uses for insts that imp-def/imp-use both an A-register and EFLAGS.Ahmed Bougacha1-66/+74
2013-03-26Annotate the remaining x86 instructions with SchedRW lists.Jakob Stoklund Olesen1-2/+2
2013-03-20Annotate remaining IIC_BIN_* instructions.Jakob Stoklund Olesen1-5/+10
2013-03-18Annotate X86 arithmetic instructions with SchedRW lists.Jakob Stoklund Olesen1-60/+112
2013-02-14added basic support for Intel ADX instructionsKay Tiong Khoo1-0/+46
2013-02-01Two changes relevant to LEA and x32:David Sehr1-2/+2
2013-01-07Remove # from the beginning and end of def names.Craig Topper1-123/+123
2013-01-05Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions h...Craig Topper1-1/+1
2013-01-03Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap whe...Michael Gottesman1-1/+1
2013-01-03Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividi...Craig Topper1-1/+1
2012-12-27Mark the divide instructions as hasSideEffects=0.Craig Topper1-0/+2
2012-12-27Add hasSideEffects=0 to CMP*rr_REV.Craig Topper1-0/+1
2012-12-26Mark the AL/AX/EAX forms of the basic arithmetic operations has never having ...Craig Topper1-43/+44
2012-12-26Mark all the _REV instructions as not having side effects. They aren't really...Craig Topper1-0/+1
2012-12-17Simplify BMI ANDN matching to use patterns instead of a DAG combine. Also add...Craig Topper1-2/+13
2012-08-08X86: enable CSE between CMP and SUBManman Ren1-0/+2
2012-07-18X86: remove redundant cmp against zero.Manman Ren1-1/+1
2012-07-06X86: peephole optimization to remove cmp instructionManman Ren1-0/+2
2012-06-03Revert r157831Manman Ren1-2/+0
2012-06-01X86: peephole optimization to remove cmp instructionManman Ren1-0/+2
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