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path: root/lib/Target/Mips/Mips32r6InstrInfo.td
AgeCommit message (Expand)AuthorFilesLines
2015-05-27[mips][microMIPSr6] Implement BEQZALC, BGEZALC, BGTZALC, BLEZALC, BLTZALC and...Jozef Kolek1-7/+8
2015-05-19[mips][microMIPSr6] Implement DIV, DIVU, MOD and MODU instructionsZoran Jovanovic1-5/+6
2015-05-18[mips][microMIPSr6] Implement LSA instructionJozef Kolek1-2/+2
2015-05-18[mips][microMIPSr6] Implement ALIGN and AUI instructionsJozef Kolek1-4/+5
2015-05-13[mips][microMIPSr6] Implement CLO and CLZ instructionsJozef Kolek1-3/+4
2015-05-12[mips][microMIPSr6] Implement SELEQZ and SELNEZ instructionsJozef Kolek1-3/+4
2015-05-08[mips][microMIPSr6] Implement ALUIPC and AUIPC instructionsJozef Kolek1-3/+4
2015-05-08[mips][microMIPSr6] Implement ADDIUPC and LWPC instructionsJozef Kolek1-3/+3
2015-05-07[mips][microMIPSr6] Implement JIALC and JIC instructionsJozef Kolek1-3/+4
2015-05-07[mips] Add the SoftFloat MipsSubtarget feature.Toma Tabacu1-40/+40
2015-04-29[mips][microMIPSr6] Implement MUL, MUH, MULU and MUHU instructionsZoran Jovanovic1-5/+5
2015-04-21[mips][microMIPSr6] Implement CACHE and PREF instructionsJozef Kolek1-3/+3
2015-04-20[mips][microMIPSr6] Implement BITSWAP instructionJozef Kolek1-2/+3
2015-04-20[mips][microMIPSr6] Implement BALC and BC instructionsJozef Kolek1-3/+4
2015-01-29[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 i...Vladimir Medic1-0/+1
2015-01-26When disassembler meets compact jump instructions for r6 it crashes as the ac...Vladimir Medic1-1/+0
2015-01-21[Mips][Disassembler]When disassembler meets load/store from coprocessor 2 ins...Vladimir Medic1-0/+2
2015-01-15[mips] Fix a typo in the compare patterns for MIPS32r6/MIPS64r6.Daniel Sanders1-2/+2
2014-07-22[mips] Fix two patterns that select i32's (for MIPS32r6) / i64's (for MIPS64r6)Sasa Stankovic1-2/+2
2014-07-09[mips][mips64r6] Correct select patterns that have the condition or true/fals...Daniel Sanders1-8/+8
2014-07-09[mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructionsDaniel Sanders1-31/+31
2014-07-09[mips][mips64r6] Use JALR for returns instead of JR (which is not available o...Daniel Sanders1-0/+1
2014-06-24[mips] Added support for assembling sdbbp.Daniel Sanders1-7/+24
2014-06-20ps][mips64r6] Added LSA/DLSA instructionsZoran Jovanovic1-1/+13
2014-06-18[mips][mips64r6] Add BLTC and BLTUC instructionsZoran Jovanovic1-2/+10
2014-06-16[mips][mips64r6] ssnop is deprecated on MIPS32r6/MIPS64r6Daniel Sanders1-1/+0
2014-06-16[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6Daniel Sanders1-1/+24
2014-06-16[mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.Daniel Sanders1-1/+26
2014-06-16[mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rat...Daniel Sanders1-5/+31
2014-06-13[mips] Add cache and pref instructionsDaniel Sanders1-1/+16
2014-06-13[mips][mips64r6] bc1any[24] are not available on MIPS32r6/MIPS64r6Daniel Sanders1-1/+0
2014-06-13[mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal i...Daniel Sanders1-2/+8
2014-06-12[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6Daniel Sanders1-1/+0
2014-06-12[mips][mips64r6] bc2[ft] are not available on MIPS32r6/MIPS64r6Daniel Sanders1-2/+0
2014-06-12[mips][mips64r6] [sl][duw]xc1 are not available on MIPS32r6/MIPS64r6Daniel Sanders1-6/+0
2014-06-12[mips][mips64r6] prefx is not available on MIPS32r6/MIPS64r6Daniel Sanders1-1/+0
2014-06-12[mips][mips64r6] 80 col corrections that should have been in r210777.Daniel Sanders1-10/+20
2014-06-12[mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available ...Daniel Sanders1-21/+111
2014-06-12[mips][mips64r6] jalx is not available on MIPS32r6/MIPS64r6Daniel Sanders1-1/+0
2014-06-12[mips][mips64r6] Add bgec and bgeuc instructionsZoran Jovanovic1-4/+12
2014-06-12[mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not ava...Daniel Sanders1-1/+0
2014-06-12[mips][mips64r6] madd/maddu/msub/msubu are not available on MIPS32r6/MIPS64r6Daniel Sanders1-1/+0
2014-06-12[mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, d...Daniel Sanders1-14/+19
2014-06-11[mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register ...Matheus Almeida1-1/+10
2014-06-09[mips][mips64r6] Add LDPC instructionZoran Jovanovic1-5/+6
2014-05-23[mips][mips64r6] t(eq|ge|lt|ne)i and t(ge|lt)iu are not available in MIPS32r6...Daniel Sanders1-1/+0
2014-05-23[mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6Daniel Sanders1-1/+0
2014-05-22[mips][mips64r6] addi is not available on MIPS32r6/MIPS64r6Daniel Sanders1-1/+0
2014-05-22[mips][mips64r6] Test that paired single instructions are invalidDaniel Sanders1-1/+0
2014-05-22[mips][mips64r6] Add b[on]vcDaniel Sanders1-26/+36