~nh/llvm - Misc LLVM things, mostly radeonsi (AMDGPU)

Age	Commit message (Expand)	Author	Files	Lines
2013-12-07	Add a RequireStructuredCFG Field to TargetMachine.	Vincent Lejeune	1	-0/+6
2013-11-18	Docs: tweak code-block spacing.	Ahmed Bougacha	1	-0/+1
2013-11-17	TableGen: Generate an enum for all named Operand types in tblgen'd InstrInfo.	Ahmed Bougacha	1	-0/+44
2013-11-17	Docs: Clearly separate Operand-related paragraphs.	Ahmed Bougacha	1	-0/+6
2013-11-17	Docs: Fix typo: NoIntinerary -> NoItinerary.	Ahmed Bougacha	1	-1/+1
2013-09-03	TableGen: Enumerate Schedule Model too.	Vincent Lejeune	1	-0/+5
2013-07-31	Revert "TableGen: Enumerate Schedule Model too."	Tom Stellard	1	-5/+0
2013-07-31	TableGen: Enumerate Schedule Model too.	Vincent Lejeune	1	-0/+5
2013-07-01	[docs] Amend confusing title	Sean Silva	1	-3/+3
2013-06-25	TableGen: Generate a function for getting operand indices based on their defi...	Tom Stellard	1	-0/+41
2013-03-24	Give Sparc instruction patterns direct types instead of register classes.	Jakob Stoklund Olesen	1	-7/+7
2013-01-10	remove the rest of the "written by" lines in the documentation. It is	Chris Lattner	1	-2/+0
2012-12-31	docs: Fix FIXME	Sean Silva	1	-0/+5
2012-12-12	Documentation: convert WritingAnLLVMPass.html to reST.	Dmitri Gribenko	1	-2/+2
2012-12-01	Documentation: convert WritingAnLLVMBackend.html to reST	Dmitri Gribenko	1	-0/+1835