diff options
-rw-r--r-- | CMakeLists.txt | 2 | ||||
-rw-r--r-- | autoconf/configure.ac | 5 | ||||
-rwxr-xr-x | configure | 5 | ||||
-rw-r--r-- | docs/AMDGPUUsage.rst (renamed from docs/R600Usage.rst) | 10 | ||||
-rw-r--r-- | docs/CompilerWriterInfo.rst | 4 | ||||
-rw-r--r-- | docs/GettingStarted.rst | 2 | ||||
-rw-r--r-- | docs/index.rst | 6 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPU.h (renamed from lib/Target/R600/AMDGPU.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPU.td (renamed from lib/Target/R600/AMDGPU.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp (renamed from lib/Target/R600/AMDGPUAlwaysInlinePass.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp (renamed from lib/Target/R600/AMDGPUAsmPrinter.cpp) | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUAsmPrinter.h (renamed from lib/Target/R600/AMDGPUAsmPrinter.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUCallingConv.td (renamed from lib/Target/R600/AMDGPUCallingConv.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUFrameLowering.cpp (renamed from lib/Target/R600/AMDGPUFrameLowering.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUFrameLowering.h (renamed from lib/Target/R600/AMDGPUFrameLowering.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp (renamed from lib/Target/R600/AMDGPUISelDAGToDAG.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUISelLowering.cpp (renamed from lib/Target/R600/AMDGPUISelLowering.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUISelLowering.h (renamed from lib/Target/R600/AMDGPUISelLowering.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUInstrInfo.cpp (renamed from lib/Target/R600/AMDGPUInstrInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUInstrInfo.h (renamed from lib/Target/R600/AMDGPUInstrInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUInstrInfo.td (renamed from lib/Target/R600/AMDGPUInstrInfo.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUInstructions.td (renamed from lib/Target/R600/AMDGPUInstructions.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp (renamed from lib/Target/R600/AMDGPUIntrinsicInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h (renamed from lib/Target/R600/AMDGPUIntrinsicInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUIntrinsics.td (renamed from lib/Target/R600/AMDGPUIntrinsics.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUMCInstLower.cpp (renamed from lib/Target/R600/AMDGPUMCInstLower.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUMCInstLower.h (renamed from lib/Target/R600/AMDGPUMCInstLower.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUMachineFunction.cpp (renamed from lib/Target/R600/AMDGPUMachineFunction.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUMachineFunction.h (renamed from lib/Target/R600/AMDGPUMachineFunction.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp (renamed from lib/Target/R600/AMDGPUPromoteAlloca.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPURegisterInfo.cpp (renamed from lib/Target/R600/AMDGPURegisterInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPURegisterInfo.h (renamed from lib/Target/R600/AMDGPURegisterInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPURegisterInfo.td (renamed from lib/Target/R600/AMDGPURegisterInfo.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUSubtarget.cpp (renamed from lib/Target/R600/AMDGPUSubtarget.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUSubtarget.h (renamed from lib/Target/R600/AMDGPUSubtarget.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (renamed from lib/Target/R600/AMDGPUTargetMachine.cpp) | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUTargetMachine.h (renamed from lib/Target/R600/AMDGPUTargetMachine.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (renamed from lib/Target/R600/AMDGPUTargetTransformInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (renamed from lib/Target/R600/AMDGPUTargetTransformInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDILCFGStructurizer.cpp (renamed from lib/Target/R600/AMDILCFGStructurizer.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDKernelCodeT.h (renamed from lib/Target/R600/AMDKernelCodeT.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (renamed from lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp) | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AsmParser/CMakeLists.txt | 3 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AsmParser/LLVMBuild.txt (renamed from lib/Target/R600/MCTargetDesc/LLVMBuild.txt) | 10 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AsmParser/Makefile (renamed from lib/Target/R600/AsmParser/Makefile) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/CIInstructions.td (renamed from lib/Target/R600/CIInstructions.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/CMakeLists.txt (renamed from lib/Target/R600/CMakeLists.txt) | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/CaymanInstructions.td (renamed from lib/Target/R600/CaymanInstructions.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/EvergreenInstructions.td (renamed from lib/Target/R600/EvergreenInstructions.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp (renamed from lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h (renamed from lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/InstPrinter/CMakeLists.txt | 3 | ||||
-rw-r--r-- | lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt (renamed from lib/Target/R600/InstPrinter/LLVMBuild.txt) | 8 | ||||
-rw-r--r-- | lib/Target/AMDGPU/InstPrinter/Makefile (renamed from lib/Target/R600/InstPrinter/Makefile) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/LLVMBuild.txt (renamed from lib/Target/R600/LLVMBuild.txt) | 10 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp (renamed from lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp (renamed from lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUFixupKinds.h (renamed from lib/Target/R600/MCTargetDesc/AMDGPUFixupKinds.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp (renamed from lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h (renamed from lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp (renamed from lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h (renamed from lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp (renamed from lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp) | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h (renamed from lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt (renamed from lib/Target/R600/MCTargetDesc/CMakeLists.txt) | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt (renamed from lib/Target/R600/AsmParser/LLVMBuild.txt) | 10 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/Makefile (renamed from lib/Target/R600/MCTargetDesc/Makefile) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp (renamed from lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp (renamed from lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/Makefile (renamed from lib/Target/R600/Makefile) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/Processors.td (renamed from lib/Target/R600/Processors.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600ClauseMergePass.cpp (renamed from lib/Target/R600/R600ClauseMergePass.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp (renamed from lib/Target/R600/R600ControlFlowFinalizer.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600Defines.h (renamed from lib/Target/R600/R600Defines.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600EmitClauseMarkers.cpp (renamed from lib/Target/R600/R600EmitClauseMarkers.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp (renamed from lib/Target/R600/R600ExpandSpecialInstrs.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600ISelLowering.cpp (renamed from lib/Target/R600/R600ISelLowering.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600ISelLowering.h (renamed from lib/Target/R600/R600ISelLowering.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600InstrFormats.td (renamed from lib/Target/R600/R600InstrFormats.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600InstrInfo.cpp (renamed from lib/Target/R600/R600InstrInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600InstrInfo.h (renamed from lib/Target/R600/R600InstrInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600Instructions.td (renamed from lib/Target/R600/R600Instructions.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600Intrinsics.td (renamed from lib/Target/R600/R600Intrinsics.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600MachineFunctionInfo.cpp (renamed from lib/Target/R600/R600MachineFunctionInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600MachineFunctionInfo.h (renamed from lib/Target/R600/R600MachineFunctionInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600MachineScheduler.cpp (renamed from lib/Target/R600/R600MachineScheduler.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600MachineScheduler.h (renamed from lib/Target/R600/R600MachineScheduler.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp (renamed from lib/Target/R600/R600OptimizeVectorRegisters.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600Packetizer.cpp (renamed from lib/Target/R600/R600Packetizer.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600RegisterInfo.cpp (renamed from lib/Target/R600/R600RegisterInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600RegisterInfo.h (renamed from lib/Target/R600/R600RegisterInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600RegisterInfo.td (renamed from lib/Target/R600/R600RegisterInfo.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600Schedule.td (renamed from lib/Target/R600/R600Schedule.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp (renamed from lib/Target/R600/R600TextureIntrinsicsReplacer.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/R700Instructions.td (renamed from lib/Target/R600/R700Instructions.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIAnnotateControlFlow.cpp (renamed from lib/Target/R600/SIAnnotateControlFlow.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIDefines.h (renamed from lib/Target/R600/SIDefines.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp (renamed from lib/Target/R600/SIFixControlFlowLiveIntervals.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIFixSGPRCopies.cpp (renamed from lib/Target/R600/SIFixSGPRCopies.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp (renamed from lib/Target/R600/SIFixSGPRLiveRanges.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIFoldOperands.cpp (renamed from lib/Target/R600/SIFoldOperands.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIISelLowering.cpp (renamed from lib/Target/R600/SIISelLowering.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIISelLowering.h (renamed from lib/Target/R600/SIISelLowering.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIInsertWaits.cpp (renamed from lib/Target/R600/SIInsertWaits.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIInstrFormats.td (renamed from lib/Target/R600/SIInstrFormats.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIInstrInfo.cpp (renamed from lib/Target/R600/SIInstrInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIInstrInfo.h (renamed from lib/Target/R600/SIInstrInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIInstrInfo.td (renamed from lib/Target/R600/SIInstrInfo.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIInstructions.td (renamed from lib/Target/R600/SIInstructions.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIIntrinsics.td (renamed from lib/Target/R600/SIIntrinsics.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SILoadStoreOptimizer.cpp (renamed from lib/Target/R600/SILoadStoreOptimizer.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SILowerControlFlow.cpp (renamed from lib/Target/R600/SILowerControlFlow.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SILowerI1Copies.cpp (renamed from lib/Target/R600/SILowerI1Copies.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIMachineFunctionInfo.cpp (renamed from lib/Target/R600/SIMachineFunctionInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIMachineFunctionInfo.h (renamed from lib/Target/R600/SIMachineFunctionInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIPrepareScratchRegs.cpp (renamed from lib/Target/R600/SIPrepareScratchRegs.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIRegisterInfo.cpp (renamed from lib/Target/R600/SIRegisterInfo.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIRegisterInfo.h (renamed from lib/Target/R600/SIRegisterInfo.h) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIRegisterInfo.td (renamed from lib/Target/R600/SIRegisterInfo.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SISchedule.td (renamed from lib/Target/R600/SISchedule.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SIShrinkInstructions.cpp (renamed from lib/Target/R600/SIShrinkInstructions.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/SITypeRewriter.cpp (renamed from lib/Target/R600/SITypeRewriter.cpp) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp (renamed from lib/Target/R600/TargetInfo/AMDGPUTargetInfo.cpp) | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/TargetInfo/CMakeLists.txt | 3 | ||||
-rw-r--r-- | lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt (renamed from lib/Target/R600/TargetInfo/LLVMBuild.txt) | 8 | ||||
-rw-r--r-- | lib/Target/AMDGPU/TargetInfo/Makefile (renamed from lib/Target/R600/TargetInfo/Makefile) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/VIInstrFormats.td (renamed from lib/Target/R600/VIInstrFormats.td) | 0 | ||||
-rw-r--r-- | lib/Target/AMDGPU/VIInstructions.td (renamed from lib/Target/R600/VIInstructions.td) | 0 | ||||
-rw-r--r-- | lib/Target/LLVMBuild.txt | 2 | ||||
-rw-r--r-- | lib/Target/R600/AsmParser/CMakeLists.txt | 3 | ||||
-rw-r--r-- | lib/Target/R600/InstPrinter/CMakeLists.txt | 3 | ||||
-rw-r--r-- | lib/Target/R600/TargetInfo/CMakeLists.txt | 3 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/32-bit-local-address-space.ll (renamed from test/CodeGen/R600/32-bit-local-address-space.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/README (renamed from test/CodeGen/R600/README) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/add-debug.ll (renamed from test/CodeGen/R600/add-debug.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/add.ll (renamed from test/CodeGen/R600/add.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/add_i64.ll (renamed from test/CodeGen/R600/add_i64.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/address-space.ll (renamed from test/CodeGen/R600/address-space.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/and.ll (renamed from test/CodeGen/R600/and.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/anyext.ll (renamed from test/CodeGen/R600/anyext.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/array-ptr-calc-i32.ll (renamed from test/CodeGen/R600/array-ptr-calc-i32.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/array-ptr-calc-i64.ll (renamed from test/CodeGen/R600/array-ptr-calc-i64.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll (renamed from test/CodeGen/R600/atomic_cmp_swap_local.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/atomic_load_add.ll (renamed from test/CodeGen/R600/atomic_load_add.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/atomic_load_sub.ll (renamed from test/CodeGen/R600/atomic_load_sub.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/basic-branch.ll (renamed from test/CodeGen/R600/basic-branch.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/basic-loop.ll (renamed from test/CodeGen/R600/basic-loop.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/bfe_uint.ll (renamed from test/CodeGen/R600/bfe_uint.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/bfi_int.ll (renamed from test/CodeGen/R600/bfi_int.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/big_alu.ll (renamed from test/CodeGen/R600/big_alu.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/bitcast.ll (renamed from test/CodeGen/R600/bitcast.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/bswap.ll (renamed from test/CodeGen/R600/bswap.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/build_vector.ll (renamed from test/CodeGen/R600/build_vector.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/call.ll (renamed from test/CodeGen/R600/call.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/call_fs.ll (renamed from test/CodeGen/R600/call_fs.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/cayman-loop-bug.ll (renamed from test/CodeGen/R600/cayman-loop-bug.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/cf-stack-bug.ll (renamed from test/CodeGen/R600/cf-stack-bug.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/cf_end.ll (renamed from test/CodeGen/R600/cf_end.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/cgp-addressing-modes.ll (renamed from test/CodeGen/R600/cgp-addressing-modes.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/coalescer_remat.ll (renamed from test/CodeGen/R600/coalescer_remat.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll (renamed from test/CodeGen/R600/codegen-prepare-addrmode-sext.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/combine_vloads.ll (renamed from test/CodeGen/R600/combine_vloads.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/commute-compares.ll (renamed from test/CodeGen/R600/commute-compares.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/commute_modifiers.ll (renamed from test/CodeGen/R600/commute_modifiers.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/complex-folding.ll (renamed from test/CodeGen/R600/complex-folding.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/concat_vectors.ll (renamed from test/CodeGen/R600/concat_vectors.ll) | 0 | ||||
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-rw-r--r-- | test/CodeGen/AMDGPU/srem.ll (renamed from test/CodeGen/R600/srem.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/srl.ll (renamed from test/CodeGen/R600/srl.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/ssubo.ll (renamed from test/CodeGen/R600/ssubo.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/store-barrier.ll (renamed from test/CodeGen/R600/store-barrier.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/store-v3i32.ll (renamed from test/CodeGen/R600/store-v3i32.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/store-v3i64.ll (renamed from test/CodeGen/R600/store-v3i64.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/store-vector-ptrs.ll (renamed from test/CodeGen/R600/store-vector-ptrs.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/store.ll (renamed from test/CodeGen/R600/store.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/store.r600.ll (renamed from test/CodeGen/R600/store.r600.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/structurize.ll (renamed from test/CodeGen/R600/structurize.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/structurize1.ll (renamed from test/CodeGen/R600/structurize1.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/sub.ll (renamed from test/CodeGen/R600/sub.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/subreg-coalescer-crash.ll (renamed from test/CodeGen/R600/subreg-coalescer-crash.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/subreg-eliminate-dead.ll (renamed from test/CodeGen/R600/subreg-eliminate-dead.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/swizzle-export.ll (renamed from test/CodeGen/R600/swizzle-export.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/tex-clause-antidep.ll (renamed from test/CodeGen/R600/tex-clause-antidep.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/texture-input-merge.ll (renamed from test/CodeGen/R600/texture-input-merge.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/trunc-cmp-constant.ll (renamed from test/CodeGen/R600/trunc-cmp-constant.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll (renamed from test/CodeGen/R600/trunc-store-f64-to-f16.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/trunc-store-i1.ll (renamed from test/CodeGen/R600/trunc-store-i1.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll (renamed from test/CodeGen/R600/trunc-vector-store-assertion-failure.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/trunc.ll (renamed from test/CodeGen/R600/trunc.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/tti-unroll-prefs.ll (renamed from test/CodeGen/R600/tti-unroll-prefs.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/uaddo.ll (renamed from test/CodeGen/R600/uaddo.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/udiv.ll (renamed from test/CodeGen/R600/udiv.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/udivrem.ll (renamed from test/CodeGen/R600/udivrem.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/udivrem24.ll (renamed from test/CodeGen/R600/udivrem24.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/udivrem64.ll (renamed from test/CodeGen/R600/udivrem64.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/uint_to_fp.f64.ll (renamed from test/CodeGen/R600/uint_to_fp.f64.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/uint_to_fp.ll (renamed from test/CodeGen/R600/uint_to_fp.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/unaligned-load-store.ll (renamed from test/CodeGen/R600/unaligned-load-store.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll (renamed from test/CodeGen/R600/unhandled-loop-condition-assertion.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/unroll.ll (renamed from test/CodeGen/R600/unroll.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/unsupported-cc.ll (renamed from test/CodeGen/R600/unsupported-cc.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/urecip.ll (renamed from test/CodeGen/R600/urecip.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/urem.ll (renamed from test/CodeGen/R600/urem.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll (renamed from test/CodeGen/R600/use-sgpr-multiple-times.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/usubo.ll (renamed from test/CodeGen/R600/usubo.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/v1i64-kernel-arg.ll (renamed from test/CodeGen/R600/v1i64-kernel-arg.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/v_cndmask.ll (renamed from test/CodeGen/R600/v_cndmask.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/valu-i1.ll (renamed from test/CodeGen/R600/valu-i1.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/vector-alloca.ll (renamed from test/CodeGen/R600/vector-alloca.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/vertex-fetch-encoding.ll (renamed from test/CodeGen/R600/vertex-fetch-encoding.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/vop-shrink.ll (renamed from test/CodeGen/R600/vop-shrink.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/vselect.ll (renamed from test/CodeGen/R600/vselect.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/vselect64.ll (renamed from test/CodeGen/R600/vselect64.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/vtx-fetch-branch.ll (renamed from test/CodeGen/R600/vtx-fetch-branch.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/vtx-schedule.ll (renamed from test/CodeGen/R600/vtx-schedule.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/wait.ll (renamed from test/CodeGen/R600/wait.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/work-item-intrinsics.ll (renamed from test/CodeGen/R600/work-item-intrinsics.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/wrong-transalu-pos-fix.ll (renamed from test/CodeGen/R600/wrong-transalu-pos-fix.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/xor.ll (renamed from test/CodeGen/R600/xor.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/zero_extend.ll (renamed from test/CodeGen/R600/zero_extend.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/R600/lit.local.cfg | 2 | ||||
-rw-r--r-- | test/MC/AMDGPU/ds-err.s (renamed from test/MC/R600/ds-err.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/ds.s (renamed from test/MC/R600/ds.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/flat.s (renamed from test/MC/R600/flat.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/lit.local.cfg | 2 | ||||
-rw-r--r-- | test/MC/AMDGPU/mubuf.s (renamed from test/MC/R600/mubuf.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/smrd.s (renamed from test/MC/R600/smrd.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/sop1-err.s (renamed from test/MC/R600/sop1-err.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/sop1.s (renamed from test/MC/R600/sop1.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/sop2.s (renamed from test/MC/R600/sop2.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/sopc.s (renamed from test/MC/R600/sopc.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/sopk.s (renamed from test/MC/R600/sopk.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/sopp.s (renamed from test/MC/R600/sopp.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/vop1.s (renamed from test/MC/R600/vop1.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/vop2-err.s (renamed from test/MC/R600/vop2-err.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/vop2.s (renamed from test/MC/R600/vop2.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/vop3-errs.s (renamed from test/MC/R600/vop3-errs.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/vop3.s (renamed from test/MC/R600/vop3.s) | 0 | ||||
-rw-r--r-- | test/MC/AMDGPU/vopc.s (renamed from test/MC/R600/vopc.s) | 0 | ||||
-rw-r--r-- | test/MC/R600/lit.local.cfg | 2 |
552 files changed, 62 insertions, 60 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt index 026fe479abd..da731497997 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -176,6 +176,7 @@ set(LLVM_INCLUDE_DIR ${CMAKE_CURRENT_BINARY_DIR}/include) set(LLVM_ALL_TARGETS AArch64 + AMDGPU ARM BPF CppBackend @@ -184,7 +185,6 @@ set(LLVM_ALL_TARGETS MSP430 NVPTX PowerPC - R600 Sparc SystemZ X86 diff --git a/autoconf/configure.ac b/autoconf/configure.ac index 11ba0511799..5b70fbd1bbf 100644 --- a/autoconf/configure.ac +++ b/autoconf/configure.ac @@ -1097,7 +1097,7 @@ if test "$llvm_cv_enable_crash_overrides" = "yes" ; then fi dnl List all possible targets -ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600 BPF" +ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ AMDGPU BPF" AC_SUBST(ALL_TARGETS,$ALL_TARGETS) dnl Allow specific targets to be specified for building (or not) @@ -1132,7 +1132,8 @@ case "$enableval" in hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; nvptx) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;; - r600) TARGETS_TO_BUILD="R600 $TARGETS_TO_BUILD" ;; + amdgpu) ;& + r600) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;; host) case "$llvm_cv_target_arch" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; diff --git a/configure b/configure index 6cb9f2d9281..73fce67b058 100755 --- a/configure +++ b/configure @@ -5628,7 +5628,7 @@ _ACEOF fi -ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600 BPF" +ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ AMDGPU BPF" ALL_TARGETS=$ALL_TARGETS @@ -5665,7 +5665,8 @@ case "$enableval" in hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; nvptx) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;; - r600) TARGETS_TO_BUILD="R600 $TARGETS_TO_BUILD" ;; + amdgpu) ;& + r600) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;; host) case "$llvm_cv_target_arch" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; diff --git a/docs/R600Usage.rst b/docs/AMDGPUUsage.rst index 9bd16f46098..3cb41cebfff 100644 --- a/docs/R600Usage.rst +++ b/docs/AMDGPUUsage.rst @@ -1,11 +1,11 @@ -============================ -User Guide for R600 Back-end -============================ +============================== +User Guide for AMDGPU Back-end +============================== Introduction ============ -The R600 back-end provides ISA code generation for AMD GPUs, starting with +The AMDGPU back-end provides ISA code generation for AMD GPUs, starting with the R600 family up until the current Volcanic Islands (GCN Gen 3). @@ -14,7 +14,7 @@ Assembler The assembler is currently considered experimental. -For syntax examples look in test/MC/R600. +For syntax examples look in test/MC/AMDGPU. Below some of the currently supported features (modulo bugs). These all apply to the Southern Islands ISA, Sea Islands and Volcanic Islands diff --git a/docs/CompilerWriterInfo.rst b/docs/CompilerWriterInfo.rst index 2dfdc9b142d..900ba24e230 100644 --- a/docs/CompilerWriterInfo.rst +++ b/docs/CompilerWriterInfo.rst @@ -68,8 +68,8 @@ Other documents, collections, notes * `PowerPC64 alignment of long doubles (from GCC) <http://gcc.gnu.org/ml/gcc-patches/2003-09/msg00997.html>`_ * `Long branch stubs for powerpc64-linux (from binutils) <http://sources.redhat.com/ml/binutils/2002-04/msg00573.html>`_ -R600 ----- +AMDGPU +------ * `AMD R6xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R600_Instruction_Set_Architecture.pdf>`_ * `AMD R7xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R700-Family_Instruction_Set_Architecture.pdf>`_ diff --git a/docs/GettingStarted.rst b/docs/GettingStarted.rst index 18b3c1d87cc..212fa0b5833 100644 --- a/docs/GettingStarted.rst +++ b/docs/GettingStarted.rst @@ -711,7 +711,7 @@ used by people developing LLVM. | | as ``LLVM_ALL_TARGETS``, and can be set to include | | | out-of-tree targets. The default value includes: | | | ``AArch64, ARM, CppBackend, Hexagon, | -| | Mips, MSP430, NVPTX, PowerPC, R600, Sparc, | +| | Mips, MSP430, NVPTX, PowerPC, AMDGPU, Sparc, | | | SystemZ, X86, XCore``. | +-------------------------+----------------------------------------------------+ | LLVM_ENABLE_DOXYGEN | Build doxygen-based documentation from the source | diff --git a/docs/index.rst b/docs/index.rst index 2cc5b8bf095..0b681180970 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -252,7 +252,7 @@ For API clients and LLVM developers. WritingAnLLVMPass HowToUseAttributes NVPTXUsage - R600Usage + AMDGPUUsage StackMaps InAlloca BigEndianNEON @@ -338,8 +338,8 @@ For API clients and LLVM developers. :doc:`NVPTXUsage` This document describes using the NVPTX back-end to compile GPU kernels. -:doc:`R600Usage` - This document describes how to use the R600 back-end. +:doc:`AMDGPUUsage` + This document describes how to use the AMDGPU back-end. :doc:`StackMaps` LLVM support for mapping instruction addresses to the location of diff --git a/lib/Target/R600/AMDGPU.h b/lib/Target/AMDGPU/AMDGPU.h index 0a05d25189b..0a05d25189b 100644 --- a/lib/Target/R600/AMDGPU.h +++ b/lib/Target/AMDGPU/AMDGPU.h diff --git a/lib/Target/R600/AMDGPU.td b/lib/Target/AMDGPU/AMDGPU.td index 2e7e39a54d3..2e7e39a54d3 100644 --- a/lib/Target/R600/AMDGPU.td +++ b/lib/Target/AMDGPU/AMDGPU.td diff --git a/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp b/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp index 0b426bc63dd..0b426bc63dd 100644 --- a/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp +++ b/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp diff --git a/lib/Target/R600/AMDGPUAsmPrinter.cpp b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp index 56b50a9c159..29c2da61add 100644 --- a/lib/Target/R600/AMDGPUAsmPrinter.cpp +++ b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp @@ -80,7 +80,7 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm, return new AMDGPUAsmPrinter(tm, std::move(Streamer)); } -extern "C" void LLVMInitializeR600AsmPrinter() { +extern "C" void LLVMInitializeAMDGPUAsmPrinter() { TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass); TargetRegistry::RegisterAsmPrinter(TheGCNTarget, createAMDGPUAsmPrinterPass); } diff --git a/lib/Target/R600/AMDGPUAsmPrinter.h b/lib/Target/AMDGPU/AMDGPUAsmPrinter.h index 1acff3a3222..1acff3a3222 100644 --- a/lib/Target/R600/AMDGPUAsmPrinter.h +++ b/lib/Target/AMDGPU/AMDGPUAsmPrinter.h diff --git a/lib/Target/R600/AMDGPUCallingConv.td b/lib/Target/AMDGPU/AMDGPUCallingConv.td index 6ffa7a08358..6ffa7a08358 100644 --- a/lib/Target/R600/AMDGPUCallingConv.td +++ b/lib/Target/AMDGPU/AMDGPUCallingConv.td diff --git a/lib/Target/R600/AMDGPUFrameLowering.cpp b/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp index 8175786fb9b..8175786fb9b 100644 --- a/lib/Target/R600/AMDGPUFrameLowering.cpp +++ b/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp diff --git a/lib/Target/R600/AMDGPUFrameLowering.h b/lib/Target/AMDGPU/AMDGPUFrameLowering.h index 9f31be1af79..9f31be1af79 100644 --- a/lib/Target/R600/AMDGPUFrameLowering.h +++ b/lib/Target/AMDGPU/AMDGPUFrameLowering.h diff --git a/lib/Target/R600/AMDGPUISelDAGToDAG.cpp b/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp index df4461eac4d..df4461eac4d 100644 --- a/lib/Target/R600/AMDGPUISelDAGToDAG.cpp +++ b/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index d56838ec201..d56838ec201 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp diff --git a/lib/Target/R600/AMDGPUISelLowering.h b/lib/Target/AMDGPU/AMDGPUISelLowering.h index fbb7d3c8843..fbb7d3c8843 100644 --- a/lib/Target/R600/AMDGPUISelLowering.h +++ b/lib/Target/AMDGPU/AMDGPUISelLowering.h diff --git a/lib/Target/R600/AMDGPUInstrInfo.cpp b/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp index 15a3d543a68..15a3d543a68 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.cpp +++ b/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp diff --git a/lib/Target/R600/AMDGPUInstrInfo.h b/lib/Target/AMDGPU/AMDGPUInstrInfo.h index 86d3962b385..86d3962b385 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.h +++ b/lib/Target/AMDGPU/AMDGPUInstrInfo.h diff --git a/lib/Target/R600/AMDGPUInstrInfo.td b/lib/Target/AMDGPU/AMDGPUInstrInfo.td index b413897d9d2..b413897d9d2 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.td +++ b/lib/Target/AMDGPU/AMDGPUInstrInfo.td diff --git a/lib/Target/R600/AMDGPUInstructions.td b/lib/Target/AMDGPU/AMDGPUInstructions.td index 72cab39277c..72cab39277c 100644 --- a/lib/Target/R600/AMDGPUInstructions.td +++ b/lib/Target/AMDGPU/AMDGPUInstructions.td diff --git a/lib/Target/R600/AMDGPUIntrinsicInfo.cpp b/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp index e94bb6013d8..e94bb6013d8 100644 --- a/lib/Target/R600/AMDGPUIntrinsicInfo.cpp +++ b/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp diff --git a/lib/Target/R600/AMDGPUIntrinsicInfo.h b/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h index 4c95b5ec097..4c95b5ec097 100644 --- a/lib/Target/R600/AMDGPUIntrinsicInfo.h +++ b/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h diff --git a/lib/Target/R600/AMDGPUIntrinsics.td b/lib/Target/AMDGPU/AMDGPUIntrinsics.td index ab489cd2a4a..ab489cd2a4a 100644 --- a/lib/Target/R600/AMDGPUIntrinsics.td +++ b/lib/Target/AMDGPU/AMDGPUIntrinsics.td diff --git a/lib/Target/R600/AMDGPUMCInstLower.cpp b/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp index 20831460b93..20831460b93 100644 --- a/lib/Target/R600/AMDGPUMCInstLower.cpp +++ b/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp diff --git a/lib/Target/R600/AMDGPUMCInstLower.h b/lib/Target/AMDGPU/AMDGPUMCInstLower.h index d322fe072b2..d322fe072b2 100644 --- a/lib/Target/R600/AMDGPUMCInstLower.h +++ b/lib/Target/AMDGPU/AMDGPUMCInstLower.h diff --git a/lib/Target/R600/AMDGPUMachineFunction.cpp b/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp index 21c7da66323..21c7da66323 100644 --- a/lib/Target/R600/AMDGPUMachineFunction.cpp +++ b/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp diff --git a/lib/Target/R600/AMDGPUMachineFunction.h b/lib/Target/AMDGPU/AMDGPUMachineFunction.h index f5e4694e76f..f5e4694e76f 100644 --- a/lib/Target/R600/AMDGPUMachineFunction.h +++ b/lib/Target/AMDGPU/AMDGPUMachineFunction.h diff --git a/lib/Target/R600/AMDGPUPromoteAlloca.cpp b/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp index 4a65bfc57f1..4a65bfc57f1 100644 --- a/lib/Target/R600/AMDGPUPromoteAlloca.cpp +++ b/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp diff --git a/lib/Target/R600/AMDGPURegisterInfo.cpp b/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp index 3ca0eca3417..3ca0eca3417 100644 --- a/lib/Target/R600/AMDGPURegisterInfo.cpp +++ b/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp diff --git a/lib/Target/R600/AMDGPURegisterInfo.h b/lib/Target/AMDGPU/AMDGPURegisterInfo.h index cfd800bdc70..cfd800bdc70 100644 --- a/lib/Target/R600/AMDGPURegisterInfo.h +++ b/lib/Target/AMDGPU/AMDGPURegisterInfo.h diff --git a/lib/Target/R600/AMDGPURegisterInfo.td b/lib/Target/AMDGPU/AMDGPURegisterInfo.td index 835a1464395..835a1464395 100644 --- a/lib/Target/R600/AMDGPURegisterInfo.td +++ b/lib/Target/AMDGPU/AMDGPURegisterInfo.td diff --git a/lib/Target/R600/AMDGPUSubtarget.cpp b/lib/Target/AMDGPU/AMDGPUSubtarget.cpp index 605ccd0e136..605ccd0e136 100644 --- a/lib/Target/R600/AMDGPUSubtarget.cpp +++ b/lib/Target/AMDGPU/AMDGPUSubtarget.cpp diff --git a/lib/Target/R600/AMDGPUSubtarget.h b/lib/Target/AMDGPU/AMDGPUSubtarget.h index 0d40d14f820..0d40d14f820 100644 --- a/lib/Target/R600/AMDGPUSubtarget.h +++ b/lib/Target/AMDGPU/AMDGPUSubtarget.h diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index d65c010888a..a9a911a8efe 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -37,7 +37,7 @@ using namespace llvm; -extern "C" void LLVMInitializeR600Target() { +extern "C" void LLVMInitializeAMDGPUTarget() { // Register the target RegisterTargetMachine<R600TargetMachine> X(TheAMDGPUTarget); RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget); diff --git a/lib/Target/R600/AMDGPUTargetMachine.h b/lib/Target/AMDGPU/AMDGPUTargetMachine.h index 14792e347a7..14792e347a7 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.h +++ b/lib/Target/AMDGPU/AMDGPUTargetMachine.h diff --git a/lib/Target/R600/AMDGPUTargetTransformInfo.cpp b/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp index 6dacc742b12..6dacc742b12 100644 --- a/lib/Target/R600/AMDGPUTargetTransformInfo.cpp +++ b/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp diff --git a/lib/Target/R600/AMDGPUTargetTransformInfo.h b/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h index 791c84e6f28..791c84e6f28 100644 --- a/lib/Target/R600/AMDGPUTargetTransformInfo.h +++ b/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h diff --git a/lib/Target/R600/AMDILCFGStructurizer.cpp b/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp index c9b25a1a0b8..c9b25a1a0b8 100644 --- a/lib/Target/R600/AMDILCFGStructurizer.cpp +++ b/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp diff --git a/lib/Target/R600/AMDKernelCodeT.h b/lib/Target/AMDGPU/AMDKernelCodeT.h index 4d3041ff3db..4d3041ff3db 100644 --- a/lib/Target/R600/AMDKernelCodeT.h +++ b/lib/Target/AMDGPU/AMDKernelCodeT.h diff --git a/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp b/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 02a63604970..0c9a68804a3 100644 --- a/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp +++ b/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -1369,7 +1369,7 @@ void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) { } /// Force static initialization. -extern "C" void LLVMInitializeR600AsmParser() { +extern "C" void LLVMInitializeAMDGPUAsmParser() { RegisterMCAsmParser<AMDGPUAsmParser> A(TheAMDGPUTarget); RegisterMCAsmParser<AMDGPUAsmParser> B(TheGCNTarget); } diff --git a/lib/Target/AMDGPU/AsmParser/CMakeLists.txt b/lib/Target/AMDGPU/AsmParser/CMakeLists.txt new file mode 100644 index 00000000000..21ddc4eb83d --- /dev/null +++ b/lib/Target/AMDGPU/AsmParser/CMakeLists.txt @@ -0,0 +1,3 @@ +add_llvm_library(LLVMAMDGPUAsmParser + AMDGPUAsmParser.cpp + ) diff --git a/lib/Target/R600/MCTargetDesc/LLVMBuild.txt b/lib/Target/AMDGPU/AsmParser/LLVMBuild.txt index 74b8ca09ae1..63d44d1e06f 100644 --- a/lib/Target/R600/MCTargetDesc/LLVMBuild.txt +++ b/lib/Target/AMDGPU/AsmParser/LLVMBuild.txt @@ -1,4 +1,4 @@ -;===- ./lib/Target/R600/MCTargetDesc/LLVMBuild.txt -------------*- Conf -*--===; +;===- ./lib/Target/AMDGPU/AsmParser/LLVMBuild.txt -------------*- Conf -*--===; ; ; The LLVM Compiler Infrastructure ; @@ -17,7 +17,7 @@ [component_0] type = Library -name = R600Desc -parent = R600 -required_libraries = MC R600AsmPrinter R600Info Support -add_to_library_groups = R600 +name = AMDGPUAsmParser +parent = AMDGPU +required_libraries = MC MCParser AMDGPUDesc AMDGPUInfo Support +add_to_library_groups = AMDGPU diff --git a/lib/Target/R600/AsmParser/Makefile b/lib/Target/AMDGPU/AsmParser/Makefile index e6689b54b6b..e6689b54b6b 100644 --- a/lib/Target/R600/AsmParser/Makefile +++ b/lib/Target/AMDGPU/AsmParser/Makefile diff --git a/lib/Target/R600/CIInstructions.td b/lib/Target/AMDGPU/CIInstructions.td index 2f5fdbe9207..2f5fdbe9207 100644 --- a/lib/Target/R600/CIInstructions.td +++ b/lib/Target/AMDGPU/CIInstructions.td diff --git a/lib/Target/R600/CMakeLists.txt b/lib/Target/AMDGPU/CMakeLists.txt index 3c1bc49f282..3e5ff1f3c6d 100644 --- a/lib/Target/R600/CMakeLists.txt +++ b/lib/Target/AMDGPU/CMakeLists.txt @@ -12,7 +12,7 @@ tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer) tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher) add_public_tablegen_target(AMDGPUCommonTableGen) -add_llvm_target(R600CodeGen +add_llvm_target(AMDGPUCodeGen AMDILCFGStructurizer.cpp AMDGPUAlwaysInlinePass.cpp AMDGPUAsmPrinter.cpp diff --git a/lib/Target/R600/CaymanInstructions.td b/lib/Target/AMDGPU/CaymanInstructions.td index ba4df82a6d3..ba4df82a6d3 100644 --- a/lib/Target/R600/CaymanInstructions.td +++ b/lib/Target/AMDGPU/CaymanInstructions.td diff --git a/lib/Target/R600/EvergreenInstructions.td b/lib/Target/AMDGPU/EvergreenInstructions.td index 7adcd46fe19..7adcd46fe19 100644 --- a/lib/Target/R600/EvergreenInstructions.td +++ b/lib/Target/AMDGPU/EvergreenInstructions.td diff --git a/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp b/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp index e811d5cff22..e811d5cff22 100644 --- a/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp +++ b/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp diff --git a/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h b/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h index 14fb511e923..14fb511e923 100644 --- a/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h +++ b/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h diff --git a/lib/Target/AMDGPU/InstPrinter/CMakeLists.txt b/lib/Target/AMDGPU/InstPrinter/CMakeLists.txt new file mode 100644 index 00000000000..ce63bd553b9 --- /dev/null +++ b/lib/Target/AMDGPU/InstPrinter/CMakeLists.txt @@ -0,0 +1,3 @@ +add_llvm_library(LLVMAMDGPUAsmPrinter + AMDGPUInstPrinter.cpp + ) diff --git a/lib/Target/R600/InstPrinter/LLVMBuild.txt b/lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt index ec0be89f104..fdb43844dc6 100644 --- a/lib/Target/R600/InstPrinter/LLVMBuild.txt +++ b/lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt @@ -1,4 +1,4 @@ -;===- ./lib/Target/R600/InstPrinter/LLVMBuild.txt -----------*- Conf -*--===; +;===- ./lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt -----------*- Conf -*--===; ; ; The LLVM Compiler Infrastructure ; @@ -17,8 +17,8 @@ [component_0] type = Library -name = R600AsmPrinter -parent = R600 +name = AMDGPUAsmPrinter +parent = AMDGPU required_libraries = MC Support -add_to_library_groups = R600 +add_to_library_groups = AMDGPU diff --git a/lib/Target/R600/InstPrinter/Makefile b/lib/Target/AMDGPU/InstPrinter/Makefile index a794cc1124e..a794cc1124e 100644 --- a/lib/Target/R600/InstPrinter/Makefile +++ b/lib/Target/AMDGPU/InstPrinter/Makefile diff --git a/lib/Target/R600/LLVMBuild.txt b/lib/Target/AMDGPU/LLVMBuild.txt index f3f254fdcba..c6861df91ed 100644 --- a/lib/Target/R600/LLVMBuild.txt +++ b/lib/Target/AMDGPU/LLVMBuild.txt @@ -20,14 +20,14 @@ subdirectories = AsmParser InstPrinter MCTargetDesc TargetInfo [component_0] type = TargetGroup -name = R600 +name = AMDGPU parent = Target has_asmparser = 1 has_asmprinter = 1 [component_1] type = Library -name = R600CodeGen -parent = R600 -required_libraries = Analysis AsmPrinter CodeGen Core IPO MC R600AsmParser R600AsmPrinter R600Desc R600Info Scalar SelectionDAG Support Target TransformUtils -add_to_library_groups = R600 +name = AMDGPUCodeGen +parent = AMDGPU +required_libraries = Analysis AsmPrinter CodeGen Core IPO MC AMDGPUAsmParser AMDGPUAsmPrinter AMDGPUDesc AMDGPUInfo Scalar SelectionDAG Support Target TransformUtils +add_to_library_groups = AMDGPU diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp index 8bed2deef4c..8bed2deef4c 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp index 59f45ff02d8..59f45ff02d8 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUFixupKinds.h b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUFixupKinds.h index 01021d67ffd..01021d67ffd 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUFixupKinds.h +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUFixupKinds.h diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp index 028a86dfc7a..028a86dfc7a 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.h b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h index a5bac51e356..a5bac51e356 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.h +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.cpp b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp index 521b3b39bba..521b3b39bba 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h index c9574276223..c9574276223 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp index 02192c40f92..a7d3dd1345f 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp @@ -72,7 +72,7 @@ static MCInstPrinter *createAMDGPUMCInstPrinter(const Triple &T, return new AMDGPUInstPrinter(MAI, MII, MRI); } -extern "C" void LLVMInitializeR600TargetMC() { +extern "C" void LLVMInitializeAMDGPUTargetMC() { for (Target *T : {&TheAMDGPUTarget, &TheGCNTarget}) { RegisterMCAsmInfo<AMDGPUMCAsmInfo> X(*T); diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h index 92e29dc7037..92e29dc7037 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h diff --git a/lib/Target/R600/MCTargetDesc/CMakeLists.txt b/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt index 801c9054937..151d0d5f83d 100644 --- a/lib/Target/R600/MCTargetDesc/CMakeLists.txt +++ b/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt @@ -1,5 +1,5 @@ -add_llvm_library(LLVMR600Desc +add_llvm_library(LLVMAMDGPUDesc AMDGPUAsmBackend.cpp AMDGPUELFObjectWriter.cpp AMDGPUMCCodeEmitter.cpp diff --git a/lib/Target/R600/AsmParser/LLVMBuild.txt b/lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt index 940e4cee6df..4217bb36297 100644 --- a/lib/Target/R600/AsmParser/LLVMBuild.txt +++ b/lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt @@ -1,4 +1,4 @@ -;===- ./lib/Target/R600/AsmParser/LLVMBuild.txt -------------*- Conf -*--===; +;===- ./lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt -------------*- Conf -*--===; ; ; The LLVM Compiler Infrastructure ; @@ -17,7 +17,7 @@ [component_0] type = Library -name = R600AsmParser -parent = R600 -required_libraries = MC MCParser R600Desc R600Info Support -add_to_library_groups = R600 +name = AMDGPUDesc +parent = AMDGPU +required_libraries = MC AMDGPUAsmPrinter AMDGPUInfo Support +add_to_library_groups = AMDGPU diff --git a/lib/Target/R600/MCTargetDesc/Makefile b/lib/Target/AMDGPU/MCTargetDesc/Makefile index 8894a7607f4..8894a7607f4 100644 --- a/lib/Target/R600/MCTargetDesc/Makefile +++ b/lib/Target/AMDGPU/MCTargetDesc/Makefile diff --git a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp b/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp index e683498d52a..e683498d52a 100644 --- a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp diff --git a/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp b/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp index 65a0eeba2b1..65a0eeba2b1 100644 --- a/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp diff --git a/lib/Target/R600/Makefile b/lib/Target/AMDGPU/Makefile index 64a7c8c045c..64a7c8c045c 100644 --- a/lib/Target/R600/Makefile +++ b/lib/Target/AMDGPU/Makefile diff --git a/lib/Target/R600/Processors.td b/lib/Target/AMDGPU/Processors.td index c0ffede5199..c0ffede5199 100644 --- a/lib/Target/R600/Processors.td +++ b/lib/Target/AMDGPU/Processors.td diff --git a/lib/Target/R600/R600ClauseMergePass.cpp b/lib/Target/AMDGPU/R600ClauseMergePass.cpp index 3cb90218a7d..3cb90218a7d 100644 --- a/lib/Target/R600/R600ClauseMergePass.cpp +++ b/lib/Target/AMDGPU/R600ClauseMergePass.cpp diff --git a/lib/Target/R600/R600ControlFlowFinalizer.cpp b/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp index c8f37f61fc1..c8f37f61fc1 100644 --- a/lib/Target/R600/R600ControlFlowFinalizer.cpp +++ b/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp diff --git a/lib/Target/R600/R600Defines.h b/lib/Target/AMDGPU/R600Defines.h index 51d87eda31d..51d87eda31d 100644 --- a/lib/Target/R600/R600Defines.h +++ b/lib/Target/AMDGPU/R600Defines.h diff --git a/lib/Target/R600/R600EmitClauseMarkers.cpp b/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp index fdc20302f4a..fdc20302f4a 100644 --- a/lib/Target/R600/R600EmitClauseMarkers.cpp +++ b/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp diff --git a/lib/Target/R600/R600ExpandSpecialInstrs.cpp b/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp index 211d392e8fc..211d392e8fc 100644 --- a/lib/Target/R600/R600ExpandSpecialInstrs.cpp +++ b/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/AMDGPU/R600ISelLowering.cpp index 8357b6d9d0e..8357b6d9d0e 100644 --- a/lib/Target/R600/R600ISelLowering.cpp +++ b/lib/Target/AMDGPU/R600ISelLowering.cpp diff --git a/lib/Target/R600/R600ISelLowering.h b/lib/Target/AMDGPU/R600ISelLowering.h index c06d3c4fd30..c06d3c4fd30 100644 --- a/lib/Target/R600/R600ISelLowering.h +++ b/lib/Target/AMDGPU/R600ISelLowering.h diff --git a/lib/Target/R600/R600InstrFormats.td b/lib/Target/AMDGPU/R600InstrFormats.td index 0ffd485476e..0ffd485476e 100644 --- a/lib/Target/R600/R600InstrFormats.td +++ b/lib/Target/AMDGPU/R600InstrFormats.td diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/AMDGPU/R600InstrInfo.cpp index 5ef883cbcad..5ef883cbcad 100644 --- a/lib/Target/R600/R600InstrInfo.cpp +++ b/lib/Target/AMDGPU/R600InstrInfo.cpp diff --git a/lib/Target/R600/R600InstrInfo.h b/lib/Target/AMDGPU/R600InstrInfo.h index dee4c2b9ae3..dee4c2b9ae3 100644 --- a/lib/Target/R600/R600InstrInfo.h +++ b/lib/Target/AMDGPU/R600InstrInfo.h diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td index 7beed092b3f..7beed092b3f 100644 --- a/lib/Target/R600/R600Instructions.td +++ b/lib/Target/AMDGPU/R600Instructions.td diff --git a/lib/Target/R600/R600Intrinsics.td b/lib/Target/AMDGPU/R600Intrinsics.td index 9681747006d..9681747006d 100644 --- a/lib/Target/R600/R600Intrinsics.td +++ b/lib/Target/AMDGPU/R600Intrinsics.td diff --git a/lib/Target/R600/R600MachineFunctionInfo.cpp b/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp index 01105c614c5..01105c614c5 100644 --- a/lib/Target/R600/R600MachineFunctionInfo.cpp +++ b/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp diff --git a/lib/Target/R600/R600MachineFunctionInfo.h b/lib/Target/AMDGPU/R600MachineFunctionInfo.h index 263561edd30..263561edd30 100644 --- a/lib/Target/R600/R600MachineFunctionInfo.h +++ b/lib/Target/AMDGPU/R600MachineFunctionInfo.h diff --git a/lib/Target/R600/R600MachineScheduler.cpp b/lib/Target/AMDGPU/R600MachineScheduler.cpp index bcde5fb50da..bcde5fb50da 100644 --- a/lib/Target/R600/R600MachineScheduler.cpp +++ b/lib/Target/AMDGPU/R600MachineScheduler.cpp diff --git a/lib/Target/R600/R600MachineScheduler.h b/lib/Target/AMDGPU/R600MachineScheduler.h index fc5b95c28e7..fc5b95c28e7 100644 --- a/lib/Target/R600/R600MachineScheduler.h +++ b/lib/Target/AMDGPU/R600MachineScheduler.h diff --git a/lib/Target/R600/R600OptimizeVectorRegisters.cpp b/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp index 0c06ccc736d..0c06ccc736d 100644 --- a/lib/Target/R600/R600OptimizeVectorRegisters.cpp +++ b/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp diff --git a/lib/Target/R600/R600Packetizer.cpp b/lib/Target/AMDGPU/R600Packetizer.cpp index deee5bc3997..deee5bc3997 100644 --- a/lib/Target/R600/R600Packetizer.cpp +++ b/lib/Target/AMDGPU/R600Packetizer.cpp diff --git a/lib/Target/R600/R600RegisterInfo.cpp b/lib/Target/AMDGPU/R600RegisterInfo.cpp index fb0359cfc65..fb0359cfc65 100644 --- a/lib/Target/R600/R600RegisterInfo.cpp +++ b/lib/Target/AMDGPU/R600RegisterInfo.cpp diff --git a/lib/Target/R600/R600RegisterInfo.h b/lib/Target/AMDGPU/R600RegisterInfo.h index 9713e600a72..9713e600a72 100644 --- a/lib/Target/R600/R600RegisterInfo.h +++ b/lib/Target/AMDGPU/R600RegisterInfo.h diff --git a/lib/Target/R600/R600RegisterInfo.td b/lib/Target/AMDGPU/R600RegisterInfo.td index cc667d985a8..cc667d985a8 100644 --- a/lib/Target/R600/R600RegisterInfo.td +++ b/lib/Target/AMDGPU/R600RegisterInfo.td diff --git a/lib/Target/R600/R600Schedule.td b/lib/Target/AMDGPU/R600Schedule.td index df62bf85c0a..df62bf85c0a 100644 --- a/lib/Target/R600/R600Schedule.td +++ b/lib/Target/AMDGPU/R600Schedule.td diff --git a/lib/Target/R600/R600TextureIntrinsicsReplacer.cpp b/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp index 2fc7b02f673..2fc7b02f673 100644 --- a/lib/Target/R600/R600TextureIntrinsicsReplacer.cpp +++ b/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp diff --git a/lib/Target/R600/R700Instructions.td b/lib/Target/AMDGPU/R700Instructions.td index 613a0d729bb..613a0d729bb 100644 --- a/lib/Target/R600/R700Instructions.td +++ b/lib/Target/AMDGPU/R700Instructions.td diff --git a/lib/Target/R600/SIAnnotateControlFlow.cpp b/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp index ccfbf1bf19e..ccfbf1bf19e 100644 --- a/lib/Target/R600/SIAnnotateControlFlow.cpp +++ b/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp diff --git a/lib/Target/R600/SIDefines.h b/lib/Target/AMDGPU/SIDefines.h index 4727d971ab7..4727d971ab7 100644 --- a/lib/Target/R600/SIDefines.h +++ b/lib/Target/AMDGPU/SIDefines.h diff --git a/lib/Target/R600/SIFixControlFlowLiveIntervals.cpp b/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp index 5fe8d19426d..5fe8d19426d 100644 --- a/lib/Target/R600/SIFixControlFlowLiveIntervals.cpp +++ b/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp diff --git a/lib/Target/R600/SIFixSGPRCopies.cpp b/lib/Target/AMDGPU/SIFixSGPRCopies.cpp index 23502b45905..23502b45905 100644 --- a/lib/Target/R600/SIFixSGPRCopies.cpp +++ b/lib/Target/AMDGPU/SIFixSGPRCopies.cpp diff --git a/lib/Target/R600/SIFixSGPRLiveRanges.cpp b/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp index 0c54446b0fb..0c54446b0fb 100644 --- a/lib/Target/R600/SIFixSGPRLiveRanges.cpp +++ b/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp diff --git a/lib/Target/R600/SIFoldOperands.cpp b/lib/Target/AMDGPU/SIFoldOperands.cpp index d14e37a6461..d14e37a6461 100644 --- a/lib/Target/R600/SIFoldOperands.cpp +++ b/lib/Target/AMDGPU/SIFoldOperands.cpp diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/AMDGPU/SIISelLowering.cpp index 12d08cf4c7f..12d08cf4c7f 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/AMDGPU/SIISelLowering.cpp diff --git a/lib/Target/R600/SIISelLowering.h b/lib/Target/AMDGPU/SIISelLowering.h index a956b013bdb..a956b013bdb 100644 --- a/lib/Target/R600/SIISelLowering.h +++ b/lib/Target/AMDGPU/SIISelLowering.h diff --git a/lib/Target/R600/SIInsertWaits.cpp b/lib/Target/AMDGPU/SIInsertWaits.cpp index 90a37f17468..90a37f17468 100644 --- a/lib/Target/R600/SIInsertWaits.cpp +++ b/lib/Target/AMDGPU/SIInsertWaits.cpp diff --git a/lib/Target/R600/SIInstrFormats.td b/lib/Target/AMDGPU/SIInstrFormats.td index 211666a9bdb..211666a9bdb 100644 --- a/lib/Target/R600/SIInstrFormats.td +++ b/lib/Target/AMDGPU/SIInstrFormats.td diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/AMDGPU/SIInstrInfo.cpp index d647c25286f..d647c25286f 100644 --- a/lib/Target/R600/SIInstrInfo.cpp +++ b/lib/Target/AMDGPU/SIInstrInfo.cpp diff --git a/lib/Target/R600/SIInstrInfo.h b/lib/Target/AMDGPU/SIInstrInfo.h index 64b5120841c..64b5120841c 100644 --- a/lib/Target/R600/SIInstrInfo.h +++ b/lib/Target/AMDGPU/SIInstrInfo.h diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/AMDGPU/SIInstrInfo.td index 93e4ca74ec3..93e4ca74ec3 100644 --- a/lib/Target/R600/SIInstrInfo.td +++ b/lib/Target/AMDGPU/SIInstrInfo.td diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td index 8c8d836776d..8c8d836776d 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/AMDGPU/SIInstructions.td diff --git a/lib/Target/R600/SIIntrinsics.td b/lib/Target/AMDGPU/SIIntrinsics.td index 027a0a2f516..027a0a2f516 100644 --- a/lib/Target/R600/SIIntrinsics.td +++ b/lib/Target/AMDGPU/SIIntrinsics.td diff --git a/lib/Target/R600/SILoadStoreOptimizer.cpp b/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp index 9b1d256dc5a..9b1d256dc5a 100644 --- a/lib/Target/R600/SILoadStoreOptimizer.cpp +++ b/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp diff --git a/lib/Target/R600/SILowerControlFlow.cpp b/lib/Target/AMDGPU/SILowerControlFlow.cpp index c319b32111f..c319b32111f 100644 --- a/lib/Target/R600/SILowerControlFlow.cpp +++ b/lib/Target/AMDGPU/SILowerControlFlow.cpp diff --git a/lib/Target/R600/SILowerI1Copies.cpp b/lib/Target/AMDGPU/SILowerI1Copies.cpp index 67421e231d8..67421e231d8 100644 --- a/lib/Target/R600/SILowerI1Copies.cpp +++ b/lib/Target/AMDGPU/SILowerI1Copies.cpp diff --git a/lib/Target/R600/SIMachineFunctionInfo.cpp b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index 587ea63d679..587ea63d679 100644 --- a/lib/Target/R600/SIMachineFunctionInfo.cpp +++ b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp diff --git a/lib/Target/R600/SIMachineFunctionInfo.h b/lib/Target/AMDGPU/SIMachineFunctionInfo.h index 667da4c8af6..667da4c8af6 100644 --- a/lib/Target/R600/SIMachineFunctionInfo.h +++ b/lib/Target/AMDGPU/SIMachineFunctionInfo.h diff --git a/lib/Target/R600/SIPrepareScratchRegs.cpp b/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp index 0a7f684552f..0a7f684552f 100644 --- a/lib/Target/R600/SIPrepareScratchRegs.cpp +++ b/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp diff --git a/lib/Target/R600/SIRegisterInfo.cpp b/lib/Target/AMDGPU/SIRegisterInfo.cpp index db2ff0b1f95..db2ff0b1f95 100644 --- a/lib/Target/R600/SIRegisterInfo.cpp +++ b/lib/Target/AMDGPU/SIRegisterInfo.cpp diff --git a/lib/Target/R600/SIRegisterInfo.h b/lib/Target/AMDGPU/SIRegisterInfo.h index bfdb67c5e12..bfdb67c5e12 100644 --- a/lib/Target/R600/SIRegisterInfo.h +++ b/lib/Target/AMDGPU/SIRegisterInfo.h diff --git a/lib/Target/R600/SIRegisterInfo.td b/lib/Target/AMDGPU/SIRegisterInfo.td index 2a9017fa2a9..2a9017fa2a9 100644 --- a/lib/Target/R600/SIRegisterInfo.td +++ b/lib/Target/AMDGPU/SIRegisterInfo.td diff --git a/lib/Target/R600/SISchedule.td b/lib/Target/AMDGPU/SISchedule.td index 9b1f676020b..9b1f676020b 100644 --- a/lib/Target/R600/SISchedule.td +++ b/lib/Target/AMDGPU/SISchedule.td diff --git a/lib/Target/R600/SIShrinkInstructions.cpp b/lib/Target/AMDGPU/SIShrinkInstructions.cpp index 51e72cdb5f9..51e72cdb5f9 100644 --- a/lib/Target/R600/SIShrinkInstructions.cpp +++ b/lib/Target/AMDGPU/SIShrinkInstructions.cpp diff --git a/lib/Target/R600/SITypeRewriter.cpp b/lib/Target/AMDGPU/SITypeRewriter.cpp index 591ce857cc7..591ce857cc7 100644 --- a/lib/Target/R600/SITypeRewriter.cpp +++ b/lib/Target/AMDGPU/SITypeRewriter.cpp diff --git a/lib/Target/R600/TargetInfo/AMDGPUTargetInfo.cpp b/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp index d723d6e3e8b..2112135aa5d 100644 --- a/lib/Target/R600/TargetInfo/AMDGPUTargetInfo.cpp +++ b/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp @@ -23,7 +23,7 @@ Target llvm::TheAMDGPUTarget; Target llvm::TheGCNTarget; /// \brief Extern function to initialize the targets for the AMDGPU backend -extern "C" void LLVMInitializeR600TargetInfo() { +extern "C" void LLVMInitializeAMDGPUTargetInfo() { RegisterTarget<Triple::r600, false> R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX"); RegisterTarget<Triple::amdgcn, false> GCN(TheGCNTarget, "amdgcn", "AMD GCN GPUs"); diff --git a/lib/Target/AMDGPU/TargetInfo/CMakeLists.txt b/lib/Target/AMDGPU/TargetInfo/CMakeLists.txt new file mode 100644 index 00000000000..961dc550900 --- /dev/null +++ b/lib/Target/AMDGPU/TargetInfo/CMakeLists.txt @@ -0,0 +1,3 @@ +add_llvm_library(LLVMAMDGPUInfo + AMDGPUTargetInfo.cpp + ) diff --git a/lib/Target/R600/TargetInfo/LLVMBuild.txt b/lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt index c3d3cf51cc8..291317fa072 100644 --- a/lib/Target/R600/TargetInfo/LLVMBuild.txt +++ b/lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt @@ -1,4 +1,4 @@ -;===- ./lib/Target/R600/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===; +;===- ./lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===; ; ; The LLVM Compiler Infrastructure ; @@ -17,7 +17,7 @@ [component_0] type = Library -name = R600Info -parent = R600 +name = AMDGPUInfo +parent = AMDGPU required_libraries = Support -add_to_library_groups = R600 +add_to_library_groups = AMDGPU diff --git a/lib/Target/R600/TargetInfo/Makefile b/lib/Target/AMDGPU/TargetInfo/Makefile index b8ac4e78230..b8ac4e78230 100644 --- a/lib/Target/R600/TargetInfo/Makefile +++ b/lib/Target/AMDGPU/TargetInfo/Makefile diff --git a/lib/Target/R600/VIInstrFormats.td b/lib/Target/AMDGPU/VIInstrFormats.td index d8738f99263..d8738f99263 100644 --- a/lib/Target/R600/VIInstrFormats.td +++ b/lib/Target/AMDGPU/VIInstrFormats.td diff --git a/lib/Target/R600/VIInstructions.td b/lib/Target/AMDGPU/VIInstructions.td index 5bf86e649ce..5bf86e649ce 100644 --- a/lib/Target/R600/VIInstructions.td +++ b/lib/Target/AMDGPU/VIInstructions.td diff --git a/lib/Target/LLVMBuild.txt b/lib/Target/LLVMBuild.txt index 3af3426b94c..ab823248928 100644 --- a/lib/Target/LLVMBuild.txt +++ b/lib/Target/LLVMBuild.txt @@ -19,6 +19,7 @@ ; will typically require only insertion of a line. [common] subdirectories = + AMDGPU ARM AArch64 BPF @@ -28,7 +29,6 @@ subdirectories = NVPTX Mips PowerPC - R600 Sparc SystemZ X86 diff --git a/lib/Target/R600/AsmParser/CMakeLists.txt b/lib/Target/R600/AsmParser/CMakeLists.txt deleted file mode 100644 index 1b42af73740..00000000000 --- a/lib/Target/R600/AsmParser/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -add_llvm_library(LLVMR600AsmParser - AMDGPUAsmParser.cpp - ) diff --git a/lib/Target/R600/InstPrinter/CMakeLists.txt b/lib/Target/R600/InstPrinter/CMakeLists.txt deleted file mode 100644 index dcd87037fab..00000000000 --- a/lib/Target/R600/InstPrinter/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -add_llvm_library(LLVMR600AsmPrinter - AMDGPUInstPrinter.cpp - ) diff --git a/lib/Target/R600/TargetInfo/CMakeLists.txt b/lib/Target/R600/TargetInfo/CMakeLists.txt deleted file mode 100644 index c3bd26c7a89..00000000000 --- a/lib/Target/R600/TargetInfo/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -add_llvm_library(LLVMR600Info - AMDGPUTargetInfo.cpp - ) diff --git a/test/CodeGen/R600/32-bit-local-address-space.ll b/test/CodeGen/AMDGPU/32-bit-local-address-space.ll index c7bcfd2ddab..c7bcfd2ddab 100644 --- a/test/CodeGen/R600/32-bit-local-address-space.ll +++ b/test/CodeGen/AMDGPU/32-bit-local-address-space.ll diff --git a/test/CodeGen/R600/README b/test/CodeGen/AMDGPU/README index 96998bba28f..96998bba28f 100644 --- a/test/CodeGen/R600/README +++ b/test/CodeGen/AMDGPU/README diff --git a/test/CodeGen/R600/add-debug.ll b/test/CodeGen/AMDGPU/add-debug.ll index 529905dd36a..529905dd36a 100644 --- a/test/CodeGen/R600/add-debug.ll +++ b/test/CodeGen/AMDGPU/add-debug.ll diff --git a/test/CodeGen/R600/add.ll b/test/CodeGen/AMDGPU/add.ll index 655e75dbc1a..655e75dbc1a 100644 --- a/test/CodeGen/R600/add.ll +++ b/test/CodeGen/AMDGPU/add.ll diff --git a/test/CodeGen/R600/add_i64.ll b/test/CodeGen/AMDGPU/add_i64.ll index 8346add7df9..8346add7df9 100644 --- a/test/CodeGen/R600/add_i64.ll +++ b/test/CodeGen/AMDGPU/add_i64.ll diff --git a/test/CodeGen/R600/address-space.ll b/test/CodeGen/AMDGPU/address-space.ll index 4be8c584752..4be8c584752 100644 --- a/test/CodeGen/R600/address-space.ll +++ b/test/CodeGen/AMDGPU/address-space.ll diff --git a/test/CodeGen/R600/and.ll b/test/CodeGen/AMDGPU/and.ll index 5672d470bd7..5672d470bd7 100644 --- a/test/CodeGen/R600/and.ll +++ b/test/CodeGen/AMDGPU/and.ll diff --git a/test/CodeGen/R600/anyext.ll b/test/CodeGen/AMDGPU/anyext.ll index 48d8f312249..48d8f312249 100644 --- a/test/CodeGen/R600/anyext.ll +++ b/test/CodeGen/AMDGPU/anyext.ll diff --git a/test/CodeGen/R600/array-ptr-calc-i32.ll b/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll index 8c2a0795860..8c2a0795860 100644 --- a/test/CodeGen/R600/array-ptr-calc-i32.ll +++ b/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll diff --git a/test/CodeGen/R600/array-ptr-calc-i64.ll b/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll index eae095eb844..eae095eb844 100644 --- a/test/CodeGen/R600/array-ptr-calc-i64.ll +++ b/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll diff --git a/test/CodeGen/R600/atomic_cmp_swap_local.ll b/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll index ef2560ef184..ef2560ef184 100644 --- a/test/CodeGen/R600/atomic_cmp_swap_local.ll +++ b/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll diff --git a/test/CodeGen/R600/atomic_load_add.ll b/test/CodeGen/AMDGPU/atomic_load_add.ll index 20c685447ee..20c685447ee 100644 --- a/test/CodeGen/R600/atomic_load_add.ll +++ b/test/CodeGen/AMDGPU/atomic_load_add.ll diff --git a/test/CodeGen/R600/atomic_load_sub.ll b/test/CodeGen/AMDGPU/atomic_load_sub.ll index 4c6f45525b9..4c6f45525b9 100644 --- a/test/CodeGen/R600/atomic_load_sub.ll +++ b/test/CodeGen/AMDGPU/atomic_load_sub.ll diff --git a/test/CodeGen/R600/basic-branch.ll b/test/CodeGen/AMDGPU/basic-branch.ll index abdc4afef47..abdc4afef47 100644 --- a/test/CodeGen/R600/basic-branch.ll +++ b/test/CodeGen/AMDGPU/basic-branch.ll diff --git a/test/CodeGen/R600/basic-loop.ll b/test/CodeGen/AMDGPU/basic-loop.ll index f0263caf5d6..f0263caf5d6 100644 --- a/test/CodeGen/R600/basic-loop.ll +++ b/test/CodeGen/AMDGPU/basic-loop.ll diff --git a/test/CodeGen/R600/bfe_uint.ll b/test/CodeGen/AMDGPU/bfe_uint.ll index 32e3fc26106..32e3fc26106 100644 --- a/test/CodeGen/R600/bfe_uint.ll +++ b/test/CodeGen/AMDGPU/bfe_uint.ll diff --git a/test/CodeGen/R600/bfi_int.ll b/test/CodeGen/AMDGPU/bfi_int.ll index 03349349735..03349349735 100644 --- a/test/CodeGen/R600/bfi_int.ll +++ b/test/CodeGen/AMDGPU/bfi_int.ll diff --git a/test/CodeGen/R600/big_alu.ll b/test/CodeGen/AMDGPU/big_alu.ll index 2671c5d102b..2671c5d102b 100644 --- a/test/CodeGen/R600/big_alu.ll +++ b/test/CodeGen/AMDGPU/big_alu.ll diff --git a/test/CodeGen/R600/bitcast.ll b/test/CodeGen/AMDGPU/bitcast.ll index fd56d956bf3..fd56d956bf3 100644 --- a/test/CodeGen/R600/bitcast.ll +++ b/test/CodeGen/AMDGPU/bitcast.ll diff --git a/test/CodeGen/R600/bswap.ll b/test/CodeGen/AMDGPU/bswap.ll index 4cf8e4bfed5..4cf8e4bfed5 100644 --- a/test/CodeGen/R600/bswap.ll +++ b/test/CodeGen/AMDGPU/bswap.ll diff --git a/test/CodeGen/R600/build_vector.ll b/test/CodeGen/AMDGPU/build_vector.ll index 65eacf5adc4..65eacf5adc4 100644 --- a/test/CodeGen/R600/build_vector.ll +++ b/test/CodeGen/AMDGPU/build_vector.ll diff --git a/test/CodeGen/R600/call.ll b/test/CodeGen/AMDGPU/call.ll index e769fd11c28..e769fd11c28 100644 --- a/test/CodeGen/R600/call.ll +++ b/test/CodeGen/AMDGPU/call.ll diff --git a/test/CodeGen/R600/call_fs.ll b/test/CodeGen/AMDGPU/call_fs.ll index 87bebbc49d5..87bebbc49d5 100644 --- a/test/CodeGen/R600/call_fs.ll +++ b/test/CodeGen/AMDGPU/call_fs.ll diff --git a/test/CodeGen/R600/cayman-loop-bug.ll b/test/CodeGen/AMDGPU/cayman-loop-bug.ll index c7b8c403731..c7b8c403731 100644 --- a/test/CodeGen/R600/cayman-loop-bug.ll +++ b/test/CodeGen/AMDGPU/cayman-loop-bug.ll diff --git a/test/CodeGen/R600/cf-stack-bug.ll b/test/CodeGen/AMDGPU/cf-stack-bug.ll index 75b87e48622..75b87e48622 100644 --- a/test/CodeGen/R600/cf-stack-bug.ll +++ b/test/CodeGen/AMDGPU/cf-stack-bug.ll diff --git a/test/CodeGen/R600/cf_end.ll b/test/CodeGen/AMDGPU/cf_end.ll index c74ee22868d..c74ee22868d 100644 --- a/test/CodeGen/R600/cf_end.ll +++ b/test/CodeGen/AMDGPU/cf_end.ll diff --git a/test/CodeGen/R600/cgp-addressing-modes.ll b/test/CodeGen/AMDGPU/cgp-addressing-modes.ll index 77f7bd01b7f..77f7bd01b7f 100644 --- a/test/CodeGen/R600/cgp-addressing-modes.ll +++ b/test/CodeGen/AMDGPU/cgp-addressing-modes.ll diff --git a/test/CodeGen/R600/coalescer_remat.ll b/test/CodeGen/AMDGPU/coalescer_remat.ll index 96730bcf2e8..96730bcf2e8 100644 --- a/test/CodeGen/R600/coalescer_remat.ll +++ b/test/CodeGen/AMDGPU/coalescer_remat.ll diff --git a/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll b/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll index 58517209267..58517209267 100644 --- a/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll +++ 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b/test/CodeGen/AMDGPU/frem.ll diff --git a/test/CodeGen/R600/fsqrt.ll b/test/CodeGen/AMDGPU/fsqrt.ll index 04101346cdf..04101346cdf 100644 --- a/test/CodeGen/R600/fsqrt.ll +++ b/test/CodeGen/AMDGPU/fsqrt.ll diff --git a/test/CodeGen/R600/fsub.ll b/test/CodeGen/AMDGPU/fsub.ll index dfe41cb5b11..dfe41cb5b11 100644 --- a/test/CodeGen/R600/fsub.ll +++ b/test/CodeGen/AMDGPU/fsub.ll diff --git a/test/CodeGen/R600/fsub64.ll b/test/CodeGen/AMDGPU/fsub64.ll index f34a48e30a8..f34a48e30a8 100644 --- a/test/CodeGen/R600/fsub64.ll +++ b/test/CodeGen/AMDGPU/fsub64.ll diff --git a/test/CodeGen/R600/ftrunc.f64.ll b/test/CodeGen/AMDGPU/ftrunc.f64.ll index 6618d8b5e57..6618d8b5e57 100644 --- a/test/CodeGen/R600/ftrunc.f64.ll +++ b/test/CodeGen/AMDGPU/ftrunc.f64.ll diff --git a/test/CodeGen/R600/ftrunc.ll b/test/CodeGen/AMDGPU/ftrunc.ll index edc08609a8a..edc08609a8a 100644 --- a/test/CodeGen/R600/ftrunc.ll +++ b/test/CodeGen/AMDGPU/ftrunc.ll diff --git a/test/CodeGen/R600/gep-address-space.ll b/test/CodeGen/AMDGPU/gep-address-space.ll index 471b0f6b13e..471b0f6b13e 100644 --- a/test/CodeGen/R600/gep-address-space.ll +++ b/test/CodeGen/AMDGPU/gep-address-space.ll diff --git a/test/CodeGen/R600/global-directive.ll b/test/CodeGen/AMDGPU/global-directive.ll index be775cf9292..be775cf9292 100644 --- a/test/CodeGen/R600/global-directive.ll +++ b/test/CodeGen/AMDGPU/global-directive.ll diff --git a/test/CodeGen/R600/global-extload-i1.ll b/test/CodeGen/AMDGPU/global-extload-i1.ll index bd9557d730f..bd9557d730f 100644 --- a/test/CodeGen/R600/global-extload-i1.ll +++ b/test/CodeGen/AMDGPU/global-extload-i1.ll diff --git a/test/CodeGen/R600/global-extload-i16.ll b/test/CodeGen/AMDGPU/global-extload-i16.ll index 103a40dee27..103a40dee27 100644 --- a/test/CodeGen/R600/global-extload-i16.ll +++ b/test/CodeGen/AMDGPU/global-extload-i16.ll diff --git a/test/CodeGen/R600/global-extload-i32.ll b/test/CodeGen/AMDGPU/global-extload-i32.ll index 79b83452939..79b83452939 100644 --- a/test/CodeGen/R600/global-extload-i32.ll +++ b/test/CodeGen/AMDGPU/global-extload-i32.ll diff --git a/test/CodeGen/R600/global-extload-i8.ll b/test/CodeGen/AMDGPU/global-extload-i8.ll index b31d5361d5a..b31d5361d5a 100644 --- a/test/CodeGen/R600/global-extload-i8.ll +++ b/test/CodeGen/AMDGPU/global-extload-i8.ll diff --git a/test/CodeGen/R600/global-zero-initializer.ll b/test/CodeGen/AMDGPU/global-zero-initializer.ll index 45aa8bf4e1d..45aa8bf4e1d 100644 --- a/test/CodeGen/R600/global-zero-initializer.ll +++ b/test/CodeGen/AMDGPU/global-zero-initializer.ll diff --git a/test/CodeGen/R600/global_atomics.ll b/test/CodeGen/AMDGPU/global_atomics.ll index 847950f6376..847950f6376 100644 --- a/test/CodeGen/R600/global_atomics.ll +++ b/test/CodeGen/AMDGPU/global_atomics.ll diff --git a/test/CodeGen/R600/gv-const-addrspace-fail.ll b/test/CodeGen/AMDGPU/gv-const-addrspace-fail.ll index 014b0a5482a..014b0a5482a 100644 --- a/test/CodeGen/R600/gv-const-addrspace-fail.ll +++ b/test/CodeGen/AMDGPU/gv-const-addrspace-fail.ll diff --git a/test/CodeGen/R600/gv-const-addrspace.ll b/test/CodeGen/AMDGPU/gv-const-addrspace.ll index 3c1fc6c98f7..3c1fc6c98f7 100644 --- a/test/CodeGen/R600/gv-const-addrspace.ll +++ b/test/CodeGen/AMDGPU/gv-const-addrspace.ll diff --git a/test/CodeGen/R600/half.ll b/test/CodeGen/AMDGPU/half.ll index bf8f11860b5..bf8f11860b5 100644 --- a/test/CodeGen/R600/half.ll +++ b/test/CodeGen/AMDGPU/half.ll diff --git a/test/CodeGen/R600/hsa.ll b/test/CodeGen/AMDGPU/hsa.ll index f9113399afe..f9113399afe 100644 --- a/test/CodeGen/R600/hsa.ll +++ b/test/CodeGen/AMDGPU/hsa.ll diff --git a/test/CodeGen/R600/i1-copy-implicit-def.ll b/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll index b11a2113764..b11a2113764 100644 --- a/test/CodeGen/R600/i1-copy-implicit-def.ll +++ b/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll diff --git a/test/CodeGen/R600/i1-copy-phi.ll b/test/CodeGen/AMDGPU/i1-copy-phi.ll index 105cd06b330..105cd06b330 100644 --- a/test/CodeGen/R600/i1-copy-phi.ll +++ b/test/CodeGen/AMDGPU/i1-copy-phi.ll diff --git a/test/CodeGen/R600/i8-to-double-to-float.ll b/test/CodeGen/AMDGPU/i8-to-double-to-float.ll index c218e1918bb..c218e1918bb 100644 --- a/test/CodeGen/R600/i8-to-double-to-float.ll +++ b/test/CodeGen/AMDGPU/i8-to-double-to-float.ll diff --git a/test/CodeGen/R600/icmp-select-sete-reverse-args.ll b/test/CodeGen/AMDGPU/icmp-select-sete-reverse-args.ll index 60e59a5a528..60e59a5a528 100644 --- a/test/CodeGen/R600/icmp-select-sete-reverse-args.ll +++ b/test/CodeGen/AMDGPU/icmp-select-sete-reverse-args.ll diff --git a/test/CodeGen/R600/icmp64.ll b/test/CodeGen/AMDGPU/icmp64.ll index 0eaa33ebafe..0eaa33ebafe 100644 --- a/test/CodeGen/R600/icmp64.ll +++ b/test/CodeGen/AMDGPU/icmp64.ll diff --git a/test/CodeGen/R600/imm.ll b/test/CodeGen/AMDGPU/imm.ll index 12eed550eb1..12eed550eb1 100644 --- a/test/CodeGen/R600/imm.ll +++ b/test/CodeGen/AMDGPU/imm.ll diff --git a/test/CodeGen/R600/indirect-addressing-si.ll b/test/CodeGen/AMDGPU/indirect-addressing-si.ll index f551606d63a..f551606d63a 100644 --- a/test/CodeGen/R600/indirect-addressing-si.ll +++ b/test/CodeGen/AMDGPU/indirect-addressing-si.ll diff --git a/test/CodeGen/R600/indirect-private-64.ll b/test/CodeGen/AMDGPU/indirect-private-64.ll index d63e1b6c521..d63e1b6c521 100644 --- a/test/CodeGen/R600/indirect-private-64.ll +++ b/test/CodeGen/AMDGPU/indirect-private-64.ll diff --git a/test/CodeGen/R600/infinite-loop-evergreen.ll b/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll index f6e39b3d830..f6e39b3d830 100644 --- a/test/CodeGen/R600/infinite-loop-evergreen.ll +++ b/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll diff --git a/test/CodeGen/R600/infinite-loop.ll b/test/CodeGen/AMDGPU/infinite-loop.ll index 7233aa57fd7..7233aa57fd7 100644 --- a/test/CodeGen/R600/infinite-loop.ll +++ b/test/CodeGen/AMDGPU/infinite-loop.ll diff --git a/test/CodeGen/R600/inline-asm.ll b/test/CodeGen/AMDGPU/inline-asm.ll index efc2292de3a..efc2292de3a 100644 --- a/test/CodeGen/R600/inline-asm.ll +++ b/test/CodeGen/AMDGPU/inline-asm.ll diff --git a/test/CodeGen/R600/inline-calls.ll b/test/CodeGen/AMDGPU/inline-calls.ll index 33a4c832e75..33a4c832e75 100644 --- a/test/CodeGen/R600/inline-calls.ll +++ b/test/CodeGen/AMDGPU/inline-calls.ll diff --git a/test/CodeGen/R600/input-mods.ll b/test/CodeGen/AMDGPU/input-mods.ll index 1c4d285cbcb..1c4d285cbcb 100644 --- a/test/CodeGen/R600/input-mods.ll +++ b/test/CodeGen/AMDGPU/input-mods.ll diff --git a/test/CodeGen/R600/insert_subreg.ll b/test/CodeGen/AMDGPU/insert_subreg.ll index 4a5e8869c2d..4a5e8869c2d 100644 --- a/test/CodeGen/R600/insert_subreg.ll +++ b/test/CodeGen/AMDGPU/insert_subreg.ll diff --git a/test/CodeGen/R600/insert_vector_elt.ll b/test/CodeGen/AMDGPU/insert_vector_elt.ll index 6de3d408c48..6de3d408c48 100644 --- a/test/CodeGen/R600/insert_vector_elt.ll +++ b/test/CodeGen/AMDGPU/insert_vector_elt.ll diff --git a/test/CodeGen/R600/jump-address.ll b/test/CodeGen/AMDGPU/jump-address.ll index f55912e3740..f55912e3740 100644 --- a/test/CodeGen/R600/jump-address.ll +++ b/test/CodeGen/AMDGPU/jump-address.ll diff --git a/test/CodeGen/R600/kcache-fold.ll b/test/CodeGen/AMDGPU/kcache-fold.ll index 7e2291cfdc3..7e2291cfdc3 100644 --- a/test/CodeGen/R600/kcache-fold.ll +++ b/test/CodeGen/AMDGPU/kcache-fold.ll diff --git a/test/CodeGen/R600/kernel-args.ll b/test/CodeGen/AMDGPU/kernel-args.ll index 1dd7c2cb799..1dd7c2cb799 100644 --- a/test/CodeGen/R600/kernel-args.ll +++ b/test/CodeGen/AMDGPU/kernel-args.ll diff --git a/test/CodeGen/R600/large-alloca.ll b/test/CodeGen/AMDGPU/large-alloca.ll index 671833d1a33..671833d1a33 100644 --- a/test/CodeGen/R600/large-alloca.ll +++ b/test/CodeGen/AMDGPU/large-alloca.ll diff --git a/test/CodeGen/R600/large-constant-initializer.ll b/test/CodeGen/AMDGPU/large-constant-initializer.ll index 9975b1b7f5c..9975b1b7f5c 100644 --- a/test/CodeGen/R600/large-constant-initializer.ll +++ b/test/CodeGen/AMDGPU/large-constant-initializer.ll diff --git a/test/CodeGen/R600/lds-initializer.ll b/test/CodeGen/AMDGPU/lds-initializer.ll index bf8df63be9f..bf8df63be9f 100644 --- a/test/CodeGen/R600/lds-initializer.ll +++ b/test/CodeGen/AMDGPU/lds-initializer.ll diff --git a/test/CodeGen/R600/lds-oqap-crash.ll b/test/CodeGen/AMDGPU/lds-oqap-crash.ll index 6ff6fc3d7af..6ff6fc3d7af 100644 --- a/test/CodeGen/R600/lds-oqap-crash.ll +++ b/test/CodeGen/AMDGPU/lds-oqap-crash.ll diff --git a/test/CodeGen/R600/lds-output-queue.ll b/test/CodeGen/AMDGPU/lds-output-queue.ll index 44ffc36af14..44ffc36af14 100644 --- a/test/CodeGen/R600/lds-output-queue.ll +++ b/test/CodeGen/AMDGPU/lds-output-queue.ll diff --git a/test/CodeGen/R600/lds-size.ll b/test/CodeGen/AMDGPU/lds-size.ll index 3e8328659fd..3e8328659fd 100644 --- a/test/CodeGen/R600/lds-size.ll +++ b/test/CodeGen/AMDGPU/lds-size.ll diff --git a/test/CodeGen/R600/lds-zero-initializer.ll b/test/CodeGen/AMDGPU/lds-zero-initializer.ll index fb51bc0e50c..fb51bc0e50c 100644 --- a/test/CodeGen/R600/lds-zero-initializer.ll +++ b/test/CodeGen/AMDGPU/lds-zero-initializer.ll diff --git a/test/CodeGen/R600/legalizedag-bug-expand-setcc.ll b/test/CodeGen/AMDGPU/legalizedag-bug-expand-setcc.ll index 4244c48d240..4244c48d240 100644 --- a/test/CodeGen/R600/legalizedag-bug-expand-setcc.ll +++ b/test/CodeGen/AMDGPU/legalizedag-bug-expand-setcc.ll diff --git a/test/CodeGen/AMDGPU/lit.local.cfg b/test/CodeGen/AMDGPU/lit.local.cfg new file mode 100644 index 00000000000..2a665f06be7 --- /dev/null +++ b/test/CodeGen/AMDGPU/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'AMDGPU' in config.root.targets: + config.unsupported = True diff --git a/test/CodeGen/R600/literals.ll b/test/CodeGen/AMDGPU/literals.ll index cff1c24f89d..cff1c24f89d 100644 --- a/test/CodeGen/R600/literals.ll +++ b/test/CodeGen/AMDGPU/literals.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.abs.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll index 8bf094b8bc7..8bf094b8bc7 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.abs.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.global.ll index db883972d64..db883972d64 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.global.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.local.ll index 48fb2e0b1a8..48fb2e0b1a8 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.local.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.i32.ll index 1168713ca66..1168713ca66 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.i32.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll index 541119242a9..541119242a9 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfi.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.bfi.ll index 517a55abc09..517a55abc09 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfi.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.bfi.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfm.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.bfm.ll index 50492289d74..50492289d74 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfm.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.bfm.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.brev.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.brev.ll index 301de4b1c82..301de4b1c82 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.brev.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.brev.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.clamp.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.clamp.ll index 11ec963ab31..11ec963ab31 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.clamp.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.clamp.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.class.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.class.ll index 805a88b59c7..805a88b59c7 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.class.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.class.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.cube.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.cube.ll index e95a51093cb..e95a51093cb 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.cube.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.cube.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.cvt_f32_ubyte.ll index 8b32f696449..8b32f696449 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.cvt_f32_ubyte.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.div_fixup.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.div_fixup.ll index 55ca9c7536e..55ca9c7536e 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.div_fixup.ll +++ b/test/CodeGen/AMDGPU/llvm.AMDGPU.div_fixup.ll diff --git a/test/CodeGen/R600/llvm.AMDGPU.div_fmas.ll b/test/CodeGen/AMDGPU/llvm.AMDGPU.div_fmas.ll index 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a/test/CodeGen/R600/shl.ll b/test/CodeGen/AMDGPU/shl.ll index 53b63dc4b8a..53b63dc4b8a 100644 --- a/test/CodeGen/R600/shl.ll +++ b/test/CodeGen/AMDGPU/shl.ll diff --git a/test/CodeGen/R600/shl_add_constant.ll b/test/CodeGen/AMDGPU/shl_add_constant.ll index b1485bfaaeb..b1485bfaaeb 100644 --- a/test/CodeGen/R600/shl_add_constant.ll +++ b/test/CodeGen/AMDGPU/shl_add_constant.ll diff --git a/test/CodeGen/R600/shl_add_ptr.ll b/test/CodeGen/AMDGPU/shl_add_ptr.ll index 6671e909cd1..6671e909cd1 100644 --- a/test/CodeGen/R600/shl_add_ptr.ll +++ b/test/CodeGen/AMDGPU/shl_add_ptr.ll diff --git a/test/CodeGen/R600/si-annotate-cf-assertion.ll b/test/CodeGen/AMDGPU/si-annotate-cf-assertion.ll index 69d719385ac..69d719385ac 100644 --- a/test/CodeGen/R600/si-annotate-cf-assertion.ll +++ b/test/CodeGen/AMDGPU/si-annotate-cf-assertion.ll diff --git a/test/CodeGen/R600/si-annotate-cf.ll b/test/CodeGen/AMDGPU/si-annotate-cf.ll index bbcb861f37d..bbcb861f37d 100644 --- a/test/CodeGen/R600/si-annotate-cf.ll +++ b/test/CodeGen/AMDGPU/si-annotate-cf.ll diff --git a/test/CodeGen/R600/si-lod-bias.ll b/test/CodeGen/AMDGPU/si-lod-bias.ll index 944499a1146..944499a1146 100644 --- a/test/CodeGen/R600/si-lod-bias.ll +++ b/test/CodeGen/AMDGPU/si-lod-bias.ll diff --git a/test/CodeGen/R600/si-sgpr-spill.ll b/test/CodeGen/AMDGPU/si-sgpr-spill.ll index 84652701f77..84652701f77 100644 --- a/test/CodeGen/R600/si-sgpr-spill.ll +++ b/test/CodeGen/AMDGPU/si-sgpr-spill.ll diff --git a/test/CodeGen/R600/si-spill-cf.ll b/test/CodeGen/AMDGPU/si-spill-cf.ll index 4b2d8ec6bf0..4b2d8ec6bf0 100644 --- a/test/CodeGen/R600/si-spill-cf.ll +++ b/test/CodeGen/AMDGPU/si-spill-cf.ll diff --git a/test/CodeGen/R600/si-triv-disjoint-mem-access.ll b/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll index 5a6129aaa3f..5a6129aaa3f 100644 --- a/test/CodeGen/R600/si-triv-disjoint-mem-access.ll +++ b/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll diff --git a/test/CodeGen/R600/si-vector-hang.ll b/test/CodeGen/AMDGPU/si-vector-hang.ll index bd427dd3ed4..bd427dd3ed4 100644 --- a/test/CodeGen/R600/si-vector-hang.ll +++ b/test/CodeGen/AMDGPU/si-vector-hang.ll diff --git a/test/CodeGen/R600/sign_extend.ll b/test/CodeGen/AMDGPU/sign_extend.ll index 06bee114c23..06bee114c23 100644 --- a/test/CodeGen/R600/sign_extend.ll +++ b/test/CodeGen/AMDGPU/sign_extend.ll diff --git a/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll b/test/CodeGen/AMDGPU/simplify-demanded-bits-build-pair.ll index dffee70b6b0..dffee70b6b0 100644 --- a/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll +++ b/test/CodeGen/AMDGPU/simplify-demanded-bits-build-pair.ll diff --git a/test/CodeGen/R600/sint_to_fp.f64.ll b/test/CodeGen/AMDGPU/sint_to_fp.f64.ll index da4e91db3a3..da4e91db3a3 100644 --- a/test/CodeGen/R600/sint_to_fp.f64.ll +++ b/test/CodeGen/AMDGPU/sint_to_fp.f64.ll diff --git a/test/CodeGen/R600/sint_to_fp.ll b/test/CodeGen/AMDGPU/sint_to_fp.ll index 8506441d136..8506441d136 100644 --- a/test/CodeGen/R600/sint_to_fp.ll +++ b/test/CodeGen/AMDGPU/sint_to_fp.ll diff --git a/test/CodeGen/R600/smrd.ll b/test/CodeGen/AMDGPU/smrd.ll index b0c18ca5959..b0c18ca5959 100644 --- a/test/CodeGen/R600/smrd.ll +++ b/test/CodeGen/AMDGPU/smrd.ll diff --git a/test/CodeGen/R600/split-scalar-i64-add.ll b/test/CodeGen/AMDGPU/split-scalar-i64-add.ll index 46409cdfae1..46409cdfae1 100644 --- a/test/CodeGen/R600/split-scalar-i64-add.ll +++ b/test/CodeGen/AMDGPU/split-scalar-i64-add.ll diff --git a/test/CodeGen/R600/sra.ll b/test/CodeGen/AMDGPU/sra.ll index bcbc32f4c05..bcbc32f4c05 100644 --- a/test/CodeGen/R600/sra.ll +++ b/test/CodeGen/AMDGPU/sra.ll diff --git a/test/CodeGen/R600/srem.ll b/test/CodeGen/AMDGPU/srem.ll index c78fd549b31..c78fd549b31 100644 --- a/test/CodeGen/R600/srem.ll +++ b/test/CodeGen/AMDGPU/srem.ll diff --git a/test/CodeGen/R600/srl.ll b/test/CodeGen/AMDGPU/srl.ll index 4904d7fa1bd..4904d7fa1bd 100644 --- a/test/CodeGen/R600/srl.ll +++ b/test/CodeGen/AMDGPU/srl.ll diff --git a/test/CodeGen/R600/ssubo.ll b/test/CodeGen/AMDGPU/ssubo.ll index 26884a1b776..26884a1b776 100644 --- a/test/CodeGen/R600/ssubo.ll +++ b/test/CodeGen/AMDGPU/ssubo.ll diff --git a/test/CodeGen/R600/store-barrier.ll b/test/CodeGen/AMDGPU/store-barrier.ll index 4a72b4d090a..4a72b4d090a 100644 --- a/test/CodeGen/R600/store-barrier.ll +++ b/test/CodeGen/AMDGPU/store-barrier.ll diff --git a/test/CodeGen/R600/store-v3i32.ll b/test/CodeGen/AMDGPU/store-v3i32.ll index 33617b55ed6..33617b55ed6 100644 --- a/test/CodeGen/R600/store-v3i32.ll +++ b/test/CodeGen/AMDGPU/store-v3i32.ll diff --git a/test/CodeGen/R600/store-v3i64.ll b/test/CodeGen/AMDGPU/store-v3i64.ll index e0c554ad2c1..e0c554ad2c1 100644 --- a/test/CodeGen/R600/store-v3i64.ll +++ b/test/CodeGen/AMDGPU/store-v3i64.ll diff --git a/test/CodeGen/R600/store-vector-ptrs.ll b/test/CodeGen/AMDGPU/store-vector-ptrs.ll index d5af3b29118..d5af3b29118 100644 --- a/test/CodeGen/R600/store-vector-ptrs.ll +++ b/test/CodeGen/AMDGPU/store-vector-ptrs.ll diff --git a/test/CodeGen/R600/store.ll b/test/CodeGen/AMDGPU/store.ll index 0f89405e073..0f89405e073 100644 --- a/test/CodeGen/R600/store.ll +++ b/test/CodeGen/AMDGPU/store.ll diff --git a/test/CodeGen/R600/store.r600.ll b/test/CodeGen/AMDGPU/store.r600.ll index 696fb033b5e..696fb033b5e 100644 --- a/test/CodeGen/R600/store.r600.ll +++ b/test/CodeGen/AMDGPU/store.r600.ll diff --git a/test/CodeGen/R600/structurize.ll b/test/CodeGen/AMDGPU/structurize.ll index 02e592e9a55..02e592e9a55 100644 --- a/test/CodeGen/R600/structurize.ll +++ b/test/CodeGen/AMDGPU/structurize.ll diff --git a/test/CodeGen/R600/structurize1.ll b/test/CodeGen/AMDGPU/structurize1.ll index 77432c1f9d2..77432c1f9d2 100644 --- a/test/CodeGen/R600/structurize1.ll +++ b/test/CodeGen/AMDGPU/structurize1.ll diff --git a/test/CodeGen/R600/sub.ll b/test/CodeGen/AMDGPU/sub.ll index b7fba0efa5b..b7fba0efa5b 100644 --- a/test/CodeGen/R600/sub.ll +++ b/test/CodeGen/AMDGPU/sub.ll diff --git a/test/CodeGen/R600/subreg-coalescer-crash.ll b/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll index c4dae4736cf..c4dae4736cf 100644 --- a/test/CodeGen/R600/subreg-coalescer-crash.ll +++ b/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll diff --git a/test/CodeGen/R600/subreg-eliminate-dead.ll b/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll index 8bd995a8ecb..8bd995a8ecb 100644 --- a/test/CodeGen/R600/subreg-eliminate-dead.ll +++ b/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll diff --git a/test/CodeGen/R600/swizzle-export.ll b/test/CodeGen/AMDGPU/swizzle-export.ll index 000ee2faa47..000ee2faa47 100644 --- a/test/CodeGen/R600/swizzle-export.ll +++ b/test/CodeGen/AMDGPU/swizzle-export.ll diff --git a/test/CodeGen/R600/tex-clause-antidep.ll b/test/CodeGen/AMDGPU/tex-clause-antidep.ll index cbb9c50974a..cbb9c50974a 100644 --- a/test/CodeGen/R600/tex-clause-antidep.ll +++ b/test/CodeGen/AMDGPU/tex-clause-antidep.ll diff --git a/test/CodeGen/R600/texture-input-merge.ll b/test/CodeGen/AMDGPU/texture-input-merge.ll index 789538af582..789538af582 100644 --- a/test/CodeGen/R600/texture-input-merge.ll +++ b/test/CodeGen/AMDGPU/texture-input-merge.ll diff --git a/test/CodeGen/R600/trunc-cmp-constant.ll b/test/CodeGen/AMDGPU/trunc-cmp-constant.ll index dac74728b3c..dac74728b3c 100644 --- a/test/CodeGen/R600/trunc-cmp-constant.ll +++ b/test/CodeGen/AMDGPU/trunc-cmp-constant.ll diff --git a/test/CodeGen/R600/trunc-store-f64-to-f16.ll b/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll index c29872beef8..c29872beef8 100644 --- a/test/CodeGen/R600/trunc-store-f64-to-f16.ll +++ b/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll diff --git a/test/CodeGen/R600/trunc-store-i1.ll b/test/CodeGen/AMDGPU/trunc-store-i1.ll index b71a838b62c..b71a838b62c 100644 --- a/test/CodeGen/R600/trunc-store-i1.ll +++ b/test/CodeGen/AMDGPU/trunc-store-i1.ll diff --git a/test/CodeGen/R600/trunc-vector-store-assertion-failure.ll b/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll index 878ea3f4899..878ea3f4899 100644 --- a/test/CodeGen/R600/trunc-vector-store-assertion-failure.ll +++ b/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll diff --git a/test/CodeGen/R600/trunc.ll b/test/CodeGen/AMDGPU/trunc.ll index bf690ca4cb2..bf690ca4cb2 100644 --- a/test/CodeGen/R600/trunc.ll +++ b/test/CodeGen/AMDGPU/trunc.ll diff --git a/test/CodeGen/R600/tti-unroll-prefs.ll b/test/CodeGen/AMDGPU/tti-unroll-prefs.ll index 76c32afc1f2..76c32afc1f2 100644 --- a/test/CodeGen/R600/tti-unroll-prefs.ll +++ b/test/CodeGen/AMDGPU/tti-unroll-prefs.ll diff --git a/test/CodeGen/R600/uaddo.ll b/test/CodeGen/AMDGPU/uaddo.ll index 11438f267ad..11438f267ad 100644 --- a/test/CodeGen/R600/uaddo.ll +++ b/test/CodeGen/AMDGPU/uaddo.ll diff --git a/test/CodeGen/R600/udiv.ll b/test/CodeGen/AMDGPU/udiv.ll index de22a22e502..de22a22e502 100644 --- a/test/CodeGen/R600/udiv.ll +++ b/test/CodeGen/AMDGPU/udiv.ll diff --git a/test/CodeGen/R600/udivrem.ll b/test/CodeGen/AMDGPU/udivrem.ll index b3837f28209..b3837f28209 100644 --- a/test/CodeGen/R600/udivrem.ll +++ b/test/CodeGen/AMDGPU/udivrem.ll diff --git a/test/CodeGen/R600/udivrem24.ll b/test/CodeGen/AMDGPU/udivrem24.ll index 4de881b66f1..4de881b66f1 100644 --- a/test/CodeGen/R600/udivrem24.ll +++ b/test/CodeGen/AMDGPU/udivrem24.ll diff --git a/test/CodeGen/R600/udivrem64.ll b/test/CodeGen/AMDGPU/udivrem64.ll index 9f3069bdf80..9f3069bdf80 100644 --- a/test/CodeGen/R600/udivrem64.ll +++ b/test/CodeGen/AMDGPU/udivrem64.ll diff --git a/test/CodeGen/R600/uint_to_fp.f64.ll b/test/CodeGen/AMDGPU/uint_to_fp.f64.ll index dfec8eb15cb..dfec8eb15cb 100644 --- a/test/CodeGen/R600/uint_to_fp.f64.ll +++ b/test/CodeGen/AMDGPU/uint_to_fp.f64.ll diff --git a/test/CodeGen/R600/uint_to_fp.ll b/test/CodeGen/AMDGPU/uint_to_fp.ll index 00fea80b1bc..00fea80b1bc 100644 --- a/test/CodeGen/R600/uint_to_fp.ll +++ b/test/CodeGen/AMDGPU/uint_to_fp.ll diff --git a/test/CodeGen/R600/unaligned-load-store.ll b/test/CodeGen/AMDGPU/unaligned-load-store.ll index 82d88ebd3ae..82d88ebd3ae 100644 --- a/test/CodeGen/R600/unaligned-load-store.ll +++ b/test/CodeGen/AMDGPU/unaligned-load-store.ll diff --git a/test/CodeGen/R600/unhandled-loop-condition-assertion.ll b/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll index 036a7e91b47..036a7e91b47 100644 --- a/test/CodeGen/R600/unhandled-loop-condition-assertion.ll +++ b/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll diff --git a/test/CodeGen/R600/unroll.ll b/test/CodeGen/AMDGPU/unroll.ll index 411a15a4b83..411a15a4b83 100644 --- a/test/CodeGen/R600/unroll.ll +++ b/test/CodeGen/AMDGPU/unroll.ll diff --git a/test/CodeGen/R600/unsupported-cc.ll b/test/CodeGen/AMDGPU/unsupported-cc.ll index 8ab4faf2f14..8ab4faf2f14 100644 --- a/test/CodeGen/R600/unsupported-cc.ll +++ b/test/CodeGen/AMDGPU/unsupported-cc.ll diff --git a/test/CodeGen/R600/urecip.ll b/test/CodeGen/AMDGPU/urecip.ll index daacc771708..daacc771708 100644 --- a/test/CodeGen/R600/urecip.ll +++ b/test/CodeGen/AMDGPU/urecip.ll diff --git a/test/CodeGen/R600/urem.ll b/test/CodeGen/AMDGPU/urem.ll index 62841ec2d6c..62841ec2d6c 100644 --- a/test/CodeGen/R600/urem.ll +++ b/test/CodeGen/AMDGPU/urem.ll diff --git a/test/CodeGen/R600/use-sgpr-multiple-times.ll b/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll index f26f30022b4..f26f30022b4 100644 --- a/test/CodeGen/R600/use-sgpr-multiple-times.ll +++ b/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll diff --git a/test/CodeGen/R600/usubo.ll b/test/CodeGen/AMDGPU/usubo.ll index 3c9b1622a07..3c9b1622a07 100644 --- a/test/CodeGen/R600/usubo.ll +++ b/test/CodeGen/AMDGPU/usubo.ll diff --git a/test/CodeGen/R600/v1i64-kernel-arg.ll b/test/CodeGen/AMDGPU/v1i64-kernel-arg.ll index 31755125c03..31755125c03 100644 --- a/test/CodeGen/R600/v1i64-kernel-arg.ll +++ b/test/CodeGen/AMDGPU/v1i64-kernel-arg.ll diff --git a/test/CodeGen/R600/v_cndmask.ll b/test/CodeGen/AMDGPU/v_cndmask.ll index c368c5aaf7d..c368c5aaf7d 100644 --- a/test/CodeGen/R600/v_cndmask.ll +++ b/test/CodeGen/AMDGPU/v_cndmask.ll diff --git a/test/CodeGen/R600/valu-i1.ll b/test/CodeGen/AMDGPU/valu-i1.ll index 7d0ebd139f5..7d0ebd139f5 100644 --- a/test/CodeGen/R600/valu-i1.ll +++ b/test/CodeGen/AMDGPU/valu-i1.ll diff --git a/test/CodeGen/R600/vector-alloca.ll b/test/CodeGen/AMDGPU/vector-alloca.ll index 6f3b4847fbd..6f3b4847fbd 100644 --- a/test/CodeGen/R600/vector-alloca.ll +++ b/test/CodeGen/AMDGPU/vector-alloca.ll diff --git a/test/CodeGen/R600/vertex-fetch-encoding.ll b/test/CodeGen/AMDGPU/vertex-fetch-encoding.ll index fb6a17e6714..fb6a17e6714 100644 --- a/test/CodeGen/R600/vertex-fetch-encoding.ll +++ b/test/CodeGen/AMDGPU/vertex-fetch-encoding.ll diff --git a/test/CodeGen/R600/vop-shrink.ll b/test/CodeGen/AMDGPU/vop-shrink.ll index 9b2f229c05a..9b2f229c05a 100644 --- a/test/CodeGen/R600/vop-shrink.ll +++ b/test/CodeGen/AMDGPU/vop-shrink.ll diff --git a/test/CodeGen/R600/vselect.ll b/test/CodeGen/AMDGPU/vselect.ll index a3014b03d2b..a3014b03d2b 100644 --- a/test/CodeGen/R600/vselect.ll +++ b/test/CodeGen/AMDGPU/vselect.ll diff --git a/test/CodeGen/R600/vselect64.ll b/test/CodeGen/AMDGPU/vselect64.ll index ef85ebe7899..ef85ebe7899 100644 --- a/test/CodeGen/R600/vselect64.ll +++ b/test/CodeGen/AMDGPU/vselect64.ll diff --git a/test/CodeGen/R600/vtx-fetch-branch.ll b/test/CodeGen/AMDGPU/vtx-fetch-branch.ll index 4584d6e2525..4584d6e2525 100644 --- a/test/CodeGen/R600/vtx-fetch-branch.ll +++ b/test/CodeGen/AMDGPU/vtx-fetch-branch.ll diff --git a/test/CodeGen/R600/vtx-schedule.ll b/test/CodeGen/AMDGPU/vtx-schedule.ll index 912e258ebb8..912e258ebb8 100644 --- a/test/CodeGen/R600/vtx-schedule.ll +++ b/test/CodeGen/AMDGPU/vtx-schedule.ll diff --git a/test/CodeGen/R600/wait.ll b/test/CodeGen/AMDGPU/wait.ll index 5cc7577cad3..5cc7577cad3 100644 --- a/test/CodeGen/R600/wait.ll +++ b/test/CodeGen/AMDGPU/wait.ll diff --git a/test/CodeGen/R600/work-item-intrinsics.ll b/test/CodeGen/AMDGPU/work-item-intrinsics.ll index 4328e964c1b..4328e964c1b 100644 --- a/test/CodeGen/R600/work-item-intrinsics.ll +++ b/test/CodeGen/AMDGPU/work-item-intrinsics.ll diff --git a/test/CodeGen/R600/wrong-transalu-pos-fix.ll b/test/CodeGen/AMDGPU/wrong-transalu-pos-fix.ll index 8b383e4c393..8b383e4c393 100644 --- a/test/CodeGen/R600/wrong-transalu-pos-fix.ll +++ b/test/CodeGen/AMDGPU/wrong-transalu-pos-fix.ll diff --git a/test/CodeGen/R600/xor.ll b/test/CodeGen/AMDGPU/xor.ll index 089db59eabc..089db59eabc 100644 --- a/test/CodeGen/R600/xor.ll +++ b/test/CodeGen/AMDGPU/xor.ll diff --git a/test/CodeGen/R600/zero_extend.ll b/test/CodeGen/AMDGPU/zero_extend.ll index 033055db185..033055db185 100644 --- a/test/CodeGen/R600/zero_extend.ll +++ b/test/CodeGen/AMDGPU/zero_extend.ll diff --git a/test/CodeGen/R600/lit.local.cfg b/test/CodeGen/R600/lit.local.cfg deleted file mode 100644 index ad9ce2541ef..00000000000 --- a/test/CodeGen/R600/lit.local.cfg +++ /dev/null @@ -1,2 +0,0 @@ -if not 'R600' in config.root.targets: - config.unsupported = True diff --git a/test/MC/R600/ds-err.s b/test/MC/AMDGPU/ds-err.s index 52c2740bec2..52c2740bec2 100644 --- a/test/MC/R600/ds-err.s +++ b/test/MC/AMDGPU/ds-err.s diff --git a/test/MC/R600/ds.s b/test/MC/AMDGPU/ds.s index ad63229ba2e..ad63229ba2e 100644 --- a/test/MC/R600/ds.s +++ b/test/MC/AMDGPU/ds.s diff --git a/test/MC/R600/flat.s b/test/MC/AMDGPU/flat.s index adad29a5595..adad29a5595 100644 --- a/test/MC/R600/flat.s +++ b/test/MC/AMDGPU/flat.s diff --git a/test/MC/AMDGPU/lit.local.cfg b/test/MC/AMDGPU/lit.local.cfg new file mode 100644 index 00000000000..2a665f06be7 --- /dev/null +++ b/test/MC/AMDGPU/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'AMDGPU' in config.root.targets: + config.unsupported = True diff --git a/test/MC/R600/mubuf.s b/test/MC/AMDGPU/mubuf.s index 78d365abef1..78d365abef1 100644 --- a/test/MC/R600/mubuf.s +++ b/test/MC/AMDGPU/mubuf.s diff --git a/test/MC/R600/smrd.s b/test/MC/AMDGPU/smrd.s index b67abf7e689..b67abf7e689 100644 --- a/test/MC/R600/smrd.s +++ b/test/MC/AMDGPU/smrd.s diff --git a/test/MC/R600/sop1-err.s b/test/MC/AMDGPU/sop1-err.s index f892356b623..f892356b623 100644 --- a/test/MC/R600/sop1-err.s +++ b/test/MC/AMDGPU/sop1-err.s diff --git a/test/MC/R600/sop1.s b/test/MC/AMDGPU/sop1.s index 92ca73f2500..92ca73f2500 100644 --- a/test/MC/R600/sop1.s +++ b/test/MC/AMDGPU/sop1.s diff --git a/test/MC/R600/sop2.s b/test/MC/AMDGPU/sop2.s index 9a7a1c01064..9a7a1c01064 100644 --- a/test/MC/R600/sop2.s +++ b/test/MC/AMDGPU/sop2.s diff --git a/test/MC/R600/sopc.s b/test/MC/AMDGPU/sopc.s index 0899c1a2eed..0899c1a2eed 100644 --- a/test/MC/R600/sopc.s +++ b/test/MC/AMDGPU/sopc.s diff --git a/test/MC/R600/sopk.s b/test/MC/AMDGPU/sopk.s index 6c27aaccb80..6c27aaccb80 100644 --- a/test/MC/R600/sopk.s +++ b/test/MC/AMDGPU/sopk.s diff --git a/test/MC/R600/sopp.s b/test/MC/AMDGPU/sopp.s index b072c16fdb2..b072c16fdb2 100644 --- a/test/MC/R600/sopp.s +++ b/test/MC/AMDGPU/sopp.s diff --git a/test/MC/R600/vop1.s b/test/MC/AMDGPU/vop1.s index d0b00fcd189..d0b00fcd189 100644 --- a/test/MC/R600/vop1.s +++ b/test/MC/AMDGPU/vop1.s diff --git a/test/MC/R600/vop2-err.s b/test/MC/AMDGPU/vop2-err.s index a1131000a90..a1131000a90 100644 --- a/test/MC/R600/vop2-err.s +++ b/test/MC/AMDGPU/vop2-err.s diff --git a/test/MC/R600/vop2.s b/test/MC/AMDGPU/vop2.s index a1f3b8d8936..a1f3b8d8936 100644 --- a/test/MC/R600/vop2.s +++ b/test/MC/AMDGPU/vop2.s diff --git a/test/MC/R600/vop3-errs.s b/test/MC/AMDGPU/vop3-errs.s index b57fe6d5314..b57fe6d5314 100644 --- a/test/MC/R600/vop3-errs.s +++ b/test/MC/AMDGPU/vop3-errs.s diff --git a/test/MC/R600/vop3.s b/test/MC/AMDGPU/vop3.s index 20562335974..20562335974 100644 --- a/test/MC/R600/vop3.s +++ b/test/MC/AMDGPU/vop3.s diff --git a/test/MC/R600/vopc.s b/test/MC/AMDGPU/vopc.s index f44919a4f1e..f44919a4f1e 100644 --- a/test/MC/R600/vopc.s +++ b/test/MC/AMDGPU/vopc.s diff --git a/test/MC/R600/lit.local.cfg b/test/MC/R600/lit.local.cfg deleted file mode 100644 index ad9ce2541ef..00000000000 --- a/test/MC/R600/lit.local.cfg +++ /dev/null @@ -1,2 +0,0 @@ -if not 'R600' in config.root.targets: - config.unsupported = True |