diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCFrameLowering.cpp | 9 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/svr4-redzone.ll | 39 |
2 files changed, 44 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCFrameLowering.cpp b/lib/Target/PowerPC/PPCFrameLowering.cpp index 6dfb4c8d774..0a396e6693f 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -207,13 +207,14 @@ void PPCFrameLowering::determineFrameLayout(MachineFunction &MF) const { // to adjust the stack pointer (we fit in the Red Zone). For 64-bit // SVR4, we also require a stack frame if we need to spill the CR, // since this spill area is addressed relative to the stack pointer. + // The 32-bit SVR4 ABI has no Red Zone. However, it can still generate + // stackless code if all local vars are reg-allocated. bool DisableRedZone = MF.getFunction()->getAttributes(). hasAttribute(AttributeSet::FunctionIndex, Attribute::NoRedZone); - // FIXME SVR4 The 32-bit SVR4 ABI has no red zone. However, it can - // still generate stackless code if all local vars are reg-allocated. - // Try: (FrameSize <= 224 - // || (FrameSize == 0 && Subtarget.isPPC32 && Subtarget.isSVR4ABI())) if (!DisableRedZone && + (Subtarget.isPPC64() || // 32-bit SVR4, no stack- + !Subtarget.isSVR4ABI() || // allocated locals. + FrameSize == 0) && FrameSize <= 224 && // Fits in red zone. !MFI->hasVarSizedObjects() && // No dynamic alloca. !MFI->adjustsStack() && // No calls. diff --git a/test/CodeGen/PowerPC/svr4-redzone.ll b/test/CodeGen/PowerPC/svr4-redzone.ll new file mode 100644 index 00000000000..91ff5797389 --- /dev/null +++ b/test/CodeGen/PowerPC/svr4-redzone.ll @@ -0,0 +1,39 @@ +; RUN: llc -mtriple="powerpc-unknown-linux-gnu" < %s | FileCheck %s --check-prefix=PPC32 +; RUN: llc -mtriple="powerpc64-unknown-linux-gnu" < %s | FileCheck %s --check-prefix=PPC64 +; PR15332 + +define void @regalloc() nounwind { +entry: + %0 = add i32 1, 2 + ret void +} +; PPC32: regalloc: +; PPC32-NOT: stwu 1, -{{[0-9]+}}(1) +; PPC32: blr + +; PPC64: regalloc: +; PPC64-NOT: stdu 1, -{{[0-9]+}}(1) +; PPC64: blr + +define void @smallstack() nounwind { +entry: + %0 = alloca i8, i32 4 + ret void +} +; PPC32: smallstack: +; PPC32: stwu 1, -16(1) + +; PPC64: smallstack: +; PPC64-NOT: stdu 1, -{{[0-9]+}}(1) +; PPC64: blr + +define void @bigstack() nounwind { +entry: + %0 = alloca i8, i32 230 + ret void +} +; PPC32: bigstack: +; PPC32: stwu 1, -240(1) + +; PPC64: bigstack: +; PPC64: stdu 1, -352(1) |