diff options
| author | Preston Gurd <preston.gurd@intel.com> | 2013-09-13 19:23:28 +0000 |
|---|---|---|
| committer | Preston Gurd <preston.gurd@intel.com> | 2013-09-13 19:23:28 +0000 |
| commit | 94dc6540a8f3aaadb43dda50e49fc79141fae8ed (patch) | |
| tree | 909ea42f4259ad0a03ffd2add982988f3c0185be /lib/Target/X86/X86InstrMMX.td | |
| parent | 0df68423f9567b3d3eafb3b26668f783b07f687f (diff) | |
Adds support for Atom Silvermont (SLM) - -march=slm
Implements Instruction scheduler latencies for Silvermont,
using latencies from the Intel Silvermont Optimization Guide.
Auto detects SLM.
Turns on post RA scheduler when generating code for SLM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190717 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrMMX.td')
| -rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index cb129562aa9..8ab8e025bea 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -204,7 +204,7 @@ multiclass sse12_cvt_pint_3addr<bits<8> opc, RegisterClass SrcRC, //===----------------------------------------------------------------------===// def MMX_EMMS : MMXI<0x77, RawFrm, (outs), (ins), "emms", - [(int_x86_mmx_emms)]>; + [(int_x86_mmx_emms)], IIC_MMX_EMMS>; //===----------------------------------------------------------------------===// // MMX Scalar Instructions |