diff options
author | Akira Hatanaka <ahatanaka@mips.com> | 2012-07-21 02:15:19 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-07-21 02:15:19 +0000 |
commit | b7dd9fc678ab4b4c57d333cd9940b0e0d7952ea6 (patch) | |
tree | b2f0f1461d212b4f4f56cf1962230041277734ae /lib/Target/Mips/MipsFrameLowering.cpp | |
parent | c606c3ff911eddcbf8bab95e67c7d8c1f69a493e (diff) |
Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind.
Test case will be added later when long branch patch is checked in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160597 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsFrameLowering.cpp')
-rw-r--r-- | lib/Target/Mips/MipsFrameLowering.cpp | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/lib/Target/Mips/MipsFrameLowering.cpp b/lib/Target/Mips/MipsFrameLowering.cpp index cb55995404c..6338f3c4ea0 100644 --- a/lib/Target/Mips/MipsFrameLowering.cpp +++ b/lib/Target/Mips/MipsFrameLowering.cpp @@ -114,7 +114,7 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const { unsigned StackAlign = getStackAlignment(); uint64_t StackSize = RoundUpToAlignment(MFI->getStackSize(), StackAlign); - if (MipsFI->globalBaseRegSet()) + if (MipsFI->globalBaseRegSet()) StackSize += MFI->getObjectOffset(MipsFI->getGlobalRegFI()) + StackAlign; else StackSize += RoundUpToAlignment(MipsFI->getMaxCallFrameSize(), StackAlign); @@ -130,8 +130,13 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const { MachineLocation DstML, SrcML; // Adjust stack. - if (isInt<16>(-StackSize)) // addi sp, sp, (-stacksize) - BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(-StackSize); + if (isInt<16>(-StackSize)) {// addi sp, sp, (-stacksize) + if (STI.inMips16Mode()) + BuildMI(MBB, MBBI, dl, + TII.get(Mips::SaveRaF16)).addImm(StackSize); // cleanup + else + BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(-StackSize); + } else { // Expand immediate that doesn't fit in 16-bit. unsigned ATReg = STI.isABI_N64() ? Mips::AT_64 : Mips::AT; @@ -237,8 +242,14 @@ void MipsFrameLowering::emitEpilogue(MachineFunction &MF, return; // Adjust stack. - if (isInt<16>(StackSize)) // addi sp, sp, (-stacksize) - BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(StackSize); + if (isInt<16>(StackSize)) { // addi sp, sp, (-stacksize) + if (STI.inMips16Mode()) + // assumes stacksize multiple of 8 + BuildMI(MBB, MBBI, dl, + TII.get(Mips::RestoreRaF16)).addImm(StackSize); + else + BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(StackSize); + } else { // Expand immediate that doesn't fit in 16-bit. unsigned ATReg = STI.isABI_N64() ? Mips::AT_64 : Mips::AT; |