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| author | Vladimir Medic <Vladimir.Medic@imgtec.com> | 2015-01-29 11:33:41 +0000 |
|---|---|---|
| committer | Vladimir Medic <Vladimir.Medic@imgtec.com> | 2015-01-29 11:33:41 +0000 |
| commit | d0fb85865ad6e6bf91d13e336a45e2116c19d944 (patch) | |
| tree | 158e1cce337f2d642ebd85e1ea97ed91991cc592 /lib/Target/Mips/Mips32r6InstrInfo.td | |
| parent | 1a8618cbbf12000d4947311b95bb8d5ea53ac7bf (diff) | |
[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227430 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips32r6InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips32r6InstrInfo.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips32r6InstrInfo.td b/lib/Target/Mips/Mips32r6InstrInfo.td index 2175160a45a..49c63226dc0 100644 --- a/lib/Target/Mips/Mips32r6InstrInfo.td +++ b/lib/Target/Mips/Mips32r6InstrInfo.td @@ -549,6 +549,7 @@ class CACHE_HINT_DESC<string instr_asm, Operand MemOpnd, dag InOperandList = (ins MemOpnd:$addr, uimm5:$hint); string AsmString = !strconcat(instr_asm, "\t$hint, $addr"); list<dag> Pattern = []; + string DecoderMethod = "DecodeCacheOpR6"; } class CACHE_DESC : CACHE_HINT_DESC<"cache", mem_simm9, GPR32Opnd>; |