diff options
author | Eric Christopher <echristo@gmail.com> | 2014-07-23 22:12:03 +0000 |
---|---|---|
committer | Eric Christopher <echristo@gmail.com> | 2014-07-23 22:12:03 +0000 |
commit | 3322b7eef10f68fc60387da14046ad6c2f9d4167 (patch) | |
tree | 0417a57b7eceeefe1454fc1878ccf93106b3d9cb /lib/CodeGen/TargetInstrInfo.cpp | |
parent | ccd1035ad49b552971487c42a1898118071312fa (diff) |
Remove the query for TargetMachine and TargetInstrInfo since we're
already inside TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213806 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TargetInstrInfo.cpp')
-rw-r--r-- | lib/CodeGen/TargetInstrInfo.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/CodeGen/TargetInstrInfo.cpp b/lib/CodeGen/TargetInstrInfo.cpp index 83966bd0c20..fc74899f479 100644 --- a/lib/CodeGen/TargetInstrInfo.cpp +++ b/lib/CodeGen/TargetInstrInfo.cpp @@ -562,8 +562,6 @@ isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI, AliasAnalysis *AA) const { const MachineFunction &MF = *MI->getParent()->getParent(); const MachineRegisterInfo &MRI = MF.getRegInfo(); - const TargetMachine &TM = MF.getTarget(); - const TargetInstrInfo &TII = *TM.getInstrInfo(); // Remat clients assume operand 0 is the defined register. if (!MI->getNumOperands() || !MI->getOperand(0).isReg()) @@ -582,7 +580,7 @@ isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI, // redundant with subsequent checks, but it's target-independent, // simple, and a common case. int FrameIdx = 0; - if (TII.isLoadFromStackSlot(MI, FrameIdx) && + if (isLoadFromStackSlot(MI, FrameIdx) && MF.getFrameInfo()->isImmutableObjectIndex(FrameIdx)) return true; |