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2013-06-10intel/aub: Sync the AUB defines with mesa'sDamien Lespiau1-23/+53
2013-06-05intel: Adding more reserved PCI IDs for Haswell.Rodrigo Vivi1-3/+51
2013-06-05intel: Fix Haswell GT3 names.Rodrigo Vivi1-26/+27
2013-04-27intel: Add support for VEBOX ring (v2)Xiang, Haihao1-0/+9
2013-04-04intel-decode: Fix gen6 HIER_DEPTH_BUFFER decodingDaniel Vetter2-4/+4
2013-03-28intel: Fix Haswell CRW PCI IDs.Kenneth Graunke1-9/+9
2013-03-27intel_chipset: Fix up VLV confusionVille Syrjälä1-3/+3
2013-03-27intel_chipset: Use parens around macro argumentsVille Syrjälä1-155/+155
2013-02-11intel_chipset: Merge intel-gpu-tools chipsetsBen Widawsky1-75/+101
2013-02-06intel: fix length mask for Gen5/Gen6 3DSTATE_CLEAR_PARAMSChris Forbes1-1/+1
2013-02-06intel/aub: Actually run BLT batches on the blit ring.Kenneth Graunke1-0/+2
2013-02-02intel: add more VLV PCI IDsJesse Barnes1-1/+7
2013-01-13intel: Remove the fence count contributions when clearing relocsChris Wilson1-3/+4
2012-11-10intel: Fix missing ETIME on BSD operating systemsDavid Shao1-0/+3
2012-10-07intel: Silence a trivial compiler warningChris Wilson1-1/+0
2012-10-07intel: Correct the word decoding for gen2 3DSTATE_LOAD_STATE_IMMEDIATE_1Chris Wilson1-1/+1
2012-10-07intel: Fix "properly test for HAS_LLC"Chris Wilson1-1/+1
2012-09-14intel: Mark bo's exported to prime as not reusableKristian Høgsberg1-1/+8
2012-09-13intel: add support for ValleyViewJesse Barnes1-1/+6
2012-09-01intel: properly test for HAS_LLCDaniel Vetter1-1/+1
2012-08-12intel: Use VG_CLEAR on the context destroy ioctl as well.Kenneth Graunke1-0/+2
2012-08-10intel: Add a function for the new register read ioctl.Eric Anholt2-0/+21
2012-08-08intel: add more Haswell PCI IDsPaulo Zanoni1-3/+65
2012-08-08intel: Bail gracefully if we encounter an unknown Intel deviceChris Wilson1-3/+5
2012-08-02intel: Quiet valgrind warnings in context creation.Eric Anholt1-0/+1
2012-08-02intel: Remove two unused variablesDamien Lespiau1-2/+1
2012-07-20intel: fix build errorRob Clark1-1/+1
2012-07-20intel: add prime interface for getting/setting a prime bo. (v4)Dave Airlie2-0/+67
2012-07-12intel: Change context create failure message to from fprintf to DBG().Kenneth Graunke1-2/+2
2012-07-03intel: Fix build failure in test_decode.cLauri Kasanen1-0/+2
2012-06-29intel/context: create/destroy implementationBen Widawsky1-0/+45
2012-06-27intel/decode: fix the reference file forlibdrm-2.4.362.4.36Ben Widawsky2-4/+4
2012-06-27Revert "intel/decode: VERTEX_ELEMENT_STATE, 1 means valid"Ben Widawsky1-1/+1
2012-06-27intel: add decoding of MI_SET_CONTEXTBen Widawsky1-1/+17
2012-06-27intel/context: new execbuf interface for contextsBen Widawsky2-7/+30
2012-06-27intel/context: Add drm_intel_context typeBen Widawsky2-0/+6
2012-06-27intel/decode: VERTEX_ELEMENT_STATE, 1 means validBen Widawsky1-1/+1
2012-06-27intel/decode: add sampler state pointers for [HD]SBen Widawsky1-0/+2
2012-06-27intel: wait render timeout implementationBen Widawsky2-0/+58
2012-06-24intel: Add IVB PUSH_CONSTANT decodesBen Widawsky1-0/+3
2012-05-10intel: Add the ability to supply annotations for .aub files.Paul Berry2-22/+119
2012-04-02intel/decode: decode MI_WAIT_FOR_EVENTDaniel Vetter1-2/+75
2012-04-01intel: add Ivy Bridge GT2 server variantEugeni Dodonov1-1/+3
2012-03-22intel: Add some PCI IDs for Haswell.Kenneth Graunke1-5/+23
2012-03-13intel: Quiet two more valgrind complaints with recent changes.Eric Anholt1-0/+2
2012-03-10intel: Add per-dword decode of gen7 3DPRIMITIVE.Eric Anholt2-12/+31
2012-03-10intel: Move the gen4-6 3DPRIMITIVE handling out of the switch statement.Eric Anholt1-15/+17
2012-03-10intel: Add support for (possibly) unsynchronized maps.Eric Anholt2-7/+67
2012-03-09intel: Fix error check for I915_PARAM_HAS_LLC.Eric Anholt1-1/+1
2012-03-09intel: Bump the copyright dates on the bufmgr files.Eric Anholt2-2/+2
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