diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2017-09-08 16:05:54 +0200 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2017-10-12 20:35:57 +0200 |
| commit | c74d4614048f65b412caa572c900d15adba38ce3 (patch) | |
| tree | 4445a1fedee3db9677dc9563ba99cdda1fae924b /amdgpu | |
| parent | 59aa57b363ba8de550aced1d397c54fd9e5e213c (diff) | |
amdgpu: add amdgpu_cs_fence_to_handle
v2: update amdgpu-symbol-check
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Diffstat (limited to 'amdgpu')
| -rwxr-xr-x | amdgpu/amdgpu-symbol-check | 1 | ||||
| -rw-r--r-- | amdgpu/amdgpu.h | 14 | ||||
| -rw-r--r-- | amdgpu/amdgpu_cs.c | 22 |
3 files changed, 37 insertions, 0 deletions
diff --git a/amdgpu/amdgpu-symbol-check b/amdgpu/amdgpu-symbol-check index 7ecfc982..d9f89ef3 100755 --- a/amdgpu/amdgpu-symbol-check +++ b/amdgpu/amdgpu-symbol-check @@ -34,6 +34,7 @@ amdgpu_cs_ctx_free amdgpu_cs_destroy_semaphore amdgpu_cs_destroy_syncobj amdgpu_cs_export_syncobj +amdgpu_cs_fence_to_handle amdgpu_cs_import_syncobj amdgpu_cs_query_fence_status amdgpu_cs_query_reset_state diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h index 979acfc8..23cde108 100644 --- a/amdgpu/amdgpu.h +++ b/amdgpu/amdgpu.h @@ -1433,6 +1433,20 @@ int amdgpu_cs_syncobj_import_sync_file(amdgpu_device_handle dev, int sync_file_fd); /** + * Export an amdgpu fence as a handle (syncobj or fd). + * + * \param what AMDGPU_FENCE_TO_HANDLE_GET_{SYNCOBJ, FD} + * \param out_handle returned handle + * + * \return 0 on success\n + * <0 - Negative POSIX Error code + */ +int amdgpu_cs_fence_to_handle(amdgpu_device_handle dev, + struct amdgpu_cs_fence *fence, + uint32_t what, + uint32_t *out_handle); + +/** * Submit raw command submission to kernel * * \param dev - \c [in] device handle diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c index 2cde7bff..9577d5c9 100644 --- a/amdgpu/amdgpu_cs.c +++ b/amdgpu/amdgpu_cs.c @@ -713,3 +713,25 @@ void amdgpu_cs_chunk_fence_to_dep(struct amdgpu_cs_fence *fence, dep->ctx_id = fence->context->id; dep->handle = fence->fence; } + +int amdgpu_cs_fence_to_handle(amdgpu_device_handle dev, + struct amdgpu_cs_fence *fence, + uint32_t what, + uint32_t *out_handle) +{ + union drm_amdgpu_fence_to_handle fth = {0}; + int r; + + fth.in.fence.ctx_id = fence->context->id; + fth.in.fence.ip_type = fence->ip_type; + fth.in.fence.ip_instance = fence->ip_instance; + fth.in.fence.ring = fence->ring; + fth.in.fence.seq_no = fence->fence; + fth.in.what = what; + + r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_FENCE_TO_HANDLE, + &fth, sizeof(fth)); + if (r == 0) + *out_handle = fth.out.handle; + return r; +} |