i965: Create the r8stencil_mt immediatelywip/refactor/non-recursive-mt

We now properly handle the case in which make_surface fails.

Note the following:
* r8stencil_mt is now created with ISL_SURF_USAGE_RENDER_TARGET_BIT.
  This is appropriate because it is used as blit destination during the
  update process.
* r8stencil_mt is now linearly-tiled for 1D targets.

4 files changed, 44 insertions, 20 deletions

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 2cb6e2410da..d65baa61cc5 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2911,32 +2911,14 @@ intel_update_r8stencil(struct brw_context *brw,
 {
    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 
-   assert(devinfo->gen >= 7);
+   assert(devinfo->gen > 6); /* Handle MIPTREE_LAYOUT_GEN6_HIZ_STENCIL */
    struct intel_mipmap_tree *src = tex_obj->mt->format == MESA_FORMAT_S_UINT8 ?
                                    tex_obj->mt : tex_obj->mt->stencil_mt;
    if (!src || devinfo->gen >= 8)
       return;
 
    assert(src->surf.size > 0);
-
-   if (!tex_obj->r8stencil_mt) {
-      assert(devinfo->gen > 6); /* Handle MIPTREE_LAYOUT_GEN6_HIZ_STENCIL */
-      tex_obj->r8stencil_mt = make_surface(
-                            brw,
-                            src->target,
-                            MESA_FORMAT_R_UINT8,
-                            src->first_level, src->last_level,
-                            src->surf.logical_level0_px.width,
-                            src->surf.logical_level0_px.height,
-                            src->surf.dim == ISL_SURF_DIM_3D ?
-                               src->surf.logical_level0_px.depth :
-                               src->surf.logical_level0_px.array_len,
-                            src->surf.samples,
-                            ISL_TILING_Y0_BIT,
-                            ISL_SURF_USAGE_TEXTURE_BIT,
-                            BO_ALLOC_BUSY, 0, NULL);
-      assert(tex_obj->r8stencil_mt);
-   }
+   assert(tex_obj->r8stencil_mt != NULL);
 
    if (src->shadow_needs_update == false)
       return;
diff --git a/src/mesa/drivers/dri/i965/intel_tex.c b/src/mesa/drivers/dri/i965/intel_tex.c
index baf9b538990..ca2d3f1de4d 100644
--- a/src/mesa/drivers/dri/i965/intel_tex.c
+++ b/src/mesa/drivers/dri/i965/intel_tex.c
@@ -159,6 +159,19 @@ intel_alloc_texture_storage(struct gl_context *ctx,
       }
    }
 
+   if (intel_tex_needs_r8stencil(brw, texobj)) {
+      intel_texobj->r8stencil_mt = intel_miptree_create(brw, texobj->Target,
+                                                        MESA_FORMAT_R_UINT8,
+                                                        0, levels - 1,
+                                                        width, height, depth,
+                                                        MAX2(num_samples, 1),
+                                                        MIPTREE_CREATE_BUSY);
+      if (intel_texobj->r8stencil_mt == NULL) {
+         intel_miptree_release(&intel_texobj->mt);
+         return false;
+      }
+   }
+
    for (face = 0; face < numFaces; face++) {
       for (level = 0; level < levels; level++) {
          struct gl_texture_image *image = texobj->Image[face][level];
diff --git a/src/mesa/drivers/dri/i965/intel_tex.h b/src/mesa/drivers/dri/i965/intel_tex.h
index 4c48875f820..9af31fd0132 100644
--- a/src/mesa/drivers/dri/i965/intel_tex.h
+++ b/src/mesa/drivers/dri/i965/intel_tex.h
@@ -28,6 +28,7 @@
 
 #include "main/mtypes.h"
 #include "main/formats.h"
+#include "main/teximage.h"
 #include "brw_context.h"
 #include "intel_mipmap_tree.h"
 
@@ -55,4 +56,17 @@ intel_miptree_create_for_teximage(struct brw_context *brw,
 void intel_finalize_mipmap_tree(struct brw_context *brw,
                                 struct gl_texture_object *tex_obj);
 
+static inline bool
+intel_tex_needs_r8stencil(const struct brw_context *brw,
+                          const struct gl_texture_object *tex_obj)
+{
+   const struct gen_device_info *devinfo = &brw->screen->devinfo;
+   const struct gl_texture_image *first_image = _mesa_base_tex_image(tex_obj);
+   const GLenum base_fmt = _mesa_get_format_base_format(first_image->TexFormat);
+
+   return devinfo->gen == 7 &&
+          intel_texture_object(tex_obj)->r8stencil_mt == NULL &&
+          (base_fmt == GL_STENCIL_INDEX || base_fmt == GL_DEPTH_STENCIL);
+}
+
 #endif
diff --git a/src/mesa/drivers/dri/i965/intel_tex_validate.c b/src/mesa/drivers/dri/i965/intel_tex_validate.c
index 7b29303b30e..dcde749835d 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_validate.c
@@ -141,6 +141,21 @@ intel_finalize_mipmap_tree(struct brw_context *brw,
          return;
    }
 
+   if (intel_tex_needs_r8stencil(brw, tObj)) {
+      intelObj->r8stencil_mt = intel_miptree_create(brw,
+                                                    intelObj->base.Target,
+                                                    MESA_FORMAT_R_UINT8,
+                                                    0, /* first_level */
+                                                    validate_last_level,
+                                                    width, height, depth,
+                                                    1 /* num_samples */,
+                                                    MIPTREE_CREATE_BUSY);
+      if (intelObj->r8stencil_mt == NULL) {
+         intel_miptree_release(&intelObj->mt);
+         return;
+      }
+   }
+
    /* Pull in any images not in the object's tree:
     */
    nr_faces = _mesa_num_tex_faces(intelObj->base.Target);