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2016-11-14ARM: zynq: Reserve correct amount of non-DMA RAMKyle Roeschley1-1/+1
On Zynq, we haven't been reserving the correct amount of DMA-incapable RAM to keep DMA away from it (per the Zynq TRM Section 4.1, it should be the first 512k). In older kernels, this was masked by the memblock_reserve call in arm_memblock_init(). Now, reserve the correct amount excplicitly rather than relying on swapper_pg_dir, which is an address and not a size anyway. Fixes: 46f5b96 ("ARM: zynq: Reserve not DMAable space in front of the kernel") Signed-off-by: Kyle Roeschley <kyle.roeschley@ni.com> Tested-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-06-23arm: use of_platform_default_populate() to populateKefeng Wang1-1/+1
Use helper of_platform_default_populate() in linux/of_platform when possible, instead of calling of_platform_populate() with the default match table. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Krzysztof Halasa <khalasa@piap.pl> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Roland Stigge <stigge@antcom.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Ray Jui <rjui@broadcom.com> Cc: Viresh Kumar <vireshk@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Rob Herring <robh@kernel.org> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-25cpufreq: zynq: Use generic platdev driverViresh Kumar1-2/+0
The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform device now, reuse that and remove similar code from platform code. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-02-09ARM: zynq: initialize slcr mapping earlierJosh Cartwright1-2/+1
In preparation for performing additional configuration prior to bringing up L2, move the slcr initialization earlier in the boot process. Signed-off-by: Josh Cartwright <joshc@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-10-01clocksource: cosmetic: Drop OF 'dependency' from symbolsMarc Zyngier1-1/+1
Seeing the 'of' characters in a symbol that is being called from ACPI seems to freak out people. So let's do a bit of pointless renaming so that these folks do feel at home. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-09-01Merge branch 'irq-core-for-linus' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "This updated pull request does not contain the last few GIC related patches which were reported to cause a regression. There is a fix available, but I let it breed for a couple of days first. The irq departement provides: - new infrastructure to support non PCI based MSI interrupts - a couple of new irq chip drivers - the usual pile of fixlets and updates to irq chip drivers - preparatory changes for removal of the irq argument from interrupt flow handlers - preparatory changes to remove IRQF_VALID" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits) irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 irqchip: Add documentation for the bcm2836 interrupt controller irqchip/bcm2835: Add support for being used as a second level controller irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ PCI: xilinx: Fix typo in function name irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance irqchip/gic: Only allow the primary GIC to set the CPU map PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove unicore32/irq: Prepare puv3_gpio_handler for irq argument removal tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal m68k/irq: Prepare irq handlers for irq argument removal C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal blackfin: Prepare irq handlers for irq argument removal arc/irq: Prepare idu_cascade_isr for irq argument removal sparc/irq: Use access helper irq_data_get_affinity_mask() sparc/irq: Use helper irq_data_get_irq_handler_data() parisc/irq: Use access helper irq_data_get_affinity_mask() mn10300/irq: Use access helper irq_data_get_affinity_mask() irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal ...
2015-07-27irqchip/gic: Remove redundant gic_set_irqchip_flagsSudeep Holla1-1/+0
Now that the GIC chip implementation enables IRQCHIP_SKIP_SET_WAKE and IRQCHIP_MASK_ON_SUSPEND by default, the platforms requiring them need not override the irqchip flags as before. This patch removes all the users of gic_set_irqchip_flags and the function itself. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Simon Horman <horms@verge.net.au> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1436971109-20189-2-git-send-email-sudeep.holla@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-22ARM: zynq: Set bit 22 in PL310 AuxCtrl register (6395/1)Thomas Betker1-2/+2
This patch is based on the commit 1a8e41cd672f ("ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register") Clearing bit 22 in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. With bit 22 cleared, Non-cacheable reads would unexpectedly hit such cache lines leading to buffer corruption. For Zynq, this fix avoids memory inconsistencies between Gigabit Ethernet controller (GEM) and CPU when DMA_CMA is disabled. Suggested-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-18ARM: zynq: Use restart_handler mechanism for slcr resetJosh Cartwright1-6/+0
By making use of the restart_handler chain mechanism, the SLCR-based reset mechanism can be prioritized amongst other mechanisms available on a particular board. Choose a default high-ish priority of 192 for this restart mechanism. Signed-off-by: Josh Cartwright <joshc@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-03-15ARM: zynq: switch from gic_arch_extn to gic_set_irqchip_flagsMarc Zyngier1-1/+1
Instead of directly touching gic_arch_extn, which is about to be removed, use gic_set_irqchip_flags instead. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088737-15817-5-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-01-29ARM: zynq: Simplify SLCR initializationMichal Simek1-2/+0
Based on "mfd: syscon: Decouple syscon interface from platform devices" (sha1: bdb0066df96e74a4002125467ebe459feff1ebef) SLCR driver can use syscon/regmap drivers directly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-09Merge tag 'pm+acpi-3.18-rc1' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull ACPI and power management updates from Rafael Wysocki: "Features-wise, to me the most important this time is a rework of wakeup interrupts handling in the core that makes them work consistently across all of the available sleep states, including suspend-to-idle. Many thanks to Thomas Gleixner for his help with this work. Second is an update of the generic PM domains code that has been in need of some care for quite a while. Unused code is being removed, DT support is being added and domains are now going to be attached to devices in bus type code in analogy with the ACPI PM domain. The majority of work here was done by Ulf Hansson who also has been the most active developer this time. Apart from this we have a traditional ACPICA update, this time to upstream version 20140828 and a few ACPI wakeup interrupts handling patches on top of the general rework mentioned above. There also are several cpufreq commits including renaming the cpufreq-cpu0 driver to cpufreq-dt, as this is what implements generic DT-based cpufreq support, and a new DT-based idle states infrastructure for cpuidle. In addition to that, the ACPI LPSS driver is updated, ACPI support for Apple machines is improved, a few bugs are fixed and a few cleanups are made all over. Finally, the Adaptive Voltage Scaling (AVS) subsystem now has a tree maintained by Kevin Hilman that will be merged through the PM tree. Numbers-wise, the generic PM domains update takes the lead this time with 32 non-merge commits, second is cpufreq (15 commits) and the 3rd place goes to the wakeup interrupts handling rework (13 commits). Specifics: - Rework the handling of wakeup IRQs by the IRQ core such that all of them will be switched over to "wakeup" mode in suspend_device_irqs() and in that mode the first interrupt will abort system suspend in progress or wake up the system if already in suspend-to-idle (or equivalent) without executing any interrupt handlers. Among other things that eliminates the wakeup-related motivation to use the IRQF_NO_SUSPEND interrupt flag with interrupts which don't really need it and should not use it (Thomas Gleixner and Rafael Wysocki) - Switch over ACPI to handling wakeup interrupts with the help of the new mechanism introduced by the above IRQ core rework (Rafael Wysocki) - Rework the core generic PM domains code to eliminate code that's not used, add DT support and add a generic mechanism by which devices can be added to PM domains automatically during enumeration (Ulf Hansson, Geert Uytterhoeven and Tomasz Figa). - Add debugfs-based mechanics for debugging generic PM domains (Maciej Matraszek). - ACPICA update to upstream version 20140828. Included are updates related to the SRAT and GTDT tables and the _PSx methods are in the METHOD_NAME list now (Bob Moore and Hanjun Guo). - Add _OSI("Darwin") support to the ACPI core (unfortunately, that can't really be done in a straightforward way) to prevent Thunderbolt from being turned off on Apple systems after boot (or after resume from system suspend) and rework the ACPI Smart Battery Subsystem (SBS) driver to work correctly with Apple platforms (Matthew Garrett and Andreas Noever). - ACPI LPSS (Low-Power Subsystem) driver update cleaning up the code, adding support for 133MHz I2C source clock on Intel Baytrail to it and making it avoid using UART RTS override with Auto Flow Control (Heikki Krogerus). - ACPI backlight updates removing the video_set_use_native_backlight quirk which is not necessary any more, making the code check the list of output devices returned by the _DOD method to avoid creating acpi_video interfaces that won't work and adding a quirk for Lenovo Ideapad Z570 (Hans de Goede, Aaron Lu and Stepan Bujnak) - New Win8 ACPI OSI quirks for some Dell laptops (Edward Lin) - Assorted ACPI code cleanups (Fabian Frederick, Rasmus Villemoes, Sudip Mukherjee, Yijing Wang, and Zhang Rui) - cpufreq core updates and cleanups (Viresh Kumar, Preeti U Murthy, Rasmus Villemoes) - cpufreq driver updates: cpufreq-cpu0/cpufreq-dt (driver name change among other things), ppc-corenet, powernv (Viresh Kumar, Preeti U Murthy, Shilpasri G Bhat, Lucas Stach) - cpuidle support for DT-based idle states infrastructure, new ARM64 cpuidle driver, cpuidle core cleanups (Lorenzo Pieralisi, Rasmus Villemoes) - ARM big.LITTLE cpuidle driver updates: support for DT-based initialization and Exynos5800 compatible string (Lorenzo Pieralisi, Kevin Hilman) - Rework of the test_suspend kernel command line argument and a new trace event for console resume (Srinivas Pandruvada, Todd E Brandt) - Second attempt to optimize swsusp_free() (hibernation core) to make it avoid going through all PFNs which may be way too slow on some systems (Joerg Roedel) - devfreq updates (Paul Bolle, Punit Agrawal, Ãrjan Eide). - rockchip-io Adaptive Voltage Scaling (AVS) driver and AVS entry update in MAINTAINERS (Heiko Stübner, Kevin Hilman) - PM core fix related to clock management (Geert Uytterhoeven) - PM core's sysfs code cleanup (Johannes Berg)" * tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (105 commits) ACPI / fan: printk replacement PM / clk: Fix crash in clocks management code if !CONFIG_PM_RUNTIME PM / Domains: Rename cpu_data to cpuidle_data cpufreq: cpufreq-dt: fix potential double put of cpu OF node cpufreq: cpu0: rename driver and internals to 'cpufreq_dt' PM / hibernate: Iterate over set bits instead of PFNs in swsusp_free() cpufreq: ppc-corenet: remove duplicate update of cpu_data ACPI / sleep: Rework the handling of ACPI GPE wakeup from suspend-to-idle PM / sleep: Rename platform suspend/resume functions in suspend.c PM / sleep: Export dpm_suspend_late/noirq() and dpm_resume_early/noirq() ACPICA: Introduce acpi_enable_all_wakeup_gpes() ACPICA: Clear all non-wakeup GPEs in acpi_hw_enable_wakeup_gpe_block() ACPI / video: check _DOD list when creating backlight devices PM / Domains: Move dev_pm_domain_attach|detach() to pm_domain.h cpufreq: Replace strnicmp with strncasecmp cpufreq: powernv: Set the cpus to nominal frequency during reboot/kexec cpufreq: powernv: Set the pstate of the last hotplugged out cpu in policy->cpus to minimum cpufreq: Allow stop CPU callback to be used by all cpufreq drivers PM / devfreq: exynos: Enable building exynos PPMU as module PM / devfreq: Export helper functions for drivers ...
2014-10-03cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'Viresh Kumar1-1/+1
The naming convention of this driver was always under the scanner, people complained that it should have a more generic name than cpu0, as it manages all CPUs that are sharing clock lines. Also, in future it will be modified to support any number of clusters with separate clock/voltage lines. Lets rename it to 'cpufreq_dt' from 'cpufreq_cpu0'. Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-09-16ARM: zynq: Remove useless L2C AUX settingMichal Simek1-2/+2
AUX setting has no effect that's why remove it. Warning log: L2C: platform provided aux values match the hardware, so have no effect. Please remove them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: PM: Enable DDR clock stopSoren Brinkmann1-0/+1
The DDR controller can detect idle periods and leverage low power features clock stop. When new requests occur, the DDRC resumes normal operation. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: PM: Enable A9 internal clock gating featureSoren Brinkmann1-0/+6
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-06-05Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into nextLinus Torvalds1-5/+3
Pull ARM updates from Russell King: - Major clean-up of the L2 cache support code. The existing mess was becoming rather unmaintainable through all the additions that others have done over time. This turns it into a much nicer structure, and implements a few performance improvements as well. - Clean up some of the CP15 control register tweaks for alignment support, moving some code and data into alignment.c - DMA properties for ARM, from Santosh and reviewed by DT people. This adds DT properties to specify bus translations we can't discover automatically, and to indicate whether devices are coherent. - Hibernation support for ARM - Make ftrace work with read-only text in modules - add suspend support for PJ4B CPUs - rework interrupt masking for undefined instruction handling, which allows us to enable interrupts earlier in the handling of these exceptions. - support for big endian page tables - fix stacktrace support to exclude stacktrace functions from the trace, and add save_stack_trace_regs() implementation so that kprobes can record stack traces. - Add support for the Cortex-A17 CPU. - Remove last vestiges of ARM710 support. - Removal of ARM "meminfo" structure, finally converting us solely to memblock to handle the early memory initialisation. * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits) ARM: ensure C page table setup code follows assembly code (part II) ARM: ensure C page table setup code follows assembly code ARM: consolidate last remaining open-coded alignment trap enable ARM: remove global cr_no_alignment ARM: remove CPU_CP15 conditional from alignment.c ARM: remove unused adjust_cr() function ARM: move "noalign" command line option to alignment.c ARM: provide common method to clear bits in CPU control register ARM: 8025/1: Get rid of meminfo ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type ARM: 8066/1: correction for ARM patch 8031/2 ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation ARM: 8065/1: remove last use of CONFIG_CPU_ARM710 ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction ARM: 8047/1: rwsem: use asm-generic rwsem implementation ARM: l2c: trial at enabling some Cortex-A9 optimisations ARM: l2c: add warnings for stuff modifying aux_ctrl register values ARM: l2c: print a warning with L2C-310 caches if the cache size is modified ARM: l2c: remove old .set_debug method ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this ...
2014-05-30ARM: l2c: zynq: convert to generic l2c OF initialisationRussell King1-5/+3
Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-30ARM: l2c: zynq: remove cache size overrideRussell King1-1/+1
The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-20ARM: zynq: Add support for SOC_BUSMichal Simek1-1/+70
Provide information through SOC_BUS to user space. Silicon revision is provided through devcfg device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-04-05Merge tag 'tags/cleanup2-3.15' of ↵Linus Torvalds1-1/+7
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late cleanups from Arnd Bergmann: "These could not be part of the first cleanup branch, because they either came too late in the cycle, or they have dependencies on other branches. Important changes are: - The integrator platform is almost multiplatform capable after some reorganization (Linus Walleij) - Minor cleanups on Zynq (Michal Simek) - Lots of changes for Exynos and other Samsung platforms, including further preparations for multiplatform support and the clocks bindings are rearranged" * tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) devicetree: fix newly added exynos sata bindings ARM: EXYNOS: Fix compilation error in cpuidle.c ARM: S5P64X0: Explicitly include linux/serial_s3c.h in mach/pm-core.h ARM: EXYNOS: Remove hardware.h file ARM: SAMSUNG: Remove hardware.h inclusion ARM: S3C24XX: Remove invalid code from hardware.h dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock ARM: dts: Keep some essential LDOs enabled for arndale-octa board ARM: dts: Disable MDMA1 node for arndale-octa board ARM: S3C64XX: Fix build for implicit serial_s3c.h inclusion serial: s3c: Fix build of header without serial_core.h preinclusion ARM: EXYNOS: Allow wake-up using GIC interrupts ARM: EXYNOS: Stop using legacy Samsung PM code ARM: EXYNOS: Remove PM initcalls and useless indirection ARM: EXYNOS: Fix abuse of CONFIG_PM ARM: SAMSUNG: Move s3c_pm_check_* prototypes to plat/pm-common.h ARM: SAMSUNG: Move common save/restore helpers to separate file ARM: SAMSUNG: Move Samsung PM debug code into separate file ARM: SAMSUNG: Consolidate PM debug functions ARM: SAMSUNG: Use debug_ll_addr() to get UART base address ...
2014-04-01Merge branch 'timers-core-for-linus' of ↵Linus Torvalds1-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer changes from Thomas Gleixner: "This assorted collection provides: - A new timer based timer broadcast feature for systems which do not provide a global accessible timer device. That allows those systems to put CPUs into deep idle states where the per cpu timer device stops. - A few NOHZ_FULL related improvements to the timer wheel - The usual updates to timer devices found in ARM SoCs - Small improvements and updates all over the place" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits) tick: Remove code duplication in tick_handle_periodic() tick: Fix spelling mistake in tick_handle_periodic() x86: hpet: Use proper destructor for delayed work workqueue: Provide destroy_delayed_work_on_stack() clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS timer: Remove code redundancy while calling get_nohz_timer_target() hrtimer: Rearrange comments in the order struct members are declared timer: Use variable head instead of &work_list in __run_timers() clocksource: exynos_mct: silence a static checker warning arm: zynq: Add support for cpufreq arm: zynq: Don't use arm_global_timer with cpufreq clocksource/cadence_ttc: Overhaul clocksource frequency adjustment clocksource/cadence_ttc: Call clockevents_update_freq() with IRQs enabled clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI sh: Remove Kconfig entries for TMU, CMT and MTU2 ARM: shmobile: Remove CMT, TMU and STI Kconfig entries clocksource: armada-370-xp: Use atomic access for shared registers clocksource: orion: Use atomic access for shared registers clocksource: timer-keystone: Delete unnecessary variable clocksource: timer-keystone: introduce clocksource driver for Keystone ...
2014-03-27Merge tag 'zynq-cleanup-for-3.15-v2' of git://git.xilinx.com/linux-xlnx into ↵Arnd Bergmann1-1/+7
next/cleanup2 Merge "arm: Xilinx Zynq cleanup patches for v3.15" from Michal Simek: - Redesign SLCR initialization to enable driver developing which targets SLCR space * tag 'zynq-cleanup-for-3.15-v2' of git://git.xilinx.com/linux-xlnx: ARM: zynq: Add waituart implementation ARM: zynq: Move of_clk_init from clock driver ARM: zynq: Introduce zynq_slcr_unlock() ARM: zynq: Add and use zynq_slcr_read/write() helper functions ARM: zynq: Make zynq_slcr_base static ARM: zynq: Map I/O memory on clkc init ARM: zynq: Hang iomapped slcr address on device_node ARM: zynq: Split slcr in two parts ARM: zynq: Move clock_init from slcr to common arm: dt: zynq: Add fclk-enable property to clkc node [Arnd: remove SOC_BUS support from pull request] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-17ARM: zynq: Move of_clk_init from clock driverMichal Simek1-0/+2
Move of_clk_init() from clock driver to enable options not to use zynq clock driver. Use for example fixed clock setting. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-03-11arm: zynq: Add support for cpufreqSoren Brinkmann1-0/+3
The generic cpufreq-cpu0 driver can scale the CPU frequency on Zynq SOCs. Add the required platform device to the BSP and appropriate OPPs to the dts. Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: devicetree@vger.kernel.org Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10ARM: zynq: Reserve not DMAable space in front of the kernelMichal Simek1-0/+14
Reserve space from 0x0 - __pa(swapper_pg_dir), if kernel is loaded from 0, which is not DMAable. It is causing problem with MMC driver and others which want to add dma buffers to this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2014-02-10ARM: zynq: Map I/O memory on clkc initMichal Simek1-1/+1
The clkc has its registers in the range of the slcr. Instead of passing around the slcr base address pointer, let the clkc get the address from the DT. This prepares the slcr to be a real driver with multiple memory ranges (slcr, clocks, pinctrl,...) Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10ARM: zynq: Split slcr in two partsMichal Simek1-1/+3
Split the slcr into an early part for unlocking and cpu starting and a later syscon driver. Also add "syscon" compatible property for slcr. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-05ARM: zynq: Move clock_init from slcr to commonSteffen Trumtrar1-0/+2
Preparation step for next changes. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-12-10arm: zynq: Set proper GIC flagsSoren Brinkmann1-0/+9
Zynq is able to wake up on any IRQ, so flag it with IRQCHIP_SKIP_SET_WAKE, and we want to mask off the IRQs when going to suspend to avoid transient effects so also flag this with IRQCHIP_MASK_ON_SUSPEND. This is essentially, making the same changes as commit 'ARM: ux500: set proper GIC flags' (sha1: 7e1f97ea8ffa66679252520dbbbd6ec413ecae68) for Zynq. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-12-10arm: zynq: Use of_platform_populate instead of bus_probeSoren Brinkmann1-6/+1
All new boards should be using this function instead of of_platform_bus_probe. Two side effects: 1. Possible to probe node which are not in the bus 2. Remove bus_id table from platform code Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-10-07ARM: zynq: cpuidle: convert to platform driverDaniel Lezcano1-0/+6
As the ux500 and the kirkwood driver, make the zynq driver a platform driver Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2013-07-23ARM: zynq: fix compilation warningVincent Stehlé1-1/+1
Fix the following compilation warning: arch/arm/mach-zynq/common.c:110:2: warning: initialization from incompatible pointer type [enabled by default] arch/arm/mach-zynq/common.c:110:2: warning: (near initialization for ‘__mach_desc_XILINX_EP107.restart’) [enabled by default] Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com> Cc: Robin Holt <holt@sgi.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: trivial@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2013-07-05ARM: zynq: use DT_MACHINE_STARTArnd Bergmann1-1/+1
The zynq platform code only supports DT based booting, so we should use DT_MACHINE_START rather than MACHINE_START. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Michal Simek <michal.simek@xilinx.com>
2013-07-02Merge tag 'dt-for-linus' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree changes from Arnd Bergmann: "These changes from 30 individual branches for the most part update device tree files, but there are also a few source code changes that have crept in this time, usually in order to atomically move over a driver from using hardcoded data to DT probing. A number of platforms change their DT files to use the C preprocessor, which is causing a bit of churn, but that is hopefully only this once" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits) ARM: at91: dt: rm9200ek: add spi support ARM: at91: dt: rm9200: add spi support ARM: at91/DT: at91sam9n12: add SPI DMA client infos ARM: at91/DT: sama5d3: add SPI DMA client infos ARM: at91/DT: fix SPI compatibility string ARM: Kirkwood: Fix the internal register ranges translation ARM: dts: bcm281xx: change comment to C89 style ARM: mmc: bcm281xx SDHCI driver (dt mods) ARM: nomadik: add the new clocks to the device tree clk: nomadik: implement the Nomadik clocks properly ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency ARM: dts: omap4-panda: Fix DVI EDID reads ARM: dts: omap4-panda: Add USB Host support arm: mvebu: enable mini-PCIe connectors on Armada 370 RD ARM: shmobile: irqpin: add a DT property to enable masking on parent ARM: dts: AM43x EPOS EVM support ARM: dts: OMAP5: Add bandgap DT entry ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone ...
2013-06-17arm: zynq: Remove board specific compatibility stringSoren Brinkmann1-1/+0
It is not necessary to have board specific compatibility strings in the platform code. The board dts files can use the more generic 'xlnx,zynq-7000' string. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-21ARM: zynq: Remove init_irq declaration in machine descriptionMaxime Ripard1-2/+0
Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is specified") removed the need to explictly setup the init_irq field in the machine description when using only irqchip_init. Remove that declaration for zynq as well. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Add smp supportMichal Simek1-0/+1
Zynq is dual core Cortex A9 which starts always at zero. Using simple trampoline ensure long jump to secondary_startup code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
2013-04-04arm: zynq: Get rid of xilinx function prefixMichal Simek1-11/+11
Xilinx is vendor name not SoC name. Use zynq instead. Also remove one checkpatch warning: WARNING: static const char * array should probably be static const char * const +static const char *xilinx_dt_match[] = { Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Add support for system resetMichal Simek1-0/+6
Do system reset via slcr registers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Move slcr initialization to separate fileMichal Simek1-9/+1
Create separate slcr driver instead of polluting common code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Load scu baseaddress at run timeMichal Simek1-12/+22
Use Cortex a9 cp15 to read scu baseaddress. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Move timer to clocksource interfaceMichal Simek1-1/+1
Use clocksource timer initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Use standard timer bindingMichal Simek1-0/+1
Use cdns,ttc because this driver is Cadence Rev06 Triple Timer Counter and everybody can use it without xilinx specific function name or probing. Also use standard dt description for timer and also prepare for moving to clocksource initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-01-28arm: zynq: timer: Replace PSS through PSSoren Brinkmann1-1/+1
The acronym PSS is deprecated by Xilinx. The correct term, which is also used in Xilinx documentation is PS (processing system). This is just a search and replace: - s/PSS/PS/g - s/pss/ps/g Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com>
2013-01-28arm: zynq: Add missing irqchip.h to common.cMichal Simek1-0/+1
The patch: "ARM: use common irqchip_init for GIC init" (sha1: 0529e315bbda5d502c93df2cfafba9bb337fbdf4) should also add linux/irqchip.h header. Error message: arch/arm/mach-zynq/common.c:99:14: error: 'irqchip_init' undeclared here (not in a function) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-01-14Merge tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux ↵Olof Johansson1-16/+1
into next/cleanup From Rob Herring: Initial irqchip init infrastructure and GIC and VIC clean-ups This creates irqchip initialization infrastructure from Thomas Petazzoni. The VIC and GIC irqchip code is moved to drivers/irqchips and adapted to use the new infrastructure. All DT enabled platforms using GIC and VIC are converted over to use the new irqchip_init. * tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux: irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h ARM: picoxcell: use common irqchip_init function ARM: spear: use common irqchip_init function irqchip: Move ARM VIC to drivers/irqchip ARM: samsung: remove unused tick.h ARM: remove unneeded vic.h includes ARM: remove mach .handle_irq for VIC users ARM: VIC: set handle_arch_irq in VIC initialization ARM: VIC: shrink down vic.h irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h ARM: use common irqchip_init for GIC init irqchip: Move ARM GIC to drivers/irqchip ARM: remove mach .handle_irq for GIC users ARM: GIC: set handle_arch_irq in GIC initialization ARM: GIC: remove direct use of gic_raise_softirq ARM: GIC: remove assembly ifdefs from gic.h ARM: mach-ux500: use SGI0 to wake up the other core arm: add set_handle_irq() to register the parent IRQ controller handler function irqchip: add basic infrastructure irqchip: add to the directories part of the IRQ subsystem in MAINTAINERS Fixed up massive merge conflicts with the timer cleanup due to adjacent changes: Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-bcm/board_bcm.c arch/arm/mach-cns3xxx/cns3420vb.c arch/arm/mach-ep93xx/adssphere.c arch/arm/mach-ep93xx/edb93xx.c arch/arm/mach-ep93xx/gesbc9312.c arch/arm/mach-ep93xx/micro9.c arch/arm/mach-ep93xx/simone.c arch/arm/mach-ep93xx/snappercl15.c arch/arm/mach-ep93xx/ts72xx.c arch/arm/mach-ep93xx/vision_ep9307.c arch/arm/mach-highbank/highbank.c arch/arm/mach-imx/mach-imx6q.c arch/arm/mach-msm/board-dt-8960.c arch/arm/mach-netx/nxdb500.c arch/arm/mach-netx/nxdkn.c arch/arm/mach-netx/nxeb500hmi.c arch/arm/mach-nomadik/board-nhk8815.c arch/arm/mach-picoxcell/common.c arch/arm/mach-realview/realview_eb.c arch/arm/mach-realview/realview_pb1176.c arch/arm/mach-realview/realview_pb11mp.c arch/arm/mach-realview/realview_pba8.c arch/arm/mach-realview/realview_pbx.c arch/arm/mach-socfpga/socfpga.c arch/arm/mach-spear13xx/spear1310.c arch/arm/mach-spear13xx/spear1340.c arch/arm/mach-spear13xx/spear13xx.c arch/arm/mach-spear3xx/spear300.c arch/arm/mach-spear3xx/spear310.c arch/arm/mach-spear3xx/spear320.c arch/arm/mach-spear3xx/spear3xx.c arch/arm/mach-spear6xx/spear6xx.c arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/board-dt-tegra30.c arch/arm/mach-u300/core.c arch/arm/mach-ux500/board-mop500.c arch/arm/mach-ux500/cpu-db8500.c arch/arm/mach-versatile/versatile_ab.c arch/arm/mach-versatile/versatile_dt.c arch/arm/mach-versatile/versatile_pb.c arch/arm/mach-vexpress/v2m.c include/asm-generic/vmlinux.lds.h
2013-01-12ARM: use common irqchip_init for GIC initRob Herring1-15/+1
Convert all GIC DT initialization over to use common irqchip_init function. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org>
2013-01-12ARM: remove mach .handle_irq for GIC usersRob Herring1-1/+0
Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-12-24ARM: delete struct sys_timerStephen Warren1-8/+1
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 17:34:12 +0000