diff options
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2017-01-05 13:37:58 +0200 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2017-01-12 01:29:42 +0200 |
| commit | b7765523206d41883955181aef78ede455b8ea9d (patch) | |
| tree | fdaf4b7e02611ee28702982ab3479456ed34534a /drivers | |
| parent | 0a5e76526967c34fbd6c924298267add679913c5 (diff) | |
drm: bridge: dw-hdmi: Assert SVSRET before resetting the PHY
According to the PHY IP core vendor, the SVSRET signal must be asserted
before resetting the PHY. Tests on RK3288 and R-Car Gen3 showed no
regression, the change should thus be safe.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/bridge/dw-hdmi.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c index 93e8816f1f78..4fda0717e789 100644 --- a/drivers/gpu/drm/bridge/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/dw-hdmi.c @@ -986,6 +986,10 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon) /* gen2 pddq */ dw_hdmi_phy_gen2_pddq(hdmi, 1); + /* Leave low power consumption mode by asserting SVSRET. */ + if (hdmi->phy->has_svsret) + dw_hdmi_phy_enable_svsret(hdmi, 1); + /* PHY reset. The reset signal is active high on Gen2 PHYs. */ hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); @@ -1028,11 +1032,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon) dw_hdmi_phy_gen2_txpwron(hdmi, 1); dw_hdmi_phy_gen2_pddq(hdmi, 0); - /* The DWC MHL and HDMI 2.0 PHYs need the SVSRET signal to be set. */ - if (hdmi->phy->has_svsret) - dw_hdmi_phy_enable_svsret(hdmi, 1); - - /*Wait for PHY PLL lock */ + /* Wait for PHY PLL lock */ msec = 5; do { val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK; |