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authorQiuxu Zhuo <qiuxu.zhuo@intel.com>2017-05-23 08:08:34 +0800
committerBorislav Petkov <bp@suse.de>2017-05-25 14:40:40 +0200
commit3286d3eb906cbac832884dda8ce2fdc7acb17a65 (patch)
treeda29c2c29e93bd2be14723a2904139c0adbcdec9 /drivers/edac
parent6696522957a192130dc42d80ea34796ec7ba0c2b (diff)
EDAC, sb_edac: Drop NUM_CHANNELS from 8 back to 4
We don't need this quirk anymore now that the EDAC memory controller representation matches the hardware. Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20170523000834.87881-1-qiuxu.zhuo@intel.com [ Commit message. ] Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/sb_edac.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index fad5c79741d2..b9564f767269 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -279,7 +279,7 @@ static const u32 correrrthrsld[] = {
* sbridge structs
*/
-#define NUM_CHANNELS 8 /* 2MC per socket, four chan per MC */
+#define NUM_CHANNELS 4 /* Max channels per MC */
#define MAX_DIMMS 3 /* Max DIMMS per channel */
#define KNL_MAX_CHAS 38 /* KNL max num. of Cache Home Agents */
#define KNL_MAX_CHANNELS 6 /* KNL max num. of PCI channels */