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authorElaine Zhang <zhangqing@rock-chips.com>2017-05-02 15:34:06 +0800
committerHeiko Stuebner <heiko@sntech.de>2017-06-02 15:57:32 +0200
commit223c24be740d293519ef8e03f5c075fab5512fd2 (patch)
tree1c6ec1a5a2eda821901245977d39c8ce775db50e /Documentation
parent55bb6a633c33caf68ab470907ecf945289cb733d (diff)
clk: rockchip: mark some special clk as critical on rk3368
The jtag clk no driver to handle them. But this clk need enable,so make it as critical. The ddrphy/ddrupctl clks no driver to handle them, Chip design requirements for these clock to always on, The pmu_hclk_otg0 is Chip design defect, must be always on, Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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