diff options
author | Andi Kleen <andi@firstfloor.org> | 2010-11-19 13:16:22 +0100 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2012-05-23 14:22:37 -0700 |
commit | a129a7c84582629741e5fa6f40026efcd7a65bd4 (patch) | |
tree | cbb2d4dcf002406e8fdcff07d05ae39477469669 | |
parent | 8571723a698dcc0ee16c1c63908aa99dd940ce5c (diff) |
MCE: Fix vm86 handling for 32bit mce handler
When running on 32bit the mce handler could misinterpret
vm86 mode as ring 0. This can affect whether it does recovery
or not; it was possible to panic when recovery was actually
possible.
Fix this by always forcing vm86 to look like ring 3.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Tony Luck <tony.luck@intel.com>
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 66e1c51be084..5f793e6c854b 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -437,6 +437,14 @@ static inline void mce_gather_info(struct mce *m, struct pt_regs *regs) if (m->mcgstatus & (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) { m->ip = regs->ip; m->cs = regs->cs; + + /* + * When in VM86 mode make the cs look like ring 3 + * always. This is a lie, but it's better than passing + * the additional vm86 bit around everywhere. + */ + if (v8086_mode(regs)) + m->cs |= 3; } /* Use accurate RIP reporting if available. */ if (rip_msr) |