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author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-01-04 11:34:01 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-01-04 11:35:18 +0100 |
commit | a402eae64d0ad12b1c4a411f250d6c161e67f623 (patch) | |
tree | 8c031c914e29321c01b94497a0f9c49ee6b03dc4 /Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt | |
parent | 7800fb69ddf3a13d2055009c87eacf7f46f907c8 (diff) | |
parent | 0c744ea4f77d72b3dcebb7a8f2684633ec79be88 (diff) |
Merge tag 'v4.10-rc2' into drm-intel-next-queued
Backmerge Linux 4.10-rc2 to resync with our -fixes cherry-picks. I've
done the backmerge directly because Dave is on vacation.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt')
-rw-r--r-- | Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt new file mode 100644 index 000000000000..7f95ec400863 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt @@ -0,0 +1,32 @@ +Amlogic SD / eMMC controller for S905/GXBB family SoCs + +The MMC 5.1 compliant host controller on Amlogic provides the +interface for SD, eMMC and SDIO devices. + +This file documents the properties in addition to those available in +the MMC core bindings, documented by mmc.txt. + +Required properties: +- compatible : contains one of: + - "amlogic,meson-gx-mmc" + - "amlogic,meson-gxbb-mmc" + - "amlogic,meson-gxl-mmc" + - "amlogic,meson-gxm-mmc" +- clocks : A list of phandle + clock-specifier pairs for the clocks listed in clock-names. +- clock-names: Should contain the following: + "core" - Main peripheral bus clock + "clkin0" - Parent clock of internal mux + "clkin1" - Other parent clock of internal mux + The driver has an interal mux clock which switches between clkin0 and clkin1 depending on the + clock rate requested by the MMC core. + +Example: + + sd_emmc_a: mmc@70000 { + compatible = "amlogic,meson-gxbb-mmc"; + reg = <0x0 0x70000 0x0 0x2000>; + interrupts = < GIC_SPI 216 IRQ_TYPE_EDGE_RISING>; + clocks = <&clkc CLKID_SD_EMMC_A>, <&xtal>, <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + pinctrl-0 = <&emmc_pins>; + }; |