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AgeCommit message (Expand)AuthorFilesLines
2020-04-29winsys/svga: Optionally avoid caching buffer mapsHEADmasterThomas Hellstrom4-12/+22
2020-04-29gallium/pipebuffer: Use persistent maps for slabsThomas Hellstrom3-4/+14
2020-04-29radv: Use smaller esgs_itemsize for ACO.Timur Kristóf4-23/+30
2020-04-29aco: Use new default driver locations.Timur Kristóf1-107/+17
2020-04-29radv: Use new linking helper to set default driver locations.Timur Kristóf2-0/+58
2020-04-29nir: Add new linking helper to set linked driver locations.Timur Kristóf2-0/+108
2020-04-29aco: Set config->lds_size when TES or VS is running on HW ESGS.Timur Kristóf1-0/+1
2020-04-29aco: Calculate workgroup size of legacy GS.Timur Kristóf1-1/+5
2020-04-29aco: Remember VS/TCS output driver locations.Timur Kristóf2-10/+18
2020-04-29aco: Use context variables instead of calculating TCS inputs/outputs.Timur Kristóf2-11/+7
2020-04-29radv: Refactor calculate_tess_lds_size and get_tcs_num_patches.Timur Kristóf3-21/+25
2020-04-29aco: consider blocks unreachable if they are in the logical cfgRhys Perry6-9/+2
2020-04-29egl/wayland: Fix zwp_linux_dmabuf usageChristopher James Halse Rogers1-12/+20
2020-04-29iris/bufmgr: Check if iris_bo_gem_mmap failedDanylo Piliaiev1-0/+8
2020-04-29anv: remove assert from GetImageMemoryRequirements[2]Tapani Pälli1-12/+0
2020-04-29gitlab-ci: add a list of expected failures for FIJI with ACOSamuel Pitoiset1-0/+36
2020-04-29radv: advertise VK_EXT_robustness2Samuel Pitoiset3-1/+17
2020-04-29radv: handle NULL vertex bindingsSamuel Pitoiset1-4/+7
2020-04-29radv: handle NULL descriptorsSamuel Pitoiset1-2/+24
2020-04-29aco: fix adjusting the sample index with FMASK if value is negativeSamuel Pitoiset1-2/+6
2020-04-29aco: fix nir_texop_texture_samples with NULL descriptorsSamuel Pitoiset1-2/+12
2020-04-29ac/llvm: fix nir_texop_texture_samples with NULL descriptorsSamuel Pitoiset1-1/+22
2020-04-29intel/fs: Only stall after sending all memory fence messagesCaio Marcelo de Oliveira Filho1-19/+16
2020-04-29intel/fs,vec4: Pull stall logic for memory fences up into the IRCaio Marcelo de Oliveira Filho7-109/+118
2020-04-29intel/fs: Allow FS_OPCODE_SCHEDULING_FENCE stall on registersCaio Marcelo de Oliveira Filho2-2/+30
2020-04-29radv: Expose 4G element texel buffers.Bas Nieuwenhuizen1-1/+1
2020-04-29iris: Fix downcast of bound_vertex_buffers from uint64_t to intKenneth Graunke1-1/+1
2020-04-28intel/ir: Remove scheduling-based cycle count estimates.Francisco Jerez3-26/+1
2020-04-28intel/ir: Pass block cycle count information explicitly to disassembler.Francisco Jerez5-6/+11
2020-04-28intel/ir: Use brw::performance object instead of CFG cycle counts for codegen...Francisco Jerez9-22/+45
2020-04-28intel/fs: Add INTEL_DEBUG=no32 debugging flag.Francisco Jerez3-2/+5
2020-04-28intel/fs: Implement performance analysis-based SIMD32 heuristic for fragment ...Francisco Jerez1-7/+17
2020-04-28intel/fs: Heap-allocate fs_visitors in brw_compile_fs().Francisco Jerez1-38/+39
2020-04-28intel/ir: Import shader performance analysis pass.Francisco Jerez8-1/+1660
2020-04-28intel/vec4: Fix constness of vec4_instruction::reads_flag() and ::writes_flag().Francisco Jerez1-2/+2
2020-04-28intel/fs: Replace fs_visitor::bank_conflict_cycles() with stand-alone function.Francisco Jerez4-17/+17
2020-04-28intel/fs: Fix constness of argument of fs_instruction_scheduler::is_compresse...Francisco Jerez1-2/+2
2020-04-28intel/fs: Rename half() helpers to quarter(), allow index up to 3.Francisco Jerez4-14/+14
2020-04-28intel/ir: Add missing initialization of backend_reg::offset during construction.Francisco Jerez1-1/+1
2020-04-28intel/fs/gen12: Fix Render Target Read header setup for new thread payload la...Francisco Jerez1-0/+17
2020-04-28intel/fs/gen12: Work around dual-source blending hangs in combination with SI...Francisco Jerez1-2/+3
2020-04-28intel/fs/gen12: Fix hangs with per-sample SIMD32 fragment shader dispatch.Francisco Jerez1-3/+10
2020-04-29mesa: Follow OpenGL conversion rules for values that exceed storage sizeDylan Baker1-4/+33
2020-04-29pan/bit: Add BITWISE testAlyssa Rosenzweig1-0/+32
2020-04-29pan/bit: Interpret BI_BITWISEAlyssa Rosenzweig1-2/+22
2020-04-29pan/bi: Handle iand/ior/ixor in NIR->BIRAlyssa Rosenzweig1-0/+18
2020-04-29pan/bi: Pack BI_BITWISEAlyssa Rosenzweig2-2/+77
2020-04-29pan/bi: Add bitwise modifiersAlyssa Rosenzweig2-0/+12
2020-04-29freedreno/a6xx: invalidate tex state cache entries on rebindRob Clark3-1/+30
2020-04-29freedreno: rebind_resource() *before* bo changesRob Clark1-4/+2
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