bitfields and shifting

squash! WIP: intel/compiler: Import Gen8 / Gen9 ALU machine description

1 files changed, 33 insertions, 0 deletions

diff --git a/src/intel/compiler/gen8_md.py b/src/intel/compiler/gen8_md.py
index 559cb8a1d1e9..7ba80f3d1127 100644
--- a/src/intel/compiler/gen8_md.py
+++ b/src/intel/compiler/gen8_md.py
@@ -353,6 +353,39 @@ gen8_md = [
     (('unpack_32_2x16_split_y', a), Instruction('MOV', r, subscript(a, UW, 1))),
     (('unpack_half_2x16_split_x', a), Instruction('F16TO32', r, subscript(a, UW, 0))),
     (('unpack_half_2x16_split_y', a), Instruction('F16TO32', r, subscript(a, UW, 1))),
+
+    # Bitfields
+    (('bitfield_reverse', a), Instruction('BFREV', r, a)),
+    (('bit_count', a), Instruction('CBIT', r, a)),
+
+    # LZD counts from the MSB side, while GLSL's ufind_MSB wants the count
+    # from the LSB side. Subtract the result from 31 to convert the MSB count
+    # into an LSB count.  If no bits are set, LZD will return 32.  31-32 = -1,
+    # which is exactly what ufind_msb is supposed to return.
+    (('ufind_msb', a), InstructionList([],
+                                       (Instruction('LZD', retype(r, UD), retype(a, UD)),
+                                        Instruction('ADD', r, neg(retype(r, D)), imm(31, D))))
+    ),
+
+    # FBH counts from the MSB side, while ifind_msb wants the count from the
+    # LSB side. If FBH didn't return an error (0xFFFFFFFF), then subtract the
+    # result from 31 to convert the MSB count into an LSB count.
+    (('ifind_msb', a), InstructionList([],
+                                       (Instruction('FBH', retype(r, UD), a),
+                                        Instruction('CMP', null(D), r, imm(-1, D)).cmod('NZ'),
+                                        Instruction('ADD', r, neg(r), imm(31, D)).predicate()))
+    ),
+
+    (('find_lsb', a), Instruction('FBL', r, a)),
+    (('ubfe', a, b, c), Instruction('BFE', r, c, b, a)),
+    (('ibfe', a, b, c), Instruction('BFE', r, c, b, a)),
+    (('bfm', a, b), Instruction('BFI1', r, a, b)),
+    (('bfi', a, b, c), Instruction('BFI2', r, a, b, c)),
+
+    # Shifts
+    (('ishl', a, b), Instruction('SHL', r, a, b)),
+    (('ishr', a, b), Instruction('ASR', r, a, b)),
+    (('ushr', a, b), Instruction('SHR', r, a, b)),
 ]
 
 gen8_unsupported = [