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authorIan Romanick <ian.d.romanick@intel.com>2019-02-21 17:41:38 -0800
committerIan Romanick <ian.d.romanick@intel.com>2019-03-26 10:29:22 -0700
commit44ff56f26c6a4672ed786cb6995df2006c87342e (patch)
treeeff162b899c3901c29476cc13331f36ce62182af
parent803c95dde9899aa35b4e576d6c4497881bc46643 (diff)
min and max
squash! WIP: intel/compiler: Import Gen8 / Gen9 ALU machine description
-rw-r--r--src/intel/compiler/gen8_md.py27
1 files changed, 27 insertions, 0 deletions
diff --git a/src/intel/compiler/gen8_md.py b/src/intel/compiler/gen8_md.py
index bbd9aa7a61d4..0a0e5c2c836c 100644
--- a/src/intel/compiler/gen8_md.py
+++ b/src/intel/compiler/gen8_md.py
@@ -315,6 +315,33 @@ gen8_md = [
(('ffloor', a), Instruction('RNDD', r, a)),
(('ffract', a), Instruction('FRC', r, a)),
(('fround_even', a), Instruction('RNDE', r, a)),
+
+ # Min / max
+ (('fmin', a, b), Instruction('SEL', r, a, b).cmod('L')),
+ (('imin', a, b), Instruction('SEL', r, a, b).cmod('L')),
+ (('umin@32', 'a(neg_src_mod)', 'b(neg_src_mod)'), InstructionList([(t0, UD), (t1, UD)],
+ (Instruction('MOV', t0, a),
+ Instruction('MOV', t1, b),
+ Instruction('SEL', r, t0, t1).cmod('L')))
+ ),
+ (('umin@32', 'a(neg_src_mod)', b), InstructionList([(t0, UD),],
+ (Instruction('MOV', t0, a),
+ Instruction('SEL', r, t0, b).cmod('L')))
+ ),
+ (('umin', a, b), Instruction('SEL', r, a, b).cmod('L')),
+
+ (('fmax', a, b), Instruction('SEL', r, a, b).cmod('GE')),
+ (('imax', a, b), Instruction('SEL', r, a, b).cmod('GE')),
+ (('umax@32', 'a(neg_src_mod)', 'b(neg_src_mod)'), InstructionList([(t0, UD), (t1, UD)],
+ (Instruction('MOV', t0, a),
+ Instruction('MOV', t1, b),
+ Instruction('SEL', r, t0, t1).cmod('GE')))
+ ),
+ (('umax@32', 'a(neg_src_mod)', b), InstructionList([(t0, UD),],
+ (Instruction('MOV', t0, a),
+ Instruction('SEL', r, t0, b).cmod('GE')))
+ ),
+ (('umax', a, b), Instruction('SEL', r, a, b).cmod('GE')),
]
gen8_unsupported = [