blob: 0e6ac5089e9fe12e5c229426fa72a79558f7748e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
|
Tegra2 reverse engineering notes.
Tegra2 uses PIO fifos. The design is fairly recent but I can't match it to a
specific nv** version yet. Of course the offsets don't match other graphics
objects, seemingly those are much smaller. Still, they speak OpenGL (ES) at
the hardware level though. Color constants seem to be given as float values
always. All hw regs are R/W which is very convenient to avoid duplicate state
both in memory and on the GPU; you can just glGet from the hw directly.
We have a GLES2 object. GLES1 is yet unexplored (do we really care?) but seems
weird.
The GLES2 object layout:
0x044 put+get. makes sense since regs are now all read+write
0x264 current program addr
0x3d4 active texture 0
0x3d8 active tex 1
...
0x3e8 pixel store
0x3ec pixel store
0x3f0 GL_GENERATE_MIPMAP_HINT
0x3f4 some type of glHint?
0x3f5 some type of glHint too but unaligned?
0x4ec vertex attribute
0x4f4 glRenderbufferPparameteriv
0x4f8 blend eq separate
0x4fc blend eq separate
0x500 Blend func src RGB
0x504 Blend func dst RGB
0x508 Blend func src A
0x50c Blend func dst A
0x512 blend color
0x514 blend color
0x518 blend color
0x51c blend color
0x520 clear color
0x524 clear color
0x528 clear color
0x52c clear color
0x538 depthfunc
0x53c clear depth
0x540 depth mask
0x544 stencil mask
0x548 stencil mask separate
0x550 clearstencil
0x5a4 line width
0x5a8 scissor X
0x5ac scissor Y
0x5b0 scissor width
0x5b4 scissor height
0x5b8 viewport X
0x5bc viewport Y
0x5c0 viewport width
0x5c4 viewport height
0x5c8 depth near
0x5cc depth far
|
