diff options
| author | Charles Keepax <ckeepax@opensource.wolfsonmicro.com> | 2016-02-09 10:51:59 +0000 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2016-03-16 08:50:22 +0000 |
| commit | 9edd83c782257c4ad23f5e89102a9ea3f24b7a7f (patch) | |
| tree | 7e364affac8dee9ee15774b7fbc0fa20df331748 /drivers/mfd/wm8998-tables.c | |
| parent | 516c95f0b0a8814bf982bc71c7e083d9a8057596 (diff) | |
mfd: wm8998: Fix defaults array based on testing
My automated test is back and now can check defaults against the actual
hardware. This patch updates the defaults array for the differences
detected and removes a couple of completely unused registers.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd/wm8998-tables.c')
| -rw-r--r-- | drivers/mfd/wm8998-tables.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c index 4c2dce77cdfc..a0de3002cdad 100644 --- a/drivers/mfd/wm8998-tables.c +++ b/drivers/mfd/wm8998-tables.c @@ -229,8 +229,6 @@ static const struct reg_default wm8998_reg_default[] = { { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ - { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ - { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ @@ -247,8 +245,6 @@ static const struct reg_default wm8998_reg_default[] = { { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ - { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ - { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ @@ -320,7 +316,7 @@ static const struct reg_default wm8998_reg_default[] = { { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ - { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ + { 0x00000440, 0x002F }, /* R1088 - DRE Enable */ { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ @@ -686,7 +682,7 @@ static const struct reg_default wm8998_reg_default[] = { { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ - { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ + { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */ { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ @@ -888,8 +884,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL1_CONTROL_5: case ARIZONA_FLL1_CONTROL_6: case ARIZONA_FLL1_CONTROL_7: - case ARIZONA_FLL1_LOOP_FILTER_TEST_1: - case ARIZONA_FLL1_NCO_TEST_0: case ARIZONA_FLL1_SYNCHRONISER_1: case ARIZONA_FLL1_SYNCHRONISER_2: case ARIZONA_FLL1_SYNCHRONISER_3: @@ -906,8 +900,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg) case ARIZONA_FLL2_CONTROL_5: case ARIZONA_FLL2_CONTROL_6: case ARIZONA_FLL2_CONTROL_7: - case ARIZONA_FLL2_LOOP_FILTER_TEST_1: - case ARIZONA_FLL2_NCO_TEST_0: case ARIZONA_FLL2_SYNCHRONISER_1: case ARIZONA_FLL2_SYNCHRONISER_2: case ARIZONA_FLL2_SYNCHRONISER_3: |