diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2016-03-01 10:59:59 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-04-15 16:50:04 -0700 |
| commit | 23ced2711bcdd26163f1188f693d6379ab0c6bf3 (patch) | |
| tree | 251e12fc24618ba850f87b54620e6f40191e9459 /drivers/clk/sirf | |
| parent | 536630ddbffb97e5a9de76a2d793ec118413e758 (diff) | |
clk: sirf: Remove CLK_IS_ROOT
This flag is a no-op now. Remove usage of the flag.
Cc: Guo Zeng <Guo.Zeng@csr.com>
Cc: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/sirf')
| -rw-r--r-- | drivers/clk/sirf/clk-atlas6.c | 7 | ||||
| -rw-r--r-- | drivers/clk/sirf/clk-prima2.c | 7 |
2 files changed, 6 insertions, 8 deletions
diff --git a/drivers/clk/sirf/clk-atlas6.c b/drivers/clk/sirf/clk-atlas6.c index c5eaa9d16247..665fa681b2e1 100644 --- a/drivers/clk/sirf/clk-atlas6.c +++ b/drivers/clk/sirf/clk-atlas6.c @@ -130,10 +130,9 @@ static void __init atlas6_clk_init(struct device_node *np) panic("unable to map clkc registers\n"); /* These are always available (RTC and 26MHz OSC)*/ - atlas6_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL, - CLK_IS_ROOT, 32768); - atlas6_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL, - CLK_IS_ROOT, 26000000); + atlas6_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL, 0, 32768); + atlas6_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL, 0, + 26000000); for (i = pll1; i < maxclk; i++) { atlas6_clks[i] = clk_register(NULL, atlas6_clk_hw_array[i]); diff --git a/drivers/clk/sirf/clk-prima2.c b/drivers/clk/sirf/clk-prima2.c index f92c40264342..aac1c8ec151a 100644 --- a/drivers/clk/sirf/clk-prima2.c +++ b/drivers/clk/sirf/clk-prima2.c @@ -129,10 +129,9 @@ static void __init prima2_clk_init(struct device_node *np) panic("unable to map clkc registers\n"); /* These are always available (RTC and 26MHz OSC)*/ - prima2_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL, - CLK_IS_ROOT, 32768); - prima2_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL, - CLK_IS_ROOT, 26000000); + prima2_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL, 0, 32768); + prima2_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL, 0, + 26000000); for (i = pll1; i < maxclk; i++) { prima2_clks[i] = clk_register(NULL, prima2_clk_hw_array[i]); |