diff options
author | tsi <tsi> | 2008-03-26 18:39:08 +0000 |
---|---|---|
committer | tsi <tsi> | 2008-03-26 18:39:08 +0000 |
commit | 92d15165327af807a34ac35beadae35d3e594f09 (patch) | |
tree | 2a163d5c4a78d4bf14dd4361497b1032b9406b08 | |
parent | 4cff3affc361c47ab2380d18d3f19ee9a6789b7b (diff) |
28. Update to 2008-03-26 pci.ids snapshot. Also add some more recent PCI
Radeon IDs. (Marc La France)
-rw-r--r-- | programs/Xserver/hw/xfree86/CHANGELOG | 4 | ||||
-rw-r--r-- | programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h | 20257 |
2 files changed, 19386 insertions, 875 deletions
diff --git a/programs/Xserver/hw/xfree86/CHANGELOG b/programs/Xserver/hw/xfree86/CHANGELOG index 30140d634..b1ac5b7e3 100644 --- a/programs/Xserver/hw/xfree86/CHANGELOG +++ b/programs/Xserver/hw/xfree86/CHANGELOG @@ -1,4 +1,6 @@ XFree86 4.7.99.15 (xx April 2008) + 28. Update to 2008-03-26 pci.ids snapshot. Also add some more recent PCI + Radeon IDs. (Marc La France) 27. Fix integer wrap-arounds in XAA's wide line code path (Paul Mackerras). 26. Fix XAA segfault when dealing with certain TE fonts with null glyphs (Soran Sandmann Pedersen). @@ -20677,4 +20679,4 @@ XFree86 3.0a (28 April 1994) XFree86 3.0 (26 April 1994) -$XFree86: xc/programs/Xserver/hw/xfree86/CHANGELOG,v 3.3938 2008/03/26 17:28:09 tsi Exp $ +$XFree86: xc/programs/Xserver/hw/xfree86/CHANGELOG,v 3.3939 2008/03/26 17:45:59 tsi Exp $ diff --git a/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h b/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h index 5e1147b8a..08ba44959 100644 --- a/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h +++ b/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h @@ -1,4 +1,4 @@ -/* $XFree86$ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h,v 1.25tsi Exp $ */ /* * THIS FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT @@ -99,6 +99,7 @@ static const char pci_device_0070_4009[] = "WinTV PVR-250"; static const char pci_device_0070_4800[] = "WinTV PVR-350"; static const char pci_device_0070_4801[] = "WinTV PVR-250 MCE"; static const char pci_device_0070_4803[] = "WinTV PVR-250"; +static const char pci_device_0070_7801[] = "WinTV HVR-1800 MCE"; static const char pci_device_0070_8003[] = "WinTV PVR-150"; static const char pci_device_0070_8801[] = "WinTV PVR-150"; static const char pci_device_0070_c801[] = "WinTV PVR-150"; @@ -144,6 +145,9 @@ static const char pci_vendor_02ac[] = "SpeedStream"; static const char pci_device_02ac_1012[] = "1012 PCMCIA 10/100 Ethernet Card [RTL81xx]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_02e0[] = "XFX Pine Group Inc"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_0315[] = "SK-Electronics Co., Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -177,6 +181,9 @@ static const char pci_device_050d_7050[] = "F5D7050 802.11g Wireless USB Adapter static const char pci_device_050d_705c[] = "F5D7050 v4"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_058f[] = "Alcor Micro Corporation"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_05a9[] = "OmniVision"; static const char pci_device_05a9_8519[] = "OV519 series"; #endif @@ -198,7 +205,6 @@ static const char pci_device_0675_1704[] = "ISDN Adapter (PCI Bus, D, C)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_067b[] = "Prolific Technology, Inc."; -static const char pci_device_067b_2303[] = "PL-2303 USB-to-Serial Converter"; static const char pci_device_067b_3507[] = "PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -209,6 +215,7 @@ static const char pci_vendor_0721[] = "Sapphire, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_07ca[] = "AVerMedia Technologies Inc."; +static const char pci_device_07ca_a301[] = "AVerTV 301"; static const char pci_device_07ca_b808[] = "AVerTV DVB-T Volar (USB 2.0)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -222,13 +229,15 @@ static const char pci_vendor_08ff[] = "AuthenTec"; static const char pci_device_08ff_afe4[] = "[Anchor] AF-S2 FingerLoc Sensor Module"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_0925[] = "VIA Technologies, Inc. (Wrong ID)"; +static const char pci_vendor_0925[] = "First International Computer, Inc."; +static const char pci_device_0925_1234[] = "VA-502 Mainboard"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_093a[] = "PixArt Imaging Inc."; static const char pci_device_093a_010e[] = "Innovage Mini Digital Camera"; static const char pci_device_093a_010f[] = "SDC-300 Webcam"; static const char pci_device_093a_2468[] = "CIF Single Chip"; +static const char pci_device_093a_2600[] = "PAC7311"; static const char pci_device_093a_2603[] = "Philips Webcam SPC500NC"; static const char pci_device_093a_2608[] = "Maxell MaxCam RotaWeb"; #endif @@ -273,6 +282,9 @@ static const char pci_device_0e11_0001[] = "PCI to EISA Bridge"; static const char pci_device_0e11_0002[] = "PCI to ISA Bridge"; static const char pci_device_0e11_0046[] = "Smart Array 64xx"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_0e11_0046_0e11_4091[] = "Smart Array 6i"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_0e11_0046_0e11_409a[] = "Smart Array 641"; #endif #ifdef INIT_SUBSYS_INFO @@ -346,10 +358,10 @@ static const char pci_subsys_0e11_ae10_0e11_4030[] = "Smart-2/P Array Controller static const char pci_subsys_0e11_ae10_0e11_4031[] = "Smart-2SL Array Controller"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_0e11_ae10_0e11_4032[] = "Smart Array Controller"; +static const char pci_subsys_0e11_ae10_0e11_4032[] = "Smart Array 3200 Controller"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_0e11_ae10_0e11_4033[] = "Smart 3100ES Array Controller"; +static const char pci_subsys_0e11_ae10_0e11_4033[] = "Smart Array 3100ES Controller"; #endif static const char pci_device_0e11_ae29[] = "MIS-L"; static const char pci_device_0e11_ae2a[] = "MPC"; @@ -507,7 +519,7 @@ static const char pci_subsys_1000_000f_4c53_1050[] = "CT7 mainboard"; static const char pci_device_1000_0010[] = "53C1510"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1000_0010_0e11_4040[] = "Integrated Array Controller"; +static const char pci_subsys_1000_0010_0e11_4040[] = "Integrated Smart Array Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif @@ -593,6 +605,11 @@ static const char pci_subsys_1000_0030_1028_0183[] = "PowerEdge 1800"; #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0030_1028_018a[] = "PERC 4/IM"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0030_1028_1010[] = "LSI U320 SCSI Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -605,7 +622,7 @@ static const char pci_subsys_1000_0030_103c_12c5[] = "Ultra320 SCSI [A7173A]"; static const char pci_subsys_1000_0030_124b_1170[] = "PMC-USCSI320"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1000_0030_1734_1052[] = "Primergy RX300 S2"; +static const char pci_subsys_1000_0030_1734_1052[] = "PRIMERGY BX/RX/TX S2 series onboard SCSI(IME)"; #endif static const char pci_device_1000_0031[] = "53c1030ZC PCI-X Fusion-MPT Dual Ultra320 SCSI"; static const char pci_device_1000_0032[] = "53c1035 PCI-X Fusion-MPT Dual Ultra320 SCSI"; @@ -622,15 +639,77 @@ static const char pci_subsys_1000_0040_1000_0066[] = "MegaRAID SCSI 320-2XRWS"; #endif static const char pci_device_1000_0041[] = "53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI"; static const char pci_device_1000_0050[] = "SAS1064 PCI-X Fusion-MPT SAS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0050_1028_1f04[] = "SAS 5/E"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0050_1028_1f09[] = "SAS 5i/R"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1000_0054[] = "SAS1068 PCI-X Fusion-MPT SAS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0054_1028_1f04[] = "SAS 5/E Adapter Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0054_1028_1f05[] = "SAS 5/i Adapter Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0054_1028_1f06[] = "SAS 5/i Integrated Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0054_1028_1f07[] = "SAS 5/iR Integrated RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0054_1028_1f08[] = "SAS 5/iR Integrated RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0054_1028_1f09[] = "SAS 5/iR Adapter RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1000_0055[] = "SAS1068 PCI-X Fusion-MPT SAS"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0055_1033_8336[] = "SAS1068"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_device_1000_0056[] = "SAS1064E PCI-Express Fusion-MPT SAS"; +static const char pci_device_1000_0056[] = "SAS1064ET PCI-Express Fusion-MPT SAS"; +static const char pci_device_1000_0057[] = "M1064E MegaRAID SAS"; static const char pci_device_1000_0058[] = "SAS1068E PCI-Express Fusion-MPT SAS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0058_1028_021d[] = "SAS 6/iR Integrated Workstations RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0058_1028_1f0e[] = "SAS 6/iR Adapter RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0058_1028_1f0f[] = "SAS 6/iR Integrated Blades RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0058_1028_1f10[] = "SAS 6/iR Integrated RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_1000_0059[] = "MegaRAID SAS 8208ELP/8208ELP"; static const char pci_device_1000_005a[] = "SAS1066E PCI-Express Fusion-MPT SAS"; static const char pci_device_1000_005c[] = "SAS1064A PCI-X Fusion-MPT SAS"; static const char pci_device_1000_005e[] = "SAS1066 PCI-X Fusion-MPT SAS"; @@ -657,6 +736,9 @@ static const char pci_subsys_1000_0060_1000_1011[] = "MegaRAID SATA 350-4ELP"; static const char pci_subsys_1000_0060_1000_1012[] = "MegaRAID SAS 8704ELP"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_1000_1016[] = "MegaRAID SAS 8880EM2"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0060_1014_0363[] = "MegaRAID SAS PCI Express ROMB"; #endif #ifdef INIT_SUBSYS_INFO @@ -665,6 +747,9 @@ static const char pci_subsys_1000_0060_1014_0364[] = "SystemX MegaRAID SAS 8808E #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0060_1014_0365[] = "SystemX MegaRAID SAS 8884E"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_1014_0379[] = "SystemX MegaRAID SAS 8880EM2"; +#endif #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0060_1028_1f0a[] = "PERC 6/E Adapter RAID Controller"; @@ -687,7 +772,12 @@ static const char pci_subsys_1000_0060_1028_1f0d[] = "CERC 6/i Adapter RAID Cont #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1000_0060_1028_1f11[] = "CERC 6/i Adapter RAID Controller"; +static const char pci_subsys_1000_0060_1028_1f11[] = "CERC 6/i Integrated RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_1033_835a[] = "MegaRAID SAS PCI Express ROMB"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO @@ -696,6 +786,30 @@ static const char pci_subsys_1000_0060_1043_824d[] = "MegaRAID SAS PCI Express R #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0060_1170_002f[] = "MegaRAID SAS PCI Express ROMB"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_1170_0036[] = "MegaRAID SAS PCI Express ROMB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_15d9_c080[] = "MegaRAID SAS PCI Express ROMB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_17aa_6b7c[] = "MegaRAID SAS PCI Express ROMB"; +#endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_8086_1006[] = "RAID Controller SRCSAS28EP"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_8086_100a[] = "RAID Controller SRCSAS28EV"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0060_8086_1010[] = "RAID Controller SRCSATA28E"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0060_8086_34cc[] = "Integrated RAID Controller SROMBSAS28E"; @@ -710,6 +824,10 @@ static const char pci_device_1000_0062[] = "SAS1078 PCI-Express Fusion-MPT SAS"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0062_1000_0062[] = "SAS1078 PCI-Express Fusion-MPT SAS"; #endif +static const char pci_device_1000_007c[] = "MegaRAID SAS 1078DE"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_007c_1014_0395[] = "ServeRAID-AR10is SAS/SATA Controller"; +#endif static const char pci_device_1000_008f[] = "53c875J"; #endif #ifdef INIT_SUBSYS_INFO @@ -982,8 +1100,13 @@ static const char pci_device_1001_9100[] = "INI-9100/9100W SCSI Host"; #endif static const char pci_vendor_1002[] = "ATI Technologies Inc"; static const char pci_device_1002_3150[] = "M24 1P [Radeon Mobility X600]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_3150_103c_0934[] = "nx8220"; +#endif +static const char pci_device_1002_3151[] = "M24 [FireMV 2400]"; static const char pci_device_1002_3152[] = "M22 [Radeon Mobility X300]"; -static const char pci_device_1002_3154[] = "M24 1T [FireGL M24 GL]"; +static const char pci_device_1002_3154[] = "M24GL [Mobility FireGL V3200]"; +static const char pci_device_1002_3171[] = "M24 [FireMV 2400] (Secondary)"; static const char pci_device_1002_3e50[] = "RV380 0x3e50 [Radeon X600]"; static const char pci_device_1002_3e54[] = "RV380 0x3e54 [FireGL V3200]"; static const char pci_device_1002_3e70[] = "RV380 [Radeon X600] (Secondary)"; @@ -1134,12 +1257,13 @@ static const char pci_subsys_1002_4336_161f_2029[] = "eMachines M5312 builtin Vi #endif static const char pci_device_1002_4337[] = "Radeon IGP 330M/340M/350M"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1002_4337_1014_053a[] = "ThinkPad R40e (2684-HVG) builtin VGA controller"; +static const char pci_subsys_1002_4337_1014_053a[] = "ThinkPad R40e"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4337_103c_0850[] = "Radeon IGP 345M"; #endif static const char pci_device_1002_4341[] = "IXP150 AC'97 Audio Controller"; +static const char pci_device_1002_4342[] = "IXP200 3COM 3C920B Ethernet Controller"; static const char pci_device_1002_4345[] = "EHCI USB Controller"; static const char pci_device_1002_4347[] = "OHCI USB Controller #1"; static const char pci_device_1002_4348[] = "OHCI USB Controller #2"; @@ -1155,6 +1279,9 @@ static const char pci_device_1002_4370[] = "IXP SB400 AC'97 Audio Controller"; static const char pci_subsys_1002_4370_1025_0079[] = "Aspire 5024WLMMi"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4370_1025_0091[] = "Aspire 5032WXMi"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4370_103c_308b[] = "MX6125"; #endif #ifdef INIT_SUBSYS_INFO @@ -1167,6 +1294,9 @@ static const char pci_device_1002_4371[] = "IXP SB400 PCI-PCI Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4371_103c_308b[] = "MX6125"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4371_1462_7217[] = "Aspire L250"; +#endif static const char pci_device_1002_4372[] = "IXP SB400 SMBus Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4372_1025_0080[] = "Aspire 5024WLMMi"; @@ -1174,6 +1304,9 @@ static const char pci_subsys_1002_4372_1025_0080[] = "Aspire 5024WLMMi"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4372_103c_308b[] = "MX6125"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4372_1462_7217[] = "Aspire L250"; +#endif static const char pci_device_1002_4373[] = "IXP SB400 USB2 Host Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4373_1025_0080[] = "Aspire 5024WLMMi"; @@ -1181,10 +1314,16 @@ static const char pci_subsys_1002_4373_1025_0080[] = "Aspire 5024WLMMi"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4373_103c_308b[] = "MX6125"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4373_1462_7217[] = "Aspire L250"; +#endif static const char pci_device_1002_4374[] = "IXP SB400 USB Host Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4374_103c_308b[] = "MX6125"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4374_1462_7217[] = "Aspire L250"; +#endif static const char pci_device_1002_4375[] = "IXP SB400 USB Host Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4375_1025_0080[] = "Aspire 5024WLMMi"; @@ -1192,13 +1331,19 @@ static const char pci_subsys_1002_4375_1025_0080[] = "Aspire 5024WLMMi"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4375_103c_308b[] = "MX6125"; #endif -static const char pci_device_1002_4376[] = "Standard Dual Channel PCI IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4375_1462_7217[] = "Aspire L250"; +#endif +static const char pci_device_1002_4376[] = "IXP SB400 IDE Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4376_1025_0080[] = "Aspire 5024WLMMi"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4376_103c_308b[] = "MX6125"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4376_1462_7217[] = "Aspire L250"; +#endif static const char pci_device_1002_4377[] = "IXP SB400 PCI-ISA Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4377_1025_0080[] = "Aspire 5024WLMi"; @@ -1206,6 +1351,9 @@ static const char pci_subsys_1002_4377_1025_0080[] = "Aspire 5024WLMi"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4377_103c_308b[] = "MX6125"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4377_1462_7217[] = "Aspire L250"; +#endif static const char pci_device_1002_4378[] = "SB400 AC'97 Modem Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4378_1025_0080[] = "Aspire 5024WLMMi"; @@ -1213,8 +1361,11 @@ static const char pci_subsys_1002_4378_1025_0080[] = "Aspire 5024WLMMi"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4378_103c_308b[] = "MX6125"; #endif -static const char pci_device_1002_4379[] = "4379 Serial ATA Controller"; -static const char pci_device_1002_437a[] = "437A Serial ATA Controller"; +static const char pci_device_1002_4379[] = "IXP SB400 Serial ATA Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4379_1462_7141[] = "Aspire L250"; +#endif +static const char pci_device_1002_437a[] = "IXP SB400 Serial ATA Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_437a_1002_4379[] = "4379 Serial ATA Controller"; #endif @@ -1222,27 +1373,117 @@ static const char pci_subsys_1002_437a_1002_4379[] = "4379 Serial ATA Controller static const char pci_subsys_1002_437a_1002_437a[] = "437A Serial ATA Controller"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_437a_1462_7141[] = "Aspire L250"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_437a_14f1_8800[] = "Leadtek WinFast TV2000XP Expert"; #endif -static const char pci_device_1002_437b[] = "SB450 HDA Audio"; +static const char pci_device_1002_437b[] = "IXP SB4x0 High Definition Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_437b_1002_437b[] = "IXP SB4x0 High Definition Audio Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_437b_10cf_1326[] = "Fujitsu Lifebook A3040"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_437b_1734_10b8[] = "Realtek High Definition Audio"; #endif static const char pci_device_1002_4380[] = "SB600 Non-Raid-5 SATA"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4380_103c_2813[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4380_17f2_5999[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_4381[] = "SB600 Raid-5 SATA"; static const char pci_device_1002_4382[] = "SB600 AC97 Audio"; -static const char pci_device_1002_4383[] = "SB600 Azalia"; -static const char pci_device_1002_4384[] = "SB600 PCI to PCI Bridge"; -static const char pci_device_1002_4385[] = "SB600 SMBus"; +static const char pci_device_1002_4383[] = "SBx00 Azalia"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4383_0206_1028[] = "Latitude D531"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4383_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4383_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif +static const char pci_device_1002_4384[] = "SBx00 PCI to PCI Bridge"; +static const char pci_device_1002_4385[] = "SBx00 SMBus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4385_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4385_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_4386[] = "SB600 USB Controller (EHCI)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4386_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4386_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_4387[] = "SB600 USB (OHCI0)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4387_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4387_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_4388[] = "SB600 USB (OHCI1)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4388_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4388_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_4389[] = "SB600 USB (OHCI2)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4389_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4389_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_438a[] = "SB600 USB (OHCI3)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_438a_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_438a_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_438b[] = "SB600 USB (OHCI4)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_438b_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_438b_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_438c[] = "SB600 IDE"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_438c_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_438c_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_438d[] = "SB600 PCI to LPC Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_438d_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_438d_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif static const char pci_device_1002_438e[] = "SB600 AC97 Modem"; +static const char pci_device_1002_4390[] = "SB700/SB800 SATA Controller [IDE mode]"; +static const char pci_device_1002_4391[] = "SB700/SB800 SATA Controller [AHCI mode]"; +static const char pci_device_1002_4392[] = "SB700/SB800 SATA Controller [Non-RAID5 mode]"; +static const char pci_device_1002_4393[] = "SB700/SB800 SATA Controller [RAID5 mode]"; +static const char pci_device_1002_4394[] = "SB700/SB800 SATA Controller [SATA and FC Enabled]"; +static const char pci_device_1002_4395[] = "SB800 SATA Controller [Storage mode with HyperFlash-PCIE]"; +static const char pci_device_1002_4396[] = "SB700/SB800 USB EHCI Controller"; +static const char pci_device_1002_4397[] = "SB700/SB800 USB OHCI0 Controller"; +static const char pci_device_1002_4398[] = "SB700/SB800 USB OHCI1 Controller"; +static const char pci_device_1002_4399[] = "SB700/SB800 USB OHCI2 Controller"; +static const char pci_device_1002_439c[] = "SB700/SB800 IDE Controller"; +static const char pci_device_1002_439d[] = "SB700/SB800 LPC host controller"; static const char pci_device_1002_4437[] = "Radeon Mobility 7000 IGP"; static const char pci_device_1002_4554[] = "210888ET [Mach64 ET]"; static const char pci_device_1002_4654[] = "Mach64 VT"; @@ -1378,13 +1619,19 @@ static const char pci_subsys_1002_4752_1028_00d9[] = "PowerEdge 2500"; static const char pci_subsys_1002_4752_1028_0134[] = "PowerEdge 600SC"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4752_1028_014a[] = "PowerEdge 1750"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4752_1028_0165[] = "PowerEdge 750"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4752_103c_10e1[] = "NetServer Rage XL"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4752_107b_6400[] = "6400 Server"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1002_4752_1734_007a[] = "Primergy RX300"; +static const char pci_subsys_1002_4752_1734_007a[] = "PRIMERGY RX/TX series onboard VGA"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4752_8086_3411[] = "SDS2 Mainboard"; @@ -1514,6 +1761,12 @@ static const char pci_device_1002_4c44[] = "3D Rage LT Pro AGP-66"; static const char pci_device_1002_4c45[] = "Rage Mobility M3 AGP"; static const char pci_device_1002_4c46[] = "Rage Mobility M3 AGP 2x"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c46_1002_0155[] = "IBM Thinkpad A22p"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c46_1014_0155[] = "IBM Thinkpad A22p"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4c46_1028_00b1[] = "Latitude C600"; #endif static const char pci_device_1002_4c47[] = "3D Rage LT-G 215LG"; @@ -1550,9 +1803,6 @@ static const char pci_subsys_1002_4c4d_1028_00aa[] = "Latitude CPt"; static const char pci_subsys_1002_4c4d_1028_00bb[] = "Latitude CPx"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1002_4c4d_10e1_10cf[] = "Fujitsu Siemens LifeBook C Series"; -#endif -#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4c4d_1179_ff00[] = "Satellite 1715XCDS laptop"; #endif #ifdef INIT_SUBSYS_INFO @@ -1581,6 +1831,9 @@ static const char pci_subsys_1002_4c57_1028_00e6[] = "Radeon Mobility M7 LW (Del static const char pci_subsys_1002_4c57_1028_012a[] = "Latitude C640"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c57_1043_1622[] = "Mobility Radeon M7 (L3C/S)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4c57_144d_c006[] = "Radeon Mobility M7 LW in vpr Matrix 170B4"; #endif static const char pci_device_1002_4c58[] = "Radeon RV200 LX [Mobility FireGL 7800 M7]"; @@ -1604,16 +1857,17 @@ static const char pci_subsys_1002_4c59_104d_8140[] = "PCG-Z1SP laptop"; static const char pci_subsys_1002_4c59_1509_1930[] = "Medion MD9703"; #endif static const char pci_device_1002_4c5a[] = "Radeon Mobility M6 LZ"; -static const char pci_device_1002_4c64[] = "Radeon R250 Ld [Radeon Mobility 9000 M9]"; -static const char pci_device_1002_4c65[] = "Radeon R250 Le [Radeon Mobility 9000 M9]"; -static const char pci_device_1002_4c66[] = "Radeon R250 [Mobility FireGL 9000]"; +static const char pci_device_1002_4c64[] = "Radeon RV250 Ld [Radeon Mobility 9000 M9]"; +static const char pci_device_1002_4c65[] = "Radeon RV250 Le [Radeon Mobility 9000 M9]"; +static const char pci_device_1002_4c66[] = "Radeon RV250 [Mobility FireGL 9000]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1002_4c66_1014_054d[] = "Thinkpad T41"; +static const char pci_subsys_1002_4c66_1014_054d[] = "ThinkPad T41"; #endif -static const char pci_device_1002_4c67[] = "Radeon R250 Lg [Radeon Mobility 9000 M9]"; -static const char pci_device_1002_4c6e[] = "Radeon R250 Ln [Radeon Mobility 9000 M9] (Secondary)"; +static const char pci_device_1002_4c67[] = "Radeon RV250 Lg [Radeon Mobility 9000 M9]"; +static const char pci_device_1002_4c6e[] = "Radeon RV250 Ln [Radeon Mobility 9000 M9] (Secondary)"; static const char pci_device_1002_4d46[] = "Rage Mobility M4 AGP"; static const char pci_device_1002_4d4c[] = "Rage Mobility M4 AGP"; +static const char pci_device_1002_4d52[] = "Theater 550 PRO PCI [ATI TV Wonder 550]"; static const char pci_device_1002_4e44[] = "Radeon R300 ND [Radeon 9700 Pro]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4e44_1002_515e[] = "Radeon ES1000"; @@ -1633,6 +1887,9 @@ static const char pci_device_1002_4e47[] = "Radeon R300 NG [FireGL X1]"; static const char pci_device_1002_4e48[] = "Radeon R350 [Radeon 9800 Pro]"; static const char pci_device_1002_4e49[] = "Radeon R350 [Radeon 9800]"; static const char pci_device_1002_4e4a[] = "RV350 NJ [Radeon 9800 XT]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4e4a_1002_4e4a[] = "R360 [Radeon 9800 XT]"; +#endif static const char pci_device_1002_4e4b[] = "R350 NK [FireGL X2]"; static const char pci_device_1002_4e50[] = "RV350 [Mobility Radeon 9600 M10]"; #ifdef INIT_SUBSYS_INFO @@ -1675,6 +1932,9 @@ static const char pci_device_1002_4e68[] = "Radeon R350 [Radeon 9800 Pro] (Secon static const char pci_device_1002_4e69[] = "Radeon R350 [Radeon 9800] (Secondary)"; static const char pci_device_1002_4e6a[] = "RV350 NJ [Radeon 9800 XT] (Secondary)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4e6a_1002_4e6a[] = "R360 [Radeon 9800 XT] (Secondary)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4e6a_1002_4e71[] = "M10 NQ [Radeon Mobility 9600]"; #endif static const char pci_device_1002_4e71[] = "M10 NQ [Radeon Mobility 9600] (Secondary)"; @@ -1878,7 +2138,13 @@ static const char pci_subsys_1002_5159_1002_0908[] = "XVR-100 (supplied by Sun)" static const char pci_subsys_1002_5159_1014_029a[] = "Remote Supervisor Adapter II (RSA2)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1002_5159_1014_02c8[] = "IBM eServer xSeries server mainboard"; +static const char pci_subsys_1002_5159_1014_02c8[] = "eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5159_1028_016c[] = "PowerEdge 1850"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5159_1028_016d[] = "PowerEdge 2850"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5159_1028_019a[] = "PowerEdge SC1425"; @@ -1909,6 +2175,18 @@ static const char pci_subsys_1002_5159_17ee_1001[] = "Radeon 7000 64MB DDR + DVI #endif static const char pci_device_1002_515a[] = "Radeon RV100 QZ [Radeon 7000/VE]"; static const char pci_device_1002_515e[] = "ES1000"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_515e_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_515e_1028_01e6[] = "PowerEdge 860"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_515e_1028_020f[] = "PowerEdge R300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_515e_1028_0210[] = "PowerEdge T300"; +#endif static const char pci_device_1002_515f[] = "ES1000"; static const char pci_device_1002_5168[] = "Radeon R200 Qh"; static const char pci_device_1002_5169[] = "Radeon R200 Qi"; @@ -2013,7 +2291,10 @@ static const char pci_subsys_1002_5452_103c_1279[] = "Rage 128 Pro 4XL"; static const char pci_device_1002_5453[] = "Rage 128 Pro Ultra TS"; static const char pci_device_1002_5454[] = "Rage 128 Pro Ultra TT"; static const char pci_device_1002_5455[] = "Rage 128 Pro Ultra TU"; -static const char pci_device_1002_5460[] = "M22 [Radeon Mobility M300]"; +static const char pci_device_1002_5460[] = "M22 [Mobility Radeon X300]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5460_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif static const char pci_device_1002_5462[] = "M24 [Radeon Mobility X600]"; static const char pci_device_1002_5464[] = "M22 [FireGL GL]"; static const char pci_device_1002_5548[] = "R423 UH [Radeon X800 (PCIE)]"; @@ -2039,6 +2320,9 @@ static const char pci_device_1002_5653[] = "Radeon Mobility X700 (PCIE)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5653_1025_0080[] = "Aspire 5024WLMi"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5653_103c_0940[] = "HP Compaq NW8240 Mobile Workstation"; +#endif static const char pci_device_1002_5654[] = "264VT [Mach64 VT]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5654_1002_5654[] = "Mach64VT Reference"; @@ -2053,6 +2337,9 @@ static const char pci_device_1002_5834[] = "Radeon 9100 IGP"; static const char pci_device_1002_5835[] = "RS300M AGP [Radeon Mobility 9100IGP]"; static const char pci_device_1002_5838[] = "Radeon 9100 IGP AGP Bridge"; static const char pci_device_1002_5940[] = "RV280 [Radeon 9200 PRO] (Secondary)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5940_17af_2021[] = "Excalibur Radeon 9250 (Secondary)"; +#endif static const char pci_device_1002_5941[] = "RV280 [Radeon 9200] (Secondary)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5941_1458_4019[] = "Gigabyte Radeon 9200"; @@ -2072,8 +2359,14 @@ static const char pci_device_1002_5950[] = "RS480 Host Bridge"; static const char pci_subsys_1002_5950_1025_0080[] = "Aspire 5024WLMMi"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5950_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5950_103c_308b[] = "MX6125"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5950_1462_7217[] = "Aspire L250"; +#endif static const char pci_device_1002_5951[] = "Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge"; static const char pci_device_1002_5952[] = "RD580 [CrossFire Xpress 3200] Chipset Host Bridge"; static const char pci_device_1002_5954[] = "RS480 [Radeon Xpress 200G Series]"; @@ -2087,7 +2380,13 @@ static const char pci_subsys_1002_5955_1002_5955[] = "RS480 0x5955 [Radeon XPRES #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5955_103c_308b[] = "MX6125"; #endif +static const char pci_device_1002_5956[] = "RD790 Northbridge only dual slot PCI-e_GFX and HT3 K8 part"; +static const char pci_device_1002_5957[] = "RX780/RX790 Chipset Host Bridge"; +static const char pci_device_1002_5958[] = "RD780 Northbridge only dual slot PCI-e_GFX and HT1 K8 part"; static const char pci_device_1002_5960[] = "RV280 [Radeon 9200 PRO]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5960_17af_2020[] = "Excalibur Radeon 9250"; +#endif static const char pci_device_1002_5961[] = "RV280 [Radeon 9200]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5961_1002_2f72[] = "All-in-Wonder 9200 Series"; @@ -2151,9 +2450,43 @@ static const char pci_subsys_1002_5964_18bc_0170[] = "Sapphire Radeon 9200 SE 12 #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5964_18bc_0173[] = "GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]"; #endif +static const char pci_device_1002_5965[] = "RV280 [FireMV 2200 PCI]"; static const char pci_device_1002_5969[] = "ES1000"; static const char pci_device_1002_5974[] = "RS482 [Radeon Xpress 200]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5974_103c_280a[] = "DC5750 Microtower"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5974_1462_7141[] = "Aspire L250"; +#endif static const char pci_device_1002_5975[] = "RS485 [Radeon Xpress 1100 IGP]"; +static const char pci_device_1002_5978[] = "RD790 PCI to PCI bridge (external gfx0 port A)"; +static const char pci_device_1002_5979[] = "RD790 PCI to PCI bridge (external gfx0 port B)"; +static const char pci_device_1002_597a[] = "RD790 PCI to PCI bridge (PCI express gpp port A)"; +static const char pci_device_1002_597b[] = "RD790 PCI to PCI bridge (PCI express gpp port B)"; +static const char pci_device_1002_597c[] = "RD790 PCI to PCI bridge (PCI express gpp port C)"; +static const char pci_device_1002_597d[] = "RD790 PCI to PCI bridge (PCI express gpp port D)"; +static const char pci_device_1002_597e[] = "RD790 PCI to PCI bridge (PCI express gpp port E)"; +static const char pci_device_1002_597f[] = "RD790 PCI to PCI bridge (PCI express gpp port F)"; +static const char pci_device_1002_5980[] = "RD790 PCI to PCI bridge (external gfx1 port A)"; +static const char pci_device_1002_5981[] = "RD790 PCI to PCI bridge (external gfx1 port B)"; +static const char pci_device_1002_5982[] = "RD790 PCI to PCI bridge (NB-SB link)"; +static const char pci_device_1002_5a10[] = "RD890 Northbridge only dual slot (2x16) PCI-e GFX Hydra part"; +static const char pci_device_1002_5a11[] = "RD890 Northbridge only single slot PCI-e GFX Hydra part"; +static const char pci_device_1002_5a12[] = "RD890 Northbridge only dual slot (2x8) PCI-e GFX Hydra part"; +static const char pci_device_1002_5a13[] = "RD890 PCI to PCI bridge (external gfx0 port A)"; +static const char pci_device_1002_5a14[] = "RD890 PCI to PCI bridge (external gfx0 port B)"; +static const char pci_device_1002_5a15[] = "RD890 PCI to PCI bridge (PCI express gpp port A)"; +static const char pci_device_1002_5a16[] = "RD890 PCI to PCI bridge (PCI express gpp port B)"; +static const char pci_device_1002_5a17[] = "RD890 PCI to PCI bridge (PCI express gpp port C)"; +static const char pci_device_1002_5a18[] = "RD890 PCI to PCI bridge (PCI express gpp port D)"; +static const char pci_device_1002_5a19[] = "RD890 PCI to PCI bridge (PCI express gpp port E)"; +static const char pci_device_1002_5a1a[] = "RD890 PCI to PCI bridge (PCI express gpp port F)"; +static const char pci_device_1002_5a1b[] = "RD890 PCI to PCI bridge (PCI express gpp port G)"; +static const char pci_device_1002_5a1c[] = "RD890 PCI to PCI bridge (PCI express gpp port H)"; +static const char pci_device_1002_5a1d[] = "RD890 PCI to PCI bridge (external gfx1 port A)"; +static const char pci_device_1002_5a1e[] = "RD890 PCI to PCI bridge (external gfx1 port B)"; +static const char pci_device_1002_5a1f[] = "RD890 PCI to PCI bridge (NB-SB link)"; static const char pci_device_1002_5a33[] = "Radeon Xpress 200 Host Bridge"; static const char pci_device_1002_5a34[] = "RS480 PCI-X Root Port"; static const char pci_device_1002_5a36[] = "RS480 PCI Bridge"; @@ -2161,6 +2494,9 @@ static const char pci_device_1002_5a37[] = "RS480 PCI Bridge"; static const char pci_device_1002_5a38[] = "RS480 PCI Bridge"; static const char pci_device_1002_5a39[] = "RS480 PCI Bridge"; static const char pci_device_1002_5a3f[] = "RS480 PCI Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5a3f_1462_7217[] = "Aspire L250"; +#endif static const char pci_device_1002_5a41[] = "RS400 [Radeon Xpress 200]"; static const char pci_device_1002_5a42[] = "RS400 [Radeon Xpress 200M]"; static const char pci_device_1002_5a61[] = "RC410 [Radeon Xpress 200]"; @@ -2173,12 +2509,18 @@ static const char pci_subsys_1002_5b60_1043_002a[] = "Extreme AX300SE-X"; static const char pci_subsys_1002_5b60_1043_032e[] = "Extreme AX300/TD"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5b60_1458_2102[] = "GV-RX30S128D (X300SE)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5b60_1462_0400[] = "RX300SE-TD128E (MS-8940 REV:200)"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5b60_1462_0402[] = "RX300SE-TD128E (MS-8940)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5b60_174b_0500[] = "Radeon X300 (PCIE)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5b60_196d_1086[] = "X300SE HM"; #endif static const char pci_device_1002_5b62[] = "RV380 [Radeon X600 (PCIE)]"; @@ -2190,6 +2532,9 @@ static const char pci_device_1002_5b70[] = "RV370 [Radeon X300SE]"; static const char pci_subsys_1002_5b70_1462_0403[] = "RX300SE-TD128E (MS-8940) (secondary display)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5b70_174b_0501[] = "Radeon X300SE"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5b70_196d_1087[] = "X300SE HM"; #endif static const char pci_device_1002_5b72[] = "RV380 [Radeon X600]"; @@ -2211,6 +2556,9 @@ static const char pci_subsys_1002_5d44_1458_4019[] = "Radeon 9200 SE (Secondary) static const char pci_subsys_1002_5d44_1458_4032[] = "Radeon 9200 SE 128MB"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5d44_147b_6190[] = "R9200SE-DT (Secondary)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5d44_174b_7c12[] = "Sapphire Radeon 9200 SE (Secondary)"; #endif #ifdef INIT_SUBSYS_INFO @@ -2225,6 +2573,7 @@ static const char pci_subsys_1002_5d44_18bc_0171[] = "Radeon 9200 SE 128MB Game #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5d44_18bc_0172[] = "GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]"; #endif +static const char pci_device_1002_5d45[] = "RV280 [FireMV 2200 PCI] (secondary)"; static const char pci_device_1002_5d48[] = "M28 [Radeon Mobility X800XT]"; static const char pci_device_1002_5d49[] = "M28 [Mobility FireGL V5100]"; static const char pci_device_1002_5d4a[] = "Mobility Radeon X800"; @@ -2293,17 +2642,23 @@ static const char pci_subsys_1002_7142_1002_0322[] = "All-in-Wonder 2006 PCI-E E #endif static const char pci_device_1002_7143[] = "RV505 [Radeon X1550 Series]"; static const char pci_device_1002_7145[] = "Radeon Mobility X1400"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7145_17aa_2006[] = "Thinkpad T60 model 2007"; +#endif static const char pci_device_1002_7146[] = "RV515 [Radeon X1300]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_7146_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7146_1545_1996[] = "Radeon X1300 512MB PCI-e"; +#endif static const char pci_device_1002_7147[] = "RV505 [Radeon X1550 64-bit]"; static const char pci_device_1002_7149[] = "M52 [Mobility Radeon X1300]"; static const char pci_device_1002_714a[] = "M52 [Mobility Radeon X1300]"; static const char pci_device_1002_714b[] = "M52 [Mobility Radeon X1300]"; static const char pci_device_1002_714c[] = "M52 [Mobility Radeon X1300]"; static const char pci_device_1002_714d[] = "RV515 [Radeon X1300]"; -static const char pci_device_1002_714e[] = "RV515 [Radeon X1300]"; +static const char pci_device_1002_714e[] = "RV515LE [Radeon X1300]"; static const char pci_device_1002_7152[] = "RV515GL [FireGL V3300] (Primary)"; static const char pci_device_1002_7153[] = "RV515GL [FireGL V3350]"; static const char pci_device_1002_715e[] = "RV515 [Radeon X1300]"; @@ -2312,15 +2667,21 @@ static const char pci_device_1002_7162[] = "RV515 PRO [Radeon X1300/X1550 Series #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_7162_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)"; #endif +static const char pci_device_1002_7163[] = "RV505 [Radeon X1550 Series] (Secondary)"; static const char pci_device_1002_7166[] = "RV515 [Radeon X1300] (Secondary)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_7166_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7166_1545_1997[] = "Radeon X1300 512MB PCI-e (Secondary)"; +#endif +static const char pci_device_1002_716e[] = "RV515LE [Radeon X1300] Secondary"; static const char pci_device_1002_7172[] = "RV515GL [FireGL V3300] (Secondary)"; static const char pci_device_1002_7173[] = "RV515GL [FireGL V3350] (Secondary)"; static const char pci_device_1002_7180[] = "RV516 [Radeon X1300/X1550 Series]"; static const char pci_device_1002_7181[] = "RV516 XT Radeon X1600 Series (Primary)"; static const char pci_device_1002_7183[] = "RV516 [Radeon X1300/X1550 Series]"; +static const char pci_device_1002_7186[] = "RV515 [Radeon Mobility X1450]"; static const char pci_device_1002_7187[] = "RV516 [Radeon X1300/X1550 Series]"; static const char pci_device_1002_7188[] = "M64-S [Mobility Radeon X2300]"; static const char pci_device_1002_718a[] = "Mobility Radeon X2300"; @@ -2335,12 +2696,16 @@ static const char pci_device_1002_71a3[] = "RV516 [Radeon X1300 Pro] (Secondary) static const char pci_device_1002_71a7[] = "RV516 [Radeon X1300/X1550 Series] (Secondary)"; static const char pci_device_1002_71bb[] = "FireMV 2250 (Secondary)"; static const char pci_device_1002_71c0[] = "RV530 [Radeon X1600]"; +static const char pci_device_1002_71c1[] = "Radeon X1650 Pro"; static const char pci_device_1002_71c2[] = "RV530 [Radeon X1600]"; static const char pci_device_1002_71c4[] = "M56GL [Mobility FireGL V5200]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_71c4_17aa_2007[] = "ThinkPad T60p"; #endif static const char pci_device_1002_71c5[] = "M56P [Radeon Mobility X1600]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_71c5_103c_30a3[] = "Compaq NW8440"; +#endif static const char pci_device_1002_71c6[] = "RV530LE [Radeon X1600/X1650 PRO]"; static const char pci_device_1002_71c7[] = "RV535 [Radeon X1650 Series]"; static const char pci_device_1002_71ce[] = "RV530LE [Radeon X1600]"; @@ -2349,6 +2714,7 @@ static const char pci_device_1002_71d5[] = "M66-P [Mobility Radeon X1700]"; static const char pci_device_1002_71d6[] = "M66-XT [Mobility Radeon X1700]"; static const char pci_device_1002_71de[] = "RV530LE [Radeon X1600]"; static const char pci_device_1002_71e0[] = "RV530 [Radeon X1600] (Secondary)"; +static const char pci_device_1002_71e1[] = "Radeon X1650 Pro (Secondary)"; static const char pci_device_1002_71e2[] = "RV530 [Radeon X1600] (Secondary)"; static const char pci_device_1002_71e6[] = "RV530LE [Radeon X1650 PRO] (Secondary)"; static const char pci_device_1002_71e7[] = "RV535 [Radeon X1650 Series]"; @@ -2378,11 +2744,11 @@ static const char pci_device_1002_724e[] = "R580 [AMD Stream Processor]"; static const char pci_device_1002_7269[] = "R580 [Radeon X1900 XT] (Secondary)"; static const char pci_device_1002_726b[] = "R580 [Radeon X1900]"; static const char pci_device_1002_726e[] = "R580 [AMD Stream Processor] (Secondary)"; -static const char pci_device_1002_7280[] = "Radeon X1950 Pro (Primary) (PCIE)"; +static const char pci_device_1002_7280[] = "RV570 [Radeon X1950 Pro]"; static const char pci_device_1002_7288[] = "Radeon X1950 GT"; static const char pci_device_1002_7291[] = "Radeon X1650 XT (Primary) (PCIE)"; static const char pci_device_1002_7293[] = "Radeon X1650 Series"; -static const char pci_device_1002_72a0[] = "Radeon X1950 Pro (Secondary) (PCIE)"; +static const char pci_device_1002_72a0[] = "RV570 [Radeon X1950 Pro] (secondary)"; static const char pci_device_1002_72a8[] = "Radeon X1950 GT (Secondary)"; static const char pci_device_1002_72b1[] = "Radeon X1650 XT (Secondary) (PCIE)"; static const char pci_device_1002_72b3[] = "Radeon X1650 Series (Secondary)"; @@ -2390,11 +2756,93 @@ static const char pci_device_1002_7833[] = "Radeon 9100 IGP Host Bridge"; static const char pci_device_1002_7834[] = "Radeon 9100 PRO IGP"; static const char pci_device_1002_7835[] = "Radeon Mobility 9200 IGP"; static const char pci_device_1002_7838[] = "Radeon 9100 IGP PCI/AGP Bridge"; +static const char pci_device_1002_7910[] = "RS690 Host Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7910_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif +static const char pci_device_1002_7912[] = "RS690 PCI to PCI Bridge (Internal gfx)"; +static const char pci_device_1002_7913[] = "RS690 PCI to PCI Bridge (PCI Express Graphics Port 0)"; +static const char pci_device_1002_7915[] = "RS690 PCI to PCI Bridge (PCI Express Port 1)"; +static const char pci_device_1002_7916[] = "RS690 PCI to PCI Bridge (PCI Express Port 2)"; +static const char pci_device_1002_7917[] = "RS690 PCI to PCI Bridge (PCI Express Port 3)"; static const char pci_device_1002_7919[] = "Radeon X1200 Series Audio Controller"; -static const char pci_device_1002_791e[] = "Radeon X1200 Series"; -static const char pci_device_1002_791f[] = "Radeon X1200 Series"; -static const char pci_device_1002_793f[] = "Radeon X1200 Series (Secondary)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7919_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif +static const char pci_device_1002_791e[] = "RS690 [Radeon X1200 Series]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_791e_17f2_5000[] = "KI690-AM2 Motherboard"; +#endif +static const char pci_device_1002_791f[] = "RS690M [Radeon X1200 Series]"; +static const char pci_device_1002_793b[] = "RS600 audio device [Radeon Xpress 12xx Series]"; +static const char pci_device_1002_793f[] = "RS600 [Radeon Xpress 1200 Series]"; +static const char pci_device_1002_7941[] = "RS600 [Radeon Xpress 1200 Series]"; +static const char pci_device_1002_7942[] = "Radeon Xpress 1250"; +static const char pci_device_1002_796e[] = "Radeon 2100"; static const char pci_device_1002_7c37[] = "RV350 AQ [Radeon 9600 SE]"; +static const char pci_device_1002_9400[] = "R600 [Radeon HD 2900 Series]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_9400_1002_3000[] = "Sapphire Radeon HD 2900 XT"; +#endif +static const char pci_device_1002_940a[] = "R600GL [Fire GL V8650]"; +static const char pci_device_1002_940b[] = "R600GL [Fire GL V8600]"; +static const char pci_device_1002_94c1[] = "Radeon HD 2400 XT"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_94c1_1028_0211[] = "Optiplex 755"; +#endif +static const char pci_device_1002_94c3[] = "RV610 video device [Radeon HD 2400 PRO]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_94c3_1002_94c3[] = "Radeon HD 2400PRO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_94c3_174b_e400[] = "Sapphire HD 2400 PRO video device"; +#endif +static const char pci_device_1002_94c4[] = "RV610LE [Radeon HD 2400 Series]"; +static const char pci_device_1002_94c8[] = "Radeon HD 2400 XT"; +static const char pci_device_1002_94c9[] = "Mobility Radeon HD 2400"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_94c9_1002_94c9[] = "Radeon HD2400"; +#endif +static const char pci_device_1002_94cb[] = "Radeon E2400"; +static const char pci_device_1002_94cc[] = "RV 610LE PCI [Radeon HD 2400]"; +static const char pci_device_1002_9501[] = "Radeon HD 3870"; +static const char pci_device_1002_9504[] = "Mobility Radeon HD 3850"; +static const char pci_device_1002_9505[] = "Radeon HD 3850"; +static const char pci_device_1002_9507[] = "RV670 [Radeon HD 3850]"; +static const char pci_device_1002_9508[] = "M88 XT Mobility Radeon HD 3870]"; +static const char pci_device_1002_950f[] = "R680 [Radeon HD 3870 x2]"; +static const char pci_device_1002_9515[] = "RV670 AGP [Radeon HD 3850]"; +static const char pci_device_1002_9559[] = "Mobilitiy Radeon HD 3600 Series"; +static const char pci_device_1002_9581[] = "M76 [Radeon Mobility HD 2600 Series]"; +static const char pci_device_1002_9586[] = "RV 630 XT AGP [Radeon HD 2600 XT AGP]"; +static const char pci_device_1002_9587[] = "RV630 [Radeon HD 2600 AGP Series]"; +static const char pci_device_1002_9588[] = "RV630 [Radeon HD 2600XT]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_9588_1458_216c[] = "Radeon HD 2600 XT, 256MB GDDR3, 2x DVI, TV-out, PCIe (GV-RX26T256H)"; +#endif +static const char pci_device_1002_9589[] = "RV630 [Radeon HD 2600 Series]"; +static const char pci_device_1002_9591[] = "Mobilitiy Radeon HD 3650"; +static const char pci_device_1002_9593[] = "Radeon Mobility HD 3670"; +static const char pci_device_1002_9596[] = "RV635 PRO AGP [Radeon HD 3650]"; +static const char pci_device_1002_9598[] = "Mobilitiy Radeon HD 3600 Series"; +static const char pci_device_1002_95c0[] = "Mobilitiy Radeon HD 3470"; +static const char pci_device_1002_95c4[] = "Mobilitiy Radeon HD 3400 Series"; +static const char pci_device_1002_95c5[] = "Mobilitiy Radeon HD 3450"; +static const char pci_device_1002_960f[] = "RS780 Azalia controller"; +static const char pci_device_1002_9610[] = "Radeon HD 3200 Graphics"; +static const char pci_device_1002_9611[] = "Radeon 3100 Graphics"; +static const char pci_device_1002_9612[] = "RS780M/RS780MN [Radeon HD 3200 Graphics]"; +static const char pci_device_1002_9613[] = "RS780MC [Radeon HD 3100 Graphics]"; +static const char pci_device_1002_9614[] = "Radeon HD 3300 Graphics"; +static const char pci_device_1002_aa00[] = "R600 Audio Device [Radeon HD 2900 Series]"; +static const char pci_device_1002_aa08[] = "RV630/M76 audio device [Radeon HD 2600 Series]"; +static const char pci_device_1002_aa10[] = "RV610 audio device [Radeon HD 2400 PRO]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_aa10_174b_aa10[] = "Sapphire HD 2400 PRO audio device"; +#endif +static const char pci_device_1002_aa18[] = "Radeon HD 3870 Audio device"; +static const char pci_device_1002_aa20[] = "RV635 Audio device [Radeon HD 3600 Series]"; +static const char pci_device_1002_aa28[] = "RV620 Audio device [Radeon HD 34xx Series]"; static const char pci_device_1002_cab0[] = "AGP Bridge [IGP 320M]"; static const char pci_device_1002_cab2[] = "RS200/RS200M AGP Bridge [IGP 340M]"; static const char pci_device_1002_cab3[] = "R200 AGP Bridge [Mobility Radeon 7000 IGP]"; @@ -2503,13 +2951,28 @@ static const char pci_device_100b_0030[] = "Geode GX2 Graphics Processor"; static const char pci_device_100b_0035[] = "DP83065 [Saturn] 10/100/1000 Ethernet Controller"; static const char pci_device_100b_0500[] = "SCx200 Bridge"; static const char pci_device_100b_0501[] = "SCx200 SMI"; -static const char pci_device_100b_0502[] = "SCx200 IDE"; -static const char pci_device_100b_0503[] = "SCx200 Audio"; +static const char pci_device_100b_0502[] = "SCx200, SC1100 IDE controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_100b_0502_100b_0502[] = "IDE Controller"; +#endif +static const char pci_device_100b_0503[] = "SCx200, SC1100 Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_100b_0503_100b_0503[] = "XpressAudio controller"; +#endif static const char pci_device_100b_0504[] = "SCx200 Video"; static const char pci_device_100b_0505[] = "SCx200 XBus"; static const char pci_device_100b_0510[] = "SC1100 Bridge"; -static const char pci_device_100b_0511[] = "SC1100 SMI"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_100b_0510_100b_0500[] = "GPIO and LPC support bridge"; +#endif +static const char pci_device_100b_0511[] = "SC1100 SMI & ACPI"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_100b_0511_100b_0501[] = "SC1100 SMI & ACPI bridge"; +#endif static const char pci_device_100b_0515[] = "SC1100 XBus"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_100b_0515_100b_0505[] = "SC1100 PCI to XBus bridge"; +#endif static const char pci_device_100b_d001[] = "87410 IDE"; static const char pci_vendor_100c[] = "Tseng Labs Inc"; static const char pci_device_100c_3202[] = "ET4000/W32p rev A"; @@ -2600,6 +3063,7 @@ static const char pci_subsys_1011_0014_1186_0100[] = "DE-530+"; #endif static const char pci_device_1011_0016[] = "DGLPB [OPPO]"; static const char pci_device_1011_0017[] = "PV-PCI Graphics Controller (ZLXp-L)"; +static const char pci_device_1011_0018[] = "Memory Channel interface"; static const char pci_device_1011_0019[] = "DECchip 21142/43"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1011_0019_1011_500a[] = "DE500A Fast Ethernet"; @@ -2732,13 +3196,13 @@ static const char pci_subsys_1011_0034_1374_0003[] = "56k Modem Cardbus"; static const char pci_device_1011_0045[] = "DECchip 21553"; static const char pci_device_1011_0046[] = "DECchip 21554"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1011_0046_0e11_4050[] = "Integrated Smart Array"; +static const char pci_subsys_1011_0046_0e11_4050[] = "Smart Array 4200 Controller"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1011_0046_0e11_4051[] = "Integrated Smart Array"; +static const char pci_subsys_1011_0046_0e11_4051[] = "Smart Array 4250ES Controller"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1011_0046_0e11_4058[] = "Integrated Smart Array"; +static const char pci_subsys_1011_0046_0e11_4058[] = "Smart Array 431 Controller"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1011_0046_103c_10c2[] = "NetRAID-4M"; @@ -2871,17 +3335,17 @@ static const char pci_subsys_1013_6005_14c0_000c[] = "Crystal CS4281 PCI Audio"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1014[] = "IBM"; static const char pci_device_1014_0002[] = "PCI to MCA Bridge"; -static const char pci_device_1014_0005[] = "Alta Lite"; -static const char pci_device_1014_0007[] = "Alta MP"; -static const char pci_device_1014_000a[] = "Fire Coral"; +static const char pci_device_1014_0005[] = "Processor to I/O Controller [Alta Lite]"; +static const char pci_device_1014_0007[] = "Processor to I/O Controller [Alta MP]"; +static const char pci_device_1014_000a[] = "PCI to ISA Bridge (IBM27-82376) [Fire Coral]"; static const char pci_device_1014_0017[] = "CPU to PCI Bridge"; static const char pci_device_1014_0018[] = "TR Auto LANstreamer"; static const char pci_device_1014_001b[] = "GXT-150P"; static const char pci_device_1014_001c[] = "Carrera"; -static const char pci_device_1014_001d[] = "82G2675"; +static const char pci_device_1014_001d[] = "SCSI-2 FAST PCI Adapter (82G2675)"; static const char pci_device_1014_0020[] = "GXT1000 Graphics Adapter"; -static const char pci_device_1014_0022[] = "IBM27-82351"; -static const char pci_device_1014_002d[] = "Python"; +static const char pci_device_1014_0022[] = "PCI to PCI Bridge (IBM27-82351)"; +static const char pci_device_1014_002d[] = "Processor to I/O Controller [Python]"; static const char pci_device_1014_002e[] = "SCSI RAID Adapter [ServeRAID]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1014_002e_1014_002e[] = "ServeRAID-3x"; @@ -2893,8 +3357,8 @@ static const char pci_device_1014_0031[] = "2 Port Serial Adapter"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1014_0031_1014_0031[] = "2721 WAN IOA - 2 Port Sync Serial Adapter"; #endif -static const char pci_device_1014_0036[] = "Miami"; -static const char pci_device_1014_0037[] = "82660 CPU to PCI Bridge"; +static const char pci_device_1014_0036[] = "PCI to 32-bit LocalBus Bridge [Miami]"; +static const char pci_device_1014_0037[] = "PowerPC to PCI Bridge (IBM27-82660)"; static const char pci_device_1014_003a[] = "CPU to PCI Bridge"; static const char pci_device_1014_003c[] = "GXT250P/GXT255P Graphics Adapter"; static const char pci_device_1014_003e[] = "16/4 Token ring UTP/STP controller"; @@ -3016,6 +3480,13 @@ static const char pci_subsys_1014_01bd_1014_0259[] = "ServeRAID-5i"; #endif static const char pci_device_1014_01c1[] = "64bit/66MHz PCI ATM 155 UTP"; static const char pci_device_1014_01e6[] = "Cryptographic Accelerator"; +static const char pci_device_1014_01ef[] = "PowerPC 440GP PCI Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_01ef_1734_102b[] = "PCEAS PCI-X Dual Port ESCON Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_01ef_1734_10f8[] = "PCEAT PCI-Express Dual Port ESCON Adapter"; +#endif static const char pci_device_1014_01ff[] = "10/100 Mbps Ethernet"; static const char pci_device_1014_0219[] = "Multiport Serial Adapter"; #ifdef INIT_SUBSYS_INFO @@ -3054,9 +3525,26 @@ static const char pci_subsys_1014_02bd_1014_02c1[] = "PCI-X DDR 3Gb SAS Adapter #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1014_02bd_1014_02c2[] = "PCI-X DDR 3Gb SAS RAID Adapter (572B/571D)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_02bd_1014_0338[] = "PCI-X DDR Auxiliary Cache Adapter (575C)"; +#endif static const char pci_device_1014_0302[] = "Winnipeg PCI-X Host Bridge"; static const char pci_device_1014_0308[] = "CalIOC2 PCI-E Root Port"; static const char pci_device_1014_0314[] = "ZISC 036 Neural accelerator card"; +static const char pci_device_1014_032d[] = "Axon - Cell Companion Chip"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_032d_1014_03a1[] = "PCIe PowerXCell 8i Cell Accelerator Board"; +#endif +static const char pci_device_1014_0339[] = "Obsidian-E PCI-E SCSI controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_0339_1014_030a[] = "PCIe 3Gb SAS RAID Adapter (574E)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_0339_1014_033a[] = "PCIe 3Gb SAS Adapter (57B3)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_0339_1014_0360[] = "PCI-E Auxiliary Cache Adapter (57B7)"; +#endif static const char pci_device_1014_3022[] = "QLA3022 Network Adapter"; static const char pci_device_1014_4022[] = "QLA3022 Network Adapter"; static const char pci_device_1014_ffff[] = "MPIC-2 interrupt controller"; @@ -3187,6 +3675,16 @@ static const char pci_device_1022_1100[] = "K8 [Athlon64/Opteron] HyperTransport static const char pci_device_1022_1101[] = "K8 [Athlon64/Opteron] Address Map"; static const char pci_device_1022_1102[] = "K8 [Athlon64/Opteron] DRAM Controller"; static const char pci_device_1022_1103[] = "K8 [Athlon64/Opteron] Miscellaneous Control"; +static const char pci_device_1022_1200[] = "Family 10h [Opteron, Athlon64, Sempron] HyperTransport Configuration"; +static const char pci_device_1022_1201[] = "Family 10h [Opteron, Athlon64, Sempron] Address Map"; +static const char pci_device_1022_1202[] = "Family 10h [Opteron, Athlon64, Sempron] DRAM Controller"; +static const char pci_device_1022_1203[] = "Family 10h [Opteron, Athlon64, Sempron] Miscellaneous Control"; +static const char pci_device_1022_1204[] = "Family 10h [Opteron, Athlon64, Sempron] Link Control"; +static const char pci_device_1022_1300[] = "Family 11h HyperTransport Configuration"; +static const char pci_device_1022_1301[] = "Family 11h Address Map"; +static const char pci_device_1022_1302[] = "Family 11h DRAM Controller"; +static const char pci_device_1022_1303[] = "Family 11h Miscellaneous Control"; +static const char pci_device_1022_1304[] = "Family 11h Link Control"; static const char pci_device_1022_2000[] = "79c970 [PCnet32 LANCE]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1022_2000_1014_2000[] = "NetFinity 10/100 Fast Ethernet"; @@ -3264,7 +3762,7 @@ static const char pci_subsys_1022_2001_1668_0299[] = "ActionLink Home Network Ad static const char pci_device_1022_2003[] = "Am 1771 MBW [Alchemy]"; static const char pci_device_1022_2020[] = "53c974 [PCscsi]"; static const char pci_device_1022_2040[] = "79c974"; -static const char pci_device_1022_2080[] = "Conrad Kostecki"; +static const char pci_device_1022_2080[] = "CS5536 [Geode companion] Host Bridge"; static const char pci_device_1022_2081[] = "Geode LX Video"; static const char pci_device_1022_2082[] = "Geode LX AES Security Block"; static const char pci_device_1022_208f[] = "CS5536 GeodeLink PCI South Bridge"; @@ -3348,6 +3846,18 @@ static const char pci_subsys_1022_746d_161f_3017[] = "HDAMB"; #endif static const char pci_device_1022_746e[] = "AMD-8111 MC97 Modem"; static const char pci_device_1022_756b[] = "AMD-8111 ACPI"; +static const char pci_device_1022_9600[] = "RS780 Host Bridge"; +static const char pci_device_1022_9601[] = "RS780 Host Bridge Alternate"; +static const char pci_device_1022_9602[] = "RS780 PCI to PCI bridge (int gfx)"; +static const char pci_device_1022_9603[] = "RS780 PCI to PCI bridge (ext gfx port 0)"; +static const char pci_device_1022_9604[] = "RS780 PCI to PCI bridge (PCIE port 0)"; +static const char pci_device_1022_9605[] = "RS780 PCI to PCI bridge (PCIE port 1)"; +static const char pci_device_1022_9606[] = "RS780 PCI to PCI bridge (PCIE port 2)"; +static const char pci_device_1022_9607[] = "RS780 PCI to PCI bridge (PCIE port 3)"; +static const char pci_device_1022_9608[] = "RS780 PCI to PCI bridge (PCIE port 4)"; +static const char pci_device_1022_9609[] = "RS780 PCI to PCI bridge (PCIE port 5)"; +static const char pci_device_1022_960a[] = "RS780 PCI to PCI bridge (NB-SB link)"; +static const char pci_device_1022_960b[] = "RS780 PCI to PCI bridge (ext gfx port 1)"; static const char pci_vendor_1023[] = "Trident Microsystems"; static const char pci_device_1023_0194[] = "82C194"; static const char pci_device_1023_2000[] = "4DWave DX"; @@ -3398,9 +3908,6 @@ static const char pci_device_1023_9460[] = "TGUI 9460"; static const char pci_device_1023_9470[] = "TGUI 9470"; static const char pci_device_1023_9520[] = "Cyber 9520"; static const char pci_device_1023_9525[] = "Cyber 9525"; -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1023_9525_10cf_1094[] = "Lifebook C6155"; -#endif static const char pci_device_1023_9540[] = "Cyber 9540"; static const char pci_device_1023_9660[] = "TGUI 9660/938x/968x"; static const char pci_device_1023_9680[] = "TGUI 9680"; @@ -3426,6 +3933,7 @@ static const char pci_subsys_1023_9880_1023_9880[] = "Blade 3D"; #endif static const char pci_device_1023_9910[] = "CyberBlade/XP"; static const char pci_device_1023_9930[] = "CyberBlade/XPm"; +static const char pci_device_1023_9960[] = "CyberBlade XP2"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1024[] = "Zenith Data Systems"; #endif @@ -3539,6 +4047,9 @@ static const char pci_device_1028_000c[] = "Embedded Remote Access or ERA/O"; static const char pci_device_1028_000d[] = "Embedded Remote Access: BMC/SMIC device"; static const char pci_device_1028_000e[] = "PowerEdge Expandable RAID controller 4/Di"; static const char pci_device_1028_000f[] = "PowerEdge Expandable RAID controller 4/Di"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1028_000f_1028_014a[] = "PowerEdge 1750"; +#endif static const char pci_device_1028_0010[] = "Remote Access Card 4"; static const char pci_device_1028_0011[] = "Remote Access Card 4 Daughter Card"; static const char pci_device_1028_0012[] = "Remote Access Card 4 Daughter Card Virtual UART"; @@ -3559,14 +4070,16 @@ static const char pci_subsys_1028_0013_1028_016f[] = "PowerEdge Expandable RAID static const char pci_subsys_1028_0013_1028_0170[] = "PowerEdge Expandable RAID Controller 4e/Di"; #endif static const char pci_device_1028_0014[] = "Remote Access Card 4 Daughter Card SMIC interface"; -static const char pci_device_1028_0015[] = "PowerEdge Expandable RAID controller 5i"; +static const char pci_device_1028_0015[] = "PowerEdge Expandable RAID controller 5"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1028_0015_1028_1f01[] = "PERC 5/E Adapter RAID Controller"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1028_0015_1028_1f02[] = "PERC 5/i Adapter RAID Controller"; #endif -static const char pci_device_1028_1f03[] = "PERC 5/i"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1028_0015_1028_1f03[] = "PERC 5/i Integrated RAID Controller"; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1029[] = "Siemens Nixdorf IS"; #endif @@ -3958,6 +4471,9 @@ static const char pci_subsys_102b_2527_102b_0f84[] = "Millennium G550 Dual Head #ifdef INIT_SUBSYS_INFO static const char pci_subsys_102b_2527_102b_1e41[] = "Millennium G550"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2527_102b_2300[] = "Millennium G550 LP PCIE"; +#endif static const char pci_device_102b_2537[] = "Millenium P650/P750"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_102b_2537_102b_1820[] = "Millennium P750 64MB"; @@ -3982,6 +4498,9 @@ static const char pci_subsys_102b_2538_102b_08c7[] = "Millennium P650 PCIe 128MB static const char pci_subsys_102b_2538_102b_0907[] = "Millennium P650 PCIe 64MB"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2538_102b_0947[] = "Parhelia APVe"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_102b_2538_102b_1047[] = "Millennium P650 LP PCIe 128MB"; #endif #ifdef INIT_SUBSYS_INFO @@ -3993,6 +4512,7 @@ static const char pci_subsys_102b_2538_102b_2538[] = "Parhelia APVe"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_102b_2538_102b_3007[] = "QID Low-profile PCIe"; #endif +static const char pci_device_102b_2539[] = "Millennium P690"; static const char pci_device_102b_4536[] = "VIA Framegrabber"; static const char pci_device_102b_4cdc[] = "Morphis Vision System Jpeg2000"; static const char pci_device_102b_4fc5[] = "Morphis Vision System"; @@ -4223,6 +4743,9 @@ static const char pci_device_1039_0018[] = "SiS85C503/5513 (LPC Bridge)"; static const char pci_device_1039_0180[] = "RAID bus controller 180 SATA/PATA [SiS]"; static const char pci_device_1039_0181[] = "SATA"; static const char pci_device_1039_0182[] = "182 SATA/RAID Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_0182_1734_1095[] = "D2030-A1"; +#endif static const char pci_device_1039_0186[] = "AHCI Controller (0106)"; static const char pci_device_1039_0190[] = "190 Gigabit Ethernet Adapter"; static const char pci_device_1039_0191[] = "191 Gigabit Ethernet Adapter"; @@ -4254,12 +4777,14 @@ static const char pci_device_1039_0635[] = "635 Host"; static const char pci_device_1039_0645[] = "SiS645 Host & Memory & AGP Controller"; static const char pci_device_1039_0646[] = "SiS645DX Host & Memory & AGP Controller"; static const char pci_device_1039_0648[] = "645xx"; +static const char pci_device_1039_0649[] = "SiS649 Host"; static const char pci_device_1039_0650[] = "650/M650 Host"; static const char pci_device_1039_0651[] = "651 Host"; static const char pci_device_1039_0655[] = "655 Host"; static const char pci_device_1039_0660[] = "660 Host"; static const char pci_device_1039_0661[] = "661FX/M661FX/M661MX Host"; static const char pci_device_1039_0662[] = "662 Host"; +static const char pci_device_1039_0671[] = "671MX"; static const char pci_device_1039_0730[] = "730 Host"; static const char pci_device_1039_0733[] = "733 Host"; static const char pci_device_1039_0735[] = "735 Host"; @@ -4270,6 +4795,9 @@ static const char pci_device_1039_0746[] = "746 Host"; static const char pci_device_1039_0755[] = "755 Host"; static const char pci_device_1039_0760[] = "760/M760 Host"; static const char pci_device_1039_0761[] = "761/M761 Host"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_0761_1734_1099[] = "D2030-A1 Motherboard"; +#endif static const char pci_device_1039_0900[] = "SiS900 PCI Fast Ethernet"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_0900_1019_0a14[] = "K7S5A motherboard"; @@ -4314,6 +4842,9 @@ static const char pci_subsys_1039_5513_1043_8035[] = "CUSI-FX motherboard"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_5513_1462_7010[] = "MS-6701 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_5513_1734_1095[] = "D2030-A1 Motherboard"; +#endif static const char pci_device_1039_5517[] = "5517"; static const char pci_device_1039_5571[] = "5571"; static const char pci_device_1039_5581[] = "5581 Pentium Chipset"; @@ -4337,6 +4868,9 @@ static const char pci_device_1039_6306[] = "530/620 PCI/AGP VGA Display Adapter" static const char pci_subsys_1039_6306_1039_6306[] = "SiS530,620 GUI Accelerator+3D"; #endif static const char pci_device_1039_6325[] = "65x/M650/740 PCI/AGP VGA Display Adapter"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_6325_1039_6325[] = "740 [315 graphics core] on ECS K7SOM+ motherboard"; +#endif static const char pci_device_1039_6326[] = "86C326 5598/6326"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_6326_1039_6326[] = "SiS6326 GUI Accelerator"; @@ -4363,9 +4897,15 @@ static const char pci_subsys_1039_6330_1039_6330[] = "[M]661xX/[M]741[GX]/[M]760 #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_6330_1043_8113[] = "SiS Real 256E (ASUS P5S800-VM motherboard)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_6330_1458_d000[] = "SiS661FX GUI 2D/3D Accelerator"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_6330_1734_1099[] = "D2030-A1"; +#endif static const char pci_device_1039_6350[] = "770/670 PCIE VGA Display Adapter"; static const char pci_device_1039_6351[] = "771/671 PCIE VGA Display Adapter"; -static const char pci_device_1039_7001[] = "USB 1.0 Controller"; +static const char pci_device_1039_7001[] = "USB 1.1 Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7001_1019_0a14[] = "K7S5A motherboard"; #endif @@ -4373,29 +4913,50 @@ static const char pci_subsys_1039_7001_1019_0a14[] = "K7S5A motherboard"; static const char pci_subsys_1039_7001_1039_7000[] = "Onboard USB Controller"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1039_7001_1462_5470[] = "K7SOM+ 5.2C Motherboard"; +static const char pci_subsys_1039_7001_1462_5470[] = "ECS K7SOM+ motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7001_1462_7010[] = "MS-6701 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7001_1734_1095[] = "D2030-A1 Motherboard"; +#endif static const char pci_device_1039_7002[] = "USB 2.0 Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7002_1462_5470[] = "K7SOM+ 5.2C Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7002_1462_7010[] = "MS-6701 motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7002_1509_7002[] = "Onboard USB Controller"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7002_1734_1095[] = "D2030-A1"; +#endif static const char pci_device_1039_7007[] = "FireWire Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7007_1462_701d[] = "MS-6701"; #endif static const char pci_device_1039_7012[] = "AC'97 Sound Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7012_1043_818f[] = "A8S-X Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7012_13f6_0300[] = "ECS K7SOM+ motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7012_1462_5850[] = "MSI 648 Max (MS-6585)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7012_1462_7010[] = "MS-6701 motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7012_15bd_1001[] = "DFI 661FX motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7012_1734_109f[] = "D2030-A1 Motherboard"; +#endif static const char pci_device_1039_7013[] = "AC'97 Modem Controller"; static const char pci_device_1039_7016[] = "SiS7016 PCI Fast Ethernet Adapter"; #ifdef INIT_SUBSYS_INFO @@ -4421,6 +4982,9 @@ static const char pci_subsys_1039_7018_1025_0018[] = "SiS PCI Audio Accelerator" static const char pci_subsys_1039_7018_1039_7018[] = "SiS PCI Audio Accelerator"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7018_1043_1453[] = "SiS PCI Audio Accelerator"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7018_1043_800b[] = "SiS PCI Audio Accelerator"; #endif #ifdef INIT_SUBSYS_INFO @@ -4478,6 +5042,7 @@ static const char pci_vendor_103b[] = "Tatung Co. of America"; #endif static const char pci_vendor_103c[] = "Hewlett-Packard Company"; static const char pci_device_103c_002a[] = "NX9000 Notebook"; +static const char pci_device_103c_08bc[] = "NX5000 Notebook"; static const char pci_device_103c_1005[] = "A4977A Visualize EG"; static const char pci_device_103c_1008[] = "Visualize FX"; static const char pci_device_103c_1028[] = "Tach TL Fibre Channel Host Adapter"; @@ -4558,6 +5123,9 @@ static const char pci_device_103c_122e[] = "PCI-X Local Bus Adapter"; static const char pci_device_103c_127b[] = "sx1000 System Bus Adapter"; static const char pci_device_103c_127c[] = "sx1000 I/O Controller"; static const char pci_device_103c_1290[] = "Auxiliary Diva Serial Port"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_103c_1290_103c_1291[] = "Diva SP2"; +#endif static const char pci_device_103c_1291[] = "Auxiliary Diva Serial Port"; static const char pci_device_103c_12b4[] = "zx1 QuickSilver AGP8x Local Bus Adapter"; static const char pci_device_103c_12eb[] = "sx2000 System Bus Adapter"; @@ -4567,17 +5135,38 @@ static const char pci_device_103c_12f8[] = "Broadcom BCM4306 802.11b/g Wireless static const char pci_device_103c_12fa[] = "BCM4306 802.11b/g Wireless LAN Controller"; static const char pci_device_103c_1302[] = "RMP-3 Shared Memory Driver"; static const char pci_device_103c_1303[] = "RMP-3 (Remote Management Processor)"; +static const char pci_device_103c_1361[] = "BCM4312 802.11a/b/g WLAN Controller"; +static const char pci_device_103c_1371[] = "Broadcom Corporation BCM4312 802.11a/b/g (rev 02)"; static const char pci_device_103c_2910[] = "E2910A PCIBus Exerciser"; static const char pci_device_103c_2925[] = "E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer"; static const char pci_device_103c_3080[] = "Pavilion ze2028ea"; static const char pci_device_103c_3085[] = "Realtek RTL8139/8139C/8139C+"; static const char pci_device_103c_30b5[] = "Compaq Presario V3000Z"; +static const char pci_device_103c_31fb[] = "DL365 ATI ES1000 VGA controller"; static const char pci_device_103c_3220[] = "Smart Array P600"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_103c_3220_103c_3225[] = "3 Gb/s SAS RAID"; #endif static const char pci_device_103c_3230[] = "Smart Array Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_103c_3230_103c_3223[] = "Smart Array P800"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_103c_3230_103c_3234[] = "P400 SAS Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_103c_3230_103c_3235[] = "P400i SAS Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_103c_3230_103c_3237[] = "E500 SAS Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_103c_3230_103c_323d[] = "P700m SAS Controller"; +#endif static const char pci_device_103c_3238[] = "Smart Array E200i (SAS Controller)"; +static const char pci_device_103c_3300[] = "Proliant iLO2 virtual USB controller"; +static const char pci_device_103c_3302[] = "Proliant iLO2 virtual UART"; +static const char pci_device_103c_3305[] = "Proliant iLO2 [Integrated Lights Out] controller"; static const char pci_device_103c_4030[] = "zx2 System Bus Adapter"; static const char pci_device_103c_4031[] = "zx2 I/O Controller"; static const char pci_device_103c_4037[] = "PCIe Local Bus Adapter"; @@ -4631,6 +5220,7 @@ static const char pci_device_1043_815a[] = "A8N-SLI Motherboard nForce4 SATA"; static const char pci_device_1043_8168[] = "Realtek PCI-E Gigabit Ethernet Controller (RTL8111B)"; static const char pci_device_1043_8187[] = "802.11a/b/g Wireless LAN Card"; static const char pci_device_1043_8188[] = "Tiger Hybrid TV Capture Device"; +static const char pci_device_1043_81e7[] = "Realtek ALC-660 6-channel CODEC"; static const char pci_device_1043_81f4[] = "EN7300TC512/TD/128M/A(C262G) [Graphics Card EN7300TC512]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -4863,6 +5453,9 @@ static const char pci_subsys_104c_3d07_1048_0a44[] = "GLoria Synergy"; static const char pci_subsys_104c_3d07_107d_2633[] = "WinFast 3D L2300"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_3d07_1092_0126[] = "FIRE GL 1000 PRO"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_3d07_1092_0127[] = "FIRE GL 1000 PRO"; #endif #ifdef INIT_SUBSYS_INFO @@ -4958,6 +5551,9 @@ static const char pci_subsys_104c_8025_1458_1000[] = "GA-K8N Ultra-9 Mainboard"; #endif static const char pci_device_104c_8026[] = "TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8026_1025_0035[] = "TravelMate 660"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8026_1025_003c[] = "Aspire 2001WLCi (Compaq CL50 motherboard)"; #endif #ifdef INIT_SUBSYS_INFO @@ -4988,11 +5584,17 @@ static const char pci_subsys_104c_802b_1028_0139[] = "Latitude D400"; static const char pci_subsys_104c_802b_1028_014e[] = "PCI7410,7510,7610 OHCI-Lynx Controller (Latitude D800)"; #endif static const char pci_device_104c_802e[] = "PCI7x20 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_802e_1028_018d[] = "Inspiron 700m/710m"; +#endif static const char pci_device_104c_8031[] = "PCIxx21/x515 Cardbus Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8031_1025_0080[] = "Aspire 5024WLMi"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8031_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8031_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -5003,6 +5605,9 @@ static const char pci_device_104c_8032[] = "OHCI Compliant IEEE 1394 Host Contro static const char pci_subsys_104c_8032_1025_0080[] = "Aspire 5024WLMi"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8032_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8032_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -5013,6 +5618,9 @@ static const char pci_device_104c_8033[] = "PCIxx21 Integrated FlashMedia Contro static const char pci_subsys_104c_8033_1025_0080[] = "Aspire 5024WLMi"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8033_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8033_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -5023,6 +5631,9 @@ static const char pci_device_104c_8034[] = "PCI6411/6421/6611/6621/7411/7421/761 static const char pci_subsys_104c_8034_1025_0080[] = "Aspire 5024WLMi"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8034_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8034_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -5030,6 +5641,9 @@ static const char pci_subsys_104c_8034_103c_308b[] = "MX6125"; #endif static const char pci_device_104c_8035[] = "PCI6411/6421/6611/6621/7411/7421/7611/7621 Smart Card Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8035_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8035_103c_099c[] = "NX6110/NC6120"; #endif static const char pci_device_104c_8036[] = "PCI6515 Cardbus Controller"; @@ -5041,6 +5655,9 @@ static const char pci_subsys_104c_8039_103c_309f[] = "nx9420"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8039_103c_30a1[] = "NC2400"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8039_103c_30a3[] = "Compaq nw8440"; +#endif static const char pci_device_104c_803a[] = "PCIxx12 OHCI Compliant IEEE 1394 Host Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_803a_103c_309f[] = "nx9420"; @@ -5048,14 +5665,23 @@ static const char pci_subsys_104c_803a_103c_309f[] = "nx9420"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_803a_103c_30a1[] = "NC2400"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_803a_103c_30a3[] = "Compaq nw8440"; +#endif static const char pci_device_104c_803b[] = "5-in-1 Multimedia Card Reader (SD/MMC/MS/MS PRO/xD)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_803b_103c_309f[] = "nx9420"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_803b_103c_30a3[] = "Compaq nw8440"; +#endif static const char pci_device_104c_803c[] = "PCIxx12 SDA Standard Compliant SD Host Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_803c_103c_309f[] = "nx9420"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_803c_103c_30a3[] = "Compaq nw8440"; +#endif static const char pci_device_104c_803d[] = "PCIxx12 GemCore based SmartCard controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_803d_103c_309f[] = "nx9420"; @@ -5063,6 +5689,7 @@ static const char pci_subsys_104c_803d_103c_309f[] = "nx9420"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_803d_103c_30a1[] = "NC2400"; #endif +static const char pci_device_104c_8101[] = "TSB43DB42 IEEE-1394a-2000 Controller (PHY/Link)"; static const char pci_device_104c_8201[] = "PCI1620 Firmware Loading Function"; static const char pci_device_104c_8204[] = "PCI7410,7510,7610 PCI Firmware Loading Function"; #ifdef INIT_SUBSYS_INFO @@ -5100,8 +5727,14 @@ static const char pci_subsys_104c_9066_1186_3b05[] = "DWL-G650+ AirPlusG+ CardBu static const char pci_subsys_104c_9066_13d1_aba0[] = "SWLMP-54108 108Mbps Wireless mini PCI card 802.11g+"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_9066_16ec_010d[] = "USR5416 802.11g Wireless Turbo PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_9066_1737_0033[] = "WPC54G Ver.2 802.11G PC Card"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_9066_17cf_0033[] = "Z-Com XG650 Wireless miniPCI 802.11b/g"; +#endif static const char pci_device_104c_a001[] = "TDC1570"; static const char pci_device_104c_a100[] = "TDC1561"; static const char pci_device_104c_a102[] = "TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f"; @@ -5133,7 +5766,7 @@ static const char pci_device_104c_ac1b[] = "PCI1450"; static const char pci_subsys_104c_ac1b_0e11_b113[] = "Armada M700"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_ac1b_1014_0130[] = "Thinkpad T20/T22/A21m"; +static const char pci_subsys_104c_ac1b_1014_0130[] = "ThinkPad A21m/T20/T22"; #endif static const char pci_device_104c_ac1c[] = "PCI1225"; #ifdef INIT_SUBSYS_INFO @@ -5171,6 +5804,9 @@ static const char pci_subsys_104c_ac44_1028_0196[] = "Inspiron 5160"; static const char pci_subsys_104c_ac44_1071_8160[] = "MIM2000"; #endif static const char pci_device_104c_ac46[] = "PCI4520 PC card Cardbus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac46_1014_0552[] = "ThinkPad"; +#endif static const char pci_device_104c_ac47[] = "PCI7510 PC card Cardbus Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac47_1028_0139[] = "Latitude D400"; @@ -5197,7 +5833,7 @@ static const char pci_subsys_104c_ac51_0e11_004e[] = "Evo N600c"; static const char pci_subsys_104c_ac51_1014_0148[] = "ThinkPad A20m"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_ac51_1014_023b[] = "ThinkPad T23 (2647-4MG)"; +static const char pci_subsys_104c_ac51_1014_023b[] = "ThinkPad T23"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac51_1028_00b1[] = "Latitude C600"; @@ -5209,9 +5845,6 @@ static const char pci_subsys_104c_ac51_1028_012a[] = "Latitude C640"; static const char pci_subsys_104c_ac51_1033_80cd[] = "Versa Note VXi"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_ac51_1095_10cf[] = "Fujitsu-Siemens LifeBook C Series"; -#endif -#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac51_10cf_1095[] = "Lifebook S-4510/C6155"; #endif #ifdef INIT_SUBSYS_INFO @@ -5229,10 +5862,10 @@ static const char pci_subsys_104c_ac55_1014_0512[] = "ThinkPad T30/T40"; #endif static const char pci_device_104c_ac56[] = "PCI1510 PC card Cardbus Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_ac56_1014_0512[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_104c_ac56_1014_0512[] = "ThinkPad R50e"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_ac56_1014_0528[] = "ThinkPad R40e (2684-HVG) Cardbus Controller"; +static const char pci_subsys_104c_ac56_1014_0528[] = "ThinkPad R40e"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac56_17aa_2012[] = "ThinkPad T60/R60 series"; @@ -5252,9 +5885,12 @@ static const char pci_subsys_104c_ac60_175c_8800[] = "ASI88xx Audio Adapter"; #endif static const char pci_device_104c_ac8d[] = "PCI 7620"; static const char pci_device_104c_ac8e[] = "PCI7420 CardBus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac8e_1028_018d[] = "Inspiron 700m/710m"; +#endif static const char pci_device_104c_ac8f[] = "PCI7420/7620 Combo CardBus, 1394a-2000 OHCI and SD/MS-Pro Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_ac8f_1028_018d[] = "Inspiron 700m"; +static const char pci_subsys_104c_ac8f_1028_018d[] = "Inspiron 700m/710m"; #endif static const char pci_device_104c_fe00[] = "FireWire Host Controller"; static const char pci_device_104c_fe03[] = "12C01A FireWire Host Controller"; @@ -5323,6 +5959,15 @@ static const char pci_vendor_1053[] = "Young Micro Systems"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1054[] = "Hitachi, Ltd"; +static const char pci_device_1054_3009[] = "2Gbps Fibre Channel to PCI HBA 3009"; +static const char pci_device_1054_300a[] = "4Gbps Fibre Channel to PCI-X HBA 300a"; +static const char pci_device_1054_300b[] = "4Gbps Fibre Channel to PCI-X HBA 300b"; +static const char pci_device_1054_300f[] = "ColdFusion 3 Chipset Processor to I/O Controller"; +static const char pci_device_1054_3010[] = "ColdFusion 3 Chipset Memory Controller Hub"; +static const char pci_device_1054_3011[] = "ColdFusion 3e Chipset Processor to I/O Controller"; +static const char pci_device_1054_3012[] = "ColdFusion 3e Chipset Memory Controller Hub"; +static const char pci_device_1054_3017[] = "Unassigned Hitachi Shared FC Device 3017"; +static const char pci_device_1054_301d[] = "PCIe-to-PCIe Bridge with Virtualization IO Assist Feature"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1055[] = "Efar Microsystems"; @@ -5345,6 +5990,8 @@ static const char pci_device_1057_0009[] = "MPC8560"; static const char pci_device_1057_0012[] = "MPC8548 [PowerQUICC III]"; static const char pci_device_1057_0100[] = "MC145575 [HFC-PCI]"; static const char pci_device_1057_0431[] = "KTI829c 100VG"; +static const char pci_device_1057_1073[] = "Nokia N770"; +static const char pci_device_1057_1219[] = "Nokia N800"; static const char pci_device_1057_1801[] = "DSP56301 Digital Signal Processor"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1057_1801_14fb_0101[] = "Transas Radar Imitator Board [RIM]"; @@ -5630,6 +6277,7 @@ static const char pci_device_105a_6269[] = "PDC20271 (FastTrak TX2000)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_105a_6269_105a_6269[] = "FastTrak TX2/TX2000"; #endif +static const char pci_device_105a_6300[] = "PDC81731 [FastTrak SX8300]"; static const char pci_device_105a_6621[] = "PDC20621 (FastTrak S150 SX4/FastTrak SX4000 lite)"; static const char pci_device_105a_6622[] = "PDC20621 [SATA150 SX4] 4 Channel IDE RAID Controller"; static const char pci_device_105a_6624[] = "PDC20621 [FastTrak SX4100]"; @@ -5638,19 +6286,37 @@ static const char pci_device_105a_6629[] = "PDC20619 (FastTrak TX4000)"; static const char pci_device_105a_7275[] = "PDC20277 (SBFastTrak133 Lite)"; static const char pci_device_105a_8002[] = "SATAII150 SX8"; static const char pci_device_105a_8350[] = "80333 [SuperTrak EX8350/EX16350], 80331 [SuperTrak EX8300/EX16300]"; -static const char pci_device_105a_8650[] = "81348 [SuperTrak EX4650/EX8650/EX8654/EX4650EL]"; +static const char pci_device_105a_8650[] = "81384 [SuperTrak EX SAS and SATA RAID Controller]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_105a_8650_105a_4600[] = "SuperTrak EX4650"; +static const char pci_subsys_105a_8650_105a_4600[] = "SuperTrak EX4650A"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_105a_8650_105a_4601[] = "SuperTrak EX4650"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_105a_8650_105a_4610[] = "SuperTrak EX4650EL"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_105a_8650_105a_8601[] = "SuperTrak EX8650"; +static const char pci_subsys_105a_8650_105a_8600[] = "SuperTrak EX8650EL"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_105a_8650_105a_8601[] = "SuperTrak EX8650A"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_105a_8650_105a_8602[] = "SuperTrak EX8654"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_105a_8650_105a_8603[] = "SuperTrak EX8658"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_105a_8650_105a_8604[] = "SuperTrak EX8650"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_105a_8650_105a_8610[] = "SuperTrak EX8650M"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_105a_8650_105a_b600[] = "SuperTrak EX16650"; +#endif static const char pci_device_105a_c350[] = "80333 [SuperTrak EX12350]"; static const char pci_device_105a_e350[] = "80333 [SuperTrak EX24350]"; #endif @@ -5948,6 +6614,7 @@ static const char pci_device_106b_0052[] = "Shasta Firewire"; static const char pci_device_106b_0053[] = "Shasta PCI Bridge"; static const char pci_device_106b_0054[] = "Shasta PCI Bridge"; static const char pci_device_106b_0055[] = "Shasta PCI Bridge"; +static const char pci_device_106b_0057[] = "U3 HT Bridge"; static const char pci_device_106b_0058[] = "U3L AGP Bridge"; static const char pci_device_106b_0059[] = "U3H AGP Bridge"; static const char pci_device_106b_0066[] = "Intrepid2 AGP Bridge"; @@ -5956,6 +6623,7 @@ static const char pci_device_106b_0068[] = "Intrepid2 PCI Bridge"; static const char pci_device_106b_0069[] = "Intrepid2 ATA/100"; static const char pci_device_106b_006a[] = "Intrepid2 Firewire"; static const char pci_device_106b_006b[] = "Intrepid2 GMAC (Sun GEM)"; +static const char pci_device_106b_0074[] = "U4 HT Bridge"; static const char pci_device_106b_1645[] = "Tigon3 Gigabit Ethernet NIC (BCM5701)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -6095,6 +6763,7 @@ static const char pci_subsys_1077_2422_103c_12dd[] = "4Gb Fibre Channel [AB429A] #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1077_2432[] = "ISP2432-based 4Gb Fibre Channel to PCI Express HBA"; +static const char pci_device_1077_2532[] = "ISP2532-based 8Gb Fibre Channel to PCI Express HBA"; static const char pci_device_1077_3022[] = "ISP4022-based Ethernet NIC"; static const char pci_device_1077_3032[] = "ISP4032-based Ethernet IPv6 NIC"; static const char pci_device_1077_4010[] = "ISP4010-based iSCSI TOE HBA"; @@ -6103,6 +6772,8 @@ static const char pci_device_1077_4032[] = "ISP4032-based iSCSI TOE IPv6 HBA"; static const char pci_device_1077_5432[] = "SP232-based 4Gb Fibre Channel to PCI Express HBA"; static const char pci_device_1077_6312[] = "SP202-based 2Gb Fibre Channel to PCI-X HBA"; static const char pci_device_1077_6322[] = "SP212-based 2Gb Fibre Channel to PCI-X HBA"; +static const char pci_device_1077_7220[] = "IBA7220 InfiniBand HCA"; +static const char pci_device_1077_8432[] = "10GbE FCoE to PCI Express Converged Network Adapter (CNA)"; #endif static const char pci_vendor_1078[] = "Cyrix Corporation"; static const char pci_device_1078_0000[] = "5510 [Grappa]"; @@ -6135,6 +6806,7 @@ static const char pci_device_107d_0000[] = "P86C850"; static const char pci_device_107d_204d[] = "[GeForce 7800 GTX] Winfast PX7800 GTX TDH"; static const char pci_device_107d_2134[] = "WinFast 3D S320 II"; static const char pci_device_107d_2971[] = "[GeForce FX 5900] WinFast A350 TDH MyViVo"; +static const char pci_device_107d_6654[] = "Conexant CX23883 [WinFast DTV1800 H]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_107e[] = "Interphase Corporation"; @@ -6239,22 +6911,58 @@ static const char pci_device_108d_0022[] = "ATM Adapter"; static const char pci_vendor_108e[] = "Sun Microsystems Computer Corp."; static const char pci_device_108e_0001[] = "EBUS"; static const char pci_device_108e_1000[] = "EBUS"; -static const char pci_device_108e_1001[] = "Happy Meal"; +static const char pci_device_108e_1001[] = "Happy Meal 10/100 Ethernet [hme]"; static const char pci_device_108e_1100[] = "RIO EBUS"; -static const char pci_device_108e_1101[] = "RIO GEM"; +static const char pci_device_108e_1101[] = "RIO 10/100 Ethernet [eri]"; static const char pci_device_108e_1102[] = "RIO 1394"; static const char pci_device_108e_1103[] = "RIO USB"; -static const char pci_device_108e_1648[] = "[bge] Gigabit Ethernet"; -static const char pci_device_108e_2bad[] = "GEM"; +static const char pci_device_108e_1647[] = "Broadcom 570x 10/100/1000 Ethernet [bge]"; +static const char pci_device_108e_1648[] = "Broadcom 570x 10/100/1000 Ethernet [bge]"; +static const char pci_device_108e_16a7[] = "Broadcom 570x 10/100/1000 Ethernet [bge]"; +static const char pci_device_108e_16a8[] = "Broadcom 570x 10/100/1000 Ethernet [bge]"; +static const char pci_device_108e_2bad[] = "GEM 10/100/1000 Ethernet [ge]"; static const char pci_device_108e_5000[] = "Simba Advanced PCI Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_108e_5000_108e_5000[] = "Netra AX1105-500"; +#endif static const char pci_device_108e_5043[] = "SunPCI Co-processor"; +static const char pci_device_108e_6300[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6301[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6302[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6303[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6310[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6311[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6312[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6313[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6320[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6323[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6330[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6331[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6332[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6333[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6340[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6343[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6350[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6353[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_6722[] = "Intel 21554 PCI-PCI bus bridge [db21554]"; +static const char pci_device_108e_676e[] = "SunPCiIII"; +static const char pci_device_108e_7063[] = "SunPCiII / SunPCiIIpro"; static const char pci_device_108e_8000[] = "Psycho PCI Bus Module"; static const char pci_device_108e_8001[] = "Schizo PCI Bus Module"; static const char pci_device_108e_8002[] = "Schizo+ PCI Bus Module"; -static const char pci_device_108e_a000[] = "Ultra IIi"; -static const char pci_device_108e_a001[] = "Ultra IIe"; -static const char pci_device_108e_a801[] = "Tomatillo PCI Bus Module"; +static const char pci_device_108e_80f0[] = "PCIe switch [px]"; +static const char pci_device_108e_80f8[] = "PCIe switch [px]"; +static const char pci_device_108e_9010[] = "PCIe/PCI bridge switch [pxb_plx]"; +static const char pci_device_108e_9020[] = "PCIe/PCI bridge switch [pxb_plx]"; +static const char pci_device_108e_9102[] = "Davicom Fast Ethernet driver for Davicom DM9102A [dmfe]"; +static const char pci_device_108e_a000[] = "Psycho UPA-PCI Bus Module [pcipsy]"; +static const char pci_device_108e_a001[] = "Psycho UPA-PCI Bus Module [pcipsy]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_108e_a001_108e_a001[] = "Netra AX1105-500"; +#endif +static const char pci_device_108e_a801[] = "Schizo Fireplane-PCI bus bridge module [pcisch]"; static const char pci_device_108e_abba[] = "Cassini 10/100/1000"; +static const char pci_device_108e_c416[] = "Sun Fire System/System Controller Interface chip [sbbc]"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_108f[] = "Systemsoft"; #endif @@ -6274,6 +6982,10 @@ static const char pci_device_1091_07a0[] = "Sun Expert3D-Lite Graphics Accelerat static const char pci_device_1091_1091[] = "Sun Expert3D Graphics Accelerator"; #endif static const char pci_vendor_1092[] = "Diamond Multimedia Systems"; +static const char pci_device_1092_0028[] = "Viper V770"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1092_0028_1092_4a00[] = "Viper V770 32MB"; +#endif static const char pci_device_1092_00a0[] = "Speedstar Pro SE"; static const char pci_device_1092_00a8[] = "Speedstar 64"; static const char pci_device_1092_0550[] = "Viper V550"; @@ -6320,6 +7032,7 @@ static const char pci_device_1093_2c80[] = "PCI-6035E"; static const char pci_device_1093_2ca0[] = "PCI-6034E"; static const char pci_device_1093_70a9[] = "PCI-6528 (Digital I/O at 60V)"; static const char pci_device_1093_70b8[] = "PCI-6251 [M Series - High Speed Multifunction DAQ]"; +static const char pci_device_1093_7144[] = "PXI-5124 (12-bit 200 MS/s Digitizer)"; static const char pci_device_1093_b001[] = "IMAQ-PCI-1408"; static const char pci_device_1093_b011[] = "IMAQ-PXI-1408"; static const char pci_device_1093_b021[] = "IMAQ-PCI-1424"; @@ -6400,6 +7113,7 @@ static const char pci_subsys_1095_3512_1095_3512[] = "SiI 3512 SATALink Controll #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1095_3512_1095_6512[] = "SiI 3512 SATARaid Controller"; #endif +static const char pci_device_1095_3531[] = "Sil 3531 [SATALink/SATARaid] Serial ATA Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1096[] = "Alacron"; @@ -6905,7 +7619,9 @@ static const char pci_subsys_10b4_1b1d_10b4_237e[] = "Velocity 4400"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10b5[] = "PLX Technology, Inc."; static const char pci_device_10b5_0001[] = "i960 PCI bus interface"; +static const char pci_device_10b5_1024[] = "Acromag, Inc. IndustryPack Carrier Card"; static const char pci_device_10b5_1042[] = "Brandywine / jxi2, Inc. - PMC-SyncClock32, IRIG A & B, Nasa 36"; +static const char pci_device_10b5_106a[] = "Dual OX16C952 4 port serial adapter [Megawolf Romulus/4]"; static const char pci_device_10b5_1076[] = "VScom 800 8 port serial adaptor"; static const char pci_device_10b5_1077[] = "VScom 400 4 port serial adaptor"; static const char pci_device_10b5_1078[] = "VScom 210 2 port serial and 1 port parallel adaptor"; @@ -6914,23 +7630,52 @@ static const char pci_device_10b5_1146[] = "VScom 010 1 port parallel adaptor"; static const char pci_device_10b5_1147[] = "VScom 020 2 port parallel adaptor"; static const char pci_device_10b5_2540[] = "IXXAT CAN-Interface PC-I 04/PCI"; static const char pci_device_10b5_2724[] = "Thales PCSM Security Card"; -static const char pci_device_10b5_6540[] = "PCI6540/6466 PCI-PCI bridge (transparent mode)"; +static const char pci_device_10b5_6140[] = "PCI6140 32-bit 33MHz PCI-to-PCI Bridge"; +static const char pci_device_10b5_6150[] = "PCI6150 32-bit 33MHz PCI-to-PCI Bridge"; +static const char pci_device_10b5_6152[] = "PCI6152 32-bit 66MHz PCI-to-PCI Bridge"; +static const char pci_device_10b5_6154[] = "PCI6154 64-bit 66MHz PCI-to-PCI Bridge"; +static const char pci_device_10b5_6254[] = "PCI6254 64-bit 66MHz PCI-to-PCI Bridge"; +static const char pci_device_10b5_6466[] = "PCI6466 64-bit 66MHz PCI-to-PCI Bridge"; +static const char pci_device_10b5_6520[] = "PCI6520 64-bit 133MHz PCI-X-to-PCI-X Bridge"; +static const char pci_device_10b5_6540[] = "PCI6540 64-bit 133MHz PCI-X-to-PCI-X Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_6540_1775_1100[] = "CR11 Single Board Computer"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_6540_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_10b5_6541[] = "PCI6540/6466 PCI-PCI bridge (non-transparent mode, primary side)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_6541_1775_1100[] = "CR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_6541_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_10b5_6542[] = "PCI6540/6466 PCI-PCI bridge (non-transparent mode, secondary side)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_6542_1775_1100[] = "CR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_6542_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_10b5_8111[] = "PEX 8111 PCI Express-to-PCI Bridge"; +static const char pci_device_10b5_8112[] = "PEX8112 x1 Lane PCI Express-to-PCI Bridge"; static const char pci_device_10b5_8114[] = "PEX 8114 PCI Express-to-PCI/PCI-X Bridge"; +static const char pci_device_10b5_8311[] = "PEX8311 x1 Lane PCI Express-to-Generic Local Bus Bridge"; +static const char pci_device_10b5_8505[] = "PEX 8505 5-lane, 5-port PCI Express Switch"; +static const char pci_device_10b5_8508[] = "PEX 8508 8-lane, 5-port PCI Express Switch"; +static const char pci_device_10b5_8509[] = "PEX 8509 8-lane, 8-port PCI Express Switch"; +static const char pci_device_10b5_8512[] = "PEX 8512 12-lane, 5-port PCI Express Switch"; static const char pci_device_10b5_8516[] = "PEX 8516 Versatile PCI Express Switch"; +static const char pci_device_10b5_8517[] = "PEX 8517 16-lane, 5-port PCI Express Switch"; +static const char pci_device_10b5_8518[] = "PEX 8518 16-lane, 5-port PCI Express Switch"; +static const char pci_device_10b5_8524[] = "PEX 8524 24-lane, 6-port PCI Express Switch"; +static const char pci_device_10b5_8525[] = "PEX 8525 24-lane, 5-port PCI Express Switch"; static const char pci_device_10b5_8532[] = "PEX 8532 Versatile PCI Express Switch"; -static const char pci_device_10b5_9030[] = "PCI <-> IOBus Bridge Hot Swap"; +static const char pci_device_10b5_8533[] = "PEX 8533 32-lane, 6-port PCI Express Switch"; +static const char pci_device_10b5_8547[] = "PEX 8547 48-lane, 3-port PCI Express Switch"; +static const char pci_device_10b5_8548[] = "PEX 8548 48-lane, 9-port PCI Express Switch"; +static const char pci_device_10b5_9030[] = "PCI9030 32-bit 33MHz PCI <-> IOBus Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9030_10b5_2862[] = "Alpermann+Velte PCL PCI LV (3V/5V): Timecode Reader Board"; #endif @@ -7092,7 +7837,8 @@ static const char pci_subsys_10b5_9050_d84d_4068[] = "EX-4068 8S(16C650) RS-232" #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9050_d84d_4078[] = "EX-4078 2S(16C552) RS-232+1P"; #endif -static const char pci_device_10b5_9054[] = "PCI <-> IOBus Bridge"; +static const char pci_device_10b5_9052[] = "PCI9052 PCI <-> IOBus Bridge"; +static const char pci_device_10b5_9054[] = "PCI9054 32-bit 33MHz PCI <-> IOBus Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9054_10b5_2455[] = "Wessex Techology PHIL-PCI"; #endif @@ -7135,20 +7881,20 @@ static const char pci_subsys_10b5_9054_16df_0015[] = "PIKA Daytona MM"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9054_16df_0016[] = "PIKA InLine MM"; #endif -static const char pci_device_10b5_9056[] = "9056 PCI I/O Accelerator"; +static const char pci_device_10b5_9056[] = "PCI9056 32-bit 66MHz PCI <-> IOBus Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9056_10b5_2979[] = "CellinkBlade 11 - CPCI board VoATM AAL1"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9056_14b4_d140[] = "Dektec DTA-140"; #endif -static const char pci_device_10b5_9060[] = "9060"; +static const char pci_device_10b5_9060[] = "PCI9060 32-bit 33MHz PCI <-> IOBus Bridge"; static const char pci_device_10b5_906d[] = "9060SD"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_906d_125c_0640[] = "Aries 16000P"; #endif static const char pci_device_10b5_906e[] = "9060ES"; -static const char pci_device_10b5_9080[] = "9080"; +static const char pci_device_10b5_9080[] = "PCI9080 32-bit; 33MHz PCI <-> IOBus Bridge"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9080_103c_10eb[] = "(Agilent) E2777B 83K Series Optical Communication Interface"; @@ -7177,7 +7923,7 @@ static const char pci_subsys_10b5_9080_12df_4422[] = "4422PCI [Do-All Telemetry #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9080_1517_000b[] = "ECSG-1R3ADC-PMC Clock synthesizer"; #endif -static const char pci_device_10b5_9656[] = "PCI <-> IOBus Bridge"; +static const char pci_device_10b5_9656[] = "PCI9656 PCI <-> IOBus Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9656_1517_000f[] = "ECDR-GC314-PMC Receiver"; #endif @@ -7472,6 +8218,11 @@ static const char pci_subsys_10b7_9200_1028_0097[] = "3C920 Integrated Fast Ethe #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b7_9200_1028_00b4[] = "OptiPlex GX110"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b7_9200_1028_00fe[] = "Optiplex GX240"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -7489,6 +8240,9 @@ static const char pci_subsys_10b7_9200_10b7_7000[] = "10/100 Mini PCI Ethernet A #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b7_9200_10f1_2466[] = "Tiger MPX S2466 (3C920 Integrated Fast Ethernet Controller)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b7_9200_144d_c005[] = "X10 Laptop"; +#endif static const char pci_device_10b7_9201[] = "3C920B-EMB Integrated Fast Ethernet Controller [Tornado]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b7_9201_1043_80ab[] = "A7N8X Deluxe onboard 3C920B-EMB Integrated Fast Ethernet Controller"; @@ -7622,7 +8376,7 @@ static const char pci_subsys_10b9_1523_10b9_1523[] = "ALI M1523 ISA Bridge"; static const char pci_device_10b9_1531[] = "M1531 [Aladdin IV]"; static const char pci_device_10b9_1533[] = "M1533/M1535 PCI to ISA Bridge [Aladdin IV/V/V+]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b9_1533_1014_053b[] = "ThinkPad R40e (2684-HVG) PCI to ISA Bridge"; +static const char pci_subsys_10b9_1533_1014_053b[] = "ThinkPad R40e"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b9_1533_10b9_1533[] = "ALi M1533 Aladdin IV/V ISA Bridge"; @@ -7633,6 +8387,12 @@ static const char pci_subsys_10b9_1541_10b9_1541[] = "ALI M1541 Aladdin V/V+ AGP #endif static const char pci_device_10b9_1543[] = "M1543"; static const char pci_device_10b9_1563[] = "M1563 HyperTransport South Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_1563_10b9_1563[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_1563_1849_1563[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif static const char pci_device_10b9_1573[] = "PCI to LPC Controller"; static const char pci_device_10b9_1621[] = "M1621"; static const char pci_device_10b9_1631[] = "ALI M1631 PCI North Bridge Aladdin Pro III"; @@ -7669,7 +8429,7 @@ static const char pci_device_10b9_5229[] = "M5229 IDE"; static const char pci_subsys_10b9_5229_1014_050f[] = "ThinkPad R30"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b9_5229_1014_053d[] = "ThinkPad R40e (2684-HVG) builtin IDE"; +static const char pci_subsys_10b9_5229_1014_053d[] = "ThinkPad R40e"; #endif #endif #ifdef INIT_SUBSYS_INFO @@ -7685,7 +8445,7 @@ static const char pci_subsys_10b9_5229_1849_5229[] = "ASRock 939Dual-SATA2 Mothe static const char pci_device_10b9_5235[] = "M5225"; static const char pci_device_10b9_5237[] = "USB 1.1 Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b9_5237_1014_0540[] = "ThinkPad R40e (2684-HVG) builtin USB"; +static const char pci_subsys_10b9_5237_1014_0540[] = "ThinkPad R40e"; #endif #endif #ifdef INIT_SUBSYS_INFO @@ -7697,7 +8457,19 @@ static const char pci_subsys_10b9_5237_103c_0024[] = "Pavilion ze4400 builtin US static const char pci_subsys_10b9_5237_104d_810f[] = "VAIO PCG-U1 USB/OHCI Revision 1.0"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_5237_10b9_5237[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_5237_1849_5237[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif static const char pci_device_10b9_5239[] = "USB 2.0 Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_5239_10b9_5239[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_5239_1849_5239[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif static const char pci_device_10b9_5243[] = "M1541 PCI to AGP Controller"; static const char pci_device_10b9_5246[] = "AGP8X Controller"; static const char pci_device_10b9_5247[] = "PCI to AGP Controller"; @@ -7713,6 +8485,9 @@ static const char pci_device_10b9_5263[] = "ULi 1689,1573 integrated ethernet."; static const char pci_device_10b9_5281[] = "ALi M5281 Serial ATA / RAID Host Controller"; static const char pci_device_10b9_5287[] = "ULi 5287 SATA"; static const char pci_device_10b9_5288[] = "ULi M5288 SATA"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_5288_1043_8056[] = "A8R-MVP Mainboard"; +#endif static const char pci_device_10b9_5289[] = "ULi 5289 SATA"; static const char pci_device_10b9_5450[] = "Lucent Technologies Soft Modem AMR"; static const char pci_device_10b9_5451[] = "M5451 PCI AC-Link Controller Audio Device"; @@ -7720,7 +8495,7 @@ static const char pci_device_10b9_5451[] = "M5451 PCI AC-Link Controller Audio D static const char pci_subsys_10b9_5451_1014_0506[] = "ThinkPad R30"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b9_5451_1014_053e[] = "ThinkPad R40e (2684-HVG) builtin Audio"; +static const char pci_subsys_10b9_5451_1014_053e[] = "ThinkPad R40e"; #endif #endif #ifdef INIT_SUBSYS_INFO @@ -7732,9 +8507,15 @@ static const char pci_subsys_10b9_5451_10b9_5451[] = "HP Compaq nc4010 (DY885AA# #endif static const char pci_device_10b9_5453[] = "M5453 PCI AC-Link Controller Modem Device"; static const char pci_device_10b9_5455[] = "M5455 PCI AC-Link Controller Audio Device"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_5455_10b9_5455[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_5455_1849_0850[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif static const char pci_device_10b9_5457[] = "M5457 AC'97 Modem Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b9_5457_1014_0535[] = "ThinkPad R40e (2684-HVG) builtin modem"; +static const char pci_subsys_10b9_5457_1014_0535[] = "ThinkPad R40e"; #endif #endif #ifdef INIT_SUBSYS_INFO @@ -7751,19 +8532,28 @@ static const char pci_device_10b9_7101[] = "M7101 Power Management Controller [P static const char pci_subsys_10b9_7101_1014_0510[] = "ThinkPad R30"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b9_7101_1014_053c[] = "ThinkPad R40e (2684-HVG) Power Management Controller"; +static const char pci_subsys_10b9_7101_1014_053c[] = "ThinkPad R40e"; #endif #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b9_7101_103c_0024[] = "Pavilion ze4400"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_7101_10b9_7101[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_7101_1849_7101[] = "ASRock 939Dual-SATA2 Motherboard"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10ba[] = "Mitsubishi Electric Corp."; static const char pci_device_10ba_0301[] = "AccelGraphics AccelECLIPSE"; static const char pci_device_10ba_0304[] = "AccelGALAXY A2100 [OEM Evans & Sutherland]"; static const char pci_device_10ba_0308[] = "Tornado 3000 [OEM Evans & Sutherland]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ba_0308_10dd_0024[] = "Tornado 3000"; +#endif static const char pci_device_10ba_1002[] = "VG500 [VolumePro Volume Rendering Accelerator]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -7888,7 +8678,7 @@ static const char pci_subsys_10c8_8005_0e11_b0d1[] = "MagicMedia 256AV Audio Dev static const char pci_subsys_10c8_8005_0e11_b126[] = "MagicMedia 256AV Audio Device on Durango"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10c8_8005_1014_00dd[] = "MagicMedia 256AV Audio Device on BlackTip Thinkpad"; +static const char pci_subsys_10c8_8005_1014_00dd[] = "ThinkPad 390/i1720/i1721"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10c8_8005_1025_1003[] = "MagicMedia 256AV Audio Device on TravelMate 720"; @@ -7946,6 +8736,7 @@ static const char pci_subsys_10cd_1300_1195_1320[] = "Ultra-SCSI CardBus PC Card #endif static const char pci_device_10cd_2300[] = "ABP940-UW"; static const char pci_device_10cd_2500[] = "ABP940-U2W"; +static const char pci_device_10cd_2700[] = "ABP3950-U3W"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10ce[] = "Radius"; @@ -8009,6 +8800,9 @@ static const char pci_device_10dc_10dc[] = "ATT2C15-3 FPGA"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10dd[] = "Evans & Sutherland"; static const char pci_device_10dd_0100[] = "Lightning 1200"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10dd_0100_10dd_0023[] = "Lightning 1200 15+16M"; +#endif #endif static const char pci_vendor_10de[] = "nVidia Corporation"; static const char pci_device_10de_0008[] = "NV1 [EDGE 3D]"; @@ -8191,8 +8985,8 @@ static const char pci_subsys_10de_0029_1102_102f[] = "3D Blaster RIVA TNT2 Ultra #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0029_14af_5820[] = "Maxi Gamer Xentor 32"; #endif -static const char pci_device_10de_002a[] = "NV5 [Riva TnT2]"; -static const char pci_device_10de_002b[] = "NV5 [Riva TnT2]"; +static const char pci_device_10de_002a[] = "NV5 [Riva TNT2]"; +static const char pci_device_10de_002b[] = "NV5 [Riva TNT2]"; static const char pci_device_10de_002c[] = "NV6 [Vanta/Vanta LT]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_002c_1043_0200[] = "AGP-V3800 Combat SDRAM"; @@ -8287,6 +9081,9 @@ static const char pci_device_10de_0050[] = "CK804 ISA Bridge"; static const char pci_subsys_10de_0050_1043_815a[] = "K8N4-E or A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0050_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0050_1458_0c11[] = "GA-K8N Ultra-9 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -8295,12 +9092,18 @@ static const char pci_subsys_10de_0050_1462_7100[] = "MSI K8N Diamond"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0050_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0050_1565_3402[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_0051[] = "CK804 ISA Bridge"; static const char pci_device_10de_0052[] = "CK804 SMBus"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0052_1043_815a[] = "K8N4-E or A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0052_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0052_1458_0c11[] = "GA-K8N Ultra-9 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -8309,11 +9112,17 @@ static const char pci_subsys_10de_0052_1462_7100[] = "MSI K8N Diamond"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0052_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0052_1565_3402[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_0053[] = "CK804 IDE"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0053_1043_815a[] = "K8N4-E or A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0053_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0053_1458_5002[] = "GA-K8N Ultra-9 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -8322,11 +9131,17 @@ static const char pci_subsys_10de_0053_1462_7100[] = "MSI K8N Diamond"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0053_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0053_1565_3402[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_0054[] = "CK804 Serial ATA Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0054_1043_815a[] = "A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0054_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0054_1458_b003[] = "GA-K8N Ultra-9 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -8335,22 +9150,34 @@ static const char pci_subsys_10de_0054_1462_7100[] = "MSI K8N Diamond"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0054_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0054_1565_5401[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_0055[] = "CK804 Serial ATA Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0055_1043_815a[] = "K8N4-E or A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0055_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0055_1458_b003[] = "GA-K8N Ultra-9 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0055_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0055_1565_5401[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_0056[] = "CK804 Ethernet Controller"; static const char pci_device_10de_0057[] = "CK804 Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0057_1043_8141[] = "K8N4-E or A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0057_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0057_1458_e000[] = "GA-K8N Ultra-9 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -8359,19 +9186,31 @@ static const char pci_subsys_10de_0057_1462_7100[] = "MSI K8N Diamond"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0057_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0057_1565_2501[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_0058[] = "CK804 AC'97 Modem"; static const char pci_device_10de_0059[] = "CK804 AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0059_1043_812a[] = "K8N4-E or A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0059_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0059_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0059_1565_8211[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_005a[] = "CK804 USB Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_005a_1043_815a[] = "K8N4-E or A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005a_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_005a_1458_5004[] = "GA-K8N Ultra-9 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -8380,11 +9219,17 @@ static const char pci_subsys_10de_005a_1462_7100[] = "MSI K8N Diamond"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_005a_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005a_1565_3402[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_005b[] = "CK804 USB Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_005b_1043_815a[] = "K8N4-E or A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005b_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_005b_1458_5004[] = "GA-K8N Ultra-9 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -8393,6 +9238,9 @@ static const char pci_subsys_10de_005b_1462_7100[] = "MSI K8N Diamond"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_005b_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005b_1565_3402[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_005c[] = "CK804 PCI Bridge"; static const char pci_device_10de_005d[] = "CK804 PCIE Bridge"; static const char pci_device_10de_005e[] = "CK804 Memory Controller"; @@ -8400,6 +9248,9 @@ static const char pci_device_10de_005e[] = "CK804 Memory Controller"; static const char pci_subsys_10de_005e_1043_815a[] = "A8N-E Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005e_10f1_2865[] = "Tomcat K8E (S2865)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_005e_10f1_2891[] = "Thunder K8SRE Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -8411,6 +9262,9 @@ static const char pci_subsys_10de_005e_1462_7100[] = "MSI K8N Diamond"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_005e_147b_1c1a[] = "KN8-Ultra Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005e_1565_3402[] = "NF4 AM2L Mainboard"; +#endif static const char pci_device_10de_005f[] = "CK804 Memory Controller"; static const char pci_device_10de_0060[] = "nForce2 ISA Bridge"; #ifdef INIT_SUBSYS_INFO @@ -8425,16 +9279,28 @@ static const char pci_subsys_10de_0064_a0a0_03bb[] = "UK79G-1394 motherboard"; #endif static const char pci_device_10de_0065[] = "nForce2 IDE"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0065_10de_0c11[] = "nForce 2 EIDE Controller"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0065_a0a0_03b2[] = "UK79G-1394 motherboard"; #endif static const char pci_device_10de_0066[] = "nForce2 Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0066_1043_80a7[] = "A7N8X Mainboard onboard nForce2 Ethernet"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0066_10de_0c11[] = "nForce MCP-T Networking Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0066_a0a0_03b3[] = "UK79G-1394 motherboard"; +#endif static const char pci_device_10de_0067[] = "nForce2 USB Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0067_1043_0c11[] = "A7N8X Mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0067_a0a0_03b4[] = "UK79G-1394 motherboard"; +#endif static const char pci_device_10de_0068[] = "nForce2 USB Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0068_1043_0c11[] = "A7N8X Mainboard"; @@ -8453,6 +9319,9 @@ static const char pci_device_10de_006b[] = "nForce Audio Processing Unit"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_006b_10de_006b[] = "nForce2 MCP Audio Processing Unit"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_006b_a0a0_0304[] = "UK79G-1394 motherboard"; +#endif static const char pci_device_10de_006c[] = "nForce2 External PCI Bridge"; static const char pci_device_10de_006d[] = "nForce2 PCI Bridge"; static const char pci_device_10de_006e[] = "nForce2 FireWire (IEEE 1394) Controller"; @@ -8491,8 +9360,9 @@ static const char pci_device_10de_0090[] = "G70 [GeForce 7800 GTX]"; static const char pci_device_10de_0091[] = "G70 [GeForce 7800 GTX]"; static const char pci_device_10de_0092[] = "G70 [GeForce 7800 GT]"; static const char pci_device_10de_0093[] = "G70 [GeForce 7800 GS]"; -static const char pci_device_10de_0098[] = "GeForce Go 7800"; -static const char pci_device_10de_0099[] = "GE Force Go 7800 GTX"; +static const char pci_device_10de_0095[] = "GeForce 7800 SLI"; +static const char pci_device_10de_0098[] = "G70 [GeForce Go 7800]"; +static const char pci_device_10de_0099[] = "G70 [GeForce Go 7800 GTX]"; static const char pci_device_10de_009d[] = "G70GL [Quadro FX 4500]"; static const char pci_device_10de_00a0[] = "NV5 [Aladdin TNT2]"; #ifdef INIT_SUBSYS_INFO @@ -8501,7 +9371,7 @@ static const char pci_subsys_10de_00a0_14af_5810[] = "Maxi Gamer Xentor"; static const char pci_device_10de_00c0[] = "NV41 [GeForce 6800 GS]"; static const char pci_device_10de_00c1[] = "NV41.1 [GeForce 6800]"; static const char pci_device_10de_00c2[] = "NV41.2 [GeForce 6800 LE]"; -static const char pci_device_10de_00c3[] = "NV42 [Geforce 6800 XT]"; +static const char pci_device_10de_00c3[] = "NV42 [GeForce 6800 XT]"; static const char pci_device_10de_00c8[] = "NV41.8 [GeForce Go 6800]"; static const char pci_device_10de_00c9[] = "NV41.9 [GeForce Go 6800 Ultra]"; static const char pci_device_10de_00cc[] = "NV41 [Quadro FX Go1400]"; @@ -8524,6 +9394,9 @@ static const char pci_device_10de_00da[] = "nForce3 Audio"; static const char pci_device_10de_00dd[] = "nForce3 PCI Bridge"; static const char pci_device_10de_00df[] = "CK8S Ethernet Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00df_1043_80a7[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00df_105b_0c43[] = "Winfast NF3250K8AA"; #endif #ifdef INIT_SUBSYS_INFO @@ -8531,6 +9404,9 @@ static const char pci_subsys_10de_00df_147b_1c0b[] = "NF8 Mainboard"; #endif static const char pci_device_10de_00e0[] = "nForce3 250Gb LPC Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e0_1043_813f[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00e0_10de_0c11[] = "Winfast NF3250K8AA"; #endif #ifdef INIT_SUBSYS_INFO @@ -8541,6 +9417,9 @@ static const char pci_subsys_10de_00e0_147b_1c0b[] = "NF8 Mainboard"; #endif static const char pci_device_10de_00e1[] = "nForce3 250Gb Host Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e1_1043_813f[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00e1_1462_7030[] = "K8N Neo-FSR v2.0"; #endif #ifdef INIT_SUBSYS_INFO @@ -8549,6 +9428,9 @@ static const char pci_subsys_10de_00e1_147b_1c0b[] = "NF8 Mainboard"; static const char pci_device_10de_00e2[] = "nForce3 250Gb AGP Host to PCI Bridge"; static const char pci_device_10de_00e3[] = "CK8S Serial ATA Controller (v2.5)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e3_1043_813f[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00e3_105b_0c43[] = "Winfast NF3250K8AA"; #endif #ifdef INIT_SUBSYS_INFO @@ -8556,6 +9438,9 @@ static const char pci_subsys_10de_00e3_147b_1c0b[] = "NF8 Mainboard"; #endif static const char pci_device_10de_00e4[] = "nForce 250Gb PCI System Management"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e4_1043_813f[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00e4_105b_0c43[] = "Winfast NF3250K8AA"; #endif #ifdef INIT_SUBSYS_INFO @@ -8566,6 +9451,9 @@ static const char pci_subsys_10de_00e4_147b_1c0b[] = "NF8 Mainboard"; #endif static const char pci_device_10de_00e5[] = "CK8S Parallel ATA Controller (v2.5)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e5_1043_813f[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00e5_105b_0c43[] = "Winfast NF3250K8AA"; #endif #ifdef INIT_SUBSYS_INFO @@ -8577,6 +9465,9 @@ static const char pci_subsys_10de_00e5_147b_1c0b[] = "NF8 Mainboard"; static const char pci_device_10de_00e6[] = "CK8S Ethernet Controller"; static const char pci_device_10de_00e7[] = "CK8S USB Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e7_1043_813f[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00e7_105b_0c43[] = "Winfast NF3250K8AA"; #endif #ifdef INIT_SUBSYS_INFO @@ -8587,6 +9478,9 @@ static const char pci_subsys_10de_00e7_147b_1c0b[] = "NF8 Mainboard"; #endif static const char pci_device_10de_00e8[] = "nForce3 EHCI USB 2.0 Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e8_1043_813f[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00e8_105b_0c43[] = "Winfast NF3250K8AA"; #endif #ifdef INIT_SUBSYS_INFO @@ -8597,6 +9491,9 @@ static const char pci_subsys_10de_00e8_147b_1c0b[] = "NF8 Mainboard"; #endif static const char pci_device_10de_00ea[] = "nForce3 250Gb AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00ea_1043_819d[] = "K8N-E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00ea_105b_0c43[] = "Winfast NF3250K8AA"; #endif #ifdef INIT_SUBSYS_INFO @@ -8630,7 +9527,10 @@ static const char pci_device_10de_00f6[] = "NV43 [GeForce 6800 GS]"; static const char pci_subsys_10de_00f6_1682_217e[] = "XFX GeForce 6800 XTreme 256MB DDR3 AGP"; #endif static const char pci_device_10de_00f8[] = "NV45GL [Quadro FX 3400/4400]"; -static const char pci_device_10de_00f9[] = "NV40 [GeForce 6800 Series GPU]"; +static const char pci_device_10de_00f9[] = "NV45 [GeForce 6800 GTO]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00f9_10de_00f9[] = "NV40 [GeForce 6800 GT]"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00f9_1682_2120[] = "GEFORCE 6800 GT PCI-E"; #endif @@ -8749,6 +9649,9 @@ static const char pci_subsys_10de_0110_14af_7102[] = "3D Prophet II MX"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0110_14af_7103[] = "3D Prophet II MX Dual-Display"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0110_1545_0023[] = "Xtasy Rev. B2"; +#endif static const char pci_device_10de_0111[] = "NV11DDR [GeForce2 MX200]"; static const char pci_device_10de_0112[] = "NV11 [GeForce2 Go]"; static const char pci_device_10de_0113[] = "NV11GL [Quadro2 MXR/EX/Go]"; @@ -8770,7 +9673,7 @@ static const char pci_device_10de_0148[] = "NV43 [GeForce Go 6600]"; static const char pci_device_10de_0149[] = "NV43 [GeForce Go 6600 GT]"; static const char pci_device_10de_014a[] = "Quadro NVS 440"; static const char pci_device_10de_014c[] = "Quadro FX 540 MXM"; -static const char pci_device_10de_014d[] = "NV18GL [Quadro FX 550]"; +static const char pci_device_10de_014d[] = "NV43GL [Quadro FX 550]"; static const char pci_device_10de_014e[] = "NV43GL [Quadro FX 540]"; static const char pci_device_10de_014f[] = "NV43 [GeForce 6200]"; static const char pci_device_10de_0150[] = "NV15 [GeForce2 GTS/Pro]"; @@ -8847,11 +9750,14 @@ static const char pci_device_10de_0176[] = "NV17 [GeForce4 420 Go 32M]"; static const char pci_subsys_10de_0176_103c_08b0[] = "tc1100 tablet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0176_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0176_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif static const char pci_device_10de_0177[] = "NV17 [GeForce4 460 Go]"; static const char pci_device_10de_0178[] = "NV17GL [Quadro4 550 XGL]"; -static const char pci_device_10de_0179[] = "NV17 [GeForce4 420 Go 32M]"; +static const char pci_device_10de_0179[] = "NV17 [GeForce4 440 Go 64M]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0179_10de_0179[] = "GeForce4 MX (Mac)"; #endif @@ -8885,12 +9791,15 @@ static const char pci_device_10de_0185[] = "NV18 [GeForce4 MX 4000]"; static const char pci_device_10de_0186[] = "NV18M [GeForce4 448 Go]"; static const char pci_device_10de_0187[] = "NV18M [GeForce4 488 Go]"; static const char pci_device_10de_0188[] = "NV18GL [Quadro4 580 XGL]"; -static const char pci_device_10de_018a[] = "NV18GL [Quadro NVS with AGP8X]"; +static const char pci_device_10de_018a[] = "NV18GL [Quadro NVS 280 SD]"; static const char pci_device_10de_018b[] = "NV18GL [Quadro4 380 XGL]"; -static const char pci_device_10de_018c[] = "Quadro NVS 50 PCI"; +static const char pci_device_10de_018c[] = "NV18GL [Quadro NVS 50 PCI]"; static const char pci_device_10de_018d[] = "NV18M [GeForce4 448 Go]"; -static const char pci_device_10de_0191[] = "GeForce 8800 GTX (G80)"; +static const char pci_device_10de_0191[] = "G80 [GeForce 8800 GTX]"; static const char pci_device_10de_0193[] = "G80 [GeForce 8800 GTS]"; +static const char pci_device_10de_0194[] = "GeForce 8800 Ultra"; +static const char pci_device_10de_019d[] = "G80 [Quadro FX 5600]"; +static const char pci_device_10de_019e[] = "G80 [Quadro FX 4600]"; static const char pci_device_10de_01a0[] = "NVCrush11 [GeForce2 MX Integrated Graphics]"; static const char pci_device_10de_01a4[] = "nForce CPU bridge"; static const char pci_device_10de_01ab[] = "nForce 420 Memory Controller (DDR)"; @@ -8906,23 +9815,25 @@ static const char pci_device_10de_01bc[] = "nForce IDE"; static const char pci_device_10de_01c1[] = "nForce AC'97 Modem Controller"; static const char pci_device_10de_01c2[] = "nForce USB Controller"; static const char pci_device_10de_01c3[] = "nForce Ethernet Controller"; -static const char pci_device_10de_01d1[] = "GeForce 7300 LE"; +static const char pci_device_10de_01d0[] = "GeForce 7350 LE"; +static const char pci_device_10de_01d1[] = "G72 [GeForce 7300 LE]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_01d1_1462_0345[] = "7300LE PCI Express Graphics Adapter"; #endif -static const char pci_device_10de_01d3[] = "GeForce 7300 SE"; +static const char pci_device_10de_01d3[] = "G72 [GeForce 7300 SE]"; static const char pci_device_10de_01d6[] = "GeForce Go 7200"; static const char pci_device_10de_01d7[] = "G72M [Quadro NVS 110M/GeForce Go 7300]"; static const char pci_device_10de_01d8[] = "G72M [GeForce Go 7400]"; -static const char pci_device_10de_01da[] = "Quadro NVS 110M"; -static const char pci_device_10de_01dc[] = "Quadro FX 350M"; -static const char pci_device_10de_01dd[] = "G72 [Geforce 7500 LE]"; -static const char pci_device_10de_01de[] = "Quadro FX 350"; +static const char pci_device_10de_01da[] = "G72M [Quadro NVS 110M]"; +static const char pci_device_10de_01db[] = "Quadro NVS 120M"; +static const char pci_device_10de_01dc[] = "G72GL [Quadro FX 350M]"; +static const char pci_device_10de_01dd[] = "G72 [GeForce 7500 LE]"; +static const char pci_device_10de_01de[] = "G72GL [Quadro FX 350]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_01de_10de_01dc[] = "Quadro FX Go350M"; #endif static const char pci_device_10de_01df[] = "G71 [GeForce 7300 GS]"; -static const char pci_device_10de_01e0[] = "nForce2 AGP (different version?)"; +static const char pci_device_10de_01e0[] = "nForce2 IGP2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_01e0_147b_1c09[] = "NV7 Motherboard"; #endif @@ -8945,6 +9856,9 @@ static const char pci_subsys_10de_01ed_a0a0_03b9[] = "UK79G-1394 motherboard"; #endif static const char pci_device_10de_01ee[] = "nForce2 Memory Controller 4"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_01ee_10de_01ee[] = "MSI Delta-L nForce2 memory controller"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_01ee_a0a0_03b9[] = "UK79G-1394 motherboard"; #endif static const char pci_device_10de_01ef[] = "nForce2 Memory Controller 5"; @@ -8976,6 +9890,9 @@ static const char pci_device_10de_0212[] = "NV40 [GeForce 6800 LE]"; static const char pci_device_10de_0215[] = "NV40 [GeForce 6800 GT]"; static const char pci_device_10de_0218[] = "NV40 [GeForce 6800 XT]"; static const char pci_device_10de_0221[] = "NV44A [GeForce 6200]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0221_3842_a341[] = "256A8N341DX"; +#endif static const char pci_device_10de_0222[] = "GeForce 6200 A-LE"; static const char pci_device_10de_0240[] = "C51PV [GeForce 6150]"; #ifdef INIT_SUBSYS_INFO @@ -8989,7 +9906,13 @@ static const char pci_device_10de_0242[] = "C51G [GeForce 6100]"; static const char pci_device_10de_0243[] = "C51 PCI Express Bridge"; static const char pci_device_10de_0244[] = "C51 [Geforce 6150 Go]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10de_0244_10de_0244[] = "C51 [Geforce 6150 Go]"; +static const char pci_subsys_10de_0244_103c_30b5[] = "Presario V3242AU"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0244_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0244_10de_0244[] = "GeForce Go 6150"; #endif static const char pci_device_10de_0245[] = "C51 [Quadro NVS 210S/GeForce 6150LE]"; static const char pci_device_10de_0246[] = "C51 PCI Express Bridge"; @@ -9010,6 +9933,12 @@ static const char pci_device_10de_0251[] = "NV25 [GeForce4 Ti 4400]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0251_1043_8023[] = "v8440 GeForce 4 Ti4400"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0251_10de_0251[] = "PNY GeForce4 Ti 4400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0251_1462_8710[] = "PNY GeForce4 Ti 4400"; +#endif static const char pci_device_10de_0252[] = "NV25 [GeForce4 Ti]"; static const char pci_device_10de_0253[] = "NV25 [GeForce4 Ti 4200]"; #ifdef INIT_SUBSYS_INFO @@ -9023,9 +9952,15 @@ static const char pci_device_10de_0259[] = "NV25GL [Quadro4 750 XGL]"; static const char pci_device_10de_025b[] = "NV25GL [Quadro4 700 XGL]"; static const char pci_device_10de_0260[] = "MCP51 LPC Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0260_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0260_1043_81bc[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0260_1458_5001[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0260_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_0261[] = "MCP51 LPC Bridge"; @@ -9033,6 +9968,9 @@ static const char pci_device_10de_0262[] = "MCP51 LPC Bridge"; static const char pci_device_10de_0263[] = "MCP51 LPC Bridge"; static const char pci_device_10de_0264[] = "MCP51 SMBus"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0264_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0264_1043_81bc[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -9040,6 +9978,9 @@ static const char pci_subsys_10de_0264_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_0265[] = "MCP51 IDE"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0265_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0265_1043_81bc[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -9047,6 +9988,9 @@ static const char pci_subsys_10de_0265_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_0266[] = "MCP51 Serial ATA Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0266_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0266_1043_81bc[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -9062,6 +10006,9 @@ static const char pci_subsys_10de_0267_1462_7207[] = "K8NGM2 series"; static const char pci_device_10de_0268[] = "MCP51 Ethernet Controller"; static const char pci_device_10de_0269[] = "MCP51 Ethernet Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0269_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0269_1043_8141[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -9071,6 +10018,12 @@ static const char pci_device_10de_026a[] = "MCP51 MCI"; static const char pci_device_10de_026b[] = "MCP51 AC97 Audio Controller"; static const char pci_device_10de_026c[] = "MCP51 High Definition Audio"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_026c_103c_30b5[] = "Presario V3242AU"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_026c_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_026c_10de_cb84[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -9078,6 +10031,9 @@ static const char pci_subsys_10de_026c_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_026d[] = "MCP51 USB Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_026d_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_026d_1043_81bc[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -9085,33 +10041,63 @@ static const char pci_subsys_10de_026d_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_026e[] = "MCP51 USB Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_026e_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_026e_1043_81bc[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_026e_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_026f[] = "MCP51 PCI Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_026f_103c_30b7[] = "Presario V6133CL"; +#endif static const char pci_device_10de_0270[] = "MCP51 Host Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0270_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0270_1043_81bc[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0270_1458_5001[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0270_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_0271[] = "MCP51 PMU"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0271_103c_30b5[] = "Presario V3242AU"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0271_103c_30b7[] = "Presario V6133CL"; +#endif static const char pci_device_10de_0272[] = "MCP51 Memory Controller 0"; static const char pci_device_10de_027e[] = "C51 Memory Controller 2"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_027e_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_027e_1043_81cd[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_027e_1458_5000[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_027e_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_027f[] = "C51 Memory Controller 3"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_027f_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_027f_1043_81cd[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_027f_1458_5000[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_027f_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_0280[] = "NV28 [GeForce4 Ti 4800]"; @@ -9131,29 +10117,52 @@ static const char pci_device_10de_0293[] = "G71 [GeForce 7900 GX2]"; static const char pci_device_10de_0294[] = "G71 [GeForce 7950 GX2]"; static const char pci_device_10de_0295[] = "G71 [GeForce 7950 GT]"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0295_1043_8225[] = "GeForce 7950 GT"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0295_107d_2a68[] = "WinFast PX7950GT TDH"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0295_1462_0663[] = "NX7950GT-VT2D512EZ-HD"; +#endif static const char pci_device_10de_0297[] = "GeForce Go 7950 GTX"; static const char pci_device_10de_0298[] = "GeForce Go 7900 GS"; static const char pci_device_10de_0299[] = "GeForce Go 7900 GTX"; static const char pci_device_10de_029a[] = "G71 [Quadro FX 2500M]"; static const char pci_device_10de_029b[] = "G71 [Quadro FX 1500M]"; -static const char pci_device_10de_029c[] = "Quadro FX 5500"; -static const char pci_device_10de_029d[] = "Quadro FX 3500"; -static const char pci_device_10de_029e[] = "Quadro FX 1500"; -static const char pci_device_10de_029f[] = "Quadro FX 4500 X2"; +static const char pci_device_10de_029c[] = "G71 [Quadro FX 5500]"; +static const char pci_device_10de_029d[] = "G71GL [Quadro FX 3500]"; +static const char pci_device_10de_029e[] = "G71 [Quadro FX 1500]"; +static const char pci_device_10de_029f[] = "G70 [Quadro FX 4500 X2]"; static const char pci_device_10de_02a0[] = "NV2A [XGPU]"; static const char pci_device_10de_02e0[] = "GeForce 7600 GT"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02e0_02e0_2249[] = "GF 7600GT 560M 256MB DDR3 DUAL DVI TV"; +#endif static const char pci_device_10de_02e1[] = "G73 [GeForce 7600 GS]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02e1_1682_222b[] = "PV-T73K-UAL3 (256MB)"; +#endif static const char pci_device_10de_02e2[] = "GeForce 7300 GT"; +static const char pci_device_10de_02e3[] = "GeForce 7900 GS"; +static const char pci_device_10de_02e4[] = "GeForce 7950 GT AGP"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02e4_1682_2271[] = "PV-T71A-YDF7 (512MB)"; +#endif static const char pci_device_10de_02f0[] = "C51 Host Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02f0_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02f0_1043_81cd[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02f0_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_02f1[] = "C51 Host Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02f1_1458_5000[] = "GA-M55plus-S3G"; +#endif static const char pci_device_10de_02f2[] = "C51 Host Bridge"; static const char pci_device_10de_02f3[] = "C51 Host Bridge"; static const char pci_device_10de_02f4[] = "C51 Host Bridge"; @@ -9162,40 +10171,76 @@ static const char pci_device_10de_02f6[] = "C51 Host Bridge"; static const char pci_device_10de_02f7[] = "C51 Host Bridge"; static const char pci_device_10de_02f8[] = "C51 Memory Controller 5"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02f8_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02f8_1043_81cd[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02f8_1458_5000[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02f8_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_02f9[] = "C51 Memory Controller 4"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02f9_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02f9_1043_81cd[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02f9_1458_5000[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02f9_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_02fa[] = "C51 Memory Controller 0"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02fa_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02fa_1043_81cd[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02fa_1458_5000[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02fa_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_02fb[] = "C51 PCI Express Bridge"; static const char pci_device_10de_02fc[] = "C51 PCI Express Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02fc_103c_30b7[] = "Presario V6133CL"; +#endif static const char pci_device_10de_02fd[] = "C51 PCI Express Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02fd_103c_30b7[] = "Presario V6133CL"; +#endif static const char pci_device_10de_02fe[] = "C51 Memory Controller 1"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02fe_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02fe_1043_81cd[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02fe_1458_5000[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02fe_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_02ff[] = "C51 Host Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02ff_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02ff_1043_81cd[] = "A8N-VM CSM Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_02ff_1458_5000[] = "GA-M55plus-S3G"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_02ff_1462_7207[] = "K8NGM2 series"; #endif static const char pci_device_10de_0300[] = "NV30 [GeForce FX]"; @@ -9214,7 +10259,7 @@ static const char pci_device_10de_0316[] = "NV31M"; static const char pci_device_10de_0317[] = "NV31M Pro"; static const char pci_device_10de_031a[] = "NV31M [GeForce FX Go5600]"; static const char pci_device_10de_031b[] = "NV31M [GeForce FX Go5650]"; -static const char pci_device_10de_031c[] = "NVIDIA Quadro FX Go700"; +static const char pci_device_10de_031c[] = "Quadro FX Go700"; static const char pci_device_10de_031d[] = "NV31GLM"; static const char pci_device_10de_031e[] = "NV31GLM Pro"; static const char pci_device_10de_031f[] = "NV31GLM Pro"; @@ -9225,6 +10270,9 @@ static const char pci_device_10de_0322[] = "NV34 [GeForce FX 5200]"; static const char pci_subsys_10de_0322_1043_02fb[] = "V9250 Magic"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0322_1462_9110[] = "MS-8911 (FX5200-TD128)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0322_1462_9171[] = "MS-8917 (FX5200-T128)"; #endif #ifdef INIT_SUBSYS_INFO @@ -9236,19 +10284,34 @@ static const char pci_device_10de_0324[] = "NV34M [GeForce FX Go5200 64M]"; static const char pci_subsys_10de_0324_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0324_103c_006a[] = "Pavillon ZD7000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0324_1071_8160[] = "MIM2000"; #endif static const char pci_device_10de_0325[] = "NV34M [GeForce FX Go5250]"; static const char pci_device_10de_0326[] = "NV34 [GeForce FX 5500]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0326_1458_310d[] = "GeForce FX 5500 128 MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0326_1682_2034[] = "GeForce 5500 256 MB"; +#endif static const char pci_device_10de_0327[] = "NV34 [GeForce FX 5100]"; static const char pci_device_10de_0328[] = "NV34M [GeForce FX Go5200 32M/64M]"; static const char pci_device_10de_0329[] = "NV34M [GeForce FX Go5200]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0329_10de_0010[] = "Powerbook G4"; +#endif static const char pci_device_10de_032a[] = "NV34GL [Quadro NVS 280 PCI]"; static const char pci_device_10de_032b[] = "NV34GL [Quadro FX 500/600 PCI]"; static const char pci_device_10de_032c[] = "NV34GLM [GeForce FX Go 5300]"; static const char pci_device_10de_032d[] = "NV34 [GeForce FX Go5100]"; static const char pci_device_10de_032f[] = "NV34GL"; static const char pci_device_10de_0330[] = "NV35 [GeForce FX 5900 Ultra]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0330_1043_8137[] = "V9950 Ultra / 256 MB"; +#endif static const char pci_device_10de_0331[] = "NV35 [GeForce FX 5900]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0331_1043_8145[] = "V9950GE"; @@ -9259,6 +10322,9 @@ static const char pci_device_10de_0334[] = "NV35 [GeForce FX 5900ZT]"; static const char pci_device_10de_0338[] = "NV35GL [Quadro FX 3000]"; static const char pci_device_10de_033f[] = "NV35GL [Quadro FX 700]"; static const char pci_device_10de_0341[] = "NV36.1 [GeForce FX 5700 Ultra]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0341_1462_9380[] = "MS-8938 (FX5700U-TD128)"; +#endif static const char pci_device_10de_0342[] = "NV36.2 [GeForce FX 5700]"; static const char pci_device_10de_0343[] = "NV36 [GeForce FX 5700LE]"; static const char pci_device_10de_0344[] = "NV36.4 [GeForce FX 5700VE]"; @@ -9276,30 +10342,55 @@ static const char pci_device_10de_034f[] = "NV36GL"; static const char pci_device_10de_0360[] = "MCP55 LPC Bridge"; static const char pci_device_10de_0361[] = "MCP55 LPC Bridge"; static const char pci_device_10de_0362[] = "MCP55 LPC Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0362_147b_12c4[] = "KN9-Ultra Mainboard"; +#endif static const char pci_device_10de_0363[] = "MCP55 LPC Bridge"; static const char pci_device_10de_0364[] = "MCP55 LPC Bridge"; static const char pci_device_10de_0365[] = "MCP55 LPC Bridge"; static const char pci_device_10de_0366[] = "MCP55 LPC Bridge"; static const char pci_device_10de_0367[] = "MCP55 LPC Bridge"; static const char pci_device_10de_0368[] = "MCP55 SMBus"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0368_147b_12c4[] = "KN9-Ultra Mainboard"; +#endif static const char pci_device_10de_0369[] = "MCP55 Memory Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0369_147b_12c4[] = "KN9-Ultra Mainboard"; +#endif static const char pci_device_10de_036a[] = "MCP55 Memory Controller"; static const char pci_device_10de_036b[] = "MCP55 SMU"; static const char pci_device_10de_036c[] = "MCP55 USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_036c_147b_12c4[] = "KN9-Ultra Mainboard"; +#endif static const char pci_device_10de_036d[] = "MCP55 USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_036d_147b_12c4[] = "KN9-Ultra Mainboard"; +#endif static const char pci_device_10de_036e[] = "MCP55 IDE"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_036e_147b_12c4[] = "KN9-Ultra Mainboard"; +#endif static const char pci_device_10de_0370[] = "MCP55 PCI bridge"; static const char pci_device_10de_0371[] = "MCP55 High Definition Audio"; static const char pci_device_10de_0372[] = "MCP55 Ethernet"; static const char pci_device_10de_0373[] = "MCP55 Ethernet"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0373_147b_12c4[] = "KN9-Ultra Mainboard"; +#endif static const char pci_device_10de_0374[] = "MCP55 PCI Express bridge"; static const char pci_device_10de_0375[] = "MCP55 PCI Express bridge"; static const char pci_device_10de_0376[] = "MCP55 PCI Express bridge"; static const char pci_device_10de_0377[] = "MCP55 PCI Express bridge"; static const char pci_device_10de_0378[] = "MCP55 PCI Express bridge"; static const char pci_device_10de_037a[] = "MCP55 Memory Controller"; +static const char pci_device_10de_037c[] = "G70 [GeForce 7800 GS] (rev a2)"; static const char pci_device_10de_037e[] = "MCP55 SATA Controller"; static const char pci_device_10de_037f[] = "MCP55 SATA Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_037f_147b_12c4[] = "KN9-Ultra Mainboard"; +#endif static const char pci_device_10de_0390[] = "GeForce 7650 GS"; static const char pci_device_10de_0391[] = "G70 [GeForce 7600 GT]"; #ifdef INIT_SUBSYS_INFO @@ -9310,13 +10401,26 @@ static const char pci_device_10de_0392[] = "G70 [GeForce 7600 GS]"; static const char pci_subsys_10de_0392_1462_0622[] = "NX7600GS-T2D256EH"; #endif static const char pci_device_10de_0393[] = "G70 [GeForce 7300 GT]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0393_10de_0412[] = "NX7300GT-TD256EH"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0393_1462_0412[] = "NX7300GT-TD256EH"; +#endif static const char pci_device_10de_0394[] = "G70 [GeForce 7600 LE]"; static const char pci_device_10de_0395[] = "G70 [GeForce 7300 GT]"; static const char pci_device_10de_0397[] = "GeForce Go 7700"; static const char pci_device_10de_0398[] = "G70 [GeForce Go 7600]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0398_1025_006c[] = "Acer 9814 WKMI"; +#endif +static const char pci_device_10de_0399[] = "GeForce Go 7600 GT"; static const char pci_device_10de_039b[] = "GeForce Go 7900 SE"; static const char pci_device_10de_039c[] = "Quadro FX 550M"; -static const char pci_device_10de_039e[] = "Quadro FX 560"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_039c_10de_039c[] = "Quadro FX 560M"; +#endif +static const char pci_device_10de_039e[] = "G73GL [Quadro FX 560]"; static const char pci_device_10de_03a0[] = "C55 Host Bridge"; static const char pci_device_10de_03a1[] = "C55 Host Bridge"; static const char pci_device_10de_03a2[] = "C55 Host Bridge"; @@ -9345,11 +10449,15 @@ static const char pci_device_10de_03b8[] = "C55 PCI Express bridge"; static const char pci_device_10de_03b9[] = "C55 PCI Express bridge"; static const char pci_device_10de_03ba[] = "C55 Memory Controller"; static const char pci_device_10de_03bb[] = "C55 PCI Express bridge"; +static const char pci_device_10de_03bc[] = "C55 Memory Controller"; static const char pci_device_10de_03d0[] = "GeForce 6100 nForce 430"; static const char pci_device_10de_03d1[] = "GeForce 6100 nForce 405"; static const char pci_device_10de_03d2[] = "GeForce 6100 nForce 400"; static const char pci_device_10de_03d5[] = "GeForce 6100 nForce 420"; static const char pci_device_10de_03e0[] = "MCP61 LPC Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03e0_1849_03e0[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03e1[] = "MCP61 LPC Bridge"; static const char pci_device_10de_03e2[] = "MCP61 LPC Bridge"; static const char pci_device_10de_03e3[] = "MCP61 LPC Bridge"; @@ -9358,20 +10466,81 @@ static const char pci_device_10de_03e5[] = "MCP61 Ethernet"; static const char pci_device_10de_03e6[] = "MCP61 Ethernet"; static const char pci_device_10de_03e7[] = "MCP61 SATA Controller"; static const char pci_device_10de_03e8[] = "MCP61 PCI Express bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03e8_1849_03e8[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03e9[] = "MCP61 PCI Express bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03e9_1849_03e9[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03ea[] = "MCP61 Memory Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03ea_1849_03ea[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03eb[] = "MCP61 SMBus"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03eb_1849_03eb[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03ec[] = "MCP61 IDE"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03ec_1849_03ec[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03ee[] = "MCP61 Ethernet"; static const char pci_device_10de_03ef[] = "MCP61 Ethernet"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03ef_1849_03ef[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03f0[] = "MCP61 High Definition Audio"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03f0_1849_0888[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03f1[] = "MCP61 USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03f1_1849_03f1[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03f2[] = "MCP61 USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03f2_1849_03f2[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03f3[] = "MCP61 PCI bridge"; static const char pci_device_10de_03f4[] = "MCP61 SMU"; static const char pci_device_10de_03f5[] = "MCP61 Memory Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03f5_1849_03eb[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03f6[] = "MCP61 SATA Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_03f6_1849_03f6[] = "939NF6G-VSTA Board"; +#endif static const char pci_device_10de_03f7[] = "MCP61 SATA Controller"; +static const char pci_device_10de_0400[] = "GeForce 8600 GTS"; +static const char pci_device_10de_0402[] = "GeForce 8600 GT"; +static const char pci_device_10de_0403[] = "GeForce 8600 GS"; +static const char pci_device_10de_0404[] = "GeForce 8400 GS"; +static const char pci_device_10de_0407[] = "GeForce 8600M GT"; +static const char pci_device_10de_0409[] = "GeForce 8700M GT"; +static const char pci_device_10de_040a[] = "Quadro FX 370"; +static const char pci_device_10de_040b[] = "Quadro NVS 320M"; +static const char pci_device_10de_040c[] = "Quadro FX 570M"; +static const char pci_device_10de_040d[] = "Quadro FX 1600M"; +static const char pci_device_10de_040e[] = "Quadro FX 570"; +static const char pci_device_10de_040f[] = "Quadro FX 1700"; +static const char pci_device_10de_0420[] = "GeForce 8400 SE"; +static const char pci_device_10de_0421[] = "GeForce 8500 GT"; +static const char pci_device_10de_0422[] = "GeForce 8400 GS"; +static const char pci_device_10de_0423[] = "GeForce 8300 GS"; +static const char pci_device_10de_0425[] = "GeForce 8600M GS"; +static const char pci_device_10de_0426[] = "G86M [GeForce 8400M GT]"; +static const char pci_device_10de_0427[] = "GeForce 8400M GS"; +static const char pci_device_10de_0428[] = "GeForce 8400M G"; +static const char pci_device_10de_0429[] = "Quadro NVS 140M"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0429_17aa_20d8[] = "ThinkPad T61"; +#endif +static const char pci_device_10de_042a[] = "Quadro NVS 130M"; +static const char pci_device_10de_042b[] = "Quadro NVS 135M"; +static const char pci_device_10de_042d[] = "Quadro FX 360M"; +static const char pci_device_10de_042f[] = "Quadro NVS 290"; static const char pci_device_10de_0440[] = "MCP65 LPC Bridge"; static const char pci_device_10de_0441[] = "MCP65 LPC Bridge"; static const char pci_device_10de_0442[] = "MCP65 LPC Bridge"; @@ -9403,9 +10572,70 @@ static const char pci_device_10de_045c[] = "MCP65 SATA Controller"; static const char pci_device_10de_045d[] = "MCP65 SATA Controller"; static const char pci_device_10de_045e[] = "MCP65 SATA Controller"; static const char pci_device_10de_045f[] = "MCP65 SATA Controller"; +static const char pci_device_10de_0531[] = "GeForce 7150M"; +static const char pci_device_10de_0533[] = "GeForce 7000M (rev a2)"; +static const char pci_device_10de_053a[] = "GeForce 7050 PV / nForce 630a"; +static const char pci_device_10de_053b[] = "GeForce 7050 PV / nForce 630a"; +static const char pci_device_10de_053e[] = "GeForce 7025"; +static const char pci_device_10de_0541[] = "MCP67 Memory Controller"; +static const char pci_device_10de_0542[] = "MCP67 SMBus"; +static const char pci_device_10de_0543[] = "MCP67 Co-processor"; +static const char pci_device_10de_0547[] = "MCP67 Memory Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0547_1849_0547[] = "ALiveNF7G-HDready"; +#endif +static const char pci_device_10de_0548[] = "MCP67 ISA Bridge"; +static const char pci_device_10de_054c[] = "MCP67 Ethernet"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_054c_1849_054c[] = "ALiveNF7G-HDready, MCP67 Gigabit Ethernet"; +#endif +static const char pci_device_10de_0550[] = "MCP67 AHCI Controller"; +static const char pci_device_10de_0554[] = "MCP67 AHCI Controller"; +static const char pci_device_10de_0555[] = "MCP67 SATA Controller"; +static const char pci_device_10de_055c[] = "MCP67 High Definition Audio"; +static const char pci_device_10de_055d[] = "MCP67 High Definition Audio"; +static const char pci_device_10de_055e[] = "MCP67 OHCI USB 1.1 Controller"; +static const char pci_device_10de_055f[] = "MCP67 EHCI USB 2.0 Controller"; +static const char pci_device_10de_0560[] = "MCP67 IDE Controller"; +static const char pci_device_10de_0561[] = "MCP67 PCI Bridge"; +static const char pci_device_10de_0562[] = "MCP67 PCI Express Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0562_1849_0562[] = "ALiveNF7G-HDready"; +#endif +static const char pci_device_10de_0563[] = "MCP67 PCI Express Bridge"; +static const char pci_device_10de_056a[] = "GeForce 7100/nForce 630i"; +static const char pci_device_10de_0600[] = "GeForce 8800 GTS 512"; +static const char pci_device_10de_0606[] = "GeForce 8800 GS"; +static const char pci_device_10de_0609[] = "GeForce 8800M GTS"; +static const char pci_device_10de_060c[] = "GeForce 8800M GTX"; +static const char pci_device_10de_0611[] = "GeForce 8800 GT"; +static const char pci_device_10de_061a[] = "Quadro FX 3700"; +static const char pci_device_10de_0622[] = "Geforce 9600 GT 512mb"; +static const char pci_device_10de_07cb[] = "nForce 630i memory controller"; +static const char pci_device_10de_07cd[] = "nForce 630i memory controller"; +static const char pci_device_10de_07ce[] = "nForce 630i memory controller"; +static const char pci_device_10de_07cf[] = "nForce 630i memory controller"; +static const char pci_device_10de_07d0[] = "nForce 630i memory controller"; +static const char pci_device_10de_07d1[] = "nForce 630i memory controller"; +static const char pci_device_10de_07d2[] = "nForce 630i memory controller"; +static const char pci_device_10de_07d3[] = "nForce 630i memory controller"; +static const char pci_device_10de_07d6[] = "nForce 630i memory controller"; +static const char pci_device_10de_07dc[] = "MCP73 Ethernet"; +static const char pci_device_10de_07e1[] = "GeForce 7100/nForce 630i"; +static const char pci_device_10de_07e3[] = "GeForce 7050/nForce 610i"; +static const char pci_device_10de_07f4[] = "GeForce 7100/nForce 630i"; +static const char pci_device_10de_07fc[] = "MCP73 High Definition Audio"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_07fc_10de_07fc[] = "MCP73 High Definition Audio"; +#endif +static const char pci_device_10de_07fe[] = "GeForce 7100/nForce 630i"; +static const char pci_device_10de_0849[] = "GeForce 8200"; +static const char pci_device_10de_c615[] = "G70 [GeForce 7600 GT]"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10df[] = "Emulex Corporation"; static const char pci_device_10df_1ae5[] = "LP6000 Fibre Channel Host Adapter"; +static const char pci_device_10df_f011[] = "Saturn: LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f015[] = "Saturn: LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_f085[] = "LP850 Fibre Channel Host Adapter"; static const char pci_device_10df_f095[] = "LP952 Fibre Channel Host Adapter"; static const char pci_device_10df_f098[] = "LP982 Fibre Channel Host Adapter"; @@ -9417,6 +10647,7 @@ static const char pci_device_10df_f0d5[] = "Helios LightPulse Fibre Channel Host static const char pci_device_10df_f0e1[] = "Zephyr LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_f0e5[] = "Zephyr LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_f0f5[] = "Neptune LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f100[] = "Saturn-X: LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_f700[] = "LP7000 Fibre Channel Host Adapter"; static const char pci_device_10df_f701[] = "LP7000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)"; static const char pci_device_10df_f800[] = "LP8000 Fibre Channel Host Adapter"; @@ -9431,8 +10662,10 @@ static const char pci_device_10df_fb00[] = "Viper LightPulse Fibre Channel Host static const char pci_device_10df_fc00[] = "Thor-X LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_fc10[] = "Helios-X LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_fc20[] = "Zephyr-X LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_fc40[] = "Saturn-X: LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_fd00[] = "Helios-X LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_fe00[] = "Zephyr-X LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_fe05[] = "Zephyr-X: LightPulse FCoE Adapter"; static const char pci_device_10df_ff00[] = "Neptune LightPulse Fibre Channel Host Adapter"; #endif static const char pci_vendor_10e0[] = "Integrated Micro Solutions Inc."; @@ -9459,6 +10692,9 @@ static const char pci_vendor_10e3[] = "Tundra Semiconductor Corp."; static const char pci_device_10e3_0000[] = "CA91C042 [Universe]"; static const char pci_device_10e3_0108[] = "Tsi108 Host Bridge for Single PowerPC"; static const char pci_device_10e3_0148[] = "Tsi148 [Tempe]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10e3_0148_1775_1100[] = "VR11 Single Board Computer"; +#endif static const char pci_device_10e3_0860[] = "CA91C860 [QSpan]"; static const char pci_device_10e3_0862[] = "CA91C862A [QSpan-II]"; static const char pci_device_10e3_8260[] = "CA91L8200B [Dual PCI PowerSpan II]"; @@ -9534,6 +10770,7 @@ static const char pci_vendor_10ec[] = "Realtek Semiconductor Co., Ltd."; static const char pci_device_10ec_0139[] = "Zonet Zen3200"; static const char pci_device_10ec_0260[] = "Realtek 260 High Definition Audio"; static const char pci_device_10ec_0261[] = "Realtek 261 High Definition Audio"; +static const char pci_device_10ec_0262[] = "Realtek 262 High Definition Audio"; static const char pci_device_10ec_0280[] = "Realtek 280 High Definition Audio"; static const char pci_device_10ec_0861[] = "Realtek 861 High Definition Audio"; static const char pci_device_10ec_0862[] = "Realtek 862 High Definition Audio"; @@ -9565,6 +10802,9 @@ static const char pci_device_10ec_8129[] = "RTL-8129"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8129_10ec_8129[] = "RT8129 Fast Ethernet Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8129_11ec_8129[] = "RT8129 Fast Ethernet Adapter"; +#endif static const char pci_device_10ec_8136[] = "RTL8101E PCI Express Fast Ethernet controller"; static const char pci_device_10ec_8138[] = "RT8139 (B/C) Cardbus Fast Ethernet Adapter"; #ifdef INIT_SUBSYS_INFO @@ -9649,6 +10889,9 @@ static const char pci_subsys_10ec_8139_144d_c00c[] = "P30/P35 notebook"; static const char pci_subsys_10ec_8139_1458_e000[] = "GA-7VM400M/7VT600 Motherboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8139_1462_217c[] = "Aspire L250"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8139_1462_788c[] = "865PE Neo2-V Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -9670,6 +10913,9 @@ static const char pci_subsys_10ec_8139_149c_8139[] = "LFE-8139TX"; static const char pci_subsys_10ec_8139_14cb_0200[] = "LNR-100 Family 10/100 Base-TX Ethernet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8139_1565_2300[] = "P4TSV Onboard LAN (RTL8100B)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8139_1695_9001[] = "Onboard RTL8101L 10/100 MBit"; #endif #ifdef INIT_SUBSYS_INFO @@ -9694,6 +10940,9 @@ static const char pci_device_10ec_8167[] = "RTL-8110SC/8169SC Gigabit Ethernet"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8167_1462_235c[] = "P965 Neo MS-7235 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8167_1462_236c[] = "945P Neo3-F motherboard"; +#endif static const char pci_device_10ec_8168[] = "RTL8111/8168B PCI Express Gigabit Ethernet controller"; static const char pci_device_10ec_8169[] = "RTL-8169 Gigabit Ethernet"; #endif @@ -9716,6 +10965,15 @@ static const char pci_subsys_10ec_8169_1462_030c[] = "K8N Neo-FSR v2.0 mainboard #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8169_1462_702c[] = "K8T NEO 2 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8169_1462_7094[] = "K8T Neo2-F V2.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8169_1734_1091[] = "D2030-A1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8169_a0a0_0449[] = "AK86-L motherboard"; +#endif static const char pci_device_10ec_8180[] = "RTL8180L 802.11b MAC"; static const char pci_device_10ec_8185[] = "RTL-8185 IEEE 802.11a/b/g Wireless LAN Controller"; static const char pci_device_10ec_8197[] = "SmartLAN56 56K Modem"; @@ -9738,8 +10996,12 @@ static const char pci_device_10ee_3fc3[] = "RME Digi96/8 Pad"; static const char pci_device_10ee_3fc4[] = "RME Digi9652 (Hammerfall)"; static const char pci_device_10ee_3fc5[] = "RME Hammerfall DSP"; static const char pci_device_10ee_3fc6[] = "RME Hammerfall DSP MADI"; +static const char pci_device_10ee_8380[] = "Ellips ProfiXpress Profibus Master"; static const char pci_device_10ee_8381[] = "Ellips Santos Frame Grabber"; static const char pci_device_10ee_d154[] = "Copley Controls CAN card (PCI-CAN-02)"; +static const char pci_device_10ee_ebf0[] = "SED Systems Modulator/Demodulator"; +static const char pci_device_10ee_ebf1[] = "SED Systems Audio Interface Card"; +static const char pci_device_10ee_ebf2[] = "SED Systems Common PCI Interface"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10ef[] = "Racore Computer Products, Inc."; @@ -9804,13 +11066,14 @@ static const char pci_vendor_1100[] = "Jazz Multimedia"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1101[] = "Initio Corporation"; +static const char pci_device_1101_0002[] = "INI-920 Ultra SCSI Adapter"; static const char pci_device_1101_1060[] = "INI-A100U2W"; static const char pci_device_1101_1622[] = "INI-1623 PCI SATA-II Controller"; static const char pci_device_1101_9100[] = "INI-9100/9100W"; -static const char pci_device_1101_9400[] = "INI-940"; -static const char pci_device_1101_9401[] = "INI-950"; -static const char pci_device_1101_9500[] = "360P"; -static const char pci_device_1101_9502[] = "Initio INI-9100UW Ultra Wide SCSI Controller INIC-950P chip"; +static const char pci_device_1101_9400[] = "INI-940 Fast Wide SCSI Adapter"; +static const char pci_device_1101_9401[] = "INI-935 Fast Wide SCSI Adapter"; +static const char pci_device_1101_9500[] = "INI-950 SCSI Adapter"; +static const char pci_device_1101_9502[] = "INI-950P Ultra Wide SCSI Adapter"; #endif static const char pci_vendor_1102[] = "Creative Labs"; static const char pci_device_1102_0002[] = "SB Live! EMU10k1"; @@ -9915,12 +11178,19 @@ static const char pci_subsys_1102_0007_1102_1002[] = "SB0312 Audigy LS"; static const char pci_subsys_1102_0007_1102_1006[] = "SB0410 SBLive! 24-bit"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_0007_1102_1012[] = "SB0790 X-Fi XA"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_0007_1462_1009[] = "K8N Diamond"; #endif static const char pci_device_1102_0008[] = "SB0400 Audigy2 Value"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_0008_1102_0008[] = "EMU0404 Digital Audio System"; #endif +static const char pci_device_1102_0009[] = "[SB X-Fi Xtreme Audio] CA0110-IBG"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_0009_1102_0010[] = "[SB X-Fi Xtreme Audio] CA0110-IBG"; +#endif static const char pci_device_1102_4001[] = "SB Audigy FireWire Port"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_4001_1102_0010[] = "SB Audigy FireWire Port"; @@ -9989,16 +11259,13 @@ static const char pci_subsys_1102_8938_156d_b795[] = "G795 (AlphaTop (Taiwan))" static const char pci_subsys_1102_8938_156d_b797[] = "G797 (AlphaTop (Taiwan))"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1103[] = "Triones Technologies, Inc."; +static const char pci_vendor_1103[] = "HighPoint Technologies, Inc."; static const char pci_device_1103_0003[] = "HPT343/345/346/363"; static const char pci_device_1103_0004[] = "HPT366/368/370/370A/372/372N"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1103_0004_1103_0001[] = "HPT370A"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1103_0004_1103_0003[] = "HPT343 / HPT345 / HPT363 UDMA33"; -#endif -#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1103_0004_1103_0004[] = "HPT366 UDMA66 (r1) / HPT368 UDMA66 (r2) / HPT370 UDMA100 (r3) / HPT370 UDMA100 RAID (r4)"; #endif #ifdef INIT_SUBSYS_INFO @@ -10012,6 +11279,15 @@ static const char pci_device_1103_0006[] = "HPT302/302N"; static const char pci_device_1103_0007[] = "HPT371/371N"; static const char pci_device_1103_0008[] = "HPT374"; static const char pci_device_1103_0009[] = "HPT372N"; +static const char pci_device_1103_1740[] = "RocketRAID 1740"; +static const char pci_device_1103_1742[] = "RocketRAID 1742"; +static const char pci_device_1103_2300[] = "RocketRAID 230x 4 Port SATA-II Controller"; +static const char pci_device_1103_2310[] = "RocketRAID 2310 4 Port SATA-II Controller"; +static const char pci_device_1103_2320[] = "RocketRAID 2320 SATA-II Controller"; +static const char pci_device_1103_2322[] = "RocketRAID 2322 SATA-II Controller"; +static const char pci_device_1103_2340[] = "RocketRAID 2340 16 Port SATA-II Controller"; +static const char pci_device_1103_3220[] = "RocketRAID 3220"; +static const char pci_device_1103_3320[] = "RocketRAID 3320"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1104[] = "RasterOps Corp."; @@ -10034,6 +11310,7 @@ static const char pci_subsys_1105_8476_127d_0000[] = "CineView II"; #endif static const char pci_device_1105_8485[] = "EM8485 REALmagic DVD/MPEG-4 A/V Decoder"; static const char pci_device_1105_8486[] = "EM8486 REALmagic DVD/MPEG-4 A/V Decoder"; +static const char pci_device_1105_c622[] = "EM8622L MPEG-4.10 (H.264) and SMPTE 421M (VC-1) A/V Decoder"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1106[] = "VIA Technologies, Inc."; @@ -10119,6 +11396,12 @@ static const char pci_subsys_1106_0571_1458_5002[] = "GA-7VAX Mainboard"; static const char pci_subsys_1106_0571_1462_7020[] = "K8T NEO 2 motherboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_0571_1462_7094[] = "K8T Neo2-F V2.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_0571_1462_7181[] = "K8MM3-V mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_0571_147b_1407[] = "KV8-MAX3 motherboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -10213,6 +11496,7 @@ static const char pci_device_1106_1351[] = "VT3351 Host Bridge"; static const char pci_device_1106_1364[] = "P4M900 Host Bridge"; static const char pci_device_1106_1571[] = "VT82C576M/VT82C586"; static const char pci_device_1106_1595[] = "VT82C595/97 [Apollo VP2/97]"; +static const char pci_device_1106_2106[] = "VIA Rhine Family Fast Ethernet Adapter (VT6105)"; static const char pci_device_1106_2204[] = "K8M800 Host Bridge"; static const char pci_device_1106_2208[] = "PT890 Host Bridge"; static const char pci_device_1106_2238[] = "K8T890 Host Bridge"; @@ -10239,7 +11523,7 @@ static const char pci_device_1106_287e[] = "VT8251 Ultra VLINK Controller"; static const char pci_device_1106_3022[] = "CLE266"; static const char pci_device_1106_3038[] = "VT82xxxxx UHCI USB 1.1 Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_3038_0925_1234[] = "USB Controller"; +static const char pci_subsys_1106_3038_0925_1234[] = "VA-502 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3038_1019_0985[] = "P6VXA Motherboard"; @@ -10269,6 +11553,12 @@ static const char pci_subsys_1106_3038_1458_5004[] = "GA-7VAX Mainboard"; static const char pci_subsys_1106_3038_1462_7020[] = "K8T NEO 2 motherboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3038_1462_7094[] = "K8T Neo2-F V2.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3038_1462_7181[] = "K8MM3-V mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3038_147b_1407[] = "KV8-MAX3 motherboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -10389,6 +11679,9 @@ static const char pci_subsys_1106_3059_1043_80b0[] = "A7V600/K8V-X/K8V Deluxe mo static const char pci_subsys_1106_3059_1043_812a[] = "A8V Deluxe motherboard (Realtek ALC850 codec)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_10ec_8168[] = "High Definition Audio"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3059_1106_3059[] = "L7VMM2 Motherboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -10416,6 +11709,9 @@ static const char pci_subsys_1106_3059_1462_0080[] = "K8T NEO 2 motherboard"; static const char pci_subsys_1106_3059_1462_3800[] = "KT266 onboard audio"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_1462_7181[] = "K8MM3-V mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3059_147b_1407[] = "KV8-MAX3 motherboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -10424,9 +11720,6 @@ static const char pci_subsys_1106_3059_1849_0850[] = "ASRock 775Dual-880 Pro onb #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3059_1849_9761[] = "K7VT6 motherboard"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_3059_3005_1695[] = "EP-8KMM3I motherboard onboard audio (Realtek ALC655)"; -#endif #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3059_4005_4710[] = "MSI K7T266 Pro2-RU (MSI-6380 v2) onboard audio (Realtek/ALC 200/200P)"; @@ -10435,6 +11728,12 @@ static const char pci_subsys_1106_3059_4005_4710[] = "MSI K7T266 Pro2-RU (MSI-63 #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3059_a0a0_01b6[] = "AK77-8XN onboard audio"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_a0a0_0342[] = "AK86-L motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_aa01_1106[] = "Epia TC10000 Motherboard"; +#endif static const char pci_device_1106_3065[] = "VT6102 [Rhine-II]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3065_1043_80a1[] = "A7V8X-X Motherboard"; @@ -10452,6 +11751,12 @@ static const char pci_subsys_1106_3065_1186_1401[] = "DFE-530TX rev B"; static const char pci_subsys_1106_3065_13b9_1421[] = "LD-10/100AL PCI Fast Ethernet Adapter (rev.B)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3065_1462_7061[] = "MS-7061"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3065_1462_7181[] = "K8MM3-V mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3065_147b_1c09[] = "NV7 Motherboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -10508,6 +11813,12 @@ static const char pci_subsys_1106_3104_1458_5004[] = "GA-7VAX Mainboard"; static const char pci_subsys_1106_3104_1462_7020[] = "K8T NEO 2 motherboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3104_1462_7094[] = "K8T Neo2-F V2.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3104_1462_7181[] = "K8MM3-V mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3104_147b_1407[] = "KV8-MAX3 motherboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -10520,6 +11831,9 @@ static const char pci_device_1106_3106[] = "VT6105 [Rhine-III]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3106_1186_1403[] = "DFE-530TX rev C"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3106_1186_1407[] = "DFE-538TX"; +#endif static const char pci_device_1106_3108[] = "S3 Unichrome Pro VGA Adapter"; static const char pci_device_1106_3109[] = "VT8233C PCI to ISA Bridge"; static const char pci_device_1106_3112[] = "VT8361 [KLE133] Host Bridge"; @@ -10550,6 +11864,9 @@ static const char pci_subsys_1106_3149_1458_b003[] = "GA-7VM400AM(F) Motherboard static const char pci_subsys_1106_3149_1462_7020[] = "K8T Neo 2 Motherboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3149_1462_7094[] = "K8T Neo2-F V2.0"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3149_147b_1407[] = "KV8-MAX3 motherboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -10558,6 +11875,9 @@ static const char pci_subsys_1106_3149_147b_1408[] = "KV7"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3149_1849_3149[] = "K7VT6 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3149_a0a0_04ad[] = "AK86-L motherboard"; +#endif static const char pci_device_1106_3156[] = "P/KN266 Host Bridge"; static const char pci_device_1106_3157[] = "CX700M2 UniChrome PRO II Graphics"; static const char pci_device_1106_3164[] = "VT6410 ATA133 RAID controller"; @@ -10637,6 +11957,7 @@ static const char pci_device_1106_324b[] = "CX700 Host Bridge"; static const char pci_device_1106_324e[] = "CX700 Internal Module Bus"; static const char pci_device_1106_3258[] = "PT880 Host Bridge"; static const char pci_device_1106_3259[] = "CN400/PM880 Host Bridge"; +static const char pci_device_1106_3260[] = "VIA Chrome9 HC IGP"; static const char pci_device_1106_3269[] = "KT880 Host Bridge"; static const char pci_device_1106_3282[] = "K8T800Pro Host Bridge"; static const char pci_device_1106_3287[] = "VT8251 PCI to ISA Bridge"; @@ -10648,6 +11969,7 @@ static const char pci_device_1106_3327[] = "P4M890 Host Bridge"; static const char pci_device_1106_3336[] = "K8M890CE Host Bridge"; static const char pci_device_1106_3337[] = "VT8237A PCI to ISA Bridge"; static const char pci_device_1106_3340[] = "PT900 Host Bridge"; +static const char pci_device_1106_3343[] = "UniChrome Pro IGP [VIA P4M890 Chipset]"; static const char pci_device_1106_3344[] = "UniChrome Pro IGP"; static const char pci_device_1106_3349[] = "VT8251 AHCI/SATA 4-Port Controller"; static const char pci_device_1106_3351[] = "VT3351 Host Bridge"; @@ -10687,6 +12009,7 @@ static const char pci_device_1106_5340[] = "PT900 I/O APIC Interrupt Controller" static const char pci_device_1106_5351[] = "VT3351 I/O APIC Interrupt Controller"; static const char pci_device_1106_5364[] = "P4M900 I/O APIC Interrupt Controller"; static const char pci_device_1106_6100[] = "VT85C100A [Rhine II]"; +static const char pci_device_1106_6287[] = "SATA RAID Controller"; static const char pci_device_1106_6327[] = "P4M890 Security Device"; static const char pci_device_1106_6364[] = "P4M900 Security Device"; static const char pci_device_1106_7204[] = "K8M800 Host Bridge"; @@ -10694,6 +12017,9 @@ static const char pci_device_1106_7205[] = "VT8378 [S3 UniChrome] Integrated Vid #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_7205_1458_d000[] = "Gigabyte GA-7VM400(A)M(F) Motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_7205_1462_7061[] = "MS-7061"; +#endif static const char pci_device_1106_7208[] = "PT890 Host Bridge"; static const char pci_device_1106_7238[] = "K8T890 Host Bridge"; static const char pci_device_1106_7258[] = "PT880 Host Bridge"; @@ -10902,11 +12228,7 @@ static const char pci_device_1119_0009[] = "GDT 6557/6557-ECC"; static const char pci_device_1119_000a[] = "GDT 6115/6515"; static const char pci_device_1119_000b[] = "GDT 6125/6525"; static const char pci_device_1119_000c[] = "GDT 6535"; -static const char pci_device_1119_000d[] = "GDT 6555"; -static const char pci_device_1119_0010[] = "GDT 6115/6515"; -static const char pci_device_1119_0011[] = "GDT 6125/6525"; -static const char pci_device_1119_0012[] = "GDT 6535"; -static const char pci_device_1119_0013[] = "GDT 6555/6555-ECC"; +static const char pci_device_1119_000d[] = "GDT 6555/6555-ECC"; static const char pci_device_1119_0100[] = "GDT 6117RP/6517RP"; static const char pci_device_1119_0101[] = "GDT 6127RP/6527RP"; static const char pci_device_1119_0102[] = "GDT 6537RP"; @@ -10963,6 +12285,7 @@ static const char pci_device_1119_0260[] = "GDT 7519RN/7619RN"; static const char pci_device_1119_0261[] = "GDT 7529RN/7629RN"; static const char pci_device_1119_02ff[] = "GDT MAXRP"; static const char pci_device_1119_0300[] = "GDT NEWRX"; +static const char pci_device_1119_0301[] = "GDT NEWRX2"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_111a[] = "Efficient Networks, Inc"; @@ -11196,6 +12519,9 @@ static const char pci_subsys_1131_7133_1435_7350[] = "VFG7350"; static const char pci_subsys_1131_7133_1461_1044[] = "AVerTVHD MCE A180"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1461_a14b[] = "AVerTV Studio 509"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1131_7133_1461_f31f[] = "Avermedia AVerTV GO 007 FM"; #endif #ifdef INIT_SUBSYS_INFO @@ -11220,6 +12546,9 @@ static const char pci_subsys_1131_7133_17de_7350[] = "ATSC 110 Digital / Analog static const char pci_subsys_1131_7133_185b_c100[] = "VideoMate TV"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_185b_c900[] = "VideoMate T750"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1131_7133_5168_0306[] = "LifeView FlyDVB-T DUO"; #endif #ifdef INIT_SUBSYS_INFO @@ -11319,6 +12648,9 @@ static const char pci_subsys_1131_7134_1894_a006[] = "KNC One TV-Station DVR"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1131_7134_1894_fe01[] = "KNC One TV-Station RDS / Typhoon TV Tuner RDS"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_5168_0138[] = "FLY TV PRIME 34FM"; +#endif static const char pci_device_1131_7145[] = "SAA7145"; static const char pci_device_1131_7146[] = "SAA7146"; #ifdef INIT_SUBSYS_INFO @@ -11414,6 +12746,9 @@ static const char pci_subsys_1131_7146_13c2_1102[] = "Technotrend/Hauppauge DVB #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1131_7146_153b_1156[] = "Terratec Cynergy 1200C"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7146_1894_0020[] = "KNC One DVB-C V1.0"; +#endif static const char pci_device_1131_9730[] = "SAA9730 Integrated Multimedia and Peripheral Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1131_9730_1131_0000[] = "Integrated Multimedia and Peripheral Controller"; @@ -11423,7 +12758,7 @@ static const char pci_subsys_1131_9730_1131_0000[] = "Integrated Multimedia and static const char pci_vendor_1132[] = "Mitel Corp."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1133[] = "Eicon Networks Corporation"; +static const char pci_vendor_1133[] = "Dialogic Corporation"; static const char pci_device_1133_7901[] = "EiconCard S90"; static const char pci_device_1133_7902[] = "EiconCard S90"; static const char pci_device_1133_7911[] = "EiconCard S91"; @@ -11445,9 +12780,9 @@ static const char pci_device_1133_e007[] = "Diva CT U PCI"; static const char pci_device_1133_e008[] = "Diva CT Lite S/T PCI"; static const char pci_device_1133_e009[] = "Diva CT Lite U PCI"; static const char pci_device_1133_e00a[] = "Diva ISDN+V.90 PCI"; -static const char pci_device_1133_e00b[] = "Diva 2.02 PCI S/T"; +static const char pci_device_1133_e00b[] = "Diva ISDN PCI 2.02"; static const char pci_device_1133_e00c[] = "Diva 2.02 PCI U"; -static const char pci_device_1133_e00d[] = "Diva ISDN Pro 3.0 PCI"; +static const char pci_device_1133_e00d[] = "Diva Pro 3.0 PCI"; static const char pci_device_1133_e00e[] = "Diva ISDN+CT S/T PCI Rev 2"; static const char pci_device_1133_e010[] = "Diva Server BRI-2M PCI"; #ifdef INIT_SUBSYS_INFO @@ -11455,57 +12790,54 @@ static const char pci_subsys_1133_e010_110a_0021[] = "Fujitsu Siemens ISDN S0"; #endif static const char pci_device_1133_e011[] = "Diva Server BRI S/T Rev 2"; static const char pci_device_1133_e012[] = "Diva Server 4BRI-8M PCI"; -static const char pci_device_1133_e013[] = "Diva Server 4BRI Rev 2"; +static const char pci_device_1133_e013[] = "4BRI"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e013_1133_1300[] = "Diva Server V-4BRI-8"; +static const char pci_subsys_1133_e013_1133_1300[] = "Diva V-4BRI-8 PCI v2"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e013_1133_e013[] = "Diva Server 4BRI-8M 2.0 PCI"; +static const char pci_subsys_1133_e013_1133_e013[] = "Diva 4BRI-8 PCI v2"; #endif static const char pci_device_1133_e014[] = "Diva Server PRI-30M PCI"; -static const char pci_device_1133_e015[] = "DIVA Server PRI Rev 2"; -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e015_1133_e015[] = "Diva Server PRI 2.0 PCI"; -#endif +static const char pci_device_1133_e015[] = "Diva PRI PCI v2"; static const char pci_device_1133_e016[] = "Diva Server Voice 4BRI PCI"; static const char pci_device_1133_e017[] = "Diva Server Voice 4BRI Rev 2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e017_1133_e017[] = "Diva Server Voice 4BRI-8M 2.0 PCI"; #endif -static const char pci_device_1133_e018[] = "Diva Server BRI-2M 2.0 PCI"; +static const char pci_device_1133_e018[] = "BRI"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e018_1133_1800[] = "Diva Server V-BRI-2"; +static const char pci_subsys_1133_e018_1133_1800[] = "Diva V-BRI-2 PCI v2"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e018_1133_e018[] = "Diva Server BRI-2M 2.0 PCI"; +static const char pci_subsys_1133_e018_1133_e018[] = "Diva BRI-2 PCI v2"; #endif static const char pci_device_1133_e019[] = "Diva Server Voice PRI Rev 2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e019_1133_e019[] = "Diva Server Voice PRI 2.0 PCI"; #endif -static const char pci_device_1133_e01a[] = "Diva Server 2FX"; +static const char pci_device_1133_e01a[] = "Diva BRI-2FX PCI v2"; static const char pci_device_1133_e01b[] = "Diva Server Voice BRI-2M 2.0 PCI"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e01b_1133_e01b[] = "Diva Server Voice BRI-2M 2.0 PCI"; #endif -static const char pci_device_1133_e01c[] = "Diva Server PRI Rev 3"; +static const char pci_device_1133_e01c[] = "PRI"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01c_1133_1c01[] = "Diva Server PRI/E1/T1-8"; +static const char pci_subsys_1133_e01c_1133_1c01[] = "Diva PRI/E1/T1-8 PCI v3"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01c_1133_1c02[] = "Diva Server PRI/T1-24"; +static const char pci_subsys_1133_e01c_1133_1c02[] = "Diva PRI/T1-24 PCI(e) v3"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01c_1133_1c03[] = "Diva Server PRI/E1-30"; +static const char pci_subsys_1133_e01c_1133_1c03[] = "Diva PRI/E1-30 PCI(e) v3"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01c_1133_1c04[] = "Diva Server PRI/E1/T1"; +static const char pci_subsys_1133_e01c_1133_1c04[] = "Diva PRI/E1/T1-CTI PCI(e) v3"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01c_1133_1c05[] = "Diva Server V-PRI/T1-24"; +static const char pci_subsys_1133_e01c_1133_1c05[] = "Diva V-PRI/T1-24 PCI(e) v3"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01c_1133_1c06[] = "Diva Server V-PRI/E1-30"; +static const char pci_subsys_1133_e01c_1133_1c06[] = "Diva V-PRI/E1-30 PCI(e) v3"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e01c_1133_1c07[] = "Diva Server PRI/E1/T1-8 Cornet NQ"; @@ -11525,25 +12857,58 @@ static const char pci_subsys_1133_e01c_1133_1c0b[] = "Diva Server V-PRI/T1-24 Co #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e01c_1133_1c0c[] = "Diva Server V-PRI/E1-30 Cornet NQ"; #endif -static const char pci_device_1133_e01e[] = "Diva Server 2PRI"; -static const char pci_device_1133_e020[] = "Diva Server 4PRI"; -static const char pci_device_1133_e022[] = "Diva Server Analog-2P"; -static const char pci_device_1133_e024[] = "Diva Server Analog-4P"; +static const char pci_device_1133_e01e[] = "2PRI"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e01e_1133_1e01[] = "Diva 2PRI/E1/T1-60 PCI v1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e01e_1133_e01e[] = "Diva V-2PRI/E1/T1-60 PCI v1"; +#endif +static const char pci_device_1133_e020[] = "4PRI"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e020_1133_2001[] = "Diva 4PRI/E1/T1-120 PCI v1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e020_1133_e020[] = "Diva V-4PRI/E1/T1-120 PCI v1"; +#endif +static const char pci_device_1133_e022[] = "Analog-2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e022_1133_2200[] = "Diva V-Analog-2 PCI v1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e022_1133_e022[] = "Diva Analog-2 PCI v1"; +#endif +static const char pci_device_1133_e024[] = "Analog-4"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e024_1133_2400[] = "Diva V-Analog-4 PCI v1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e024_1133_e024[] = "Diva Analog-4 PCI v1"; +#endif +static const char pci_device_1133_e028[] = "Analog-8"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e028_1133_2800[] = "Diva V-Analog-8 PCI v1"; +#endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e024_1133_2400[] = "Diva Server V-Analog-4P"; +static const char pci_subsys_1133_e028_1133_e028[] = "Diva Analog-8 PCI v1"; #endif +static const char pci_device_1133_e02a[] = "Diva IPM-300 PCI v1"; +static const char pci_device_1133_e02c[] = "Diva IPM-600 PCI v1"; +static const char pci_device_1133_e02e[] = "4BRI"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e024_1133_e024[] = "Diva Server Analog-4P"; +static const char pci_subsys_1133_e02e_1133_2e01[] = "Diva V-4BRI-8 PCIe v2"; #endif -static const char pci_device_1133_e028[] = "Diva Server Analog-8P"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e028_1133_2800[] = "Diva Server V-Analog-8P"; +static const char pci_subsys_1133_e02e_1133_e02e[] = "Diva 4BRI-8 PCIe v2"; #endif +static const char pci_device_1133_e032[] = "BRI"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e028_1133_e028[] = "Diva Server Analog-8P"; +static const char pci_subsys_1133_e032_1133_3201[] = "Diva V-BRI-2 PCIe v2"; #endif -static const char pci_device_1133_e02a[] = "Diva Server IPM-300"; -static const char pci_device_1133_e02c[] = "Diva Server IPM-600"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1133_e032_1133_e032[] = "Diva BRI-2 PCIe v2"; +#endif +static const char pci_device_1133_e034[] = "Diva BRI-CTI PCI v2"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1134[] = "Mercury Computer Systems"; @@ -11915,6 +13280,9 @@ static const char pci_device_114f_00c8[] = "Digi Neo 2 DB9"; static const char pci_device_114f_00c9[] = "Digi Neo 2 DB9 PRI"; static const char pci_device_114f_00ca[] = "Digi Neo 2 RJ45"; static const char pci_device_114f_00cb[] = "Digi Neo 2 RJ45 PRI"; +static const char pci_device_114f_00cc[] = "Digi Neo 1 422"; +static const char pci_device_114f_00cd[] = "Digi Neo 1 422 485"; +static const char pci_device_114f_00ce[] = "Digi Neo 2 422 485"; static const char pci_device_114f_00d0[] = "ClassicBoard 4 422"; static const char pci_device_114f_00d1[] = "ClassicBoard 8 422"; static const char pci_device_114f_6001[] = "Avanstar"; @@ -12105,13 +13473,14 @@ static const char pci_device_1166_0014[] = "CMIC-LE Host Bridge (GC-LE chipset)" static const char pci_device_1166_0015[] = "CMIC-GC Host Bridge"; static const char pci_device_1166_0016[] = "CMIC-GC Host Bridge"; static const char pci_device_1166_0017[] = "GCNB-LE Host Bridge"; -static const char pci_device_1166_0036[] = "HT1000 PCI/PCI-X bridge"; +static const char pci_device_1166_0031[] = "HT1100 HPX0 HT Host Bridge"; +static const char pci_device_1166_0036[] = "BCM5785 [HT1000] PCI/PCI-X Bridge"; static const char pci_device_1166_0101[] = "CIOB-X2 PCI-X I/O Bridge"; static const char pci_device_1166_0103[] = "EPB PCI-Express to PCI-X Bridge"; -static const char pci_device_1166_0104[] = "HT1000 PCI/PCI-X bridge"; +static const char pci_device_1166_0104[] = "BCM5785 [HT1000] PCI/PCI-X Bridge"; static const char pci_device_1166_0110[] = "CIOB-E I/O Bridge with Gigabit Ethernet"; -static const char pci_device_1166_0130[] = "HT2000 PCI-X bridge"; -static const char pci_device_1166_0132[] = "HT2000 PCI-Express bridge"; +static const char pci_device_1166_0130[] = "BCM5780 [HT2000] PCI-X bridge"; +static const char pci_device_1166_0132[] = "BCM5780 [HT2000] PCI-Express Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0132_1166_0132[] = "HT2000 PCI-Express bridge"; #endif @@ -12128,9 +13497,14 @@ static const char pci_device_1166_0203[] = "CSB6 South Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0203_1734_1012[] = "Primergy RX300"; #endif -static const char pci_device_1166_0205[] = "HT1000 Legacy South Bridge"; +static const char pci_device_1166_0205[] = "BCM5785 [HT1000] Legacy South Bridge"; static const char pci_device_1166_0211[] = "OSB4 IDE Controller"; static const char pci_device_1166_0212[] = "CSB5 IDE Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1166_0212_1028_810b[] = "PowerEdge 2550"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0212_4c53_1080[] = "CT8 mainboard"; #endif @@ -12148,13 +13522,14 @@ static const char pci_subsys_1166_0213_1028_c134[] = "Poweredge SC600"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0213_1734_1012[] = "Primergy RX300"; #endif -static const char pci_device_1166_0214[] = "HT1000 Legacy IDE controller"; +static const char pci_device_1166_0214[] = "BCM5785 [HT1000] IDE"; static const char pci_device_1166_0217[] = "CSB6 IDE Controller"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0217_1028_4134[] = "Poweredge SC600"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_1166_021b[] = "HT1100 HD Audio"; static const char pci_device_1166_0220[] = "OSB4/CSB5 OHCI USB Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0220_4c53_1080[] = "CT8 mainboard"; @@ -12163,7 +13538,7 @@ static const char pci_device_1166_0221[] = "CSB6 OHCI USB Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0221_1734_1012[] = "Primergy RX300"; #endif -static const char pci_device_1166_0223[] = "HT1000 USB Controller"; +static const char pci_device_1166_0223[] = "BCM5785 [HT1000] USB"; static const char pci_device_1166_0225[] = "CSB5 LPC bridge"; static const char pci_device_1166_0227[] = "GCLE-2 Host Bridge"; #ifdef INIT_SUBSYS_INFO @@ -12173,12 +13548,25 @@ static const char pci_device_1166_0230[] = "CSB5 LPC bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0230_4c53_1080[] = "CT8 mainboard"; #endif -static const char pci_device_1166_0234[] = "HT1000 LPC Bridge"; +static const char pci_device_1166_0234[] = "BCM5785 [HT1000] LPC"; +static const char pci_device_1166_0235[] = "BCM5785 [HT1000] XIOAPIC0-2"; +static const char pci_device_1166_0238[] = "BCM5785 [HT1000] WDTimer"; static const char pci_device_1166_0240[] = "K2 SATA"; static const char pci_device_1166_0241[] = "RAIDCore RC4000"; static const char pci_device_1166_0242[] = "RAIDCore BC4000"; -static const char pci_device_1166_024a[] = "BCM5785 (HT1000) SATA Native SATA Mode"; -static const char pci_device_1166_024b[] = "BCM5785 (HT1000) PATA/IDE Mode"; +static const char pci_device_1166_024a[] = "BCM5785 [HT1000] SATA (Native SATA Mode)"; +static const char pci_device_1166_024b[] = "BCM5785 [HT1000] SATA (PATA/IDE Mode)"; +static const char pci_device_1166_0406[] = "HT1100 PCI-X Bridge"; +static const char pci_device_1166_0408[] = "HT1100 Legacy Device"; +static const char pci_device_1166_040a[] = "HT1100 ISA-LPC Bridge"; +static const char pci_device_1166_0410[] = "HT1100 SATA Controller (Native SATA Mode)"; +static const char pci_device_1166_0411[] = "HT1100 SATA Controller (PATA / IDE Mode)"; +static const char pci_device_1166_0412[] = "HT1100 USB OHCI Controller"; +static const char pci_device_1166_0414[] = "HT1100 USB EHCI Controller"; +static const char pci_device_1166_0416[] = "HT1100 USB EHCI Controller (with Debug Port)"; +static const char pci_device_1166_0420[] = "HT1100 PCI-Express Bridge"; +static const char pci_device_1166_0421[] = "HT1100 SAS/SATA Controller"; +static const char pci_device_1166_0422[] = "HT1100 PCI-Express Bridge"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1167[] = "Mutoh Industries Inc"; @@ -12305,6 +13693,11 @@ static const char pci_subsys_1180_0476_1014_0185[] = "ThinkPad A/T/X Series"; #endif #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0476_1028_014f[] = "Latitude X300 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0476_1028_0188[] = "Inspiron 6000 laptop"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -12333,6 +13726,9 @@ static const char pci_subsys_1180_0476_104d_814e[] = "VAIO GRZ390Z"; static const char pci_subsys_1180_0476_10f7_8338[] = "Panasonic CF-Y5 laptop"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0476_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0476_144d_c00c[] = "P30/P35 notebook"; #endif #ifdef INIT_SUBSYS_INFO @@ -12364,10 +13760,18 @@ static const char pci_subsys_1180_0552_1014_0511[] = "ThinkPad A/T/X Series"; #endif #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0552_1028_014f[] = "Latitude X300 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0552_1028_0188[] = "Inspiron 6000 laptop"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0552_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0552_144d_c00c[] = "P30/P35 notebook"; #endif #ifdef INIT_SUBSYS_INFO @@ -12377,6 +13781,11 @@ static const char pci_device_1180_0554[] = "R5C554"; static const char pci_device_1180_0575[] = "R5C575 SD Bus Host Adapter"; static const char pci_device_1180_0576[] = "R5C576 SD Bus Host Adapter"; static const char pci_device_1180_0592[] = "R5C592 Memory Stick Bus Host Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0592_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0592_1043_1967[] = "V6800V"; #endif @@ -12401,6 +13810,11 @@ static const char pci_subsys_1180_0822_1028_0188[] = "Inspiron 6000 laptop"; static const char pci_subsys_1180_0822_1028_01a2[] = "Inspiron 9200"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0822_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0822_1043_1967[] = "ASUS V6800V"; #endif @@ -12414,8 +13828,24 @@ static const char pci_subsys_1180_0822_144d_c018[] = "X20 IV"; static const char pci_subsys_1180_0822_17aa_201d[] = "Thinkpad X60s"; #endif static const char pci_device_1180_0832[] = "R5C832 IEEE 1394 Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0832_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1180_0841[] = "R5C841 CardBus/SD/SDIO/MMC/MS/MSPro/xD/IEEE1394"; +static const char pci_device_1180_0843[] = "R5C843 MMC Host Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0843_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1180_0852[] = "xD-Picture Card Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0852_103c_30b7[] = "Presario V6133CL"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0852_1043_1967[] = "V6800V"; #endif @@ -12473,10 +13903,15 @@ static const char pci_device_1186_3a12[] = "AirPlus DWL-G650 Wireless Cardbus Ad static const char pci_device_1186_3a13[] = "AirPlus DWL-G520 Wireless PCI Adapter(rev.B)"; static const char pci_device_1186_3a14[] = "AirPremier DWL-AG530 Wireless PCI Adapter"; static const char pci_device_1186_3a63[] = "AirXpert DWL-AG660 Wireless Cardbus Adapter"; +static const char pci_device_1186_3c00[] = "D-link DWL-G650X"; static const char pci_device_1186_4000[] = "DL2000-based Gigabit Ethernet"; +static const char pci_device_1186_4001[] = "DGE-550SX PCI-X Gigabit Ethernet Adapter"; static const char pci_device_1186_4300[] = "DGE-528T Gigabit Ethernet Adapter"; static const char pci_device_1186_4800[] = "DGE-530T Gigabit Ethernet Adapter (rev 11)"; +static const char pci_device_1186_4b00[] = "DGE-560T PCI Express Gigabit Ethernet Adapter"; static const char pci_device_1186_4b01[] = "DGE-530T Gigabit Ethernet Adapter (rev 11)"; +static const char pci_device_1186_4b02[] = "DGE-560SX PCI Express Gigabit Ethernet Adapter"; +static const char pci_device_1186_4b03[] = "DGE-550T Gigabit Ethernet Adapter V.B1"; static const char pci_device_1186_4c00[] = "Gigabit Ethernet Adapter"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1186_4c00_1186_4c00[] = "DGE-530T Gigabit Ethernet Adapter"; @@ -12638,13 +14073,17 @@ static const char pci_vendor_11aa[] = "Actel"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11ab[] = "Marvell Technology Group Ltd."; static const char pci_device_11ab_0146[] = "GT-64010/64010A System Controller"; +static const char pci_device_11ab_0f53[] = "88E6318 Link Street network controller"; static const char pci_device_11ab_11ab[] = "MV88SE614x SATA II PCI-E controller"; static const char pci_device_11ab_138f[] = "W8300 802.11 Adapter (rev 07)"; static const char pci_device_11ab_1fa6[] = "Marvell W8300 802.11 Adapter"; static const char pci_device_11ab_1fa7[] = "88W8310 and 88W8000G [Libertas] 802.11g client chipset"; static const char pci_device_11ab_1faa[] = "88w8335 [Libertas] 802.11b/g Wireless"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_11ab_1faa_1385_4e00[] = "WG511 v2 54MBit/ Wireless PC-Card"; +static const char pci_subsys_11ab_1faa_1385_4e00[] = "WG511v2 54 Mbps Wireless PC Card"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11ab_1faa_1385_6b00[] = "WG311v3 802.11g Wireless PCI Adapter"; #endif static const char pci_device_11ab_2a01[] = "88W8335 [Libertas] 802.11b/g Wireless"; static const char pci_device_11ab_4320[] = "88E8001 Gigabit Ethernet Controller"; @@ -12818,6 +14257,10 @@ static const char pci_subsys_11ab_4351_1854_001e[] = "Marvell 88E8036 Fast Ether static const char pci_subsys_11ab_4351_1854_0020[] = "Marvell 88E8036 Fast Ethernet Controller (LGE)"; #endif static const char pci_device_11ab_4352[] = "88E8038 PCI-E Fast Ethernet Controller"; +static const char pci_device_11ab_4353[] = "88E8039 PCI-E Fast Ethernet Controller"; +static const char pci_device_11ab_4354[] = "88E8040 PCI-E Fast Ethernet Controller"; +static const char pci_device_11ab_4356[] = "88EC033 Ethernet Controller"; +static const char pci_device_11ab_435a[] = "88E8048 PCI-E Fast Ethernet Controller"; static const char pci_device_11ab_4360[] = "88E8052 PCI-E ASF Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4360_1043_8134[] = "Marvell 88E8052 Gigabit Ethernet Controller (Asus)"; @@ -12982,6 +14425,13 @@ static const char pci_subsys_11ab_4362_a0a0_0506[] = "Marvell 88E8053 Gigabit Et #endif static const char pci_device_11ab_4363[] = "88E8055 PCI-E Gigabit Ethernet Controller"; static const char pci_device_11ab_4364[] = "88E8056 PCI-E Gigabit Ethernet Controller"; +static const char pci_device_11ab_4365[] = "88E8070 based Ethernet Controller"; +static const char pci_device_11ab_4366[] = "88EC036 PCI-E Gigabit Ethernet Controller"; +static const char pci_device_11ab_4367[] = "88EC032 Ethernet Controller"; +static const char pci_device_11ab_4368[] = "88EC034 Ethernet Controller"; +static const char pci_device_11ab_4369[] = "88EC042 Ethernet Controller"; +static const char pci_device_11ab_436a[] = "Marvell Yukon 88E8058 PCI-E Gigabit Ethernet Controller"; +static const char pci_device_11ab_436b[] = "88E8071 PCI-E Gigabit Ethernet Controller"; static const char pci_device_11ab_4611[] = "GT-64115 System Controller"; static const char pci_device_11ab_4620[] = "GT-64120/64120A/64121A System Controller"; static const char pci_device_11ab_4801[] = "GT-48001"; @@ -12991,9 +14441,12 @@ static const char pci_device_11ab_5041[] = "MV88SX5041 4-port SATA I PCI-X Contr static const char pci_device_11ab_5080[] = "MV88SX5080 8-port SATA I PCI-X Controller"; static const char pci_device_11ab_5081[] = "MV88SX5081 8-port SATA I PCI-X Controller"; static const char pci_device_11ab_6041[] = "MV88SX6041 4-port SATA II PCI-X Controller"; +static const char pci_device_11ab_6042[] = "88SX6042 PCI-X 4-Port SATA-II"; static const char pci_device_11ab_6081[] = "MV88SX6081 8-port SATA II PCI-X Controller"; static const char pci_device_11ab_6101[] = "88SE6101 single-port PATA133 interface"; +static const char pci_device_11ab_6121[] = "88SE6121 SATA II Controller"; static const char pci_device_11ab_6141[] = "88SE614x SATA II PCI-E controller"; +static const char pci_device_11ab_6145[] = "88SE6145 SATA II PCI-E controller"; static const char pci_device_11ab_6450[] = "64560 System Controller"; static const char pci_device_11ab_6460[] = "MV64360/64361/64362 System Controller"; static const char pci_device_11ab_6480[] = "MV64460/64461/64462 System Controller"; @@ -13001,6 +14454,7 @@ static const char pci_device_11ab_6480[] = "MV64460/64461/64462 System Controlle static const char pci_subsys_11ab_6480_1775_c200[] = "C2K CompactPCI single board computer"; #endif static const char pci_device_11ab_6485[] = "MV64460/64461/64462 System Controller, Revision B"; +static const char pci_device_11ab_7042[] = "88SX7042 PCI-e 4-port SATA-II"; static const char pci_device_11ab_f003[] = "GT-64010 Primary Image Piranha Image Generator"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -13360,11 +14814,6 @@ static const char pci_subsys_11c1_0450_144f_4005[] = "Magnia SG20"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11c1_0450_1468_0450[] = "Evo N600c"; #endif -#endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_11c1_0450_4005_144f[] = "LifeBook C Series"; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_11c1_0451[] = "LT WinModem"; static const char pci_device_11c1_0452[] = "LT WinModem"; static const char pci_device_11c1_0453[] = "LT WinModem"; @@ -13500,6 +14949,10 @@ static const char pci_device_11d4_1889[] = "AD1889 sound chip"; static const char pci_device_11d4_1981[] = "AD1981HD sound chip"; static const char pci_device_11d4_1983[] = "AD1983HD sound chip"; static const char pci_device_11d4_1986[] = "AD1986A sound chip"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11d4_1986_11d4_1986[] = "Lenovo N100 B9G"; +#endif +static const char pci_device_11d4_198b[] = "AD1988B Sound Chip"; static const char pci_device_11d4_5340[] = "AD1881 sound chip"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -13660,7 +15113,10 @@ static const char pci_vendor_11f7[] = "Scientific Atlanta"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11f8[] = "PMC-Sierra Inc."; +static const char pci_device_11f8_7364[] = "PM7364 [FREEDM - 32 Frame Engine & Datalink Mgr]"; static const char pci_device_11f8_7375[] = "PM7375 [LASAR-155 ATM SAR]"; +static const char pci_device_11f8_7384[] = "PM7384 [FREEDM - 84P672 Frm Engine & Datalink Mgr]"; +static const char pci_device_11f8_8000[] = "PM8000 [SPC - SAS Protocol Controller]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11f9[] = "I-Cube Inc"; @@ -13694,6 +15150,15 @@ static const char pci_device_11fe_000c[] = "RocketModem 6 port"; static const char pci_device_11fe_000d[] = "RocketModem 4-port"; static const char pci_device_11fe_000e[] = "RocketPort Plus 2 port RS232"; static const char pci_device_11fe_000f[] = "RocketPort Plus 2 port RS422"; +static const char pci_device_11fe_0040[] = "RocketPort Infinity Octa, 8port, RJ45"; +static const char pci_device_11fe_0041[] = "RocketPort Infinity 32port, External Interface"; +static const char pci_device_11fe_0042[] = "RocketPort Infinity 8port, External Interface"; +static const char pci_device_11fe_0043[] = "RocketPort Infinity 16port, External Interface"; +static const char pci_device_11fe_0044[] = "RocketPort Infinity Quad, 4port, DB"; +static const char pci_device_11fe_0045[] = "RocketPort Infinity Octa, 8port, DB"; +static const char pci_device_11fe_0047[] = "RocketPort Infinity 4port, RJ45"; +static const char pci_device_11fe_004f[] = "RocketPort Infinity 2port, SMPTE"; +static const char pci_device_11fe_0052[] = "RocketPort Infinity Octa, 8port, SMPTE"; static const char pci_device_11fe_0801[] = "RocketPort UPCI 32 port w/external I/F"; static const char pci_device_11fe_0802[] = "RocketPort UPCI 8 port w/external I/F"; static const char pci_device_11fe_0803[] = "RocketPort UPCI 16 port w/external I/F"; @@ -13847,6 +15312,7 @@ static const char pci_device_1217_7120[] = "Integrated MMC/SD Controller"; static const char pci_device_1217_7130[] = "Integrated MS/xD Controller"; static const char pci_device_1217_7134[] = "OZ711MP1/MS1 MemoryCardBus Controller"; static const char pci_device_1217_7135[] = "Cardbus bridge"; +static const char pci_device_1217_7136[] = "OZ711SP1 Memory CardBus Controller"; static const char pci_device_1217_71e2[] = "OZ711E2 SmartCardBus Controller"; static const char pci_device_1217_7212[] = "OZ711M2 4-in-1 MemoryCardBus Controller"; static const char pci_device_1217_7213[] = "OZ6933E CardBus Controller"; @@ -14010,6 +15476,11 @@ static const char pci_device_1220_1220[] = "AMCC 5933 TMS320C80 DSP/Imaging boar #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1221[] = "Contec Co., Ltd"; +static const char pci_device_1221_9172[] = "PO-64L(PCI)H [Isolated Digital Output Board for PCI]"; +static const char pci_device_1221_91a2[] = "PO-32L(PCI)H [Isolated Digital Output Board for PCI]"; +static const char pci_device_1221_91c3[] = "DA16-16(LPCI)L [Un-insulated highly precise analog output board for Low Profile PCI]"; +static const char pci_device_1221_b152[] = "DIO-96D2-LPCI"; +static const char pci_device_1221_c103[] = "ADA16-32/2(PCI)F [High-Speed Analog I/O Board for PCI]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1222[] = "Ancor Communications, Inc."; @@ -14288,7 +15759,7 @@ static const char pci_device_125c_0640[] = "Aries 16000P"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_125d[] = "ESS Technology"; static const char pci_device_125d_0000[] = "ES336H Fax Modem (Early Model)"; -static const char pci_device_125d_1948[] = "Solo?"; +static const char pci_device_125d_1948[] = "ES1948 Maestro-1"; static const char pci_device_125d_1968[] = "ES1968 Maestro 2"; #endif #ifdef INIT_SUBSYS_INFO @@ -14433,6 +15904,11 @@ static const char pci_subsys_1260_3873_1737_3874[] = "WMP11 Wireless 802.11b PCI #endif #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1260_3873_8086_2510[] = "M3AWEB Wireless 802.11b MiniPCI Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1260_3873_8086_2513[] = "Wireless 802.11b MiniPCI Adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -14457,6 +15933,9 @@ static const char pci_subsys_1260_3890_1113_4203[] = "WN4201B"; static const char pci_subsys_1260_3890_1113_8201[] = "T-Com T-Sinus 154pcicard Wireless PCI Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1260_3890_1113_b301[] = "T-Sinus 154card Cardbus"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1260_3890_1113_ee03[] = "SMC2802W V2 Wireless PCI Adapter [ISL3886]"; #endif #ifdef INIT_SUBSYS_INFO @@ -14775,6 +16254,7 @@ static const char pci_vendor_1277[] = "Comstream"; static const char pci_vendor_1278[] = "Transtech Parallel Systems Ltd."; static const char pci_device_1278_0701[] = "TPE3/TM3 PowerPC Node"; static const char pci_device_1278_0710[] = "TPE5 PowerPC PCI board"; +static const char pci_device_1278_1101[] = "TS-C43 card with 4 ADSP-TS101 processors"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1279[] = "Transmeta Corporation"; @@ -15139,11 +16619,12 @@ static const char pci_device_1282_9132[] = "Ethernet 100/10 MBit"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1283[] = "Integrated Technology Express, Inc."; static const char pci_device_1283_673a[] = "IT8330G"; -static const char pci_device_1283_8211[] = "ITE 8211F Single Channel UDMA 133 (ASUS 8211 (ITE IT8212 ATA RAID Controller))"; +static const char pci_device_1283_8152[] = "IT8152F/G Advanced RISC-to-PCI Companion Chip"; +static const char pci_device_1283_8211[] = "ITE 8211F Single Channel UDMA 133"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1283_8211_1043_8138[] = "P5GD1-VW Mainboard"; #endif -static const char pci_device_1283_8212[] = "IT/ITE8212 Dual channel ATA RAID controller (PCI version seems to be IT8212, embedded seems to be ITE8212)"; +static const char pci_device_1283_8212[] = "IT/ITE8212 Dual channel ATA RAID controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1283_8212_1283_0001[] = "IT/ITE8212 Dual channel ATA RAID controller"; #endif @@ -15399,6 +16880,9 @@ static const char pci_subsys_12b9_1008_12b9_00ac[] = "USR 56k Internal Voice Mod #ifdef INIT_SUBSYS_INFO static const char pci_subsys_12b9_1008_12b9_00ad[] = "USR 56k Internal FAX Modem (Model 5610)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_12b9_1008_12b9_baba[] = "USR 56K Internal Voice Modem 3CP3298-DEL (Model 5601) [Hawk]"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12ba[] = "BittWare, Inc."; @@ -15481,6 +16965,10 @@ static const char pci_vendor_12c6[] = "Mitani Corporation"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12c7[] = "Dialogic Corp"; +static const char pci_device_12c7_0546[] = "Springware D/120JCT-LS"; +static const char pci_device_12c7_0647[] = "Springware D/240JCT-T1"; +static const char pci_device_12c7_0676[] = "Springware D/41JCT-LS"; +static const char pci_device_12c7_0685[] = "Springware D/480JCT-2T1"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12c8[] = "G Force Co, Ltd"; @@ -15596,7 +17084,7 @@ static const char pci_vendor_12d7[] = "Biotronic SRL"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12d8[] = "Pericom Semiconductor"; -static const char pci_device_12d8_01a7[] = "PCI to PCI bridge"; +static const char pci_device_12d8_01a7[] = "PI7C21P100 PCI to PCI Bridge"; static const char pci_device_12d8_8150[] = "PCI to PCI Bridge"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -15608,6 +17096,9 @@ static const char pci_device_12d9_1078[] = "Prosody X class e1000 device"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_12d9_1078_12d9_000d[] = "Prosody X PCI"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_12d9_1078_12d9_000e[] = "Prosody X cPCI"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12da[] = "True Time Inc."; @@ -15916,7 +17407,21 @@ static const char pci_device_1307_004c[] = "PCI-DAS1000"; static const char pci_device_1307_004d[] = "PCI-QUAD04"; static const char pci_device_1307_0052[] = "PCI-DAS4020/12"; static const char pci_device_1307_0054[] = "PCI-DIO96"; +static const char pci_device_1307_005d[] = "PCI-DAS6023"; static const char pci_device_1307_005e[] = "PCI-DAS6025"; +static const char pci_device_1307_005f[] = "PCI-DAS6030"; +static const char pci_device_1307_0060[] = "PCI-DAS6031"; +static const char pci_device_1307_0061[] = "PCI-DAS6032"; +static const char pci_device_1307_0062[] = "PCI-DAS6033"; +static const char pci_device_1307_0063[] = "PCI-DAS6034"; +static const char pci_device_1307_0064[] = "PCI-DAS6035"; +static const char pci_device_1307_0065[] = "PCI-DAS6040"; +static const char pci_device_1307_0066[] = "PCI-DAS6052"; +static const char pci_device_1307_0067[] = "PCI-DAS6070"; +static const char pci_device_1307_0068[] = "PCI-DAS6071"; +static const char pci_device_1307_006f[] = "PCI-DAS6036"; +static const char pci_device_1307_0078[] = "PCI-DAS6013"; +static const char pci_device_1307_0079[] = "PCI-DAS6014"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1308[] = "Jato Technologies Inc."; @@ -16100,7 +17605,7 @@ static const char pci_vendor_132d[] = "Integrated Silicon Solution, Inc."; static const char pci_vendor_1330[] = "MMC Networks"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1331[] = "Radisys Corp."; +static const char pci_vendor_1331[] = "RadiSys Corporation"; static const char pci_device_1331_0030[] = "ENP-2611"; static const char pci_device_1331_8200[] = "82600 Host Bridge"; static const char pci_device_1331_8201[] = "82600 IDE"; @@ -16274,13 +17779,16 @@ static const char pci_device_1360_0101[] = "PCI32 DCF77 Radio Clock"; static const char pci_device_1360_0102[] = "PCI509 DCF77 Radio Clock"; static const char pci_device_1360_0103[] = "PCI510 DCF77 Radio Clock"; static const char pci_device_1360_0104[] = "PCI511 DCF77 Radio Clock"; +static const char pci_device_1360_0105[] = "PEX511 DCF77 Radio Clock (PCI Express)"; static const char pci_device_1360_0201[] = "GPS167PCI GPS Receiver"; static const char pci_device_1360_0202[] = "GPS168PCI GPS Receiver"; static const char pci_device_1360_0203[] = "GPS169PCI GPS Receiver"; static const char pci_device_1360_0204[] = "GPS170PCI GPS Receiver"; +static const char pci_device_1360_0205[] = "GPS170PEX GPS Receiver (PCI Express)"; static const char pci_device_1360_0301[] = "TCR510PCI IRIG Timecode Reader"; static const char pci_device_1360_0302[] = "TCR167PCI IRIG Timecode Reader"; static const char pci_device_1360_0303[] = "TCR511PCI IRIG Timecode Reader"; +static const char pci_device_1360_0304[] = "TCR511PEX IRIG Timecode Reader (PCI Express)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1361[] = "Soliton Systems K.K."; @@ -16444,7 +17952,7 @@ static const char pci_device_1385_4800[] = "WG511(v1) 54 Mbps Wireless PC Card"; static const char pci_device_1385_4900[] = "WG311v1 54 Mbps Wireless PCI Adapter"; static const char pci_device_1385_4a00[] = "WAG311 802.11a/g Wireless PCI Adapter"; static const char pci_device_1385_4b00[] = "WG511T 108 Mbps Wireless PC Card"; -static const char pci_device_1385_4c00[] = "WG311v2 54 Mbps Wireless PCI Adapter"; +static const char pci_device_1385_4c00[] = "WG311v2 54 Mbps Wireless-G PCI Adapter"; static const char pci_device_1385_4d00[] = "WG311T 108 Mbps Wireless PCI Adapter"; static const char pci_device_1385_4e00[] = "WG511v2 54 Mbps Wireless PC Card"; static const char pci_device_1385_4f00[] = "WG511U Double 108 Mbps Wireless PC Card"; @@ -16502,10 +18010,29 @@ static const char pci_vendor_1392[] = "Medialight Inc"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1393[] = "Moxa Technologies Co Ltd"; +static const char pci_device_1393_0001[] = "UC7000 Serial"; +static const char pci_device_1393_1020[] = "CP102 (2-port RS-232 PCI)"; +static const char pci_device_1393_1021[] = "CP102UL (2-port RS-232 Universal PCI)"; +static const char pci_device_1393_1022[] = "CP102U (2-port RS-232 Universal PCI)"; static const char pci_device_1393_1040[] = "Smartio C104H/PCI"; +static const char pci_device_1393_1041[] = "CP104U (4-port RS-232 Universal PCI)"; +static const char pci_device_1393_1042[] = "CP104JU (4-port RS-232 Universal PCI)"; +static const char pci_device_1393_1043[] = "CP104EL (4-port RS-232 Smart PCI Express)"; +static const char pci_device_1393_1044[] = "POS104UL (4-port RS-232 Universal PCI)"; +static const char pci_device_1393_1080[] = "CB108 (8-port RS-232 PC/104-plus Module)"; +static const char pci_device_1393_1140[] = "CT-114 series"; static const char pci_device_1393_1141[] = "Industrio CP-114"; +static const char pci_device_1393_1142[] = "CB114 (4-port RS-232/422/485 PC/104-plus Module)"; +static const char pci_device_1393_1180[] = "CP118U (8-port RS-232/422/485 Smart Universal PCI)"; +static const char pci_device_1393_1181[] = "CP118EL (8-port RS-232/422/485 Smart PCI Express)"; +static const char pci_device_1393_1320[] = "CP132 (2-port RS-422/485 PCI)"; +static const char pci_device_1393_1321[] = "CP132U (2-Port RS-422/485 Universal PCI)"; +static const char pci_device_1393_1340[] = "CP134U (4-Port RS-422/485 Universal PCI)"; +static const char pci_device_1393_1341[] = "CB134I (4-port RS-422/485 PC/104-plus Module)"; +static const char pci_device_1393_1380[] = "CP138U (8-port RS-232/422/485 Smart Universal PCI)"; static const char pci_device_1393_1680[] = "Smartio C168H/PCI"; static const char pci_device_1393_1681[] = "CP-168U V2 Smart Serial Board (8-port RS-232)"; +static const char pci_device_1393_1682[] = "CP168EL (8-port RS-232 Smart PCI Express)"; static const char pci_device_1393_2040[] = "Intellio CP-204J"; static const char pci_device_1393_2180[] = "Intellio C218 Turbo PCI"; static const char pci_device_1393_3200[] = "Intellio C320 Turbo PCI"; @@ -16532,6 +18059,9 @@ static const char pci_subsys_1397_08b4_1397_b520[] = "HFC-4S [IOB4ST]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1397_08b4_1397_b540[] = "HFC-4S [Swyx 4xS0 SX2 QuadBri]"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1397_08b4_1397_b556[] = "HFC-4S [Junghanns DuoDBRI]"; +#endif static const char pci_device_1397_16b8[] = "ISDN network Controller [HFC-8S]"; static const char pci_device_1397_2bd0[] = "ISDN network controller [HFC-PCI]"; #ifdef INIT_SUBSYS_INFO @@ -16547,6 +18077,7 @@ static const char pci_subsys_1397_2bd0_1397_2bd0[] = "ISDN Board"; static const char pci_subsys_1397_2bd0_e4bf_1000[] = "CI1-1-Harp"; #endif static const char pci_device_1397_30b1[] = "ISDN network Controller [HFC-E1]"; +static const char pci_device_1397_b700[] = "ISDN network controller PrimuX S0 [HFC-PCI]"; static const char pci_device_1397_f001[] = "GSM Network Controller [HFC-4GSM]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16598,6 +18129,7 @@ static const char pci_device_13a3_0018[] = "8154 Security Processor"; static const char pci_device_13a3_001d[] = "7956 Security Processor"; static const char pci_device_13a3_0020[] = "7955 Security Processor"; static const char pci_device_13a3_0026[] = "8155 Security Processor"; +static const char pci_device_13a3_002e[] = "9630 Compression Processor"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13a4[] = "Rascom Inc"; @@ -16707,6 +18239,7 @@ static const char pci_device_13c1_1004[] = "9650SE SATA-II RAID"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13c2[] = "Technotrend Systemtechnik GmbH"; static const char pci_device_13c2_000e[] = "Technotrend/Hauppauge DVB card rev2.3"; +static const char pci_device_13c2_1019[] = "TTechnoTrend-budget DVB S2-3200"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13c3[] = "Janz Computer AG"; @@ -16767,6 +18300,7 @@ static const char pci_vendor_13d2[] = "Shark Multimedia Inc"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13d3[] = "IMC Networks"; +static const char pci_device_13d3_3219[] = "DTV-DVB 7049A DVB-T USB Stick"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13d4[] = "Graphics Microsystems Inc"; @@ -16861,6 +18395,7 @@ static const char pci_vendor_13ef[] = "Coppercom Inc"; static const char pci_vendor_13f0[] = "Sundance Technology Inc / IC Plus Corp"; static const char pci_device_13f0_0200[] = "IC Plus IP100A Integrated 10/100 Ethernet MAC + PHY"; static const char pci_device_13f0_0201[] = "ST201 Sundance Ethernet"; +static const char pci_device_13f0_1021[] = "TC9020 Gigabit Ethernet"; static const char pci_device_13f0_1023[] = "IP1000 Family Gigabit Ethernet"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16907,9 +18442,58 @@ static const char pci_subsys_13f6_0111_1043_80e2[] = "CMI8738 6ch-MX"; static const char pci_subsys_13f6_0111_13f6_0111[] = "CMI8738/C3DX PCI Audio Device"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_13f6_9761[] = "Theatron Agrippa"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_153b_1144[] = "Aureon 5.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_153b_1170[] = "Aureon 7.1"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_13f6_0111_1681_a000[] = "Gamesurround MUSE XL"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_270f_1103[] = "CT-7NJS Ultra motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_584d_3731[] = "Digital X-Mystique"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_584d_3741[] = "X-Plosion 7.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_584d_3751[] = "X-Raider 7.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_584d_3761[] = "X-Mystique 7.1 LP"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_584d_3771[] = "X-Mystique 7.1 LP Value"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_0111_7284_8384[] = "Striker 7.1"; +#endif static const char pci_device_13f6_0211[] = "CM8738"; +static const char pci_device_13f6_8788[] = "CMI8788 [Oxygen HD Audio]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_8788_1043_8269[] = "Virtuoso 200 (Xonar D2)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_8788_14c3_1710[] = "HIFIER"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_8788_1a58_0910[] = "Barracuda AC-1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_8788_415a_5431[] = "X-Meridian 7.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_8788_584d_3781[] = "HDA X-Purity 7.1 Platinum"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_13f6_8788_7284_9761[] = "CLARO"; +#endif static const char pci_device_13f6_9880[] = "CM9880"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16946,6 +18530,8 @@ static const char pci_subsys_13fe_1600_1602_0002[] = "PCI-1602 2-port isolated R #ifdef INIT_SUBSYS_INFO static const char pci_subsys_13fe_1600_1612_0004[] = "PCI-1612 4-port RS-232/422/485"; #endif +static const char pci_device_13fe_1603[] = "PCI-1603 2-port isolated RS-232/current loop"; +static const char pci_device_13fe_1604[] = "PCI-1604 2-port RS-232"; static const char pci_device_13fe_16ff[] = "PCI-16xx series PCI multiport serial board (function 1: RX/TX steering CPLD)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_13fe_16ff_1601_0000[] = "PCI-1601 2-port unisolated RS-422/485 PCI communications card"; @@ -17129,15 +18715,23 @@ static const char pci_subsys_1412_1724_270f_f641[] = "ZNF3-150"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1412_1724_270f_f645[] = "ZNF3-250"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1412_1724_3136_4154[] = "Prodigy 7.1 XT"; -#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1413[] = "Addonics"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1414[] = "Microsoft Corporation"; +static const char pci_device_1414_5801[] = "XMA Decoder (Xenon)"; +static const char pci_device_1414_5802[] = "SATA Controller - CdRom (Xenon)"; +static const char pci_device_1414_5803[] = "SATA Controller - Disk (Xenon)"; +static const char pci_device_1414_5804[] = "OHCI Controller 0 (Xenon)"; +static const char pci_device_1414_5805[] = "EHCI Controller 0 (Xenon)"; +static const char pci_device_1414_5806[] = "OHCI Controller 1 (Xenon)"; +static const char pci_device_1414_5807[] = "EHCI Controller 1 (Xenon)"; +static const char pci_device_1414_580a[] = "Fast Ethernet Adapter (Xenon)"; +static const char pci_device_1414_580b[] = "Secure Flash Controller (Xenon)"; +static const char pci_device_1414_580d[] = "System Management Controller (Xenon)"; +static const char pci_device_1414_5811[] = "Xenos GPU (Xenon)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1415[] = "Oxford Semiconductor Ltd"; @@ -17237,6 +18831,10 @@ static const char pci_vendor_1424[] = "Videoserver Connections"; static const char pci_vendor_1425[] = "Chelsio Communications Inc"; static const char pci_device_1425_000b[] = "T210 Protocol Engine"; static const char pci_device_1425_000c[] = "T204 Protocol Engine"; +static const char pci_device_1425_0030[] = "T310 10GbE Single Port Protocol Engine Ethernet Adapter"; +static const char pci_device_1425_0031[] = "T320 10GbE Dual Port Protocol Engine Ethernet Adapter"; +static const char pci_device_1425_0032[] = "T302 1GbE Dual Port Protocol Engine Ethernet adapter"; +static const char pci_device_1425_0033[] = "T304 1GbE Quad Port Protocol Engine Ethernet adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1426[] = "Storage Technology Corp."; @@ -17448,8 +19046,11 @@ static const char pci_device_1462_5501[] = "nVidia NV15DDR [GeForce2 Ti]"; static const char pci_device_1462_6819[] = "Broadcom Corporation BCM4306 802.11b/g Wireless LAN Controller [MSI CB54G]"; static const char pci_device_1462_6825[] = "PCI Card wireless 11g [PC54G]"; static const char pci_device_1462_6834[] = "RaLink RT2500 802.11g [PC54G2]"; -static const char pci_device_1462_7125[] = "K8N motherboard"; +static const char pci_device_1462_7125[] = "MS-7125 [K8N Neo4 Platinum]"; static const char pci_device_1462_7235[] = "P965 Neo MS-7235 mainboard"; +static const char pci_device_1462_7242[] = "K9AGM RS485 Motherboard"; +static const char pci_device_1462_7250[] = "MS-7250 Motherboard [K9N Platinum SLI/non-SLI]"; +static const char pci_device_1462_7327[] = "K9AGM2-FIH Motherboard"; static const char pci_device_1462_8725[] = "NVIDIA NV25 [GeForce4 Ti 4600] VGA Adapter"; static const char pci_device_1462_9000[] = "NVIDIA NV28 [GeForce4 Ti 4800] VGA Adapter"; static const char pci_device_1462_9110[] = "GeFORCE FX5200"; @@ -17458,6 +19059,7 @@ static const char pci_device_1462_9123[] = "NVIDIA NV31 [GeForce FX 5600] FX5600 static const char pci_device_1462_9510[] = "Radeon 9600XT"; static const char pci_device_1462_9511[] = "Radeon 9600XT"; static const char pci_device_1462_9591[] = "nVidia Corporation NV36 [GeForce FX 5700LE]"; +static const char pci_device_1462_b834[] = "Wireless 11g Turbo G PCI card [MSI PC60G]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1463[] = "Fast Corporation"; @@ -17622,7 +19224,7 @@ static const char pci_vendor_1497[] = "SMA Regelsysteme GmBH"; static const char pci_device_1497_1497[] = "SMA Technologie AG"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1498[] = "TEWS Datentechnik GmBH"; +static const char pci_vendor_1498[] = "TEWS Technologies GmbH"; static const char pci_device_1498_0330[] = "TPMC816 2 Channel CAN bus controller."; static const char pci_device_1498_0385[] = "TPMC901 Extended CAN bus with 2/4/6 CAN controller"; static const char pci_device_1498_21cc[] = "TCP460 CompactPCI 16 Channel Serial Interface RS232/RS422"; @@ -17859,6 +19461,8 @@ static const char pci_vendor_14d5[] = "Nitsuko Corporation"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_14d6[] = "Accusys Inc"; +static const char pci_device_14d6_6101[] = "ACS-61xxx, PCIe to SAS/SATA RAID HBA"; +static const char pci_device_14d6_6201[] = "ACS-62xxx, External PCIe to SAS/SATA RAID controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_14d7[] = "Hirakawa Hewtech Corp"; @@ -17933,6 +19537,7 @@ static const char pci_subsys_14e4_1600_107b_5048[] = "E4500 Onboard"; #endif static const char pci_device_14e4_1601[] = "NetXtreme BCM5752M Gigabit Ethernet PCI Express"; static const char pci_device_14e4_1639[] = "NetXtreme II BCM5709 Gigabit Ethernet"; +static const char pci_device_14e4_163a[] = "NetXtreme II BCM5709S Gigabit Ethernet"; static const char pci_device_14e4_1644[] = "NetXtreme BCM5700 Gigabit Ethernet"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1644_1014_0277[] = "Broadcom Vigil B5700 1000Base-T"; @@ -18031,7 +19636,7 @@ static const char pci_subsys_14e4_1645_1028_0121[] = "Broadcom BCM5701 1000Base- #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_1645_103c_128a[] = "1000Base-T (PCI) [A7061A]"; +static const char pci_subsys_14e4_1645_103c_128a[] = "BCM5701 1000Base-T (HP, OEM 3COM)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif @@ -18152,6 +19757,11 @@ static const char pci_subsys_14e4_1648_0e11_00d0[] = "NC7782 Gigabit Server Adap static const char pci_subsys_14e4_1648_0e11_00d1[] = "NC7783 Gigabit Server Adapter (PCI-X, 10,100,1000-T)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1648_103c_310f[] = "NC7782 Gigabit Server Adapter (PCI-X, 10,100,1000-T)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1648_10a9_8013[] = "Dual Port Gigabit Ethernet (PCI-X,Copper)"; #endif @@ -18176,6 +19786,7 @@ static const char pci_subsys_14e4_1648_1166_1648[] = "NetXtreme CIOB-E 1000Base- #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1648_1734_100b[] = "Primergy RX300"; #endif +static const char pci_device_14e4_1649[] = "NetXtreme BCM5704S_2 Gigabit Ethernet"; static const char pci_device_14e4_164a[] = "NetXtreme II BCM5706 Gigabit Ethernet"; #endif #ifdef INIT_SUBSYS_INFO @@ -18199,6 +19810,9 @@ static const char pci_subsys_14e4_164c_103c_7038[] = "NC373i Integrated Multifun #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_14e4_164d[] = "NetXtreme BCM5702FE Gigabit Ethernet"; +static const char pci_device_14e4_164e[] = "NetXtreme II BCM57710 10Gigabit PCIe [Everest]"; +static const char pci_device_14e4_164f[] = "NetXtreme II BCM57711 10Gigabit PCIe"; +static const char pci_device_14e4_1650[] = "NetXtreme II BCM57712 10Gigabit PCIe"; static const char pci_device_14e4_1653[] = "NetXtreme BCM5705 Gigabit Ethernet"; #endif #ifdef INIT_SUBSYS_INFO @@ -18221,6 +19835,7 @@ static const char pci_subsys_14e4_1654_103c_3100[] = "NC1020 ProLiant Gigabit Se static const char pci_subsys_14e4_1654_103c_3226[] = "NC150T 4-port Gigabit Combo Switch & Adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_14e4_1658[] = "NetXtreme BCM5720 Gigabit Ethernet"; static const char pci_device_14e4_1659[] = "NetXtreme BCM5721 Gigabit Ethernet PCI Express"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1659_1014_02c6[] = "eServer xSeries server mainboard"; @@ -18249,6 +19864,7 @@ static const char pci_subsys_14e4_165a_103c_7051[] = "NC105i PCIe Gigabit Server static const char pci_subsys_14e4_165a_103c_7052[] = "NC105T PCIe Gigabit Server Adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_14e4_165b[] = "NetXtreme BCM5723 Gigabit Ethernet PCIe"; static const char pci_device_14e4_165d[] = "NetXtreme BCM5705M Gigabit Ethernet"; #endif #ifdef INIT_SUBSYS_INFO @@ -18287,9 +19903,15 @@ static const char pci_device_14e4_166e[] = "570x 10/100 Integrated Controller"; static const char pci_device_14e4_1672[] = "NetXtreme BCM5754M Gigabit Ethernet PCI Express"; static const char pci_device_14e4_1673[] = "NetXtreme BCM5755M Gigabit Ethernet PCI Express"; static const char pci_device_14e4_1674[] = "NetXtreme BCM5756ME Gigabit Ethernet PCI Express"; +static const char pci_device_14e4_1676[] = "NetXtreme BCM5750 Gigabit Ethernet"; static const char pci_device_14e4_1677[] = "NetXtreme BCM5751 Gigabit Ethernet PCI Express"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1677_1028_0177[] = "Dimension 8400"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1677_1028_0179[] = "Optiplex GX280"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -18316,6 +19938,9 @@ static const char pci_subsys_14e4_1677_103c_3006[] = "DC7100 SFF(DX878AV)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1677_1734_105d[] = "Scenic W620"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1677_3007_103c[] = "HP DC7100 USFF"; +#endif static const char pci_device_14e4_1678[] = "NetXtreme BCM5715 Gigabit Ethernet"; static const char pci_device_14e4_1679[] = "NetXtreme BCM5715S Gigabit Ethernet"; #endif @@ -18335,12 +19960,21 @@ static const char pci_subsys_14e4_1679_103c_703c[] = "NC326i PCIe Dual Port Giga #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_14e4_167a[] = "NetXtreme BCM5754 Gigabit Ethernet PCI Express"; static const char pci_device_14e4_167b[] = "NetXtreme BCM5755 Gigabit Ethernet PCI Express"; +static const char pci_device_14e4_167c[] = "NetXtreme BCM5750M Gigabit Ethernet"; static const char pci_device_14e4_167d[] = "NetXtreme BCM5751M Gigabit Ethernet PCI Express"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_167d_103c_0940[] = "HP Compaq nw8240 Mobile Workstation"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_167d_17aa_2081[] = "Thinkpad R60e model 0657"; #endif static const char pci_device_14e4_167e[] = "NetXtreme BCM5751F Fast Ethernet PCI Express"; static const char pci_device_14e4_167f[] = "NetLink BCM5787F Fast Ethernet PCI Express"; +static const char pci_device_14e4_1680[] = "NetXtreme BCM5761e Gigabit Ethernet PCIe"; +static const char pci_device_14e4_1681[] = "NetXtreme BCM5761 Gigabit Ethernet PCIe"; +static const char pci_device_14e4_1684[] = "NetXtreme BCM5764M Gigabit Ethernet PCIe"; static const char pci_device_14e4_1693[] = "NetLink BCM5787M Gigabit Ethernet PCI Express"; static const char pci_device_14e4_1696[] = "NetXtreme BCM5782 Gigabit Ethernet"; #endif @@ -18351,6 +19985,7 @@ static const char pci_subsys_14e4_1696_103c_12bc[] = "d530 CMT (DG746A)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1696_14e4_000d[] = "NetXtreme BCM5782 1000Base-T"; #endif +static const char pci_device_14e4_1698[] = "NetLink BCM5784M Gigabit Ethernet PCIe"; static const char pci_device_14e4_169a[] = "NetLink BCM5786 Gigabit Ethernet PCI Express"; static const char pci_device_14e4_169b[] = "NetLink BCM5787 Gigabit Ethernet PCI Express"; static const char pci_device_14e4_169c[] = "NetXtreme BCM5788 Gigabit Ethernet"; @@ -18422,6 +20057,9 @@ static const char pci_subsys_14e4_16aa_103c_3102[] = "NC370F MultifuNCtion Gigab #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_14e4_16ac[] = "NetXtreme II BCM5708S Gigabit Ethernet"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_16ac_1014_0304[] = "NetXtreme II BCM5708S Gigabit Ethernet"; +#endif #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_16ac_103c_1706[] = "NC373m Multifunction Gigabit Server Adapter"; @@ -18491,6 +20129,11 @@ static const char pci_subsys_14e4_170c_1028_0188[] = "Inspiron 6000 laptop"; #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_170c_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_170c_1028_0196[] = "Inspiron 5160"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -18516,6 +20159,7 @@ static const char pci_device_14e4_3360[] = "BCM3360"; static const char pci_device_14e4_4210[] = "BCM4210 iLine10 HomePNA 2.0"; static const char pci_device_14e4_4211[] = "BCM4211 iLine10 HomePNA 2.0 + V.90 56k modem"; static const char pci_device_14e4_4212[] = "BCM4212 v.90 56k modem"; +static const char pci_device_14e4_4220[] = "802-11b/g Wireless PCI controller, packaged as a Linksys WPC54G ver 1.2 PCMCIA card"; static const char pci_device_14e4_4301[] = "BCM4303 802.11b Wireless LAN Controller"; #endif #ifdef INIT_SUBSYS_INFO @@ -18529,8 +20173,8 @@ static const char pci_device_14e4_4305[] = "BCM4307 V.90 56k Modem"; static const char pci_device_14e4_4306[] = "BCM4307 Ethernet Controller"; static const char pci_device_14e4_4307[] = "BCM4307 802.11b Wireless LAN Controller"; static const char pci_device_14e4_4310[] = "BCM4310 Chipcommon I/OController"; -static const char pci_device_14e4_4311[] = "Dell Wireless 1390 WLAN Mini-PCI Card"; -static const char pci_device_14e4_4312[] = "BCM4310 UART"; +static const char pci_device_14e4_4311[] = "BCM94311MCG wlan mini-PCI"; +static const char pci_device_14e4_4312[] = "BCM4312 802.11a/b/g"; static const char pci_device_14e4_4313[] = "BCM4310 Ethernet Controller"; static const char pci_device_14e4_4315[] = "BCM4310 USB Controller"; static const char pci_device_14e4_4318[] = "BCM4318 [AirForce One 54g] 802.11g Wireless LAN Controller"; @@ -18558,6 +20202,9 @@ static const char pci_subsys_14e4_4318_14e4_4318[] = "WPC54G version 3 [Wireless static const char pci_subsys_14e4_4318_16ec_0119[] = "U.S.Robotics Wireless MAXg PC Card"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4318_1737_0042[] = "WMP54GS version 1.1 [Wireless-G PCI Adapter] 802.11g w/SpeedBooster"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_4318_1737_0048[] = "WPC54G-EU version 3 [Wireless-G Notebook Adapter]"; #endif static const char pci_device_14e4_4319[] = "BCM4311 [AirForce 54g] 802.11a/b/g PCI Express Transceiver"; @@ -18641,7 +20288,14 @@ static const char pci_subsys_14e4_4325_1414_0003[] = "Wireless Notebook Adapter static const char pci_subsys_14e4_4325_1414_0004[] = "Wireless PCI Adapter MN-730"; #endif static const char pci_device_14e4_4326[] = "BCM4307 Chipcommon I/O Controller?"; +static const char pci_device_14e4_4328[] = "BCM4328 802.11a/b/g/n"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4328_1028_000a[] = "Wireless 1500 Draft 802.11n WLAN Mini-card"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_14e4_4329[] = "BCM43XG"; +static const char pci_device_14e4_432b[] = "BCM4322 802.11a/b/g/n Wireless LAN Controller"; static const char pci_device_14e4_4344[] = "EDGE/GPRS data and 802.11b/g combo cardbus [GC89]"; static const char pci_device_14e4_4401[] = "BCM4401 100Base-T"; #endif @@ -18702,6 +20356,7 @@ static const char pci_device_14e4_5824[] = "BCM5824 Crypto Accelerator"; static const char pci_device_14e4_5840[] = "BCM5840 Crypto Accelerator"; static const char pci_device_14e4_5841[] = "BCM5841 Crypto Accelerator"; static const char pci_device_14e4_5850[] = "BCM5850 Crypto Accelerator"; +static const char pci_device_14e4_b800[] = "BCM56800 StrataXGS 10GE Switch Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_14e5[] = "Pixelfusion Ltd"; @@ -19026,8 +20681,9 @@ static const char pci_device_14f1_2f02[] = "HSF 56k HSFi Data/Fax"; static const char pci_device_14f1_2f11[] = "HSF 56k HSFi Modem"; static const char pci_device_14f1_2f20[] = "HSF 56k Data/Fax Modem"; static const char pci_device_14f1_2f30[] = "HSF 56k Data/Fax Modem"; -static const char pci_device_14f1_5045[] = "HDAUDIO with SmartCP"; +static const char pci_device_14f1_5045[] = "CX20549 (Venice)"; static const char pci_device_14f1_5047[] = "High Definition Audio [Waikiki]"; +static const char pci_device_14f1_5b7a[] = "CX23418 Single-Chip MPEG-2 Encoder with Integrated Analog Video/Broadcast Audio Decoder"; static const char pci_device_14f1_8234[] = "RS8234 ATM SAR Controller [ServiceSAR Plus]"; static const char pci_device_14f1_8800[] = "CX23880/1/2/3 PCI Video and Audio Decoder"; #ifdef INIT_SUBSYS_INFO @@ -19154,10 +20810,16 @@ static const char pci_subsys_14f1_8800_18ac_db50[] = "FusionHDTV DVB-T Dual Digi #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14f1_8800_7063_3000[] = "pcHDTV HD3000 HDTV"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_7063_5500[] = "pcHDTV HD-5500"; +#endif static const char pci_device_14f1_8801[] = "CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14f1_8801_0070_2801[] = "Hauppauge WinTV 28xxx (Roslyn) models"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8801_7063_5500[] = "pcHDTV HD-5500"; +#endif static const char pci_device_14f1_8802[] = "CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14f1_8802_0070_2801[] = "Hauppauge WinTV 28xxx (Roslyn) models"; @@ -19172,6 +20834,9 @@ static const char pci_subsys_14f1_8802_1043_4823[] = "ASUS PVR-416"; static const char pci_subsys_14f1_8802_107d_663c[] = "Leadtek PVR 2000"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_107d_665f[] = "WinFast DTV1000-T"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_14f1_8802_14f1_0187[] = "Conexant DVB-T reference design"; #endif #ifdef INIT_SUBSYS_INFO @@ -19198,10 +20863,16 @@ static const char pci_subsys_14f1_8802_18ac_db10[] = "DVICO FusionHDTV DVB-T Plu #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14f1_8802_7063_3000[] = "pcHDTV HD3000 HDTV"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_7063_5500[] = "pcHDTV HD-5500"; +#endif static const char pci_device_14f1_8804[] = "CX23880/1/2/3 PCI Video and Audio Decoder [IR Port]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14f1_8804_0070_9002[] = "Nova-T DVB-T Model 909"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8804_7063_5500[] = "pcHDTV HD-5500"; +#endif static const char pci_device_14f1_8811[] = "CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14f1_8811_0070_3401[] = "Hauppauge WinTV 34xxx models"; @@ -19457,6 +21128,30 @@ static const char pci_subsys_1522_0100_1522_2600[] = "RockForceD8 8 Port V.90 Da #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1522_0100_1522_2700[] = "RockForceF8 8 Port V.34 Super-G3 Fax Modem"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_3000[] = "IQ Express D1 - 1 Port V.92 Data Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_3100[] = "IQ Express F1 - 1 Port V.34 Super-G3 Fax Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_3200[] = "IQ Express D2 - 2 Port V.92 Data Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_3300[] = "IQ Express F2 - 2 Port V.34 Super-G3 Fax Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_3400[] = "IQ Express D4 - 4 Port V.92 Data Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_3500[] = "IQ Express F4 - 4 Port V.34 Super-G3 Fax Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_3c00[] = "IQ Express D8 - 8 Port V.92 Data Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_3d00[] = "IQ Express F8 - 8 Port V.34 Super-G3 Fax Modem"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1523[] = "MUSIC Semiconductors"; @@ -19474,6 +21169,9 @@ static const char pci_device_1524_0530[] = "ENE PCI Memory Stick Card Reader Con static const char pci_device_1524_0550[] = "ENE PCI Secure Digital Card Reader Controller"; static const char pci_device_1524_0551[] = "SD/MMC Card Reader Controller"; static const char pci_device_1524_0610[] = "PCI Smart Card Reader Controller"; +static const char pci_device_1524_0730[] = "ENE PCI Memory Stick Card Reader Controller"; +static const char pci_device_1524_0750[] = "ENE PCI SmartMedia / xD Card Reader Controller"; +static const char pci_device_1524_0751[] = "ENE PCI Secure Digital / MMC Card Reader Controller"; static const char pci_device_1524_1211[] = "CB1211 Cardbus Controller"; static const char pci_device_1524_1225[] = "CB1225 Cardbus Controller"; static const char pci_device_1524_1410[] = "CB1410 Cardbus Controller"; @@ -19551,6 +21249,9 @@ static const char pci_vendor_1534[] = "ROAD Corp"; static const char pci_vendor_1535[] = "EVERGREEN Technologies Inc"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1536[] = "ACTIS Computer"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1537[] = "DATALEX COMMUNCATIONS"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -19845,6 +21546,9 @@ static const char pci_vendor_158f[] = "Ditect Coop"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1590[] = "3pardata Inc"; +static const char pci_device_1590_0001[] = "Eagle Cluster Manager"; +static const char pci_device_1590_0002[] = "Osprey Cluster Manager"; +static const char pci_device_1590_a01d[] = "FC044X Fibre Channel HBA"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1591[] = "ARN"; @@ -19937,9 +21641,15 @@ static const char pci_vendor_15ab[] = "Bluesteel Networks Inc"; static const char pci_vendor_15ac[] = "North Atlantic Instruments"; #endif static const char pci_vendor_15ad[] = "VMware Inc"; -static const char pci_device_15ad_0405[] = "[VMware SVGA II] PCI Display Adapter"; -static const char pci_device_15ad_0710[] = "Virtual SVGA"; -static const char pci_device_15ad_0720[] = "VMware High-Speed Virtual NIC [vmxnet]"; +static const char pci_device_15ad_0405[] = "Abstract SVGA II Adapter"; +static const char pci_device_15ad_0710[] = "Abstract SVGA Adapter"; +static const char pci_device_15ad_0720[] = "Abstract Ethernet Controller"; +static const char pci_device_15ad_0740[] = "Virtual Machine Communication Interface"; +static const char pci_device_15ad_0770[] = "Abstract USB2 EHCI Controller"; +static const char pci_device_15ad_0801[] = "Virtual Machine Interface"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_15ad_0801_15ad_0800[] = "Hypervisor ROM Interface"; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_15ae[] = "Amersham Pharmacia Biotech"; #endif @@ -19954,6 +21664,7 @@ static const char pci_vendor_15b2[] = "Mosaid Technologies Inc"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_15b3[] = "Mellanox Technologies"; +static const char pci_device_15b3_0191[] = "MT25408 [ConnectX IB SDR Flash Recovery]"; static const char pci_device_15b3_5274[] = "MT21108 InfiniBridge"; static const char pci_device_15b3_5a44[] = "MT23108 InfiniHost"; static const char pci_device_15b3_5a45[] = "MT23108 [Infinihost HCA Flash Recovery]"; @@ -19963,6 +21674,13 @@ static const char pci_device_15b3_6274[] = "MT25204 [InfiniHost III Lx HCA]"; static const char pci_device_15b3_6278[] = "MT25208 InfiniHost III Ex (Tavor compatibility mode)"; static const char pci_device_15b3_6279[] = "MT25208 [InfiniHost III Ex HCA Flash Recovery]"; static const char pci_device_15b3_6282[] = "MT25208 InfiniHost III Ex"; +static const char pci_device_15b3_6340[] = "MT25408 [ConnectX IB SDR]"; +static const char pci_device_15b3_634a[] = "MT25418 [ConnectX IB DDR, PCIe 2.0 2.5GT/s]"; +static const char pci_device_15b3_6354[] = "MT25428 [ConnectX IB QDR]"; +static const char pci_device_15b3_6368[] = "MT25448 [ConnectX EN 10GigE, PCIe 2.0 2.5GT/s]"; +static const char pci_device_15b3_6732[] = "MT26418 [ConnectX IB DDR, PCIe 2.0 5GT/s]"; +static const char pci_device_15b3_673c[] = "MT26428 [ConnectX IB QDR, PCIe 2.0 5GT/s]"; +static const char pci_device_15b3_6750[] = "MT26448 [ConnectX EN 10GigE, PCIe 2.0 5GT/s]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_15b4[] = "CCI/TRIAD"; @@ -20132,6 +21850,7 @@ static const char pci_vendor_15e7[] = "Get Engineering Corp"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_15e8[] = "National Datacomm Corp"; static const char pci_device_15e8_0130[] = "Wireless PCI Card"; +static const char pci_device_15e8_0131[] = "NCP130A2 Wireless NIC"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_15e9[] = "Pacific Digital Corp"; @@ -20277,6 +21996,7 @@ static const char pci_device_163c_5449[] = "SmartPCI561 Modem"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1657[] = "Brocade Communications Systems, Inc."; +static const char pci_device_1657_0646[] = "Brocade 400 4Gb PCIe FC HBA"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_165a[] = "Epix Inc"; @@ -20310,6 +22030,12 @@ static const char pci_device_1677_12d7[] = "5LS172.61 B&R Dual CAN Interface Car static const char pci_device_1677_20ad[] = "5ACPCI.MFIO-K01 Profibus DP / K-Feldbus / COM"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1678[] = "NetEffect"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1679[] = "Tokyo Electron Device Ltd."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_167b[] = "ZyDAS Technology Corp."; static const char pci_device_167b_2102[] = "ZyDAS ZD1202"; #ifdef INIT_SUBSYS_INFO @@ -20332,11 +22058,11 @@ static const char pci_vendor_1688[] = "CastleNet Technology Inc."; static const char pci_device_1688_1170[] = "WLAN 802.11b card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_168c[] = "Atheros Communications, Inc."; +static const char pci_vendor_168c[] = "Atheros Communications Inc."; static const char pci_device_168c_0007[] = "AR5000 802.11a Wireless Adapter"; static const char pci_device_168c_0011[] = "AR5210 802.11a NIC"; static const char pci_device_168c_0012[] = "AR5211 802.11ab NIC"; -static const char pci_device_168c_0013[] = "AR5212 802.11abg NIC"; +static const char pci_device_168c_0013[] = "AR5212/AR5213 Multiprotocol MAC/baseband processor"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_1113_d301[] = "Philips CPWNA100 Wireless CardBus adapter"; #endif @@ -20380,6 +22106,9 @@ static const char pci_subsys_168c_0013_1385_4d00[] = "Netgear WG311T Wireless PC static const char pci_subsys_168c_0013_1458_e911[] = "Gigabyte GN-WIAG02"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_1468_0408[] = "ThinkPad 11b/g Wireless LAN Mini PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_14b7_0a60[] = "8482-WD ORiNOCO 11a/b/g Wireless PCI Adapter"; #endif #ifdef INIT_SUBSYS_INFO @@ -20398,6 +22127,9 @@ static const char pci_subsys_168c_0013_168c_1027[] = "Engenius NL-3054CB ARIES b static const char pci_subsys_168c_0013_168c_1042[] = "Ubiquiti Networks SuperRange a/b/g Cardbus Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_168c_1051[] = "EZ Connect g 802.11g 108Mbps Wireless PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_168c_2026[] = "Netgate 5354MP ARIES a(108Mb turbo)/b/g MiniPCI Adapter"; #endif #ifdef INIT_SUBSYS_INFO @@ -20421,7 +22153,7 @@ static const char pci_subsys_168c_0013_185f_1012[] = "CM9 Wireless a/b/g MiniPCI #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_185f_2012[] = "Wistron NeWeb WLAN a+b+g model CB9"; #endif -static const char pci_device_168c_001a[] = "AR5005G 802.11abg NIC"; +static const char pci_device_168c_001a[] = "AR2413 802.11bg NIC"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_001a_1052_168c[] = "Sweex Wireless Lan PC Card 54Mbps"; #endif @@ -20455,7 +22187,7 @@ static const char pci_subsys_168c_001a_168c_1052[] = "TP-Link TL-WN510G Wireless #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_001a_168c_2052[] = "Compex Wireless 802.11 b/g MiniPCI Adapter, Rev A1 [WLM54G]"; #endif -static const char pci_device_168c_001b[] = "AR5006X 802.11abg NIC"; +static const char pci_device_168c_001b[] = "AR5413 802.11abg NIC"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_001b_1186_3a19[] = "D-Link AirPremier AG DWL-AG660 Wireless Cardbus Adapter"; #endif @@ -20475,12 +22207,27 @@ static const char pci_subsys_168c_001b_168c_2062[] = "EnGenius EMP-8602 (400mw) static const char pci_subsys_168c_001b_168c_2063[] = "EnGenius EMP-8602 (400mw) or Compex WLM54AG"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001b_185f_1600[] = "DCMA-82 High Power WLAN 802.11a/b/g mini-PCI Module (Super A/G, eXtended Range, 400mW)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_001b_a727_6804[] = "Wireless 11a/b/g PC Card with XJACK(r) Antenna"; #endif -static const char pci_device_168c_001c[] = "AR5006EG 802.11 b/g Wireless PCI Express Adapter"; -static const char pci_device_168c_0020[] = "AR5005VL 802.11bg Wireless NIC"; -static const char pci_device_168c_0023[] = "AR5416 802.11a/b/g/n Wireless PCI Adapter"; -static const char pci_device_168c_0024[] = "AR5418 802.11a/b/g/n Wireless PCI Express Adapter"; +static const char pci_device_168c_001c[] = "AR242x 802.11abg Wireless PCI Express Adapter"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001c_168c_3061[] = "AR5006EGS 802.11bg NIC (2.4GHz, PCI Express)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001c_168c_3062[] = "AR5006EXS 802.11abg NIC (2.4/5.0GHz, PCI Express)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001c_168c_3063[] = "AR5006EX 802.11abg NIC (2.4/5.0GHz, PCI Express)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001c_168c_3065[] = "AR5006EG 802.11bg NIC (2.4GHz, PCI Express)"; +#endif +static const char pci_device_168c_0020[] = "AR5513 802.11abg Wireless NIC"; +static const char pci_device_168c_0023[] = "AR5416 802.11abgn Wireless PCI Adapter"; +static const char pci_device_168c_0024[] = "AR5418 802.11abgn Wireless PCI Express Adapter"; static const char pci_device_168c_1014[] = "AR5212 802.11abg NIC"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_1014_1014_058a[] = "ThinkPad 11a/b/g Wireless LAN Mini Express Adapter (AR5BXB6)"; @@ -20509,8 +22256,11 @@ static const char pci_device_16ab_1102[] = "PCMCIA-to-PCI Wireless Network Bridg static const char pci_device_16ab_8501[] = "WL-8305 Wireless LAN PCI Adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_16ae[] = "Safenet Inc"; -static const char pci_device_16ae_1141[] = "SafeXcel-1141"; +static const char pci_vendor_16ae[] = "SafeNet Inc"; +static const char pci_device_16ae_0001[] = "SafeXcel 1140"; +static const char pci_device_16ae_000a[] = "SafeXcel 1841"; +static const char pci_device_16ae_1141[] = "SafeXcel 1141"; +static const char pci_device_16ae_1841[] = "SafeXcel 1842"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16af[] = "SparkLAN Communications, Inc."; @@ -20527,6 +22277,7 @@ static const char pci_vendor_16be[] = "Creatix Polymedia GmbH"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16c6[] = "Micrel-Kendin"; static const char pci_device_16c6_8695[] = "Centaur KS8695 ARM processor"; +static const char pci_device_16c6_8842[] = "KSZ8842-PMQL 2-Port Ethernet Switch"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16c8[] = "Octasic Inc."; @@ -20546,7 +22297,44 @@ static const char pci_vendor_16ce[] = "Roland Corp."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16d5[] = "Acromag, Inc."; +static const char pci_device_16d5_0504[] = "PMC-DX504 Reconfigurable FPGA with LVDS I/O"; +static const char pci_device_16d5_0520[] = "PMC520 Serial Communication, 232 Octal"; +static const char pci_device_16d5_0521[] = "PMC521 Serial Communication, 422/485 Octal"; +static const char pci_device_16d5_1020[] = "PMC-AX1020 Reconfigurable FPGA with A/D & D/A"; +static const char pci_device_16d5_1065[] = "PMC-AX1065 Reconfigurable FPGA with A/D & D/A"; +static const char pci_device_16d5_2004[] = "PMC-DX2004 Reconfigurable FPGA with LVDS I/O"; +static const char pci_device_16d5_2020[] = "PMC-AX2020 Reconfigurable FPGA with A/D & D/A"; +static const char pci_device_16d5_2065[] = "PMC-AX2065 Reconfigurable FPGA with A/D & D/A"; +static const char pci_device_16d5_3020[] = "PMC-AX3020 Reconfigurable FPGA with A/D & D/A"; +static const char pci_device_16d5_3065[] = "PMC-AX3065 Reconfigurable FPGA with A/D & D/A"; +static const char pci_device_16d5_4243[] = "PMC424, APC424, AcPC424 Digital I/O and Counter Timer Module"; +static const char pci_device_16d5_4248[] = "PMC464, APC464, AcPC464 Digital I/O and Counter Timer Module"; +static const char pci_device_16d5_424b[] = "PMC-DX2002 Reconfigurable FPGA with Differential I/O"; +static const char pci_device_16d5_4253[] = "PMC-DX503 Reconfigurable FPGA with TTL and Differential I/O"; +static const char pci_device_16d5_4312[] = "PMC-CX1002 Reconfigurable Conduction-Cooled FPGA Virtex-II with Differential I/O"; +static const char pci_device_16d5_4313[] = "PMC-CX1003 Reconfigurable Conduction-Cooled FPGA Virtex-II with CMOS and Differential I/O"; +static const char pci_device_16d5_4322[] = "PMC-CX2002 Reconfigurable Conduction-Cooled FPGA Virtex-II with Differential I/O"; +static const char pci_device_16d5_4323[] = "PMC-CX2003 Reconfigurable Conduction-Cooled FPGA Virtex-II with CMOS and Differential I/O"; +static const char pci_device_16d5_4350[] = "PMC-DX501 Reconfigurable Digital I/O Module"; +static const char pci_device_16d5_4353[] = "PMC-DX2003 Reconfigurable FPGA with TTL and Differential I/O"; +static const char pci_device_16d5_4357[] = "PMC-DX502 Reconfigurable Differential I/O Module"; +static const char pci_device_16d5_4457[] = "PMC730, APC730, AcPC730 Multifunction Module"; +static const char pci_device_16d5_464d[] = "PMC408 32-Channel Digital Input/Output Module"; +static const char pci_device_16d5_4850[] = "PMC220-16 12-Bit Analog Output Module"; +static const char pci_device_16d5_4a42[] = "PMC483, APC483, AcPC483 Counter Timer Module"; +static const char pci_device_16d5_4a50[] = "PMC484, APC484, AcPC484 Counter Timer Module"; +static const char pci_device_16d5_4a56[] = "PMC230 16-Bit Analog Output Module"; +static const char pci_device_16d5_4b47[] = "PMC330, APC330, AcPC330 Analog Input Module, 16-bit A/D"; +static const char pci_device_16d5_4c40[] = "PMC-LX40 Reconfigurable Virtex-4 FPGA with plug-in I/O"; +static const char pci_device_16d5_4c60[] = "PMC-LX60 Reconfigurable Virtex-4 FPGA with plug-in I/O"; +static const char pci_device_16d5_4d4d[] = "PMC341, APC341, AcPC341 Analog Input Module, Simultaneous Sample & Hold"; static const char pci_device_16d5_4d4e[] = "PMC482, APC482, AcPC482 Counter Timer Board"; +static const char pci_device_16d5_524d[] = "PMC-DX2001 Reconfigurable FPGA with TTL I/O"; +static const char pci_device_16d5_5335[] = "PMC-SX35 Reconfigurable Virtex-4 FPGA with plug-in I/O"; +static const char pci_device_16d5_5456[] = "PMC470 48-Channel Digital Input/Output Module"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_16da[] = "Advantech Co., Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16df[] = "PIKA Technologies Inc."; @@ -20558,6 +22346,7 @@ static const char pci_device_16e3_1e0f[] = "LEON2FT Processor"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16e5[] = "Intellon Corp."; static const char pci_device_16e5_6000[] = "INT6000 Ethernet-to-Powerline Bridge [HomePlug AV]"; +static const char pci_device_16e5_6300[] = "INT6300 Ethernet-to-Powerline Bridge [HomePlug AV]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16ec[] = "U.S. Robotics"; @@ -20594,6 +22383,9 @@ static const char pci_device_170b_0100[] = "NSP2000-SSL crypto accelerator"; static const char pci_vendor_170c[] = "YottaYotta Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1719[] = "EZChip Technologies"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1725[] = "Vitesse Semiconductor"; static const char pci_device_1725_7174[] = "VSC7174 PCI/PCI-X Serial ATA Host Bus Controller"; #endif @@ -20602,9 +22394,10 @@ static const char pci_vendor_172a[] = "Accelerated Encryption"; static const char pci_device_172a_13c8[] = "AEP SureWare Runner 1000V3"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1734[] = "Fujitsu Siemens Computer GmbH"; +static const char pci_vendor_1734[] = "Fujitsu Siemens Computers"; static const char pci_device_1734_1078[] = "Amilo Pro v2010"; static const char pci_device_1734_1085[] = "Celsius M450"; +static const char pci_device_1734_1098[] = "Amilo L 1310G"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1737[] = "Linksys"; @@ -20640,6 +22433,9 @@ static const char pci_vendor_1743[] = "Peppercon AG"; static const char pci_device_1743_8139[] = "ROL/F-100 Fast Ethernet Adapter with ROL"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1745[] = "ViXS Systems, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1749[] = "RLX Technologies"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -20655,9 +22451,16 @@ static const char pci_vendor_175c[] = "AudioScience Inc"; static const char pci_vendor_175e[] = "Sanera Systems, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1760[] = "TEDIA spol. s r. o."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1775[] = "SBS Technologies"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_177d[] = "Cavium Networks"; +static const char pci_device_177d_0001[] = "Nitrox XL"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1787[] = "Hightech Information System Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -20668,6 +22471,7 @@ static const char pci_device_1796_0003[] = "Counter Timer"; static const char pci_device_1796_0004[] = "CAMAC Controller"; static const char pci_device_1796_0005[] = "PROFIBUS"; static const char pci_device_1796_0006[] = "AMCC HOTlink"; +static const char pci_device_1796_000d[] = "Synchronisation Slave"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1797[] = "JumpTec h, GMBH"; @@ -20699,6 +22503,9 @@ static const char pci_device_17a0_8034[] = "GL880S USB 2.0 controller"; static const char pci_vendor_17aa[] = "Lenovo"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_17ab[] = "Phillips Components"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17af[] = "Hightech Information System Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -20737,6 +22544,7 @@ static const char pci_device_17d3_1210[] = "ARC-1210 4-Port PCI-Express to SATA static const char pci_device_17d3_1220[] = "ARC-1220 8-Port PCI-Express to SATA RAID Controller"; static const char pci_device_17d3_1230[] = "ARC-1230 12-Port PCI-Express to SATA RAID Controller"; static const char pci_device_17d3_1260[] = "ARC-1260 16-Port PCI-Express to SATA RAID Controller"; +static const char pci_device_17d3_1280[] = "ARC-1231 12-Port PCI-Express to SATA RAID Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17d5[] = "S2io Inc."; @@ -20753,6 +22561,11 @@ static const char pci_subsys_17d5_5831_10a9_8020[] = "Single Port 10 Gigabit Eth static const char pci_subsys_17d5_5831_10a9_8024[] = "Single Port 10 Gigabit Ethernet (PCI-X, Fiber)"; #endif static const char pci_device_17d5_5832[] = "Xframe II 10Gbps Ethernet"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_17d5_5832_103c_1337[] = "PCI-X 266MHz 10GigE SR [AD385A]"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_17d5_5832_10a9_8021[] = "Single Port 10 Gigabit Ethernet II (PCI-X, Fiber)"; #endif @@ -20760,8 +22573,6 @@ static const char pci_subsys_17d5_5832_10a9_8021[] = "Single Port 10 Gigabit Eth #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17db[] = "Cray Inc"; static const char pci_device_17db_0101[] = "XT Series [Seastar] 3D Toroidal Router"; -static const char pci_device_17db_0201[] = "XT Series [Seastar] 3D Toroidal Router with RMA"; -static const char pci_device_17db_0202[] = "XT Series [Seastar] 3D Toroidal Router with RMA"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17de[] = "KWorld Computer Co. Ltd."; @@ -20846,6 +22657,9 @@ static const char pci_subsys_1814_0201_1458_e381[] = "GN-WMKG 802.11b/g Wireless static const char pci_subsys_1814_0201_1458_e931[] = "GN-WIKG 802.11b/g mini-PCI Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_1462_6833[] = "Unknown 802.11g mini-PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0201_1462_6835[] = "Wireless 11G CardBus CB54G2"; #endif #ifdef INIT_SUBSYS_INFO @@ -20860,6 +22674,7 @@ static const char pci_subsys_1814_0201_1799_701a[] = "F5D7010 Wireless G Noteboo #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0201_185f_22a0[] = "CN-WF513 Wireless Cardbus Adapter"; #endif +static const char pci_device_1814_0300[] = "Wireless Adapter Canyon CN-WF511"; static const char pci_device_1814_0301[] = "RT2561/RT61 802.11g PCI"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0301_1186_3c08[] = "DWL-G630 Rev E"; @@ -20868,11 +22683,17 @@ static const char pci_subsys_1814_0301_1186_3c08[] = "DWL-G630 Rev E"; static const char pci_subsys_1814_0301_1186_3c09[] = "DWL-G510 Rev C"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0301_13d1_abe3[] = "miniPCI Pluscom 802.11 a/b/g"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0301_1458_e934[] = "GN-WP01GS"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0301_1737_0055[] = "WMP54G ver 4.1"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0301_1814_2561[] = "EW-7108PCg"; +#endif static const char pci_device_1814_0302[] = "RT2561/RT61 rev B 802.11g"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0302_1186_3c08[] = "DWL-G630 Rev E"; @@ -20883,13 +22704,15 @@ static const char pci_subsys_1814_0302_1186_3c09[] = "DWL-G510 Rev C"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0302_1462_b834[] = "PC54G3 Wireless 11g PCI Card"; #endif -static const char pci_device_1814_0401[] = "Ralink RT2600 802.11 MIMO"; +static const char pci_device_1814_0401[] = "RT2600 802.11 MIMO"; +static const char pci_device_1814_e932[] = "RT2560F 802.11 b/g PCI"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1820[] = "InfiniCon Systems Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1822[] = "Twinhan Technology Co. Ltd"; +static const char pci_device_1822_0001[] = "Twinhan VisionPlus DVB [card=113]"; static const char pci_device_1822_4e35[] = "Mantis DTV PCI Bridge Controller [Ver 1.0]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -20902,6 +22725,10 @@ static const char pci_vendor_182e[] = "Raza Microelectronics, Inc."; static const char pci_device_182e_0008[] = "XLR516 Processor"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_182f[] = "Broadcom"; +static const char pci_device_182f_000b[] = "BCM5785 [HT1000] SATA (RAID Mode)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1830[] = "Credence Systems Corporation"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -20948,6 +22775,20 @@ static const char pci_device_1867_6278[] = "MT25208 InfiniHost III Ex (Tavor com static const char pci_device_1867_6282[] = "MT25208 InfiniHost III Ex"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_186c[] = "Humusoft, s.r.o."; +static const char pci_device_186c_0612[] = "AD612 Data Acquisition Device"; +static const char pci_device_186c_0614[] = "MF614 Multifunction I/O Card"; +static const char pci_device_186c_0622[] = "AD622 Data Acquisition Device"; +static const char pci_device_186c_0624[] = "MF624 Multifunction I/O Card"; +static const char pci_device_186c_0625[] = "MF625 3-phase Motor Driver"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1876[] = "L-3 Communications"; +static const char pci_device_1876_a101[] = "VigraWATCH PCI"; +static const char pci_device_1876_a102[] = "VigraWATCH PMC"; +static const char pci_device_1876_a103[] = "Vigra I/O"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_187e[] = "ZyXEL Communication Corporation"; static const char pci_device_187e_3403[] = "ZyAir G-110 802.11g"; static const char pci_device_187e_340e[] = "M-302 802.11g XtremeMIMO"; @@ -20983,6 +22824,7 @@ static const char pci_device_18ac_d500[] = "FusionHDTV 5"; static const char pci_device_18ac_d800[] = "FusionHDTV 3 Gold"; static const char pci_device_18ac_d810[] = "FusionHDTV 3 Gold-Q"; static const char pci_device_18ac_d820[] = "FusionHDTV 3 Gold-T"; +static const char pci_device_18ac_db30[] = "FusionHDTV DVB-T Pro"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_18b8[] = "Ammasso"; @@ -21060,6 +22902,10 @@ static const char pci_device_18f7_0002[] = "Fastcom 422/4-PCI-335"; static const char pci_device_18f7_0004[] = "Fastcom 422/2-PCI-335"; static const char pci_device_18f7_0005[] = "Fastcom IGESCC-PCI-ISO/1"; static const char pci_device_18f7_000a[] = "Fastcom 232/4-PCI-335"; +static const char pci_device_18f7_000f[] = "Fastcom FSCC"; +static const char pci_device_18f7_0010[] = "Fastcom GSCC"; +static const char pci_device_18f7_0011[] = "Fastcom QSSB"; +static const char pci_device_18f7_0014[] = "SuperFSCC"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_18fb[] = "Resilience Corporation"; @@ -21069,6 +22915,12 @@ static const char pci_vendor_1904[] = "Hangzhou Silan Microelectronics Co., Ltd. static const char pci_device_1904_8139[] = "RTL8139D [Realtek] PCI 10/100BaseTX ethernet adaptor"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1905[] = "Micronas USA, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1912[] = "Renesas Technology Corp."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1923[] = "Sangoma Technologies Corp."; static const char pci_device_1923_0040[] = "A200/Remora FXO/FXS Analog AFT card"; static const char pci_device_1923_0100[] = "A104d QUAD T1/E1 AFT card"; @@ -21076,7 +22928,7 @@ static const char pci_device_1923_0300[] = "A101 single-port T1/E1"; static const char pci_device_1923_0400[] = "A104u Quad T1/E1 AFT"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1924[] = "Solarflare Communications (nee Level 5 Networks)"; +static const char pci_vendor_1924[] = "Solarflare Communications"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_192e[] = "TransDimension"; @@ -21098,8 +22950,25 @@ static const char pci_device_194a_1114[] = "FireSpy850"; static const char pci_device_194a_1115[] = "FireSpy850bT"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1954[] = "Curtis, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1957[] = "Freescale Semiconductor Inc"; -static const char pci_device_1957_0012[] = "MPC8548 [PowerQUICC III]"; +static const char pci_device_1957_0012[] = "MPC8548E"; +static const char pci_device_1957_0013[] = "MPC8548"; +static const char pci_device_1957_0014[] = "MPC8543E"; +static const char pci_device_1957_0015[] = "MPC8543"; +static const char pci_device_1957_0018[] = "MPC8547E"; +static const char pci_device_1957_0019[] = "MPC8545E"; +static const char pci_device_1957_001a[] = "MPC8545"; +static const char pci_device_1957_0020[] = "MPC8568E"; +static const char pci_device_1957_0021[] = "MPC8568"; +static const char pci_device_1957_0022[] = "MPC8567E"; +static const char pci_device_1957_0023[] = "MPC8567"; +static const char pci_device_1957_0030[] = "MPC8533E"; +static const char pci_device_1957_0031[] = "MPC8533"; +static const char pci_device_1957_0032[] = "MPC8544E"; +static const char pci_device_1957_0033[] = "MPC8544"; static const char pci_device_1957_0080[] = "MPC8349E"; static const char pci_device_1957_0081[] = "MPC8349"; static const char pci_device_1957_0082[] = "MPC8347E TBGA"; @@ -21108,6 +22977,8 @@ static const char pci_device_1957_0084[] = "MPC8347E PBGA"; static const char pci_device_1957_0085[] = "MPC8347 PBGA"; static const char pci_device_1957_0086[] = "MPC8343E"; static const char pci_device_1957_0087[] = "MPC8343"; +static const char pci_device_1957_7010[] = "MPC8641 PCI Host Bridge"; +static const char pci_device_1957_7011[] = "MPC8641D PCI Host Bridge"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1958[] = "Faster Technology, LLC."; @@ -21122,6 +22993,7 @@ static const char pci_device_1966_1975[] = "DVG64 family"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1969[] = "Attansic Technology Corp."; static const char pci_device_1969_1048[] = "L1 Gigabit Ethernet Adapter"; +static const char pci_device_1969_2048[] = "L2 100 Mbit Ethernet Adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_196a[] = "Sensory Networks Inc."; @@ -21168,7 +23040,7 @@ static const char pci_vendor_1993[] = "Innominate Security Technologies AG"; static const char pci_vendor_199a[] = "Pulse-LINK, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_19a2[] = "ServerEngines LLC"; +static const char pci_vendor_19a2[] = "ServerEngines Corp."; static const char pci_device_19a2_0200[] = "BladeEngine 10Gb PCI-E iSCSI adapter"; static const char pci_device_19a2_0201[] = "BladeEngine 10Gb PCI-E Network Adpater"; #endif @@ -21187,6 +23059,9 @@ static const char pci_device_19ae_0520[] = "4135 HFT Interface Controller"; static const char pci_vendor_19d4[] = "Quixant Limited"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_19de[] = "Pico Computing"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_19e2[] = "Vector Informatik GmbH"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -21209,23 +23084,39 @@ static const char pci_vendor_1a08[] = "Sierra semiconductor"; static const char pci_device_1a08_0000[] = "SC15064"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1a0e[] = "DekTec Digital Video B.V."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1a1d[] = "GFaI e.V."; static const char pci_device_1a1d_1a17[] = "Meta Networks MTP-1G IDPS NIC"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1a22[] = "Ambric Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1a29[] = "Fortinet, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1a2b[] = "Ascom AG"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1a51[] = "Hectronic AB"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1a58[] = "Razer USA Ltd."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1a5d[] = "Celoxica"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1a68[] = "VirtenSys Limited"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1a71[] = "XenSource, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1a73[] = "Violin Technologies, Inc"; +static const char pci_vendor_1a73[] = "Violin Memory, Inc"; +static const char pci_device_1a73_0001[] = "Mozart [Memory Appliance 1010]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1a77[] = "Lightfleet Corporation"; @@ -21235,6 +23126,25 @@ static const char pci_vendor_1a78[] = "Virident Systems Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1a8c[] = "Verigy Pte. Ltd."; +static const char pci_device_1a8c_1100[] = "E8001-66443 PCI Express CIC"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1aae[] = "Global Velocity, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1ab9[] = "Espia Srl"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1ae0[] = "Google, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1ae8[] = "Silicon Software GmbH"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1af4[] = "Qumranet, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1af5[] = "Netezza Corp."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1b13[] = "Jaton Corp"; @@ -21255,15 +23165,21 @@ static const char pci_device_1de1_690c[] = "690c"; static const char pci_device_1de1_dc29[] = "DC290"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1fc0[] = "Tumsan Oy"; +static const char pci_vendor_1fc0[] = "Ascom (Finland) Oy"; static const char pci_device_1fc0_0300[] = "E2200 Dual E1/Rawpipe Card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1fc1[] = "PathScale, Inc"; +static const char pci_vendor_1fc1[] = "QLogic, Corp."; static const char pci_device_1fc1_000d[] = "InfiniPath HT-400"; static const char pci_device_1fc1_0010[] = "InfiniPath PE-800"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1fc9[] = "Tehuti Networks Ltd."; +static const char pci_device_1fc9_3009[] = "10 Giga TOE SmartNIC"; +static const char pci_device_1fc9_3010[] = "10 Giga TOE SmartNIC"; +static const char pci_device_1fc9_3014[] = "10 Giga TOE SmartNIC 2-Port"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1fce[] = "Cognio Inc."; static const char pci_device_1fce_0001[] = "Spectrum Analyzer PC Card (SAgE)"; #endif @@ -21476,6 +23392,26 @@ static const char pci_vendor_4033[] = "Addtron Technology Co, Inc."; static const char pci_device_4033_1360[] = "RTL8139 Ethernet"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_4040[] = "NetXen Incorporated"; +static const char pci_device_4040_0001[] = "NXB-10GXSR 10 Gigabit Ethernet PCIe Adapter with SR-XFP optical interface"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4040_0001_103c_7047[] = "NC510F PCIe 10 Gigabit Server Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4040_0001_103c_7048[] = "NC510C PCIe 10 Gigabit Server Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_4040_0002[] = "NXB-10GCX4 10 Gigabit Ethernet PCIe Adapter with CX4 copper interface"; +static const char pci_device_4040_0003[] = "NXB-4GCU Quad Gigabit Ethernet PCIe Adapter with 1000-BASE-T interface"; +static const char pci_device_4040_0004[] = "BladeCenter-H 10 Gigabit Ethernet High Speed Daughter Card"; +static const char pci_device_4040_0005[] = "NetXen Dual Port 10GbE Multifunction Adapter for c-Class"; +static const char pci_device_4040_0024[] = "XG Mgmt"; +static const char pci_device_4040_0025[] = "XG Mgmt"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_4143[] = "Digital Equipment Corp"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -21541,6 +23477,11 @@ static const char pci_subsys_4444_0016_0070_ff92[] = "WiNTV PVR-550"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_4444_0016_0270_0801[] = "WinTV PVR 150"; #endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_104d_013d[] = "ENX-26 TV Encoder"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_4444_0016_10fc_d038[] = "GV-MVP/RX2W (1st unit)"; #endif @@ -21604,6 +23545,8 @@ static const char pci_vendor_4943[] = "Growth Networks"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_494f[] = "ACCES I/O Products, Inc."; +static const char pci_device_494f_0c60[] = "PCI-DIO-48"; +static const char pci_device_494f_0e60[] = "PCI-DIO-48S"; static const char pci_device_494f_10e8[] = "LPCI-COM-8SM"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -21918,6 +23861,9 @@ static const char pci_device_5333_8d02[] = "VT8636A [ProSavage KN133] AGP4X VGA static const char pci_device_5333_8d03[] = "VT8751 [ProSavageDDR P4M266]"; static const char pci_device_5333_8d04[] = "VT8375 [ProSavage8 KM266/KL266]"; static const char pci_device_5333_8e48[] = "Chrome S27 PCIE"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_5333_8e48_5333_0130[] = "Chrome S27 256M DDR2"; +#endif static const char pci_device_5333_9102[] = "86C410 Savage 2000"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_5333_9102_1092_5932[] = "Viper II Z200"; @@ -22028,7 +23974,13 @@ static const char pci_device_8086_0122[] = "82437FX"; static const char pci_device_8086_0309[] = "80303 I/O Processor PCI-to-PCI Bridge"; static const char pci_device_8086_030d[] = "80312 I/O Companion Chip PCI-to-PCI Bridge"; static const char pci_device_8086_0326[] = "6700/6702PXH I/OxAPIC Interrupt Controller A"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_0326_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif static const char pci_device_8086_0327[] = "6700PXH I/OxAPIC Interrupt Controller B"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_0327_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif static const char pci_device_8086_0329[] = "6700PXH PCI Express-to-PCI Bridge A"; static const char pci_device_8086_032a[] = "6700PXH PCI Express-to-PCI Bridge B"; static const char pci_device_8086_032c[] = "6702PXH PCI Express-to-PCI Bridge A"; @@ -22073,6 +24025,9 @@ static const char pci_device_8086_0536[] = "E8870SP Interleave registers 0 and 1 static const char pci_device_8086_0537[] = "E8870SP Interleave registers 2 and 3"; static const char pci_device_8086_0600[] = "RAID Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_0600_8086_0136[] = "SRCU31L"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_0600_8086_01af[] = "SRCZCR"; #endif #ifdef INIT_SUBSYS_INFO @@ -22082,10 +24037,10 @@ static const char pci_subsys_8086_0600_8086_01c1[] = "ICP Vortex GDT8546RZ"; static const char pci_subsys_8086_0600_8086_01f7[] = "SCRU32"; #endif static const char pci_device_8086_061f[] = "80303 I/O Processor"; -static const char pci_device_8086_0960[] = "80960RP [i960 RP Microprocessor/Bridge]"; -static const char pci_device_8086_0962[] = "80960RM [i960RM Bridge]"; -static const char pci_device_8086_0964[] = "80960RP [i960 RP Microprocessor/Bridge]"; -static const char pci_device_8086_1000[] = "82542 Gigabit Ethernet Controller"; +static const char pci_device_8086_0960[] = "80960RP (i960RP) Microprocessor/Bridge"; +static const char pci_device_8086_0962[] = "80960RM (i960RM) Bridge"; +static const char pci_device_8086_0964[] = "80960RP (i960RP) Microprocessor/Bridge"; +static const char pci_device_8086_1000[] = "82542 Gigabit Ethernet Controller (Fiber)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1000_0e11_b0df[] = "NC6132 Gigabit Ethernet Adapter (1000-SX)"; #endif @@ -22145,6 +24100,9 @@ static const char pci_device_8086_1008[] = "82544EI Gigabit Ethernet Controller static const char pci_subsys_8086_1008_1014_0269[] = "iSeries 1000/100/10 Ethernet Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1008_1028_011b[] = "PowerEdge 1650/2550"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1008_1028_011c[] = "PRO/1000 XT Network Connection"; #endif #ifdef INIT_SUBSYS_INFO @@ -22207,7 +24165,7 @@ static const char pci_subsys_8086_100e_1028_002e[] = "Optiplex GX260"; static const char pci_subsys_8086_100e_1028_0134[] = "PowerEdge 600SC"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_100e_1028_0151[] = "PRO/1000 MT Network Connection"; +static const char pci_subsys_8086_100e_1028_0151[] = "Optiplex GX270"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_100e_107b_8920[] = "PRO/1000 MT Desktop Adapter"; @@ -22232,6 +24190,9 @@ static const char pci_subsys_8086_100f_1014_0269[] = "iSeries 1000/100/10 Ethern static const char pci_subsys_8086_100f_1014_028e[] = "PRO/1000 MT Network Connection"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_100f_15ad_0750[] = "Abstract PRO/1000 MT Single Port Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_100f_8086_1000[] = "PRO/1000 MT Network Connection"; #endif #ifdef INIT_SUBSYS_INFO @@ -22245,6 +24206,9 @@ static const char pci_subsys_8086_1010_0e11_00db[] = "NC7170 Gigabit Server Adap static const char pci_subsys_8086_1010_1014_027c[] = "PRO/1000 MT Dual Port Network Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1010_15ad_0760[] = "Abstract PRO/1000 MT Dual Port Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1010_18fb_7872[] = "RESlink-X"; #endif #ifdef INIT_SUBSYS_INFO @@ -22444,12 +24408,18 @@ static const char pci_device_8086_1039[] = "82801DB PRO/100 VE (LOM) Ethernet Co #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1039_1014_0267[] = "NetVista A30p"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1039_114a_0582[] = "PC8 onboard ethernet ETH1"; +#endif static const char pci_device_8086_103a[] = "82801DB PRO/100 VE (CNR) Ethernet Controller"; static const char pci_device_8086_103b[] = "82801DB PRO/100 VM (LOM) Ethernet Controller"; static const char pci_device_8086_103c[] = "82801DB PRO/100 VM (CNR) Ethernet Controller"; static const char pci_device_8086_103d[] = "82801DB PRO/100 VE (MOB) Ethernet Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_103d_1014_0522[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_103d_1014_0522[] = "ThinkPad R40"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_103d_8086_103d[] = "82562EZ 10/100 Ethernet Controller"; #endif static const char pci_device_8086_103e[] = "82801DB PRO/100 VM (MOB) Ethernet Controller"; static const char pci_device_8086_1040[] = "536EP Data Fax Modem"; @@ -22461,15 +24431,21 @@ static const char pci_device_8086_1043[] = "PRO/Wireless LAN 2100 3B Mini PCI Ad static const char pci_subsys_8086_1043_103c_08b0[] = "tc1100 tablet"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_1043_8086_2522[] = "Samsung P30 integrated WLAN"; +static const char pci_subsys_8086_1043_2527_8086[] = "Asus M6800N"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1043_8086_2522[] = "Samsung X10/P30 integrated WLAN"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1043_8086_2527[] = "MIM2000/Centrino"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1043_8086_2561[] = "Dell Latitude D800"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1043_8086_2581[] = "Toshiba Satellite M10"; #endif -static const char pci_device_8086_1048[] = "PRO/10GbE LR Server Adapter"; +static const char pci_device_8086_1048[] = "82597EX 10GbE Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1048_8086_a01f[] = "PRO/10GbE LR Server Adapter"; #endif @@ -22477,12 +24453,21 @@ static const char pci_subsys_8086_1048_8086_a01f[] = "PRO/10GbE LR Server Adapte static const char pci_subsys_8086_1048_8086_a11f[] = "PRO/10GbE LR Server Adapter"; #endif static const char pci_device_8086_1049[] = "82566MM Gigabit Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1049_17aa_20b9[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1049_30c5_103c[] = "HP Compaq 8510p"; +#endif static const char pci_device_8086_104a[] = "82566DM Gigabit Network Connection"; static const char pci_device_8086_104b[] = "82566DC Gigabit Network Connection"; static const char pci_device_8086_104c[] = "82562V 10/100 Network Connection"; static const char pci_device_8086_104d[] = "82566MC Gigabit Network Connection"; static const char pci_device_8086_1050[] = "82562EZ 10/100 Ethernet Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1050_1028_019d[] = "Dimension 3000"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1050_1462_728c[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO @@ -22511,6 +24496,12 @@ static const char pci_device_8086_105e[] = "82571EB Gigabit Ethernet Controller" static const char pci_subsys_8086_105e_103c_7044[] = "NC360T PCI Express Dual Port Gigabit Server Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_105e_103c_704e[] = "Dual Port 1000Base-T (PCIe) [AD337A]"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_105e_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_105e_1775_6003[] = "Telum GE-QT"; #endif #ifdef INIT_SUBSYS_INFO @@ -22533,6 +24524,9 @@ static const char pci_subsys_8086_105e_8086_135e[] = "PRO/1000 PT Dual Port Serv #endif static const char pci_device_8086_105f[] = "82571EB Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_105f_103c_704f[] = "Dual Port 1000Base-SX (PCIe) [AD338A]"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_105f_8086_115f[] = "PRO/1000 PF Dual Port Server Adapter"; #endif #ifdef INIT_SUBSYS_INFO @@ -22574,10 +24568,16 @@ static const char pci_subsys_8086_1075_8086_1075[] = "PRO/1000 CT Network Connec #endif static const char pci_device_8086_1076[] = "82541GI Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_1076_1028_0165[] = "PowerEdge 750"; +static const char pci_subsys_8086_1076_1028_0165[] = "PRO/1000 MT Network Connection"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1076_1028_016d[] = "PRO/1000 MT Network Connection"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_1076_1028_019a[] = "PowerEdge SC1425"; +static const char pci_subsys_8086_1076_1028_019a[] = "PRO/1000 MT Network Connection"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1076_1028_106d[] = "PRO/1000 MT Network Connection"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1076_8086_0076[] = "PRO/1000 MT Network Connection"; @@ -22668,6 +24668,9 @@ static const char pci_device_8086_107d[] = "82572EI Gigabit Ethernet Controller static const char pci_subsys_8086_107d_8086_1082[] = "PRO/1000 PT Server Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_107d_8086_1084[] = "PRO/1000 PT Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_107d_8086_1092[] = "PRO/1000 PT Server Adapter"; #endif static const char pci_device_8086_107e[] = "82572EI Gigabit Ethernet Controller (Fiber)"; @@ -22675,6 +24678,9 @@ static const char pci_device_8086_107e[] = "82572EI Gigabit Ethernet Controller static const char pci_subsys_8086_107e_8086_1084[] = "PRO/1000 PF Server Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_107e_8086_1085[] = "PRO/1000 PF Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_107e_8086_1094[] = "PRO/1000 PF Server Adapter"; #endif static const char pci_device_8086_107f[] = "82572EI Gigabit Ethernet Controller"; @@ -22718,11 +24724,17 @@ static const char pci_subsys_8086_109a_1179_ff10[] = "PRO/1000 PL"; static const char pci_subsys_8086_109a_17aa_2001[] = "ThinkPad T60"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_109a_17aa_207e[] = "Thinkpad X60s"; +static const char pci_subsys_8086_109a_17aa_207e[] = "ThinkPad X60s"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_109a_8086_109a[] = "PRO/1000 PL Network Connection"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_109a_8086_309c[] = "DeskTop Board D945GTP"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_109a_8086_30a5[] = "DeskTop Board D975XBX"; +#endif static const char pci_device_8086_109b[] = "82546GB PRO/1000 GF Quad Port Server Adapter"; static const char pci_device_8086_109e[] = "82597EX 10GbE Ethernet Controller"; #ifdef INIT_SUBSYS_INFO @@ -22740,6 +24752,18 @@ static const char pci_subsys_8086_10a4_8086_10a4[] = "PRO/1000 PT Quad Port Serv #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_10a4_8086_11a4[] = "PRO/1000 PT Quad Port Server Adapter"; #endif +static const char pci_device_8086_10a5[] = "82571EB Gigabit Ethernet Controller (Fiber)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10a5_8086_10a5[] = "PRO/1000 PF Quad Port Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10a5_8086_10a6[] = "PRO/1000 PF Quad Port Server Adapter"; +#endif +static const char pci_device_8086_10a7[] = "82575EB Gigabit Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10a7_8086_10a8[] = "82575EB Gigabit Riser Card"; +#endif +static const char pci_device_8086_10a9[] = "82575EB Gigabit Backplane Connection"; static const char pci_device_8086_10b0[] = "82573L PRO/1000 PL Network Connection"; static const char pci_device_8086_10b2[] = "82573V PRO/1000 PM Network Connection"; static const char pci_device_8086_10b3[] = "82573E PRO/1000 PM Network Connection"; @@ -22754,8 +24778,12 @@ static const char pci_subsys_8086_10b5_8086_1099[] = "PRO/1000 GT Quad Port Serv #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_10b5_8086_1199[] = "PRO/1000 GT Quad Port Server Adapter"; #endif +static const char pci_device_8086_10b6[] = "82598 10GbE PCI-Express Ethernet Controller"; static const char pci_device_8086_10b9[] = "82572EI Gigabit Ethernet Controller (Copper)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10b9_103c_704a[] = "HP 110T PCIe Gigabit Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_10b9_8086_1083[] = "PRO/1000 PT Desktop Adapter"; #endif #ifdef INIT_SUBSYS_INFO @@ -22765,13 +24793,67 @@ static const char pci_device_8086_10ba[] = "80003ES2LAN Gigabit Ethernet Control static const char pci_device_8086_10bb[] = "80003ES2LAN Gigabit Ethernet Controller (Serdes)"; static const char pci_device_8086_10bc[] = "82571EB Gigabit Ethernet Controller (Copper)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10bc_103c_704b[] = "NC364T PCI Express Quad Port Gigabit Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_10bc_8086_10bc[] = "PRO/1000 PT Quad Port LP Server Adapter"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_10bc_8086_11bc[] = "PRO/1000 PT Quad Port LP Server Adapter"; #endif +static const char pci_device_8086_10bd[] = "82566DM-2 Gigabit Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10bd_1028_0211[] = "OptiPlex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10bd_3039_17aa[] = "Lenovo M57 USFF"; +#endif +static const char pci_device_8086_10bf[] = "82567LF Gigabit Network Connection"; +static const char pci_device_8086_10c0[] = "82562V-2 10/100 Network Connection"; +static const char pci_device_8086_10c2[] = "82562G-2 10/100 Network Connection"; +static const char pci_device_8086_10c3[] = "82562GT-2 10/100 Network Connection"; static const char pci_device_8086_10c4[] = "82562GT 10/100 Network Connection"; static const char pci_device_8086_10c5[] = "82562G 10/100 Network Connection"; +static const char pci_device_8086_10c6[] = "82598EB 10 Gigabit AF Dual Port Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10c6_8086_a05f[] = "10 Gigabit XF SR Dual Port Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10c6_8086_a15f[] = "10 Gigabit XF SR Dual Port Server Adapter"; +#endif +static const char pci_device_8086_10c7[] = "82598EB 10 Gigabit AF Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10c7_8086_a05f[] = "10 Gigabit XF SR Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10c7_8086_a15f[] = "10 Gigabit XF SR Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10c7_8086_a16f[] = "10 Gigabit XF SR Server Adapter"; +#endif +static const char pci_device_8086_10cb[] = "82567V Gigabit Network Connection"; +static const char pci_device_8086_10d5[] = "82571PT Gigabit PT Quad Port Server ExpressModule"; +static const char pci_device_8086_10d6[] = "82575GB Gigabit Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10d6_8086_10d6[] = "Gigabit VT Quad Port Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10d6_8086_145a[] = "Gigabit VT Quad Port Server Adapter"; +#endif +static const char pci_device_8086_10d9[] = "82571EB Dual Port Gigabit Mezzanine Adapter"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10d9_103c_1716[] = "NC360m Dual Port 1GbE BL-c Adapter"; +#endif +static const char pci_device_8086_10da[] = "82571EB Quad Port Gigabit Mezzanine Adapter"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10da_103c_1717[] = "NC364m Quad Port 1GbE BL-c Adapter"; +#endif +static const char pci_device_8086_10dd[] = "82598EB 10 Gigabit AT CX4 Network Connection"; +static const char pci_device_8086_10e2[] = "82575GB Gigabit Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_10e2_8086_10e2[] = "Gigabit VT Quad Port Server Adapter"; +#endif +static const char pci_device_8086_10f5[] = "82567LM Gigabit Network Connection"; static const char pci_device_8086_1107[] = "PRO/1000 MF Server Adapter (LX)"; static const char pci_device_8086_1130[] = "82815 815 Chipset Host Bridge and Memory Controller Hub"; #ifdef INIT_SUBSYS_INFO @@ -22790,11 +24872,14 @@ static const char pci_subsys_8086_1130_8086_4532[] = "D815EEA2 mainboard"; static const char pci_subsys_8086_1130_8086_4557[] = "D815EGEW Mainboard"; #endif static const char pci_device_8086_1131[] = "82815 815 Chipset AGP Bridge"; -static const char pci_device_8086_1132[] = "82815 CGC [Chipset Graphics Controller]"; +static const char pci_device_8086_1132[] = "82815 Chipset Graphics Controller (CGC)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1132_1025_1016[] = "Travelmate 612 TX"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1132_103c_2001[] = "e-pc 40"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1132_104d_80df[] = "Vaio PCG-FX403"; #endif #ifdef INIT_SUBSYS_INFO @@ -22832,7 +24917,7 @@ static const char pci_device_8086_1225[] = "82452KX/GX [Orion]"; static const char pci_device_8086_1226[] = "82596 PRO/10 PCI"; static const char pci_device_8086_1227[] = "82865 EtherExpress PRO/100A"; static const char pci_device_8086_1228[] = "82556 EtherExpress PRO/100 Smart"; -static const char pci_device_8086_1229[] = "82557/8/9 [Ethernet Pro 100]"; +static const char pci_device_8086_1229[] = "82557/8/9/0/1 Ethernet Pro 100"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1229_0e11_3001[] = "82559 Fast Ethernet LOM with Alert on LAN*"; #endif @@ -22948,10 +25033,10 @@ static const char pci_subsys_8086_1229_1014_705c[] = "10/100 Netfinity 10/100 Et static const char pci_subsys_8086_1229_1014_805c[] = "10/100 Netfinity 10/100 Ethernet Security Adapter"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_1229_1028_009b[] = "PowerEdge 2500/2550"; +static const char pci_subsys_8086_1229_1028_009b[] = "10/100 Ethernet Server Adapter"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_1229_1028_00ce[] = "PowerEdge 1400"; +static const char pci_subsys_8086_1229_1028_00ce[] = "10/100 Ethernet Server Adapter"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1229_1033_8000[] = "PC-9821X-B06"; @@ -23008,6 +25093,9 @@ static const char pci_subsys_8086_1229_10cf_1143[] = "8255x-based Ethernet Adapt static const char pci_subsys_8086_1229_110a_008b[] = "82551QM Fast Ethernet Multifuction PCI/CardBus Controller"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1229_114a_0582[] = "PC8 onboard ethernet ETH2"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1229_1179_0001[] = "8255x-based Ethernet Adapter (10/100)"; #endif #ifdef INIT_SUBSYS_INFO @@ -23038,6 +25126,9 @@ static const char pci_subsys_8086_1229_144d_2502[] = "SEM-2100IL MiniPCI LAN Ada static const char pci_subsys_8086_1229_1668_1100[] = "EtherExpress PRO/100B (TX) (MiniPCI Ethernet+Modem)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1229_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1229_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -23337,7 +25428,7 @@ static const char pci_subsys_8086_1461_15d9_3480[] = "P4DP6"; static const char pci_subsys_8086_1461_4c53_1090[] = "Cx9/Vx9 mainboard"; #endif static const char pci_device_8086_1462[] = "82870P2 P64H2 Hot Plug Controller"; -static const char pci_device_8086_1960[] = "80960RP [i960RP Microprocessor]"; +static const char pci_device_8086_1960[] = "80960RP (i960RP) Microprocessor"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1960_101e_0431[] = "MegaRAID 431 RAID Controller"; #endif @@ -23410,20 +25501,29 @@ static const char pci_subsys_8086_1960_e4bf_1040[] = "CU1-CHORUS"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1960_e4bf_3100[] = "CX1-BAND"; #endif -static const char pci_device_8086_1962[] = "80960RM [i960RM Microprocessor]"; +static const char pci_device_8086_1962[] = "80960RM (i960RM) Microprocessor"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1962_105a_0000[] = "SuperTrak SX6000 I2O CPU"; #endif -static const char pci_device_8086_1a21[] = "82840 840 (Carmel) Chipset Host Bridge (Hub A)"; -static const char pci_device_8086_1a23[] = "82840 840 (Carmel) Chipset AGP Bridge"; -static const char pci_device_8086_1a24[] = "82840 840 (Carmel) Chipset PCI Bridge (Hub B)"; -static const char pci_device_8086_1a30[] = "82845 845 (Brookdale) Chipset Host Bridge"; +static const char pci_device_8086_1a21[] = "82840 840 [Carmel] Chipset Host Bridge (Hub A)"; +static const char pci_device_8086_1a23[] = "82840 840 [Carmel] Chipset AGP Bridge"; +static const char pci_device_8086_1a24[] = "82840 840 [Carmel] Chipset PCI Bridge (Hub B)"; +static const char pci_device_8086_1a30[] = "82845 845 [Brookdale] Chipset Host Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1a30_1028_010e[] = "Optiplex GX240"; #endif -static const char pci_device_8086_1a31[] = "82845 845 (Brookdale) Chipset AGP Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1a30_15d9_3280[] = "Supermicro P4SBE Mainboard"; +#endif +static const char pci_device_8086_1a31[] = "82845 845 [Brookdale] Chipset AGP Bridge"; static const char pci_device_8086_1a38[] = "5000 Series Chipset DMA Engine"; -static const char pci_device_8086_1a48[] = "PRO/10GbE SR Server Adapter"; +static const char pci_device_8086_1a48[] = "82597EX 10GbE Ethernet Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1a48_8086_a01f[] = "PRO/10GbE SR Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1a48_8086_a11f[] = "PRO/10GbE SR Server Adapter"; +#endif static const char pci_device_8086_1b48[] = "82597EX 10GbE Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1b48_8086_a01f[] = "PRO/10GbE LR Server Adapter"; @@ -23432,14 +25532,17 @@ static const char pci_subsys_8086_1b48_8086_a01f[] = "PRO/10GbE LR Server Adapte static const char pci_subsys_8086_1b48_8086_a11f[] = "PRO/10GbE LR Server Adapter"; #endif static const char pci_device_8086_2410[] = "82801AA ISA Bridge (LPC)"; -static const char pci_device_8086_2411[] = "82801AA IDE"; -static const char pci_device_8086_2412[] = "82801AA USB"; -static const char pci_device_8086_2413[] = "82801AA SMBus"; -static const char pci_device_8086_2415[] = "82801AA AC'97 Audio"; +static const char pci_device_8086_2411[] = "82801AA IDE Controller"; +static const char pci_device_8086_2412[] = "82801AA USB Controller"; +static const char pci_device_8086_2413[] = "82801AA SMBus Controller"; +static const char pci_device_8086_2415[] = "82801AA AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2415_1028_0095[] = "Precision Workstation 220 Integrated Digital Audio"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2415_1028_00b4[] = "OptiPlex GX110"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2415_110a_0051[] = "Activy 2xx"; #endif #ifdef INIT_SUBSYS_INFO @@ -23454,26 +25557,26 @@ static const char pci_subsys_8086_2415_11d4_5340[] = "SoundMAX Integrated Digita #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2415_1734_1025[] = "Activy 3xx"; #endif -static const char pci_device_8086_2416[] = "82801AA AC'97 Modem"; +static const char pci_device_8086_2416[] = "82801AA AC'97 Modem Controller"; static const char pci_device_8086_2418[] = "82801AA PCI Bridge"; static const char pci_device_8086_2420[] = "82801AB ISA Bridge (LPC)"; -static const char pci_device_8086_2421[] = "82801AB IDE"; -static const char pci_device_8086_2422[] = "82801AB USB"; -static const char pci_device_8086_2423[] = "82801AB SMBus"; -static const char pci_device_8086_2425[] = "82801AB AC'97 Audio"; +static const char pci_device_8086_2421[] = "82801AB IDE Controller"; +static const char pci_device_8086_2422[] = "82801AB USB Controller"; +static const char pci_device_8086_2423[] = "82801AB SMBus Controller"; +static const char pci_device_8086_2425[] = "82801AB AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2425_11d4_0040[] = "SoundMAX Integrated Digital Audio"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2425_11d4_0048[] = "SoundMAX Integrated Digital Audio"; #endif -static const char pci_device_8086_2426[] = "82801AB AC'97 Modem"; +static const char pci_device_8086_2426[] = "82801AB AC'97 Modem Controller"; static const char pci_device_8086_2428[] = "82801AB PCI Bridge"; static const char pci_device_8086_2440[] = "82801BA ISA Bridge (LPC)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2440_8086_5744[] = "S845WD1-E"; #endif -static const char pci_device_8086_2442[] = "82801BA/BAM USB (Hub #1)"; +static const char pci_device_8086_2442[] = "82801BA/BAM USB Controller #1"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2442_1014_01c6[] = "Netvista A40/A40p"; #endif @@ -23487,6 +25590,9 @@ static const char pci_subsys_8086_2442_1028_00c7[] = "Dimension 8100"; static const char pci_subsys_8086_2442_1028_010e[] = "Optiplex GX240"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2442_103c_126f[] = "e-pc 40"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2442_1043_8027[] = "TUSL2-C Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -23504,7 +25610,7 @@ static const char pci_subsys_8086_2442_8086_4557[] = "D815EGEW Mainboard"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2442_8086_5744[] = "S845WD1-E mainboard"; #endif -static const char pci_device_8086_2443[] = "82801BA/BAM SMBus"; +static const char pci_device_8086_2443[] = "82801BA/BAM SMBus Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2443_1014_01c6[] = "Netvista A40/A40p"; #endif @@ -23518,6 +25624,9 @@ static const char pci_subsys_8086_2443_1028_00c7[] = "Dimension 8100"; static const char pci_subsys_8086_2443_1028_010e[] = "Optiplex GX240"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2443_103c_126f[] = "e-pc 40"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2443_1043_8027[] = "TUSL2-C Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -23527,6 +25636,9 @@ static const char pci_subsys_8086_2443_104d_80df[] = "Vaio PCG-FX403"; static const char pci_subsys_8086_2443_147b_0507[] = "TH7II-RAID"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2443_15d9_3280[] = "Supermicro P4SBE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2443_8086_4532[] = "D815EEA2 mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -23535,7 +25647,7 @@ static const char pci_subsys_8086_2443_8086_4557[] = "D815EGEW Mainboard"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2443_8086_5744[] = "S845WD1-E mainboard"; #endif -static const char pci_device_8086_2444[] = "82801BA/BAM USB (Hub #2)"; +static const char pci_device_8086_2444[] = "82801BA/BAM USB Controller #1"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2444_1025_1016[] = "Travelmate 612 TX"; #endif @@ -23546,6 +25658,9 @@ static const char pci_subsys_8086_2444_1028_00c7[] = "Dimension 8100"; static const char pci_subsys_8086_2444_1028_010e[] = "Optiplex GX240"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2444_103c_126f[] = "e-pc 40"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2444_1043_8027[] = "TUSL2-C Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -23560,7 +25675,7 @@ static const char pci_subsys_8086_2444_8086_4532[] = "D815EEA2 mainboard"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2444_8086_5744[] = "S845WD1-E mainboard"; #endif -static const char pci_device_8086_2445[] = "82801BA/BAM AC'97 Audio"; +static const char pci_device_8086_2445[] = "82801BA/BAM AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2445_0e11_000b[] = "Compaq Deskpro EN Audio"; #endif @@ -23574,6 +25689,9 @@ static const char pci_subsys_8086_2445_1014_01c6[] = "Netvista A40/A40p"; static const char pci_subsys_8086_2445_1025_1016[] = "Travelmate 612 TX"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2445_103c_126f[] = "e-pc 40"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2445_104d_80df[] = "Vaio PCG-FX403"; #endif #ifdef INIT_SUBSYS_INFO @@ -23585,7 +25703,7 @@ static const char pci_subsys_8086_2445_147b_0507[] = "TH7II-RAID"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2445_8086_4557[] = "D815EGEW Mainboard"; #endif -static const char pci_device_8086_2446[] = "82801BA/BAM AC'97 Modem"; +static const char pci_device_8086_2446[] = "82801BA/BAM AC'97 Modem Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2446_1025_1016[] = "Travelmate 612 TX"; #endif @@ -23594,14 +25712,23 @@ static const char pci_subsys_8086_2446_104d_80df[] = "Vaio PCG-FX403"; #endif static const char pci_device_8086_2448[] = "82801 Mobile PCI Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2448_103c_0934[] = "HP Compaq nw8240 Mobile Workstation"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2448_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2448_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2448_144d_c00c[] = "P30 notebook"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2448_1734_1055[] = "Amilo M1420"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2448_e4bf_cc47[] = "CCG-RUMBA"; +#endif static const char pci_device_8086_2449[] = "82801BA/BAM/CA/CAM Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2449_0e11_0012[] = "EtherExpress PRO/100 VM"; @@ -23693,14 +25820,14 @@ static const char pci_subsys_8086_2449_8086_3017[] = "EtherExpress PRO/100 P Mob #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2449_8086_3018[] = "EtherExpress PRO/100"; #endif -static const char pci_device_8086_244a[] = "82801BAM IDE U100"; +static const char pci_device_8086_244a[] = "82801BAM IDE U100 Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_244a_1025_1016[] = "Travelmate 612TX"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_244a_104d_80df[] = "Vaio PCG-FX403"; #endif -static const char pci_device_8086_244b[] = "82801BA IDE U100"; +static const char pci_device_8086_244b[] = "82801BA IDE U100 Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_244b_1014_01c6[] = "Netvista A40/A40p"; #endif @@ -23711,12 +25838,18 @@ static const char pci_subsys_8086_244b_1028_00c7[] = "Dimension 8100"; static const char pci_subsys_8086_244b_1028_010e[] = "Optiplex GX240"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_244b_103c_126f[] = "e-pc 40"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_244b_1043_8027[] = "TUSL2-C Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_244b_147b_0507[] = "TH7II-RAID"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_244b_15d9_3280[] = "Supermicro P4SBE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_244b_8086_4532[] = "D815EEA2 mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -23730,15 +25863,18 @@ static const char pci_device_8086_244e[] = "82801 PCI Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_244e_1014_0267[] = "NetVista A30p"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_244e_1028_0211[] = "Optiplex 755"; +#endif static const char pci_device_8086_2450[] = "82801E ISA Bridge (LPC)"; -static const char pci_device_8086_2452[] = "82801E USB"; -static const char pci_device_8086_2453[] = "82801E SMBus"; +static const char pci_device_8086_2452[] = "82801E USB Controller"; +static const char pci_device_8086_2453[] = "82801E SMBus Controller"; static const char pci_device_8086_2459[] = "82801E Ethernet Controller 0"; -static const char pci_device_8086_245b[] = "82801E IDE U100"; +static const char pci_device_8086_245b[] = "82801E IDE U100 Controller"; static const char pci_device_8086_245d[] = "82801E Ethernet Controller 1"; static const char pci_device_8086_245e[] = "82801E PCI Bridge"; static const char pci_device_8086_2480[] = "82801CA LPC Interface Controller"; -static const char pci_device_8086_2482[] = "82801CA/CAM USB (Hub #1)"; +static const char pci_device_8086_2482[] = "82801CA/CAM USB Controller #1"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2482_0e11_0030[] = "Evo N600c"; #endif @@ -23773,7 +25909,7 @@ static const char pci_subsys_8086_2483_15d9_3480[] = "P4DP6"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2483_8086_1958[] = "vpr Matrix 170B4"; #endif -static const char pci_device_8086_2484[] = "82801CA/CAM USB (Hub #2)"; +static const char pci_device_8086_2484[] = "82801CA/CAM USB Controller #2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2484_0e11_0030[] = "Evo N600c"; #endif @@ -23794,7 +25930,7 @@ static const char pci_device_8086_2485[] = "82801CA/CAM AC'97 Audio Controller"; static const char pci_subsys_8086_2485_1013_5959[] = "Crystal WMD Audio Codec"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_2485_1014_0222[] = "ThinkPad T23 (2647-4MG) or A30/A30p (2652/2653)"; +static const char pci_subsys_8086_2485_1014_0222[] = "ThinkPad A30/A30p/T23"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2485_1014_0508[] = "ThinkPad T30"; @@ -23803,6 +25939,15 @@ static const char pci_subsys_8086_2485_1014_0508[] = "ThinkPad T30"; static const char pci_subsys_8086_2485_1014_051c[] = "ThinkPad A/T/X Series"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2485_1043_1583[] = "L3C (SPDIF)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2485_1043_1623[] = "L2B (no SPDIF)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2485_1043_1643[] = "L3F"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2485_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP"; #endif #ifdef INIT_SUBSYS_INFO @@ -23813,7 +25958,7 @@ static const char pci_device_8086_2486[] = "82801CA/CAM AC'97 Modem Controller"; static const char pci_subsys_8086_2486_1014_0223[] = "ThinkPad A/T/X Series"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_2486_1014_0503[] = "ThinkPad R31 2656BBG"; +static const char pci_subsys_8086_2486_1014_0503[] = "ThinkPad R31"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2486_1014_051a[] = "ThinkPad A/T/X Series"; @@ -23833,7 +25978,7 @@ static const char pci_subsys_8086_2486_144d_2115[] = "vpr Matrix 170B4 internal #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2486_14f1_5421[] = "MD56ORD V.92 MDC Modem"; #endif -static const char pci_device_8086_2487[] = "82801CA/CAM USB (Hub #3)"; +static const char pci_device_8086_2487[] = "82801CA/CAM USB Controller #3"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2487_0e11_0030[] = "Evo N600c"; #endif @@ -23849,7 +25994,7 @@ static const char pci_subsys_8086_2487_15d9_3480[] = "P4DP6"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2487_8086_1958[] = "vpr Matrix 170B4"; #endif -static const char pci_device_8086_248a[] = "82801CAM IDE U100"; +static const char pci_device_8086_248a[] = "82801CAM IDE U100 Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_248a_0e11_0030[] = "Evo N600c"; #endif @@ -23883,7 +26028,7 @@ static const char pci_device_8086_24c2[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) static const char pci_subsys_8086_24c2_1014_0267[] = "NetVista A30p"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c2_1014_052d[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_24c2_1014_052d[] = "ThinkPad"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c2_1025_005a[] = "TravelMate 290"; @@ -23895,6 +26040,9 @@ static const char pci_subsys_8086_24c2_1028_0126[] = "Optiplex GX260"; static const char pci_subsys_8086_24c2_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c2_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO @@ -23907,9 +26055,18 @@ static const char pci_subsys_8086_24c2_103c_0890[] = "NC6000 laptop"; static const char pci_subsys_8086_24c2_103c_08b0[] = "tc1100 tablet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_1043_8089[] = "P4B533"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c2_1071_8160[] = "MIM2000"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_114a_0582[] = "PC8 onboard USB 1.x"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c2_144d_c00c[] = "P30/P35 notebook"; #endif #ifdef INIT_SUBSYS_INFO @@ -23928,6 +26085,9 @@ static const char pci_subsys_8086_24c2_1734_1055[] = "Amilo M1420"; static const char pci_subsys_8086_24c2_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_8086_24c2[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c2_8086_4541[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO @@ -23941,7 +26101,7 @@ static const char pci_device_8086_24c3[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) static const char pci_subsys_8086_24c3_1014_0267[] = "NetVista A30p"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c3_1014_052d[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_24c3_1014_052d[] = "ThinkPad"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c3_1025_005a[] = "TravelMate 290"; @@ -23950,6 +26110,12 @@ static const char pci_subsys_8086_24c3_1025_005a[] = "TravelMate 290"; static const char pci_subsys_8086_24c3_1028_0126[] = "Optiplex GX260"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c3_1028_014f[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c3_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c3_103c_088c[] = "NC8000 laptop"; #endif #ifdef INIT_SUBSYS_INFO @@ -23962,6 +26128,12 @@ static const char pci_subsys_8086_24c3_103c_08b0[] = "tc1100 tablet"; static const char pci_subsys_8086_24c3_1071_8160[] = "MIM2000"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c3_114a_0582[] = "PC8 onboard SMbus"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c3_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c3_144d_c00c[] = "P30/P35 notebook"; #endif #ifdef INIT_SUBSYS_INFO @@ -23990,7 +26162,7 @@ static const char pci_device_8086_24c4[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) static const char pci_subsys_8086_24c4_1014_0267[] = "NetVista A30p"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c4_1014_052d[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_24c4_1014_052d[] = "ThinkPad"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c4_1025_005a[] = "TravelMate 290"; @@ -24002,6 +26174,9 @@ static const char pci_subsys_8086_24c4_1028_0126[] = "Optiplex GX260"; static const char pci_subsys_8086_24c4_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c4_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c4_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO @@ -24014,6 +26189,9 @@ static const char pci_subsys_8086_24c4_103c_0890[] = "NC6000 laptop"; static const char pci_subsys_8086_24c4_103c_08b0[] = "tc1100 tablet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c4_1043_8089[] = "P4B533"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c4_1071_8160[] = "MIM2000"; #endif #ifdef INIT_SUBSYS_INFO @@ -24032,6 +26210,9 @@ static const char pci_subsys_8086_24c4_1734_1004[] = "D1451 Mainboard (SCENIC N3 static const char pci_subsys_8086_24c4_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c4_8086_24c2[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c4_8086_4541[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO @@ -24048,7 +26229,7 @@ static const char pci_subsys_8086_24c5_0e11_00b8[] = "Analog Devices Inc. codec static const char pci_subsys_8086_24c5_1014_0267[] = "NetVista A30p"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c5_1014_0537[] = "Thinkpad T41"; +static const char pci_subsys_8086_24c5_1014_0537[] = "ThinkPad T41"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1014_055f[] = "Thinkpad R50e model 1634"; @@ -24060,9 +26241,15 @@ static const char pci_subsys_8086_24c5_1025_005a[] = "TravelMate 290"; static const char pci_subsys_8086_24c5_1028_0139[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_1028_014f[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_1028_018d[] = "Inspiron 700m/710m [SigmaTel STAC9750,51]"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO @@ -24075,9 +26262,15 @@ static const char pci_subsys_8086_24c5_103c_0890[] = "NC6000 laptop"; static const char pci_subsys_8086_24c5_103c_08b0[] = "tc1100 tablet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_1043_80b0[] = "P4B533"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1071_8160[] = "MIM2000"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_144d_c00c[] = "P30/P35 notebook"; #endif #ifdef INIT_SUBSYS_INFO @@ -24087,17 +26280,29 @@ static const char pci_subsys_8086_24c5_1458_a002[] = "GA-8PE667 Ultra"; static const char pci_subsys_8086_24c5_1462_5800[] = "845PE Max (MS-6580)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_1713_1043[] = "Asus M6800N"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1734_1005[] = "D1451 (SCENIC N300, i845GV) Sigmatel STAC9750T"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1734_1055[] = "Amilo M1420"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_8086_24c5[] = "Dell Dimension 2400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_a002_1458[] = "Realtek AC'97 codec [ALC655]"; +#endif static const char pci_device_8086_24c6[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Modem Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c6_1014_0524[] = "Thinkpad T41"; +static const char pci_subsys_8086_24c6_1014_0524[] = "ThinkPad T41"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c6_1014_0525[] = "ThinkPad"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c6_1014_0559[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_24c6_1014_0559[] = "ThinkPad R50e"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c6_1025_003c[] = "Aspire 2001WLCi (Compal CL50 motherboard) implementation"; @@ -24121,14 +26326,23 @@ static const char pci_subsys_8086_24c6_103c_08b0[] = "tc1100 tablet"; static const char pci_subsys_8086_24c6_1071_8160[] = "MIM2000"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c6_144d_2115[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c6_144d_c00c[] = "P30/P35 notebook"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c6_14f1_5422[] = "D480 MDC V.9x Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c6_1826_1043[] = "Asus M6800N"; +#endif static const char pci_device_8086_24c7[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #3"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c7_1014_0267[] = "NetVista A30p"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c7_1014_052d[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_24c7_1014_052d[] = "ThinkPad"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c7_1025_005a[] = "TravelMate 290"; @@ -24140,6 +26354,9 @@ static const char pci_subsys_8086_24c7_1028_0126[] = "Optiplex GX260"; static const char pci_subsys_8086_24c7_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c7_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c7_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO @@ -24152,6 +26369,9 @@ static const char pci_subsys_8086_24c7_103c_0890[] = "NC6000 laptop"; static const char pci_subsys_8086_24c7_103c_08b0[] = "tc1100 tablet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c7_1043_8089[] = "P4B533"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c7_1071_8160[] = "MIM2000"; #endif #ifdef INIT_SUBSYS_INFO @@ -24170,6 +26390,9 @@ static const char pci_subsys_8086_24c7_1734_1004[] = "D1451 Mainboard (SCENIC N3 static const char pci_subsys_8086_24c7_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c7_8086_24c2[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c7_8086_4541[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO @@ -24180,15 +26403,21 @@ static const char pci_subsys_8086_24c7_e4bf_0cd2[] = "CD2-BEBOP"; #endif static const char pci_device_8086_24ca[] = "82801DBM (ICH4-M) IDE Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24ca_1014_052d[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_24ca_1014_052d[] = "ThinkPad"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24ca_1025_005a[] = "TravelMate 290"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24ca_1028_014f[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24ca_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24ca_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24ca_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO @@ -24204,6 +26433,9 @@ static const char pci_subsys_8086_24ca_103c_08b0[] = "tc1100 tablet"; static const char pci_subsys_8086_24ca_1071_8160[] = "MIM2000"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24ca_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24ca_144d_c00c[] = "P30/P35 notebook"; #endif #ifdef INIT_SUBSYS_INFO @@ -24220,6 +26452,12 @@ static const char pci_subsys_8086_24cb_1014_0267[] = "NetVista A30p"; static const char pci_subsys_8086_24cb_1028_0126[] = "Optiplex GX260"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cb_1043_8089[] = "P4B533"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cb_114a_0582[] = "PC8 onboard IDE"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cb_1458_24c2[] = "GA-8PE667 Ultra"; #endif #ifdef INIT_SUBSYS_INFO @@ -24249,7 +26487,7 @@ static const char pci_device_8086_24cd[] = "82801DB/DBM (ICH4/ICH4-M) USB2 EHCI static const char pci_subsys_8086_24cd_1014_0267[] = "NetVista A30p"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24cd_1014_052e[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_24cd_1014_052e[] = "ThinkPad"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_1025_005a[] = "TravelMate 290"; @@ -24267,6 +26505,9 @@ static const char pci_subsys_8086_24cd_1028_0139[] = "Latitude D400"; static const char pci_subsys_8086_24cd_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO @@ -24279,12 +26520,21 @@ static const char pci_subsys_8086_24cd_103c_0890[] = "NC6000 laptop"; static const char pci_subsys_8086_24cd_103c_08b0[] = "tc1100 tablet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_1043_8089[] = "P4B533"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_1071_8160[] = "MIM2000"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_114a_0582[] = "PC8 onboard USB 2.0"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_1179_ff00[] = "Satellite 2430"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_144d_c00c[] = "P30/P35 notebook"; #endif #ifdef INIT_SUBSYS_INFO @@ -24303,6 +26553,9 @@ static const char pci_subsys_8086_24cd_1734_1055[] = "Amilo M1420"; static const char pci_subsys_8086_24cd_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_8086_24c2[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_e4bf_0cc9[] = "CC9-SAMBA"; #endif #ifdef INIT_SUBSYS_INFO @@ -24329,6 +26582,9 @@ static const char pci_subsys_8086_24d1_1458_24d1[] = "GA-8IPE1000 Pro2 motherboa static const char pci_subsys_8086_24d1_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d1_1565_5200[] = "P4TSV Motherboard (865G)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d1_15d9_4580[] = "P4SCE Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -24345,12 +26601,21 @@ static const char pci_subsys_8086_24d1_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24d2[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d2_1014_02ed[] = "xSeries server mainboard"; +static const char pci_subsys_8086_24d2_1014_02dd[] = "eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1014_02ed[] = "eServer xSeries server mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d2_1028_0169[] = "Precision 470"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1028_016c[] = "PowerEdge 1850"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1028_016d[] = "PowerEdge 2850"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d2_1028_0183[] = "PowerEdge 1800"; #endif #ifdef INIT_SUBSYS_INFO @@ -24372,10 +26637,13 @@ static const char pci_subsys_8086_24d2_1458_24d2[] = "GA-8IPE1000/8KNXP motherbo static const char pci_subsys_8086_24d2_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1565_3101[] = "P4TSV Motherboard (865G)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d2_15d9_4580[] = "P4SCE Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d2_1734_101c[] = "Primergy RX300 S2"; +static const char pci_subsys_8086_24d2_1734_101c[] = "PRIMERGY RX/TX series onboard UHCI"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d2_8086_3427[] = "S875WP1-E mainboard"; @@ -24391,7 +26659,10 @@ static const char pci_subsys_8086_24d2_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24d3[] = "82801EB/ER (ICH5/ICH5R) SMBus Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d3_1014_02ed[] = "xSeries server mainboard"; +static const char pci_subsys_8086_24d3_1014_02dd[] = "eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d3_1014_02ed[] = "eServer xSeries server mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d3_1028_0156[] = "Precision 360"; @@ -24412,10 +26683,13 @@ static const char pci_subsys_8086_24d3_1458_24d2[] = "GA-8IPE1000 Pro2 motherboa static const char pci_subsys_8086_24d3_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d3_1565_3101[] = "P4TSV Motherboard (865G)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d3_15d9_4580[] = "P4SCE Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d3_1734_101c[] = "Primergy RX300 S2"; +static const char pci_subsys_8086_24d3_1734_101c[] = "PRIMERGY RX/TX S2 series SMBus"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d3_8086_3427[] = "S875WP1-E mainboard"; @@ -24431,12 +26705,21 @@ static const char pci_subsys_8086_24d3_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24d4[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d4_1014_02ed[] = "xSeries server mainboard"; +static const char pci_subsys_8086_24d4_1014_02dd[] = "eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1014_02ed[] = "eServer xSeries server mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d4_1028_0169[] = "Precision 470"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1028_016c[] = "PowerEdge 1850"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1028_016d[] = "PowerEdge 2850"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d4_1028_0183[] = "PowerEdge 1800"; #endif #ifdef INIT_SUBSYS_INFO @@ -24458,10 +26741,13 @@ static const char pci_subsys_8086_24d4_1458_24d2[] = "GA-8IPE1000 Pro2 motherboa static const char pci_subsys_8086_24d4_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1565_3101[] = "P4TSV Motherboard (865G)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d4_15d9_4580[] = "P4SCE Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d4_1734_101c[] = "Primergy RX300 S2"; +static const char pci_subsys_8086_24d4_1734_101c[] = "PRIMERGY RX/TX S2 series onboard UHCI"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d4_8086_3427[] = "S875WP1-E mainboard"; @@ -24527,6 +26813,12 @@ static const char pci_subsys_8086_24d7_1014_02ed[] = "xSeries server mainboard"; static const char pci_subsys_8086_24d7_1028_0169[] = "Precision 470"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_1028_016c[] = "PowerEdge 1850"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_1028_016d[] = "PowerEdge 2850"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d7_1028_0183[] = "PowerEdge 1800"; #endif #ifdef INIT_SUBSYS_INFO @@ -24545,10 +26837,13 @@ static const char pci_subsys_8086_24d7_1458_24d2[] = "GA-8IPE1000 Pro2 motherboa static const char pci_subsys_8086_24d7_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_1565_3101[] = "P4TSV Motherboard (865G)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d7_15d9_4580[] = "P4SCE Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d7_1734_101c[] = "Primergy RX300 S2"; +static const char pci_subsys_8086_24d7_1734_101c[] = "PRIMERGY RX/TX S2 series onboard UHCI"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d7_8086_3427[] = "S875WP1-E mainboard"; @@ -24564,12 +26859,21 @@ static const char pci_subsys_8086_24d7_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24db[] = "82801EB/ER (ICH5/ICH5R) IDE Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24db_1014_02ed[] = "xSeries server mainboard"; +static const char pci_subsys_8086_24db_1014_02dd[] = "eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_1014_02ed[] = "eServer xSeries server mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24db_1028_0169[] = "Precision 470"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_1028_016c[] = "PowerEdge 1850"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_1028_016d[] = "PowerEdge 2850"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24db_1028_019a[] = "PowerEdge SC1425"; #endif #ifdef INIT_SUBSYS_INFO @@ -24591,10 +26895,13 @@ static const char pci_subsys_8086_24db_1462_7280[] = "865PE Neo2 (MS-6728)"; static const char pci_subsys_8086_24db_1462_7580[] = "MSI 875P"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_1565_3101[] = "P4TSV Motherboard (865G)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24db_15d9_4580[] = "P4SCE Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24db_1734_101c[] = "Primergy RX300 S2"; +static const char pci_subsys_8086_24db_1734_101c[] = "PRIMERGY RX/TX S2 series onboard IDE"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24db_8086_24db[] = "P4C800 Mainboard"; @@ -24614,12 +26921,21 @@ static const char pci_subsys_8086_24db_8086_524c[] = "D865PERL mainboard"; static const char pci_device_8086_24dc[] = "82801EB (ICH5) LPC Interface Bridge"; static const char pci_device_8086_24dd[] = "82801EB/ER (ICH5/ICH5R) USB2 EHCI Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24dd_1014_02ed[] = "xSeries server mainboard"; +static const char pci_subsys_8086_24dd_1014_02dd[] = "eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_1014_02ed[] = "eServer xSeries server mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24dd_1028_0169[] = "Precision 470"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_1028_016c[] = "PowerEdge 1850"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_1028_016d[] = "PowerEdge 2850"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24dd_1028_0183[] = "PowerEdge 1800"; #endif #ifdef INIT_SUBSYS_INFO @@ -24669,10 +26985,13 @@ static const char pci_subsys_8086_24de_1458_24d2[] = "GA-8IPE1000 Pro2 motherboa static const char pci_subsys_8086_24de_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24de_1565_3101[] = "P4TSV Motherboard (865G)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24de_15d9_4580[] = "P4SCE Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24de_1734_101c[] = "Primergy RX300 S2"; +static const char pci_subsys_8086_24de_1734_101c[] = "PRIMERGY RX/TX S2 series onboard UHCI"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24de_8086_3427[] = "S875WP1-E mainboard"; @@ -24768,6 +27087,9 @@ static const char pci_subsys_8086_2562_0e11_00b9[] = "Evo D510 SFF"; static const char pci_subsys_8086_2562_1014_0267[] = "NetVista A30p"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2562_1734_1003[] = "D1521 Mainboard (Fujitsu-Siemens)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2562_1734_1004[] = "D1451 Mainboard (SCENIC N300, i845GV)"; #endif static const char pci_device_8086_2570[] = "82865G/PE/P DRAM Controller/Host-Hub Interface"; @@ -24842,25 +27164,49 @@ static const char pci_subsys_8086_2582_1458_2582[] = "GA-8I915ME-G Mainboard"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2582_1734_105b[] = "Scenic W620"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2582_1849_2582[] = "ASRock P4Dual-915GL"; +#endif static const char pci_device_8086_2584[] = "82925X/XE Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2584_1028_0177[] = "Dimension 8400"; +#endif static const char pci_device_8086_2585[] = "82925X/XE PCI Express Root Port"; static const char pci_device_8086_2588[] = "E7220/E7221 Memory Controller Hub"; static const char pci_device_8086_2589[] = "E7220/E7221 PCI Express Root Port"; static const char pci_device_8086_258a[] = "E7221 Integrated Graphics Controller"; static const char pci_device_8086_2590[] = "Mobile 915GM/PM/GMS/910GML Express Processor to DRAM Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2590_1014_0575[] = "ThinkPad Z60t"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2590_1028_0182[] = "Dell Latidude C610"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2590_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2590_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2590_104d_81b7[] = "Vaio VGN-S3XP"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2590_a304_81b7[] = "Vaio VGN-S3XP"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2590_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2590_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2590_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2591[] = "Mobile 915GM/PM Express PCI Express Root Port"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2591_103c_0934[] = "HP Compaq nw8240 Mobile Workstation"; +#endif static const char pci_device_8086_2592[] = "Mobile 915GM/GMS/910GML Express Graphics Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2592_103c_099c[] = "NX6110/NC6120"; @@ -24874,12 +27220,21 @@ static const char pci_subsys_8086_2592_1043_1881[] = "GMA 900 915GM Integrated G #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2592_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2592_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2592_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_25a1[] = "6300ESB LPC Interface Controller"; static const char pci_device_8086_25a2[] = "6300ESB PATA Storage Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a2_1775_10d0[] = "V5D Single Board Computer IDE"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a2_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a2_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -24890,6 +27245,9 @@ static const char pci_subsys_8086_25a2_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_8086_25a3[] = "6300ESB SATA Storage Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a3_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a3_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -24906,6 +27264,9 @@ static const char pci_device_8086_25a4[] = "6300ESB SMBus Controller"; static const char pci_subsys_8086_25a4_1775_10d0[] = "V5D Single Board Computer"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a4_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a4_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -24919,6 +27280,9 @@ static const char pci_subsys_8086_25a4_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_8086_25a6[] = "6300ESB AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a6_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a6_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -24930,6 +27294,9 @@ static const char pci_device_8086_25a9[] = "6300ESB USB Universal Host Controlle static const char pci_subsys_8086_25a9_1775_10d0[] = "V5D Single Board Computer USB"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a9_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a9_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -24943,12 +27310,18 @@ static const char pci_subsys_8086_25a9_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_8086_25aa[] = "6300ESB USB Universal Host Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25aa_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25aa_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25aa_4c53_10b0[] = "CL9 mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25aa_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25aa_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_8086_25ab[] = "6300ESB Watchdog Timer"; @@ -24956,6 +27329,9 @@ static const char pci_device_8086_25ab[] = "6300ESB Watchdog Timer"; static const char pci_subsys_8086_25ab_1775_10d0[] = "V5D Single Board Computer"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ab_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25ab_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -24972,6 +27348,9 @@ static const char pci_device_8086_25ac[] = "6300ESB I/O Advanced Programmable In static const char pci_subsys_8086_25ac_1775_10d0[] = "V5D Single Board Computer"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ac_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25ac_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -24988,6 +27367,9 @@ static const char pci_device_8086_25ad[] = "6300ESB USB2 Enhanced Host Controlle static const char pci_subsys_8086_25ad_1775_10d0[] = "V5D Single Board Computer USB 2.0"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ad_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25ad_1775_ce90[] = "CE9"; #endif #ifdef INIT_SUBSYS_INFO @@ -25002,6 +27384,9 @@ static const char pci_subsys_8086_25ad_4c53_10e0[] = "PSL09 PrPMC"; static const char pci_device_8086_25ae[] = "6300ESB 64-bit PCI-X Bridge"; static const char pci_device_8086_25b0[] = "6300ESB SATA RAID Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25b0_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25b0_4c53_10d0[] = "Telum ASLP10 Processor AMC"; #endif #ifdef INIT_SUBSYS_INFO @@ -25070,8 +27455,17 @@ static const char pci_subsys_8086_2640_1734_105c[] = "Scenic W620"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2640_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2640_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2640_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2641[] = "82801FBM (ICH6M) LPC Interface Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2641_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2641_103c_099c[] = "NX6110/NC6120"; #endif static const char pci_device_8086_2642[] = "82801FW/FRW (ICH6W/ICH6RW) LPC Interface Bridge"; @@ -25091,16 +27485,31 @@ static const char pci_subsys_8086_2651_8086_4147[] = "D915GAG Motherboard"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2651_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2651_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2651_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2652[] = "82801FR/FRW (ICH6R/ICH6RW) SATA Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2652_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2652_1462_7028[] = "915P/G Neo2"; #endif static const char pci_device_8086_2653[] = "82801FBM (ICH6M) SATA Controller"; static const char pci_device_8086_2658[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #1"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2658_1028_0179[] = "Optiplex GX280"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2658_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -25118,11 +27527,23 @@ static const char pci_subsys_8086_2658_1734_105c[] = "Scenic W620"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2658_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2659[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2659_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2659_1028_0179[] = "Optiplex GX280"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2659_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2659_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -25140,11 +27561,23 @@ static const char pci_subsys_8086_2659_1734_105c[] = "Scenic W620"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2659_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2659_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2659_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_265a[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265a_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_265a_1028_0179[] = "Optiplex GX280"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265a_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_265a_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -25162,8 +27595,17 @@ static const char pci_subsys_8086_265a_1734_105c[] = "Scenic W620"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_265a_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265a_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265a_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_265b[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265b_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_265b_1028_0179[] = "Optiplex GX280"; #endif #ifdef INIT_SUBSYS_INFO @@ -25184,11 +27626,23 @@ static const char pci_subsys_8086_265b_1734_105c[] = "Scenic W620"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_265b_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265b_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265b_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_265c[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_265c_1028_0179[] = "Optiplex GX280"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_265c_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -25209,15 +27663,66 @@ static const char pci_subsys_8086_265c_8086_265c[] = "Dimension 3100"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_265c_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2660[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2660_103c_0934[] = "HP Compaq nw8240 Mobile Workstation"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2660_103c_099c[] = "NX6110/NC6120"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2660_e4bf_0ccd[] = "CCD-CALYPSO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2660_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2660_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2662[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2662_103c_0934[] = "HP Compaq nw8240 Mobile Workstation"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2662_e4bf_0ccd[] = "CCD-CALYPSO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2662_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2662_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2664[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 3"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2664_e4bf_0ccd[] = "CCD-CALYPSO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2664_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2664_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2666[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 4"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2666_e4bf_0ccd[] = "CCD-CALYPSO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2666_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2666_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2668[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2668_1014_05b7[] = "ThinkPad Z60t"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2668_103c_2a09[] = "PufferM-UL8E"; #endif #ifdef INIT_SUBSYS_INFO @@ -25225,6 +27730,9 @@ static const char pci_subsys_8086_2668_1043_814e[] = "P5GD1-VW Mainboard"; #endif static const char pci_device_8086_266a[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266a_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_266a_1028_0179[] = "Optiplex GX280"; #endif #ifdef INIT_SUBSYS_INFO @@ -25242,12 +27750,21 @@ static const char pci_subsys_8086_266a_1734_105c[] = "Scenic W620"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_266a_e4bf_0ccd[] = "CCD-CALYPSO"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266a_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266a_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_266c[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) LAN Controller"; static const char pci_device_8086_266d[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Modem Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_266d_1025_006a[] = "Conexant AC'97 CoDec (in Acer TravelMate 2410 serie laptop)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266d_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_266d_103c_099c[] = "NX6110/NC6120"; #endif static const char pci_device_8086_266e[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Audio Controller"; @@ -25255,6 +27772,9 @@ static const char pci_device_8086_266e[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) static const char pci_subsys_8086_266e_1025_006a[] = "Realtek ALC 655 codec (in Acer TravelMate 2410 serie laptop)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_266e_1028_0179[] = "Optiplex GX280"; #endif #ifdef INIT_SUBSYS_INFO @@ -25264,6 +27784,9 @@ static const char pci_subsys_8086_266e_1028_0182[] = "Latitude D610 Laptop"; static const char pci_subsys_8086_266e_1028_0188[] = "Inspiron 6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_266e_103c_0944[] = "Compaq NC6220"; #endif #ifdef INIT_SUBSYS_INFO @@ -25283,6 +27806,12 @@ static const char pci_subsys_8086_266e_1734_105a[] = "Scenic W620"; #endif static const char pci_device_8086_266f[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_1028_0177[] = "Dimension 8400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_266f_103c_099c[] = "NX6110/NC6120"; #endif #ifdef INIT_SUBSYS_INFO @@ -25297,11 +27826,20 @@ static const char pci_subsys_8086_266f_1462_7028[] = "915P/G Neo2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_266f_1734_105c[] = "Scenic W620"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_e4bf_0ccd[] = "CCD-CALYPSO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_2670[] = "631xESB/632xESB/3100 Chipset LPC Interface Controller"; -static const char pci_device_8086_2680[] = "631xESB/632xESB/3100 Chipset SATA Storage Controller IDE"; -static const char pci_device_8086_2681[] = "631xESB/632xESB SATA Storage Controller AHCI"; -static const char pci_device_8086_2682[] = "631xESB/632xESB SATA Storage Controller RAID"; -static const char pci_device_8086_2683[] = "631xESB/632xESB SATA Storage Controller RAID"; +static const char pci_device_8086_2680[] = "631xESB/632xESB/3100 Chipset SATA IDE Controller"; +static const char pci_device_8086_2681[] = "631xESB/632xESB SATA AHCI Controller"; +static const char pci_device_8086_2682[] = "631xESB/632xESB SATA RAID Controller"; +static const char pci_device_8086_2683[] = "631xESB/632xESB SATA RAID Controller"; static const char pci_device_8086_2688[] = "631xESB/632xESB/3100 Chipset UHCI USB Controller #1"; static const char pci_device_8086_2689[] = "631xESB/632xESB/3100 Chipset UHCI USB Controller #2"; static const char pci_device_8086_268a[] = "631xESB/632xESB/3100 Chipset UHCI USB Controller #3"; @@ -25332,9 +27870,18 @@ static const char pci_device_8086_2774[] = "82955X Memory Controller Hub"; static const char pci_device_8086_2775[] = "82955X PCI Express Root Port"; static const char pci_device_8086_2776[] = "82945G/GZ Integrated Graphics Controller"; static const char pci_device_8086_2778[] = "E7230/3000/3010 Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2778_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2778_1028_01e6[] = "PowerEdge 860"; +#endif static const char pci_device_8086_2779[] = "E7230/3000/3010 PCI Express Root Port"; static const char pci_device_8086_277a[] = "82975X/3010 PCI Express Root Port"; static const char pci_device_8086_277c[] = "82975X Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_277c_1043_8178[] = "P5WDG2 WS Professional motherboard"; +#endif static const char pci_device_8086_277d[] = "82975X PCI Express Root Port"; static const char pci_device_8086_2782[] = "82915G Integrated Graphics Controller"; #ifdef INIT_SUBSYS_INFO @@ -25350,31 +27897,58 @@ static const char pci_subsys_8086_2792_103c_099c[] = "NX6110/NC6120"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2792_1043_1881[] = "GMA 900 915GM Integrated Graphics"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2792_e4bf_0ccd[] = "CCD-CALYPSO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2792_e4bf_0cd3[] = "CD3-JIVE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2792_e4bf_58b1[] = "XB1"; +#endif static const char pci_device_8086_27a0[] = "Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27a0_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27a0_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_27a0_17aa_2017[] = "Thinkpad R60e model 0657"; +static const char pci_subsys_8086_27a0_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27a0_17aa_2017[] = "ThinkPad T60/R60 series"; #endif static const char pci_device_8086_27a1[] = "Mobile 945GM/PM/GMS, 943/940GML and 945GT Express PCI Express Root Port"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27a1_103c_30a3[] = "Compaq nw8440"; +#endif static const char pci_device_8086_27a2[] = "Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27a2_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_27a2_17aa_201a[] = "Thinkpad R60e model 0657"; +static const char pci_subsys_8086_27a2_17aa_201a[] = "ThinkPad T60/R60 series"; #endif -static const char pci_device_8086_27a6[] = "Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller"; +static const char pci_device_8086_27a6[] = "Mobile 945GM/GMS/GME, 943/940GML Express Integrated Graphics Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27a6_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_27a6_17aa_201a[] = "Thinkpad R60e model 0657"; +static const char pci_subsys_8086_27a6_17aa_201a[] = "ThinkPad T60/R60 series"; #endif +static const char pci_device_8086_27ac[] = "Mobile 945GME Express Memory Controller Hub"; +static const char pci_device_8086_27ad[] = "Mobile 945GME Express PCI Express Root Port"; +static const char pci_device_8086_27ae[] = "Mobile 945GME Express Integrated Graphics Controller"; static const char pci_device_8086_27b0[] = "82801GH (ICH7DH) LPC Interface Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27b0_8086_544e[] = "DeskTop Board D945GTP"; +#endif static const char pci_device_8086_27b8[] = "82801GB/GR (ICH7 Family) LPC Interface Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27b8_1028_01e6[] = "PowerEdge 860"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27b8_107b_5048[] = "E4500"; #endif #ifdef INIT_SUBSYS_INFO @@ -25385,32 +27959,77 @@ static const char pci_device_8086_27b9[] = "82801GBM (ICH7-M) LPC Interface Brid static const char pci_subsys_8086_27b9_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27b9_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27b9_10f7_8338[] = "Panasonic CF-Y5 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27b9_17aa_2009[] = "ThinkPad T60/R60 series"; #endif static const char pci_device_8086_27bd[] = "82801GHM (ICH7-M DH) LPC Interface Bridge"; -static const char pci_device_8086_27c0[] = "82801GB/GR/GH (ICH7 Family) Serial ATA Storage Controller IDE"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27bd_1025_006c[] = "9814 WKMI"; +#endif +static const char pci_device_8086_27c0[] = "82801GB/GR/GH (ICH7 Family) SATA IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c0_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c0_1028_01e6[] = "PowerEdge 860"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27c0_107b_5048[] = "E4500"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c0_1462_7236[] = "945P Neo3-F Rev. 2.2 motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27c0_8086_544e[] = "DeskTop Board D945GTP"; #endif -static const char pci_device_8086_27c1[] = "82801GR/GH (ICH7 Family) Serial ATA Storage Controller AHCI"; -static const char pci_device_8086_27c3[] = "82801GR/GH (ICH7 Family) Serial ATA Storage Controller RAID"; -static const char pci_device_8086_27c4[] = "82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller IDE"; -static const char pci_device_8086_27c5[] = "82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller AHCI"; +static const char pci_device_8086_27c1[] = "82801GR/GH (ICH7 Family) SATA AHCI Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c1_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c1_8086_5842[] = "DeskTop Board D975XBX"; +#endif +static const char pci_device_8086_27c3[] = "82801GR/GH (ICH7 Family) SATA RAID Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c3_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27c4[] = "82801GBM/GHM (ICH7 Family) SATA IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c4_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c4_17aa_200e[] = "Thinkpad T60 model 2007"; +#endif +static const char pci_device_8086_27c5[] = "82801GBM/GHM (ICH7 Family) SATA AHCI Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c5_103c_30a3[] = "Compaq nw8440"; +#endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_27c5_17aa_200d[] = "Thinkpad R60e model 0657"; +static const char pci_subsys_8086_27c5_17aa_200d[] = "ThinkPad T60/R60 series"; +#endif +static const char pci_device_8086_27c6[] = "82801GHM (ICH7-M DH) SATA RAID Controller"; +static const char pci_device_8086_27c8[] = "82801G (ICH7 Family) USB UHCI Controller #1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c8_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c8_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c8_1028_01e6[] = "PowerEdge 860"; #endif -static const char pci_device_8086_27c6[] = "82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID"; -static const char pci_device_8086_27c8[] = "82801G (ICH7 Family) USB UHCI #1"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27c8_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c8_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27c8_107b_5048[] = "E4500"; #endif #ifdef INIT_SUBSYS_INFO @@ -25419,11 +28038,23 @@ static const char pci_subsys_8086_27c8_17aa_200a[] = "ThinkPad T60/R60 series"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27c8_8086_544e[] = "DeskTop Board D945GTP"; #endif -static const char pci_device_8086_27c9[] = "82801G (ICH7 Family) USB UHCI #2"; +static const char pci_device_8086_27c9[] = "82801G (ICH7 Family) USB UHCI Controller #2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c9_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c9_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c9_1028_01e6[] = "PowerEdge 860"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27c9_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c9_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27c9_107b_5048[] = "E4500"; #endif #ifdef INIT_SUBSYS_INFO @@ -25432,11 +28063,23 @@ static const char pci_subsys_8086_27c9_17aa_200a[] = "ThinkPad T60/R60 series"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27c9_8086_544e[] = "DeskTop Board D945GTP"; #endif -static const char pci_device_8086_27ca[] = "82801G (ICH7 Family) USB UHCI #3"; +static const char pci_device_8086_27ca[] = "82801G (ICH7 Family) USB UHCI Controller #3"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27ca_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27ca_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27ca_1028_01e6[] = "PowerEdge 860"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27ca_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27ca_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27ca_107b_5048[] = "E4500"; #endif #ifdef INIT_SUBSYS_INFO @@ -25445,11 +28088,20 @@ static const char pci_subsys_8086_27ca_17aa_200a[] = "ThinkPad T60/R60 series"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27ca_8086_544e[] = "DeskTop Board D945GTP"; #endif -static const char pci_device_8086_27cb[] = "82801G (ICH7 Family) USB UHCI #4"; +static const char pci_device_8086_27cb[] = "82801G (ICH7 Family) USB UHCI Controller #4"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cb_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cb_1028_01df[] = "PowerEdge SC440"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27cb_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cb_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27cb_107b_5048[] = "E4500"; #endif #ifdef INIT_SUBSYS_INFO @@ -25460,29 +28112,62 @@ static const char pci_subsys_8086_27cb_8086_544e[] = "DeskTop Board D945GTP"; #endif static const char pci_device_8086_27cc[] = "82801G (ICH7 Family) USB2 EHCI Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cc_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cc_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cc_1028_01e6[] = "PowerEdge 860"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27cc_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cc_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27cc_17aa_200b[] = "ThinkPad T60/R60 series"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27cc_8086_544e[] = "DeskTop Board D945GTP"; #endif static const char pci_device_8086_27d0[] = "82801G (ICH7 Family) PCI Express Port 1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d0_103c_30a3[] = "Compaq nw8440"; +#endif static const char pci_device_8086_27d2[] = "82801G (ICH7 Family) PCI Express Port 2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d2_103c_30a3[] = "Compaq nw8440"; +#endif static const char pci_device_8086_27d4[] = "82801G (ICH7 Family) PCI Express Port 3"; static const char pci_device_8086_27d6[] = "82801G (ICH7 Family) PCI Express Port 4"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d6_103c_30a3[] = "Compaq nw8440"; +#endif static const char pci_device_8086_27d8[] = "82801G (ICH7 Family) High Definition Audio Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d8_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27d8_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d8_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d8_1043_13c4[] = "Asus G2P"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27d8_107b_5048[] = "E4500"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27d8_10f7_8338[] = "Panasonic CF-Y5 laptop"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d8_1179_ff10[] = "Toshiba Satellite A100-796 audio (Realtek ALC861)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27d8_1179_ff31[] = "AC97 Data Fax SoftModem with SmartCP"; #endif #ifdef INIT_SUBSYS_INFO @@ -25494,8 +28179,26 @@ static const char pci_subsys_8086_27d8_1734_10ad[] = "Conexant softmodem SmartCP #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27d8_17aa_2010[] = "ThinkPad T60/R60 series"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d8_17aa_3802[] = "Lenovo 3000 C200 audio [Realtek ALC861VD]"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d8_8086_1112[] = "DeskTop Board D945GTP"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27d8_8086_27d8[] = "Lenovo 3000 N100 Audio (Intel HDA)"; +#endif static const char pci_device_8086_27da[] = "82801G (ICH7 Family) SMBus Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27da_1025_006c[] = "9814 WKMI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27da_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27da_1028_01e6[] = "PowerEdge 860"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27da_10f7_8338[] = "Panasonic CF-Y5 laptop"; #endif #ifdef INIT_SUBSYS_INFO @@ -25504,24 +28207,39 @@ static const char pci_subsys_8086_27da_17aa_200f[] = "ThinkPad T60/R60 series"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27da_8086_544e[] = "DeskTop Board D945GTP"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27da_8086_5842[] = "DeskTop Board D975XBX"; +#endif static const char pci_device_8086_27dc[] = "82801G (ICH7 Family) LAN Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27dc_8086_308d[] = "DeskTop Board D945GTP"; #endif static const char pci_device_8086_27dd[] = "82801G (ICH7 Family) AC'97 Modem Controller"; static const char pci_device_8086_27de[] = "82801G (ICH7 Family) AC'97 Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27de_1462_7267[] = "Realtek ALC883 Audio Controller"; +#endif static const char pci_device_8086_27df[] = "82801G (ICH7 Family) IDE Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27df_1028_01df[] = "PowerEdge SC440"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27df_1028_01e6[] = "PowerEdge 860"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27df_103c_30a1[] = "NC2400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27df_103c_30a3[] = "Compaq nw8440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27df_107b_5048[] = "E4500"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27df_10f7_8338[] = "Panasonic CF-Y5 laptop"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_27df_17aa_200c[] = "Thinkpad R60e model 0657"; +static const char pci_subsys_8086_27df_17aa_200c[] = "ThinkPad T60/R60 series"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_27df_8086_544e[] = "DeskTop Board D945GTP"; @@ -25529,89 +28247,441 @@ static const char pci_subsys_8086_27df_8086_544e[] = "DeskTop Board D945GTP"; static const char pci_device_8086_27e0[] = "82801GR/GH/GHM (ICH7 Family) PCI Express Port 5"; static const char pci_device_8086_27e2[] = "82801GR/GH/GHM (ICH7 Family) PCI Express Port 6"; static const char pci_device_8086_2810[] = "82801HB/HR (ICH8/R) LPC Interface Controller"; -static const char pci_device_8086_2811[] = "Mobile LPC Interface Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2810_1043_81ec[] = "P5B"; +#endif +static const char pci_device_8086_2811[] = "82801HBM (ICH8M-E) LPC Interface Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2811_e4bf_cc47[] = "CCG-RUMBA"; +#endif static const char pci_device_8086_2812[] = "82801HH (ICH8DH) LPC Interface Controller"; static const char pci_device_8086_2814[] = "82801HO (ICH8DO) LPC Interface Controller"; -static const char pci_device_8086_2815[] = "Mobile LPC Interface Controller"; +static const char pci_device_8086_2815[] = "82801HEM (ICH8M) LPC Interface Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2815_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2815_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2815_104d_9005[] = "Vaio VGN-FZ260E"; +#endif static const char pci_device_8086_2820[] = "82801H (ICH8 Family) 4 port SATA IDE Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2820_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2820_1462_7235[] = "P965 Neo MS-7235 mainboard"; #endif static const char pci_device_8086_2821[] = "82801HR/HO/HH (ICH8R/DO/DH) 6 port SATA AHCI Controller"; static const char pci_device_8086_2822[] = "82801 SATA RAID Controller"; static const char pci_device_8086_2824[] = "82801HB (ICH8) 4 port SATA AHCI Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2824_1043_81ec[] = "P5B"; +#endif static const char pci_device_8086_2825[] = "82801H (ICH8 Family) 2 port SATA IDE Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2825_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2825_1462_7235[] = "P965 Neo MS-7235 mainboard"; #endif -static const char pci_device_8086_2828[] = "Mobile SATA IDE Controller"; -static const char pci_device_8086_2829[] = "Mobile SATA AHCI Controller"; -static const char pci_device_8086_282a[] = "Mobile SATA RAID Controller"; -static const char pci_device_8086_2830[] = "82801H (ICH8 Family) USB UHCI #1"; +static const char pci_device_8086_2828[] = "82801HBM/HEM (ICH8M/ICH8M-E) SATA IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2828_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2828_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2829[] = "82801HBM/HEM (ICH8M/ICH8M-E) SATA AHCI Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2829_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2829_104d_9005[] = "Vaio VGN-FZ260E"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2829_17aa_20a7[] = "ThinkPad T61"; +#endif +static const char pci_device_8086_282a[] = "Mobile 82801 SATA RAID Controller"; +static const char pci_device_8086_2830[] = "82801H (ICH8 Family) USB UHCI Controller #1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2830_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2830_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2830_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2830_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2830_104d_9005[] = "Vaio VGN-FZ260E"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2830_1462_7235[] = "P965 Neo MS-7235 mainboard"; #endif -static const char pci_device_8086_2831[] = "82801H (ICH8 Family) USB UHCI #2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2830_17aa_20aa[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2830_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2831[] = "82801H (ICH8 Family) USB UHCI Controller #2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2831_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2831_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2831_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2831_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2831_104d_9005[] = "Vaio VGN-FZ260E"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2831_1462_7235[] = "P965 Neo MS-7235 mainboard"; #endif -static const char pci_device_8086_2832[] = "82801H (ICH8 Family) USB UHCI #3"; -static const char pci_device_8086_2834[] = "82801H (ICH8 Family) USB UHCI #4"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2831_17aa_20aa[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2831_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2832[] = "82801H (ICH8 Family) USB UHCI Controller #3"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2832_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2832_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2832_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2832_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2832_104d_9005[] = "Vaio VGN-FZ260E"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2832_17aa_20aa[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2832_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2834[] = "82801H (ICH8 Family) USB UHCI Controller #4"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2834_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2834_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2834_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2834_103c_30c1[] = "Compaq 6910p"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2834_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2834_104d_9005[] = "Vaio VGN-FZ260E"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2834_1462_7235[] = "P965 Neo MS-7235 mainboard"; #endif -static const char pci_device_8086_2835[] = "82801H (ICH8 Family) USB UHCI #5"; -static const char pci_device_8086_2836[] = "82801H (ICH8 Family) USB2 EHCI #1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2834_17aa_20aa[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2834_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2835[] = "82801H (ICH8 Family) USB UHCI Controller #5"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2835_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2835_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2835_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2835_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2835_104d_9005[] = "Vaio VGN-FZ260E"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2835_17aa_20aa[] = "ThinkPad T60"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2835_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2836[] = "82801H (ICH8 Family) USB2 EHCI Controller #1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2836_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2836_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2836_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2836_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2836_104d_9005[] = "Vaio VGN-FZ260E"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2836_1462_7235[] = "P965 Neo MS-7235 mainboard"; #endif -static const char pci_device_8086_283a[] = "82801H (ICH8 Family) USB2 EHCI #2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2836_17aa_20ab[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2836_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_283a[] = "82801H (ICH8 Family) USB2 EHCI Controller #2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283a_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283a_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283a_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283a_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283a_104d_9005[] = "Vaio VGN-FZ260E"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283a_17aa_20ab[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283a_e4bf_cc47[] = "CCG-RUMBA"; +#endif static const char pci_device_8086_283e[] = "82801H (ICH8 Family) SMBus Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283e_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283e_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283e_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283e_104d_9005[] = "Vaio VGN-FZ260E"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_283e_1462_7235[] = "P965 Neo MS-7235 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283e_17aa_20a9[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283e_e4bf_cc47[] = "CCG-RUMBA"; +#endif static const char pci_device_8086_283f[] = "82801H (ICH8 Family) PCI Express Port 1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_283f_1028_01da[] = "OptiPlex 745"; +#endif static const char pci_device_8086_2841[] = "82801H (ICH8 Family) PCI Express Port 2"; static const char pci_device_8086_2843[] = "82801H (ICH8 Family) PCI Express Port 3"; static const char pci_device_8086_2845[] = "82801H (ICH8 Family) PCI Express Port 4"; static const char pci_device_8086_2847[] = "82801H (ICH8 Family) PCI Express Port 5"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2847_1028_01da[] = "OptiPlex 745"; +#endif static const char pci_device_8086_2849[] = "82801H (ICH8 Family) PCI Express Port 6"; static const char pci_device_8086_284b[] = "82801H (ICH8 Family) HD Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_284b_0690_107b[] = "Gateway P-6825"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_284b_1028_01da[] = "OptiPlex 745"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_284b_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_284b_1028_01f9[] = "Dell Latitude D630"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_284b_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_284b_1043_81ec[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_284b_104d_9005[] = "Vaio VGN-FZ260E"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_284b_17aa_20ac[] = "ThinkPad T61"; +#endif static const char pci_device_8086_284f[] = "82801H (ICH8 Family) Thermal Reporting Device"; -static const char pci_device_8086_2850[] = "Mobile IDE Controller"; -static const char pci_device_8086_2910[] = "LPC Interface Controller"; -static const char pci_device_8086_2911[] = "LPC Interface Controller"; -static const char pci_device_8086_2912[] = "LPC Interface Controller"; -static const char pci_device_8086_2914[] = "LPC Interface Controller"; -static const char pci_device_8086_2916[] = "LPC Interface Controller"; -static const char pci_device_8086_2918[] = "LPC Interface Controller"; -static const char pci_device_8086_2920[] = "4 port SATA IDE Controller"; -static const char pci_device_8086_2921[] = "2 port SATA IDE Controller"; -static const char pci_device_8086_2922[] = "6 port SATA AHCI Controller"; -static const char pci_device_8086_2923[] = "4 port SATA AHCI Controller"; -static const char pci_device_8086_2925[] = "SATA RAID Controller"; -static const char pci_device_8086_2926[] = "2 port SATA IDE Controller"; -static const char pci_device_8086_2928[] = "Mobile 2 port SATA IDE Controller"; -static const char pci_device_8086_292d[] = "Mobile 2 port SATA IDE Controller"; -static const char pci_device_8086_292e[] = "Mobile 1 port SATA IDE Controller"; -static const char pci_device_8086_2930[] = "SMBus Controller"; -static const char pci_device_8086_2932[] = "Thermal Subsystem"; -static const char pci_device_8086_2934[] = "USB UHCI Controller #1"; -static const char pci_device_8086_2935[] = "USB UHCI Controller #2"; -static const char pci_device_8086_2936[] = "USB UHCI Controller #3"; -static const char pci_device_8086_2937[] = "USB UHCI Controller #4"; -static const char pci_device_8086_2938[] = "USB UHCI Controller #5"; -static const char pci_device_8086_2939[] = "USB UHCI Controller #6"; -static const char pci_device_8086_293a[] = "USB2 EHCI Controller #1"; -static const char pci_device_8086_293c[] = "USB2 EHCI Controller #2"; -static const char pci_device_8086_293e[] = "HD Audio Controller"; -static const char pci_device_8086_2940[] = "PCI Express Port 1"; -static const char pci_device_8086_2942[] = "PCI Express Port 2"; -static const char pci_device_8086_2944[] = "PCI Express Port 3"; -static const char pci_device_8086_2946[] = "PCI Express Port 4"; -static const char pci_device_8086_2948[] = "PCI Express Port 5"; -static const char pci_device_8086_294a[] = "PCI Express Port 6"; -static const char pci_device_8086_294c[] = "Gigabit Ethernet Controller"; +static const char pci_device_8086_2850[] = "82801HBM/HEM (ICH8M/ICH8M-E) IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2850_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2850_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2850_104d_9005[] = "Vaio VGN-FZ260E"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2850_17aa_20a6[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2850_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2912[] = "82801IH (ICH9DH) LPC Interface Controller"; +static const char pci_device_8086_2914[] = "82801IO (ICH9DO) LPC Interface Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2914_1028_0211[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2916[] = "82801IR (ICH9R) LPC Interface Controller"; +static const char pci_device_8086_2917[] = "ICH9M-E LPC Interface Controller"; +static const char pci_device_8086_2918[] = "82801IB (ICH9) LPC Interface Controller"; +static const char pci_device_8086_2919[] = "ICH9M LPC Interface Controller"; +static const char pci_device_8086_2920[] = "82801IR/IO/IH (ICH9R/DO/DH) 4 port SATA IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2920_1028_020f[] = "PowerEdge R300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2920_1028_0210[] = "PowerEdge T300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2920_1028_0211[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2921[] = "82801IB (ICH9) 2 port SATA IDE Controller"; +static const char pci_device_8086_2922[] = "82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA AHCI Controller"; +static const char pci_device_8086_2923[] = "82801IB (ICH9) 4 port SATA AHCI Controller"; +static const char pci_device_8086_2925[] = "82801IR/IO (ICH9R/DO) SATA RAID Controller"; +static const char pci_device_8086_2926[] = "82801I (ICH9 Family) 2 port SATA IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2926_1028_0211[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2928[] = "ICH9M/M-E 2 port SATA IDE Controller"; +static const char pci_device_8086_2929[] = "ICH9M/M-E SATA AHCI Controller"; +static const char pci_device_8086_292c[] = "ICH9M-E SATA RAID Controller"; +static const char pci_device_8086_292d[] = "ICH9M/M-E 2 port SATA IDE Controller"; +static const char pci_device_8086_2930[] = "82801I (ICH9 Family) SMBus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2930_1028_0211[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2932[] = "82801I (ICH9 Family) Thermal Subsystem"; +static const char pci_device_8086_2934[] = "82801I (ICH9 Family) USB UHCI Controller #1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2934_1028_020f[] = "PowerEdge R300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2934_1028_0210[] = "PowerEdge T300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2934_1028_0211[] = "Optiplex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2934_1028_2011[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2935[] = "82801I (ICH9 Family) USB UHCI Controller #2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2935_1028_020f[] = "PowerEdge R300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2935_1028_0210[] = "PowerEdge T300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2935_1028_0211[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2936[] = "82801I (ICH9 Family) USB UHCI Controller #3"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2936_1028_020f[] = "PowerEdge R300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2936_1028_0210[] = "PowerEdge T300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2936_1028_0211[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2937[] = "82801I (ICH9 Family) USB UHCI Controller #4"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2937_1028_0211[] = "Optiplex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2937_1028_2011[] = "Optiplex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2937_8086_2937[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2938[] = "82801I (ICH9 Family) USB UHCI Controller #5"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2938_1028_0211[] = "Optiplex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2938_8086_2938[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2939[] = "82801I (ICH9 Family) USB UHCI Controller #6"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2939_1028_0210[] = "PowerEdge T300"; +#endif +static const char pci_device_8086_293a[] = "82801I (ICH9 Family) USB2 EHCI Controller #1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_293a_1028_020f[] = "PowerEdge R300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_293a_1028_0210[] = "PowerEdge T300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_293a_1028_0211[] = "Optiplex 755"; +#endif +static const char pci_device_8086_293c[] = "82801I (ICH9 Family) USB2 EHCI Controller #2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_293c_1028_0211[] = "Optiplex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_293c_8086_293c[] = "Optiplex 755"; +#endif +static const char pci_device_8086_293e[] = "82801I (ICH9 Family) HD Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_293e_1028_0211[] = "Optiplex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_293e_8086_293e[] = "Optiplex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_293e_8086_2940[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2940[] = "82801I (ICH9 Family) PCI Express Port 1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2940_1028_0211[] = "Optiplex 755"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2940_8086_2940[] = "Optiplex 755"; +#endif +static const char pci_device_8086_2942[] = "82801I (ICH9 Family) PCI Express Port 2"; +static const char pci_device_8086_2944[] = "82801I (ICH9 Family) PCI Express Port 3"; +static const char pci_device_8086_2946[] = "82801I (ICH9 Family) PCI Express Port 4"; +static const char pci_device_8086_2948[] = "82801I (ICH9 Family) PCI Express Port 5"; +static const char pci_device_8086_294a[] = "82801I (ICH9 Family) PCI Express Port 6"; +static const char pci_device_8086_294c[] = "82566DC-2 Gigabit Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_294c_17aa_302e[] = "82566DM-2 Gigabit Network Connection"; +#endif static const char pci_device_8086_2970[] = "82946GZ/PL/GL Memory Controller Hub"; static const char pci_device_8086_2971[] = "82946GZ/PL/GL PCI Express Root Port"; static const char pci_device_8086_2972[] = "82946GZ/GL Integrated Graphics Controller"; @@ -25620,10 +28690,15 @@ static const char pci_device_8086_2974[] = "82946GZ/GL HECI Controller"; static const char pci_device_8086_2975[] = "82946GZ/GL HECI Controller"; static const char pci_device_8086_2976[] = "82946GZ/GL PT IDER Controller"; static const char pci_device_8086_2977[] = "82946GZ/GL KT Controller"; -static const char pci_device_8086_2980[] = "965 G1 Memory Controller Hub"; -static const char pci_device_8086_2981[] = "965 G1 PCI Express Root Port"; -static const char pci_device_8086_2982[] = "965 G1 Integrated Graphics Controller"; +static const char pci_device_8086_2980[] = "82G35 Express DRAM Controller"; +static const char pci_device_8086_2981[] = "82G35 Express PCI Express Root Port"; +static const char pci_device_8086_2982[] = "82G35 Express Integrated Graphics Controller"; +static const char pci_device_8086_2983[] = "82G35 Express Integrated Graphics Controller"; +static const char pci_device_8086_2984[] = "82G35 Express HECI Controller"; static const char pci_device_8086_2990[] = "82Q963/Q965 Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2990_1028_01da[] = "OptiPlex 745"; +#endif static const char pci_device_8086_2991[] = "82Q963/Q965 PCI Express Root Port"; static const char pci_device_8086_2992[] = "82Q963/Q965 Integrated Graphics Controller"; static const char pci_device_8086_2993[] = "82Q963/Q965 Integrated Graphics Controller"; @@ -25632,68 +28707,228 @@ static const char pci_device_8086_2995[] = "82Q963/Q965 HECI Controller"; static const char pci_device_8086_2996[] = "82Q963/Q965 PT IDER Controller"; static const char pci_device_8086_2997[] = "82Q963/Q965 KT Controller"; static const char pci_device_8086_29a0[] = "82P965/G965 Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29a0_1043_81ea[] = "P5B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29a0_1462_7276[] = "MS-7276 [G965MDH]"; +#endif static const char pci_device_8086_29a1[] = "82P965/G965 PCI Express Root Port"; static const char pci_device_8086_29a2[] = "82G965 Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29a2_1462_7276[] = "MS-7276 [G965MDH]"; +#endif static const char pci_device_8086_29a3[] = "82G965 Integrated Graphics Controller"; static const char pci_device_8086_29a4[] = "82P965/G965 HECI Controller"; static const char pci_device_8086_29a5[] = "82P965/G965 HECI Controller"; static const char pci_device_8086_29a6[] = "82P965/G965 PT IDER Controller"; static const char pci_device_8086_29a7[] = "82P965/G965 KT Controller"; -static const char pci_device_8086_29b0[] = "DRAM Controller"; -static const char pci_device_8086_29b1[] = "PCI Express Root Port"; -static const char pci_device_8086_29b2[] = "Integrated Graphics Controller"; -static const char pci_device_8086_29b3[] = "Integrated Graphics Controller"; -static const char pci_device_8086_29b4[] = "HECI Controller"; -static const char pci_device_8086_29b5[] = "HECI Controller"; -static const char pci_device_8086_29b6[] = "PT IDER Controller"; -static const char pci_device_8086_29b7[] = "Serial KT Controller"; -static const char pci_device_8086_29c0[] = "DRAM Controller"; -static const char pci_device_8086_29c1[] = "PCI Express Root Port"; -static const char pci_device_8086_29c2[] = "Integrated Graphics Controller"; -static const char pci_device_8086_29c3[] = "Integrated Graphics Controller"; -static const char pci_device_8086_29c4[] = "HECI Controller"; -static const char pci_device_8086_29c5[] = "HECI Controller"; -static const char pci_device_8086_29c6[] = "PT IDER Controller"; -static const char pci_device_8086_29c7[] = "Serial KT Controller"; +static const char pci_device_8086_29b0[] = "82Q35 Express DRAM Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29b0_1028_0211[] = "OptiPlex 755"; +#endif +static const char pci_device_8086_29b1[] = "82Q35 Express PCI Express Root Port"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29b1_1028_0211[] = "OptiPlex 755"; +#endif +static const char pci_device_8086_29b2[] = "82Q35 Express Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29b2_1028_0211[] = "OptiPlex 755"; +#endif +static const char pci_device_8086_29b3[] = "82Q35 Express Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29b3_1028_0211[] = "OptiPlex 755"; +#endif +static const char pci_device_8086_29b4[] = "82Q35 Express MEI Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29b4_1028_0211[] = "OptiPlex 755"; +#endif +static const char pci_device_8086_29b5[] = "82Q35 Express MEI Controller"; +static const char pci_device_8086_29b6[] = "82Q35 Express PT IDER Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29b6_1028_0211[] = "OptiPlex 755"; +#endif +static const char pci_device_8086_29b7[] = "82Q35 Express Serial KT Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_29b7_1028_0211[] = "OptiPlex 755"; +#endif +static const char pci_device_8086_29c0[] = "82G33/G31/P35/P31 Express DRAM Controller"; +static const char pci_device_8086_29c1[] = "82G33/G31/P35/P31 Express PCI Express Root Port"; +static const char pci_device_8086_29c2[] = "82G33/G31 Express Integrated Graphics Controller"; +static const char pci_device_8086_29c3[] = "82G33/G31 Express Integrated Graphics Controller"; +static const char pci_device_8086_29c4[] = "82G33/G31/P35/P31 Express MEI Controller"; +static const char pci_device_8086_29c5[] = "82G33/G31/P35/P31 Express MEI Controller"; +static const char pci_device_8086_29c6[] = "82G33/G31/P35/P31 Express PT IDER Controller"; +static const char pci_device_8086_29c7[] = "82G33/G31/P35/P31 Express Serial KT Controller"; static const char pci_device_8086_29cf[] = "Virtual HECI Controller"; -static const char pci_device_8086_29d0[] = "DRAM Controller"; -static const char pci_device_8086_29d1[] = "PCI Express Root Port"; -static const char pci_device_8086_29d2[] = "Integrated Graphics Controller"; -static const char pci_device_8086_29d3[] = "Integrated Graphics Controller"; -static const char pci_device_8086_29d4[] = "HECI Controller"; -static const char pci_device_8086_29d5[] = "HECI Controller"; -static const char pci_device_8086_29d6[] = "PT IDER Controller"; -static const char pci_device_8086_29d7[] = "Serial KT Controller"; -static const char pci_device_8086_29e0[] = "DRAM Controller"; -static const char pci_device_8086_29e1[] = "Host-Primary PCI Express Bridge"; -static const char pci_device_8086_29e4[] = "HECI Controller"; -static const char pci_device_8086_29e5[] = "HECI Controller"; -static const char pci_device_8086_29e6[] = "PT IDER Controller"; -static const char pci_device_8086_29e7[] = "Serial KT Controller"; -static const char pci_device_8086_29e9[] = "Host-Secondary PCI Express Bridge"; -static const char pci_device_8086_29f0[] = "Server DRAM Controller"; -static const char pci_device_8086_29f1[] = "Server Host-Primary PCI Express Bridge"; -static const char pci_device_8086_29f4[] = "Server HECI Controller"; -static const char pci_device_8086_29f5[] = "Server HECI Controller"; -static const char pci_device_8086_29f6[] = "Server PT IDER Controller"; -static const char pci_device_8086_29f7[] = "Server Serial KT Controller"; -static const char pci_device_8086_29f9[] = "Server Host-Secondary PCI Express Bridge"; -static const char pci_device_8086_2a00[] = "Mobile Memory Controller Hub"; -static const char pci_device_8086_2a01[] = "Mobile PCI Express Root Port"; -static const char pci_device_8086_2a02[] = "Mobile Integrated Graphics Controller"; -static const char pci_device_8086_2a03[] = "Mobile Integrated Graphics Controller"; -static const char pci_device_8086_2a04[] = "Mobile HECI Controller"; -static const char pci_device_8086_2a05[] = "Mobile HECI Controller"; -static const char pci_device_8086_2a06[] = "Mobile PT IDER Controller"; -static const char pci_device_8086_2a07[] = "Mobile KT Controller"; -static const char pci_device_8086_3092[] = "Integrated RAID"; +static const char pci_device_8086_29d0[] = "82Q33 Express DRAM Controller"; +static const char pci_device_8086_29d1[] = "82Q33 Express PCI Express Root Port"; +static const char pci_device_8086_29d2[] = "82Q33 Express Integrated Graphics Controller"; +static const char pci_device_8086_29d3[] = "82Q33 Express Integrated Graphics Controller"; +static const char pci_device_8086_29d4[] = "82Q33 Express MEI Controller"; +static const char pci_device_8086_29d5[] = "82Q33 Express MEI Controller"; +static const char pci_device_8086_29d6[] = "82Q33 Express PT IDER Controller"; +static const char pci_device_8086_29d7[] = "82Q33 Express Serial KT Controller"; +static const char pci_device_8086_29e0[] = "82X38 Express DRAM Controller"; +static const char pci_device_8086_29e1[] = "82X38 Express Host-Primary PCI Express Bridge"; +static const char pci_device_8086_29e4[] = "82X38 Express MEI Controller"; +static const char pci_device_8086_29e5[] = "82X38 Express MEI Controller"; +static const char pci_device_8086_29e6[] = "82X38 Express PT IDER Controller"; +static const char pci_device_8086_29e7[] = "82X38 Express Serial KT Controller"; +static const char pci_device_8086_29e9[] = "82X38 Express Host-Secondary PCI Express Bridge"; +static const char pci_device_8086_29f0[] = "3200/3210 Chipset DRAM Controller"; +static const char pci_device_8086_29f1[] = "3200/3210 Chipset Host-Primary PCI Express Bridge"; +static const char pci_device_8086_29f4[] = "3200/3210 Chipset MEI Controller"; +static const char pci_device_8086_29f5[] = "3200/3210 Chipset MEI Controller"; +static const char pci_device_8086_29f6[] = "3200/3210 Chipset PT IDER Controller"; +static const char pci_device_8086_29f7[] = "3200/3210 Chipset Serial KT Controller"; +static const char pci_device_8086_29f9[] = "3210 Chipset Host-Secondary PCI Express Bridge"; +static const char pci_device_8086_2a00[] = "Mobile PM965/GM965/GL960 Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a00_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a00_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a00_104d_9005[] = "Vaio VGN-FZ260E"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a00_17aa_20b1[] = "ThinkPad T61"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a00_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2a01[] = "Mobile PM965/GM965/GL960 PCI Express Root Port"; +static const char pci_device_8086_2a02[] = "Mobile GM965/GL960 Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a02_1028_01f3[] = "Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a02_1028_01f9[] = "Latitude D630"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a02_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a02_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2a03[] = "Mobile GM965/GL960 Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a03_1028_01f3[] = "Dell Inspiron 1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a03_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a03_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2a04[] = "Mobile PM965/GM965 MEI Controller"; +static const char pci_device_8086_2a05[] = "Mobile PM965/GM965 MEI Controller"; +static const char pci_device_8086_2a06[] = "Mobile PM965/GM965 PT IDER Controller"; +static const char pci_device_8086_2a07[] = "Mobile PM965/GM965 KT Controller"; +static const char pci_device_8086_2a10[] = "Mobile GME965/GLE960 Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a10_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2a11[] = "Mobile GME965/GLE960 PCI Express Root Port"; +static const char pci_device_8086_2a12[] = "Mobile GME965/GLE960 Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a12_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2a13[] = "Mobile GME965/GLE960 Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2a13_e4bf_cc47[] = "CCG-RUMBA"; +#endif +static const char pci_device_8086_2a14[] = "Mobile GME965/GLE960 MEI Controller"; +static const char pci_device_8086_2a15[] = "Mobile GME965/GLE960 MEI Controller"; +static const char pci_device_8086_2a16[] = "Mobile GME965/GLE960 PT IDER Controller"; +static const char pci_device_8086_2a17[] = "Mobile GME965/GLE960 KT Controller"; +static const char pci_device_8086_2a40[] = "Cantiga Memory Controller Hub"; +static const char pci_device_8086_2a41[] = "Cantiga PCI Express Graphics Port"; +static const char pci_device_8086_2a42[] = "Cantiga Integrated Graphics Controller"; +static const char pci_device_8086_2a43[] = "Cantiga Integrated Graphics Controller"; +static const char pci_device_8086_2a44[] = "Cantiga MEI Controller"; +static const char pci_device_8086_2a45[] = "Cantiga MEI Controller"; +static const char pci_device_8086_2a46[] = "Cantiga PT IDER Controller"; +static const char pci_device_8086_2a47[] = "Cantiga AMT SOL Redirection"; +static const char pci_device_8086_2a50[] = "Cantiga MEI Controller"; +static const char pci_device_8086_2a51[] = "Cantiga MEI Controller"; +static const char pci_device_8086_2a52[] = "Cantiga PT IDER Controller"; +static const char pci_device_8086_2a53[] = "Cantiga AMT SOL Redirection"; +static const char pci_device_8086_2c01[] = "QuickPath Architecture System Address Decoder"; +static const char pci_device_8086_2c10[] = "QuickPath Interconnect Link 0"; +static const char pci_device_8086_2c11[] = "QuickPath Interconnect Physical 0"; +static const char pci_device_8086_2c14[] = "QuickPath Interconnect Link 1"; +static const char pci_device_8086_2c15[] = "QuickPath Interconnect Physical 1"; +static const char pci_device_8086_2c18[] = "QuickPath Memory Controller"; +static const char pci_device_8086_2c19[] = "QuickPath Memory Controller Target Address Decoder"; +static const char pci_device_8086_2c1a[] = "QuickPath Memory Controller RAS Registers"; +static const char pci_device_8086_2c1c[] = "QuickPath Memory Controller Test Registers"; +static const char pci_device_8086_2c20[] = "QuickPath Memory Controller Channel 0 Control Registers"; +static const char pci_device_8086_2c21[] = "QuickPath Memory Controller Channel 0 Address Registers"; +static const char pci_device_8086_2c22[] = "QuickPath Memory Controller Channel 0 Rank Registers"; +static const char pci_device_8086_2c23[] = "QuickPath Memory Controller Channel 0 Thermal Control Registers"; +static const char pci_device_8086_2c28[] = "QuickPath Memory Controller Channel 1 Control Registers"; +static const char pci_device_8086_2c29[] = "QuickPath Memory Controller Channel 1 Address Registers"; +static const char pci_device_8086_2c2a[] = "QuickPath Memory Controller Channel 1 Rank Registers"; +static const char pci_device_8086_2c2b[] = "QuickPath Memory Controller Channel 1 Thermal Control Registers"; +static const char pci_device_8086_2c30[] = "QuickPath Memory Controller Channel 2 Control Registers"; +static const char pci_device_8086_2c31[] = "QuickPath Memory Controller Channel 2 Address Registers"; +static const char pci_device_8086_2c32[] = "QuickPath Memory Controller Channel 2 Rank Registers"; +static const char pci_device_8086_2c33[] = "QuickPath Memory Controller Channel 2 Thermal Control Registers"; +static const char pci_device_8086_2c40[] = "QuickPath Architecture Generic Non-Core Registers"; +static const char pci_device_8086_2e00[] = "Eaglelake DRAM Controller"; +static const char pci_device_8086_2e01[] = "Eaglelake PCI Express Root Port"; +static const char pci_device_8086_2e02[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e03[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e04[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e05[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e06[] = "Eaglelake PT IDER Controller"; +static const char pci_device_8086_2e07[] = "Eaglelake Serial KT Controller"; +static const char pci_device_8086_2e10[] = "Eaglelake DRAM Controller"; +static const char pci_device_8086_2e11[] = "Eaglelake PCI Express Root Port"; +static const char pci_device_8086_2e12[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e13[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e14[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e15[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e16[] = "Eaglelake PT IDER Controller"; +static const char pci_device_8086_2e17[] = "Eaglelake Serial KT Controller"; +static const char pci_device_8086_2e20[] = "Eaglelake DRAM Controller"; +static const char pci_device_8086_2e21[] = "Eaglelake PCI Express Root Port"; +static const char pci_device_8086_2e22[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e23[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e24[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e25[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e26[] = "Eaglelake PT IDER Controller"; +static const char pci_device_8086_2e27[] = "Eaglelake Serial KT Controller"; +static const char pci_device_8086_2e30[] = "Eaglelake DRAM Controller"; +static const char pci_device_8086_2e31[] = "Eaglelake PCI Express Root Port"; +static const char pci_device_8086_2e32[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e33[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e34[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e35[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e36[] = "Eaglelake PT IDER Controller"; +static const char pci_device_8086_2e37[] = "Eaglelake Serial KT Controller"; +static const char pci_device_8086_2e40[] = "Eaglelake DRAM Controller"; +static const char pci_device_8086_2e41[] = "Eaglelake PCI Express Root Port"; +static const char pci_device_8086_2e42[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e43[] = "Eaglelake Integrated Graphics Controller"; +static const char pci_device_8086_2e44[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e45[] = "Eaglelake HECI Controller"; +static const char pci_device_8086_2e46[] = "Eaglelake PT IDER Controller"; +static const char pci_device_8086_2e47[] = "Eaglelake Serial KT Controller"; static const char pci_device_8086_3200[] = "GD31244 PCI-X SATA HBA"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3200_1775_c200[] = "C2K onboard SATA host bus adapter"; #endif +static const char pci_device_8086_3313[] = "IOP348 I/O Processor (SL8e) in IOC Mode SAS/SATA"; +static const char pci_device_8086_331b[] = "IOP348 I/O Processor (SL8x) in IOC Mode SAS/SATA"; +static const char pci_device_8086_3331[] = "IOC340 I/O Controller (VV8e) SAS/SATA"; +static const char pci_device_8086_3339[] = "IOC340 I/O Controller (VV8x) SAS/SATA"; static const char pci_device_8086_3340[] = "82855PM Processor to I/O Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3340_1014_0529[] = "Thinkpad T41"; +static const char pci_subsys_8086_3340_1014_0529[] = "ThinkPad T41"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3340_1025_005a[] = "TravelMate 290"; @@ -25708,12 +28943,58 @@ static const char pci_subsys_8086_3340_103c_0890[] = "NC6000 laptop"; static const char pci_subsys_8086_3340_103c_08b0[] = "tc1100 tablet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3340_144d_c005[] = "X10 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3340_144d_c00c[] = "P30/P35 notebook"; #endif static const char pci_device_8086_3341[] = "82855PM Processor to AGP Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3341_144d_c00c[] = "P30 notebook"; #endif +static const char pci_device_8086_3363[] = "IOC340 I/O Controller in IOC Mode SAS/SATA"; +static const char pci_device_8086_33c3[] = "IOP348 I/O Processor (SL8De) in IOC Mode SAS/SATA"; +static const char pci_device_8086_33cb[] = "IOP348 I/O Processor (SL8Dx) in IOC Mode SAS/SATA"; +static const char pci_device_8086_3400[] = "QuickPath Architecture I/O Hub to ESI Port"; +static const char pci_device_8086_3401[] = "QuickPath Architecture I/O Hub to ESI Port"; +static const char pci_device_8086_3402[] = "QuickPath Architecture I/O Hub to ESI Port"; +static const char pci_device_8086_3403[] = "QuickPath Architecture I/O Hub to ESI Port"; +static const char pci_device_8086_3404[] = "QuickPath Architecture I/O Hub to ESI Port"; +static const char pci_device_8086_3405[] = "QuickPath Architecture I/O Hub to ESI Port"; +static const char pci_device_8086_3406[] = "QuickPath Architecture I/O Hub to ESI Port"; +static const char pci_device_8086_3407[] = "QuickPath Architecture I/O Hub to ESI Port"; +static const char pci_device_8086_3408[] = "QuickPath Architecture I/O Hub PCI Express Root Port 1"; +static const char pci_device_8086_3409[] = "QuickPath Architecture I/O Hub PCI Express Root Port 2"; +static const char pci_device_8086_340a[] = "QuickPath Architecture I/O Hub PCI Express Root Port 3"; +static const char pci_device_8086_340b[] = "QuickPath Architecture I/O Hub PCI Express Root Port 4"; +static const char pci_device_8086_340c[] = "QuickPath Architecture I/O Hub PCI Express Root Port 5"; +static const char pci_device_8086_340d[] = "QuickPath Architecture I/O Hub PCI Express Root Port 6"; +static const char pci_device_8086_340e[] = "QuickPath Architecture I/O Hub PCI Express Root Port 7"; +static const char pci_device_8086_340f[] = "QuickPath Architecture I/O Hub PCI Express Root Port 8"; +static const char pci_device_8086_3410[] = "QuickPath Architecture I/O Hub PCI Express Root Port 9"; +static const char pci_device_8086_3411[] = "QuickPath Architecture I/O Hub PCI Express Root Port 10"; +static const char pci_device_8086_3418[] = "Quickpath Interconnect Physical Layer Port 0"; +static const char pci_device_8086_3419[] = "Quickpath Interconnect Physical Layer Port 1"; +static const char pci_device_8086_3420[] = "QuickPath Architecture I/O Hub PCI Express Root Port 0"; +static const char pci_device_8086_3421[] = "QuickPath Architecture I/O Hub PCI Express Root Port 0"; +static const char pci_device_8086_3422[] = "QuickPath Architecture I/O Hub GPIO and Scratch Pad Registers"; +static const char pci_device_8086_3423[] = "QuickPath Architecture I/O Hub Control Status and RAS Registers"; +static const char pci_device_8086_3425[] = "QuickPath Interconnect Physical and Link Layer Registers Port 0"; +static const char pci_device_8086_3426[] = "QuickPath Interconnect Routing and Protocol Layer Registers Port 0"; +static const char pci_device_8086_3427[] = "QuickPath Interconnect Physical and Link Layer Registers Port 1"; +static const char pci_device_8086_3428[] = "QuickPath Interconnect Routing and Protocol Layer Registers Port 1"; +static const char pci_device_8086_3429[] = "DMA Engine"; +static const char pci_device_8086_342a[] = "DMA Engine"; +static const char pci_device_8086_342b[] = "DMA Engine"; +static const char pci_device_8086_342c[] = "DMA Engine"; +static const char pci_device_8086_342d[] = "QuickPath Architecture I/O Hub I/OxAPIC Interrupt Controller"; +static const char pci_device_8086_342e[] = "QuickPath Architecture I/O Hub System Management Registers"; +static const char pci_device_8086_342f[] = "Trusted Execution Technology Registers"; +static const char pci_device_8086_3430[] = "DMA Engine"; +static const char pci_device_8086_3431[] = "DMA Engine"; +static const char pci_device_8086_3432[] = "DMA Engine"; +static const char pci_device_8086_3433[] = "DMA Engine"; +static const char pci_device_8086_3438[] = "QuickPath Architecture I/O Hub Throttle Registers"; static const char pci_device_8086_3500[] = "6311ESB/6321ESB PCI Express Upstream Port"; static const char pci_device_8086_3501[] = "6310ESB PCI Express Upstream Port"; static const char pci_device_8086_3504[] = "6311ESB/6321ESB I/OxAPIC Interrupt Controller"; @@ -25744,18 +29025,27 @@ static const char pci_subsys_8086_3577_1014_0513[] = "ThinkPad A/T/X Series"; static const char pci_device_8086_3578[] = "82830 830 Chipset Host Bridge"; static const char pci_device_8086_3580[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3580_1014_055c[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_3580_1014_055c[] = "ThinkPad R50e"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3580_1028_0139[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_1028_014f[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3580_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3580_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_114a_0582[] = "PC8"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3580_1734_1055[] = "Amilo M1420"; #endif #ifdef INIT_SUBSYS_INFO @@ -25782,15 +29072,24 @@ static const char pci_subsys_8086_3581_1734_1055[] = "Amilo M1420"; #endif static const char pci_device_8086_3582[] = "82852/855GM Integrated Graphics Device"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3582_1014_0562[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_3582_1014_0562[] = "ThinkPad R50e"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3582_1028_0139[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3582_1028_014f[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3582_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3582_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3582_114a_0582[] = "PC8 integrated graphics"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3582_1775_10d0[] = "V5D Single Board Computer VGA"; #endif #ifdef INIT_SUBSYS_INFO @@ -25810,18 +29109,27 @@ static const char pci_subsys_8086_3582_e4bf_0cd2[] = "CD2-BEBOP"; #endif static const char pci_device_8086_3584[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3584_1014_055d[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_3584_1014_055d[] = "ThinkPad R50e"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3584_1028_0139[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_1028_014f[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3584_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3584_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_114a_0582[] = "PC8"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3584_1734_1055[] = "Amilo M1420"; #endif #ifdef INIT_SUBSYS_INFO @@ -25838,18 +29146,27 @@ static const char pci_subsys_8086_3584_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_8086_3585[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3585_1014_055e[] = "Thinkpad R50e model 1634"; +static const char pci_subsys_8086_3585_1014_055e[] = "ThinkPad R50e"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3585_1028_0139[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_1028_014f[] = "Latitude X300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3585_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_1028_018d[] = "Inspiron 700m/710m"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3585_1028_0196[] = "Inspiron 5160"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_114a_0582[] = "PC8"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3585_1734_1055[] = "Amilo M1420"; #endif #ifdef INIT_SUBSYS_INFO @@ -25866,16 +29183,31 @@ static const char pci_subsys_8086_3585_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_8086_3590[] = "E7520 Memory Controller Hub"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3590_1014_02dd[] = "eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3590_1028_016c[] = "PowerEdge 1850"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3590_1028_016d[] = "PowerEdge 2850"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3590_1028_019a[] = "PowerEdge SC1425"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3590_1734_103e[] = "Primergy RX300 S2"; +static const char pci_subsys_8086_3590_1734_103e[] = "PRIMERGY RX/TX S2 series"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3590_1775_1100[] = "CR11/VR11 Single Board Computer"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3590_4c53_10d0[] = "Telum ASLP10 Processor AMC"; #endif static const char pci_device_8086_3591[] = "E7525/E7520 Error Reporting Registers"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3591_1014_02dd[] = "eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3591_1028_0169[] = "Precision 470"; #endif #ifdef INIT_SUBSYS_INFO @@ -25885,15 +29217,33 @@ static const char pci_device_8086_3592[] = "E7320 Memory Controller Hub"; static const char pci_device_8086_3593[] = "E7320 Error Reporting Registers"; static const char pci_device_8086_3594[] = "E7520 DMA Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3594_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_3594_4c53_10d0[] = "Telum ASLP10 Processor AMC"; #endif static const char pci_device_8086_3595[] = "E7525/E7520/E7320 PCI Express Port A"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3595_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif static const char pci_device_8086_3596[] = "E7525/E7520/E7320 PCI Express Port A1"; static const char pci_device_8086_3597[] = "E7525/E7520 PCI Express Port B"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3597_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif static const char pci_device_8086_3598[] = "E7520 PCI Express Port B1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3598_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif static const char pci_device_8086_3599[] = "E7520 PCI Express Port C"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3599_1775_1100[] = "CR11/VR11 Single Board Computer"; +#endif static const char pci_device_8086_359a[] = "E7520 PCI Express Port C1"; static const char pci_device_8086_359b[] = "E7525/E7520/E7320 Extended Configuration Registers"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_359b_1014_02dd[] = "eServer xSeries server mainboard"; +#endif static const char pci_device_8086_359e[] = "E7525 Memory Controller Hub"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_359e_1028_0169[] = "Precision 470"; @@ -25904,48 +29254,111 @@ static const char pci_device_8086_35b5[] = "3100 Chipset Enhanced DMA Controller static const char pci_device_8086_35b6[] = "3100 Chipset PCI Express Port A"; static const char pci_device_8086_35b7[] = "3100 Chipset PCI Express Port A1"; static const char pci_device_8086_35c8[] = "3100 Extended Configuration Test Overflow Registers"; -static const char pci_device_8086_3600[] = "Server Memory Controller Hub"; -static const char pci_device_8086_3604[] = "Server PCI Express Port 1"; -static const char pci_device_8086_3605[] = "Server PCI Express Port 2"; -static const char pci_device_8086_3606[] = "Server PCI Express Port 3"; -static const char pci_device_8086_3607[] = "Server PCI Express Port 4"; -static const char pci_device_8086_3608[] = "Server PCI Express Port 5"; -static const char pci_device_8086_3609[] = "Server PCI Express Port 6"; -static const char pci_device_8086_360a[] = "Server PCI Express Port 7"; -static const char pci_device_8086_360b[] = "Server IOAT DMA Controller"; -static const char pci_device_8086_360c[] = "Server FSB Registers"; -static const char pci_device_8086_360d[] = "Server Snoop Filter Registers"; -static const char pci_device_8086_360e[] = "Server Reserved Registers"; -static const char pci_device_8086_360f[] = "Server FBD Branch 0 Registers"; -static const char pci_device_8086_3610[] = "Server FBD Branch 1 Registers"; -static const char pci_device_8086_4000[] = "Memory Controller Hub"; -static const char pci_device_8086_4008[] = "Memory Controller Hub"; -static const char pci_device_8086_4010[] = "Memory Controller Hub"; -static const char pci_device_8086_4021[] = "PCI Express Port 1"; -static const char pci_device_8086_4022[] = "PCI Express Port 2"; -static const char pci_device_8086_4023[] = "PCI Express Port 3"; -static const char pci_device_8086_4024[] = "PCI Express Port 4"; -static const char pci_device_8086_4025[] = "PCI Express Port 5"; -static const char pci_device_8086_4026[] = "PCI Express Port 6"; -static const char pci_device_8086_4027[] = "PCI Express Port 7"; -static const char pci_device_8086_4028[] = "PCI Express Port 8"; -static const char pci_device_8086_4029[] = "PCI Express Port 9"; -static const char pci_device_8086_402d[] = "IBIST Registers"; -static const char pci_device_8086_402e[] = "IBIST Registers"; -static const char pci_device_8086_402f[] = "DMA/DCA Engine"; -static const char pci_device_8086_4030[] = "FSB Registers"; -static const char pci_device_8086_4032[] = "I/OxAPIC"; -static const char pci_device_8086_4035[] = "FBD Registers"; -static const char pci_device_8086_4036[] = "FBD Registers"; +static const char pci_device_8086_3600[] = "7300 Chipset Memory Controller Hub"; +static const char pci_device_8086_3604[] = "7300 Chipset PCI Express Port 1"; +static const char pci_device_8086_3605[] = "7300 Chipset PCI Express Port 2"; +static const char pci_device_8086_3606[] = "7300 Chipset PCI Express Port 3"; +static const char pci_device_8086_3607[] = "7300 Chipset PCI Express Port 4"; +static const char pci_device_8086_3608[] = "7300 Chipset PCI Express Port 5"; +static const char pci_device_8086_3609[] = "7300 Chipset PCI Express Port 6"; +static const char pci_device_8086_360a[] = "7300 Chipset PCI Express Port 7"; +static const char pci_device_8086_360b[] = "7300 Chipset QuickData Technology Device"; +static const char pci_device_8086_360c[] = "7300 Chipset FSB Registers"; +static const char pci_device_8086_360d[] = "7300 Chipset Snoop Filter Registers"; +static const char pci_device_8086_360e[] = "7300 Chipset Debug and Miscellaneous Registers"; +static const char pci_device_8086_360f[] = "7300 Chipset FBD Branch 0 Registers"; +static const char pci_device_8086_3610[] = "7300 Chipset FBD Branch 1 Registers"; +static const char pci_device_8086_3a00[] = "ICH10 4 port SATA IDE Controller"; +static const char pci_device_8086_3a02[] = "ICH10 6 port SATA AHCI Controller"; +static const char pci_device_8086_3a05[] = "ICH10 SATA RAID Controller"; +static const char pci_device_8086_3a06[] = "ICH10 2 port SATA IDE Controller"; +static const char pci_device_8086_3a14[] = "ICH10 LPC Interface Controller"; +static const char pci_device_8086_3a16[] = "ICH10 LPC Interface Controller"; +static const char pci_device_8086_3a18[] = "ICH10 LPC Interface Controller"; +static const char pci_device_8086_3a1a[] = "ICH10 LPC Interface Controller"; +static const char pci_device_8086_3a20[] = "ICH10 4 port SATA IDE Controller"; +static const char pci_device_8086_3a22[] = "ICH10 6 port SATA AHCI Controller"; +static const char pci_device_8086_3a25[] = "ICH10 SATA RAID Controller"; +static const char pci_device_8086_3a26[] = "ICH10 2 port SATA IDE Controller"; +static const char pci_device_8086_3a30[] = "ICH10 SMBus Controller"; +static const char pci_device_8086_3a32[] = "ICH10 Thermal Subsystem"; +static const char pci_device_8086_3a34[] = "ICH10 USB UHCI Controller #1"; +static const char pci_device_8086_3a35[] = "ICH10 USB UHCI Controller #2"; +static const char pci_device_8086_3a36[] = "ICH10 USB UHCI Controller #3"; +static const char pci_device_8086_3a37[] = "ICH10 USB UHCI Controller #4"; +static const char pci_device_8086_3a38[] = "ICH10 USB UHCI Controller #5"; +static const char pci_device_8086_3a39[] = "ICH10 USB UHCI Controller #6"; +static const char pci_device_8086_3a3a[] = "ICH10 USB2 EHCI Controller #1"; +static const char pci_device_8086_3a3c[] = "ICH10 USB2 EHCI Controller #2"; +static const char pci_device_8086_3a3e[] = "ICH10 HD Audio Controller"; +static const char pci_device_8086_3a40[] = "ICH10 PCI Express Port 1"; +static const char pci_device_8086_3a42[] = "ICH10 PCI Express Port 2"; +static const char pci_device_8086_3a44[] = "ICH10 PCI Express Port 3"; +static const char pci_device_8086_3a46[] = "ICH10 PCI Express Port 4"; +static const char pci_device_8086_3a48[] = "ICH10 PCI Express Port 5"; +static const char pci_device_8086_3a4a[] = "ICH10 PCI Express Port 6"; +static const char pci_device_8086_3a4c[] = "ICH10 Gigabit Ethernet Controller"; +static const char pci_device_8086_3a51[] = "ICH10 VECI Controller"; +static const char pci_device_8086_3a55[] = "ICH10 Virtual SATA Controller"; +static const char pci_device_8086_3a60[] = "ICH10 SMBus Controller"; +static const char pci_device_8086_3a62[] = "ICH10 Thermal Subsystem"; +static const char pci_device_8086_3a64[] = "ICH10 USB UHCI Controller #1"; +static const char pci_device_8086_3a65[] = "ICH10 USB UHCI Controller #2"; +static const char pci_device_8086_3a66[] = "ICH10 USB UHCI Controller #3"; +static const char pci_device_8086_3a67[] = "ICH10 USB UHCI Controller #4"; +static const char pci_device_8086_3a68[] = "ICH10 USB UHCI Controller #5"; +static const char pci_device_8086_3a69[] = "ICH10 USB UHCI Controller #6"; +static const char pci_device_8086_3a6a[] = "ICH10 USB2 EHCI Controller #1"; +static const char pci_device_8086_3a6c[] = "ICH10 USB2 EHCI Controller #2"; +static const char pci_device_8086_3a6e[] = "ICH10 HD Audio Controller"; +static const char pci_device_8086_3a70[] = "ICH10 PCI Express Port 1"; +static const char pci_device_8086_3a72[] = "ICH10 PCI Express Port 2"; +static const char pci_device_8086_3a74[] = "ICH10 PCI Express Port 3"; +static const char pci_device_8086_3a76[] = "ICH10 PCI Express Port 4"; +static const char pci_device_8086_3a78[] = "ICH10 PCI Express Port 5"; +static const char pci_device_8086_3a7a[] = "ICH10 PCI Express Port 6"; +static const char pci_device_8086_3a7c[] = "ICH10 Gigabit Ethernet Controller"; +static const char pci_device_8086_4000[] = "5400 Chipset Memory Controller Hub"; +static const char pci_device_8086_4001[] = "5400 Chipset Memory Controller Hub"; +static const char pci_device_8086_4003[] = "5400 Chipset Memory Controller Hub"; +static const char pci_device_8086_4021[] = "5400 Chipset PCI Express Port 1"; +static const char pci_device_8086_4022[] = "5400 Chipset PCI Express Port 2"; +static const char pci_device_8086_4023[] = "5400 Chipset PCI Express Port 3"; +static const char pci_device_8086_4024[] = "5400 Chipset PCI Express Port 4"; +static const char pci_device_8086_4025[] = "5400 Chipset PCI Express Port 5"; +static const char pci_device_8086_4026[] = "5400 Chipset PCI Express Port 6"; +static const char pci_device_8086_4027[] = "5400 Chipset PCI Express Port 7"; +static const char pci_device_8086_4028[] = "5400 Chipset PCI Express Port 8"; +static const char pci_device_8086_4029[] = "5400 Chipset PCI Express Port 9"; +static const char pci_device_8086_402d[] = "5400 Chipset IBIST Registers"; +static const char pci_device_8086_402e[] = "5400 Chipset IBIST Registers"; +static const char pci_device_8086_402f[] = "5400 Chipset QuickData Technology Device"; +static const char pci_device_8086_4030[] = "5400 Chipset FSB Registers"; +static const char pci_device_8086_4031[] = "5400 Chipset CE/SF Registers"; +static const char pci_device_8086_4032[] = "5400 Chipset IOxAPIC"; +static const char pci_device_8086_4035[] = "5400 Chipset FBD Registers"; +static const char pci_device_8086_4036[] = "5400 Chipset FBD Registers"; static const char pci_device_8086_4220[] = "PRO/Wireless 2200BG Network Connection"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_4220_2731_8086[] = "WLAN-Adapter"; +static const char pci_subsys_8086_4220_103c_0934[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4220_103c_12f6[] = "Compaq nw8240/nx8220"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4220_8086_2721[] = "Dell B130 laptop integrated WLAN"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_4220_8086_2731[] = "Samsung P35 integrated WLAN"; #endif static const char pci_device_8086_4222[] = "PRO/Wireless 3945ABG Network Connection"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4222_103c_135c[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4222_103c_30c0[] = "Compaq 6710b"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_4222_8086_1005[] = "PRO/Wireless 3945BG Network Connection"; #endif #ifdef INIT_SUBSYS_INFO @@ -25956,40 +29369,113 @@ static const char pci_subsys_8086_4222_8086_1044[] = "PRO/Wireless 3945BG Networ #endif static const char pci_device_8086_4223[] = "PRO/Wireless 2915ABG Network Connection"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4223_1000_8086[] = "mPCI 3B Americas/Europe ZZA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4223_1001_8086[] = "mPCI 3B Europe ZZE"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4223_1002_8086[] = "mPCI 3B Japan ZZJ"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4223_1003_8086[] = "mPCI 3B High-Band ZZH"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_4223_1351_103c[] = "Compaq NC6220"; #endif static const char pci_device_8086_4224[] = "PRO/Wireless 2915ABG Network Connection"; static const char pci_device_8086_4227[] = "PRO/Wireless 3945ABG Network Connection"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_4227_8086_1011[] = "Thinkpad X60s, R60e model 0657"; +static const char pci_subsys_8086_4227_8086_1011[] = "ThinkPad R60e/X60s"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_4227_8086_1014[] = "PRO/Wireless 3945BG Network Connection"; #endif -static const char pci_device_8086_5001[] = "Pro/DSL 2100 Modem"; +static const char pci_device_8086_4229[] = "PRO/Wireless 4965 AG or AGN Network Connection"; +static const char pci_device_8086_4230[] = "PRO/Wireless 4965 AG or AGN Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4230_8086_1110[] = "Lenovo ThinkPad T51"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4230_8086_1111[] = "Lenovo ThinkPad T61"; +#endif +static const char pci_device_8086_444e[] = "Turbo Memory Controller"; +static const char pci_device_8086_5001[] = "LE80578"; +static const char pci_device_8086_5002[] = "LE80578 Graphics Processor Unit"; +static const char pci_device_8086_5009[] = "LE80578 Video Display Controller"; +static const char pci_device_8086_500d[] = "LE80578 Expansion Bus"; +static const char pci_device_8086_500e[] = "LE80578 UART Controller"; +static const char pci_device_8086_500f[] = "LE80578 General Purpose IO"; +static const char pci_device_8086_5010[] = "LE80578 I2C Controller"; +static const char pci_device_8086_5012[] = "LE80578 Serial Peripheral Interface Bus"; +static const char pci_device_8086_5020[] = "Tolapai Memory Controller Hub"; +static const char pci_device_8086_5021[] = "Tolapai DRAM Error Reporting Registers"; +static const char pci_device_8086_5023[] = "Tolapai EDMA Controller"; +static const char pci_device_8086_5024[] = "Tolapai PCI Express Port PEA0"; +static const char pci_device_8086_5025[] = "Tolapai PCI Express Port PEA1"; +static const char pci_device_8086_5028[] = "Tolapai S-ATA IDE"; +static const char pci_device_8086_5029[] = "Tolapai S-ATA AHCI"; +static const char pci_device_8086_502a[] = "Tolapai S-ATA RAID0/1"; +static const char pci_device_8086_502b[] = "Tolapai S-ATA Reserved"; +static const char pci_device_8086_502c[] = "Tolapai System Device"; +static const char pci_device_8086_5030[] = "Tolapai System Device"; +static const char pci_device_8086_5031[] = "Tolapai LPC Bus"; +static const char pci_device_8086_5032[] = "Tolapai SMBus Controller"; +static const char pci_device_8086_5033[] = "Tolapai USB 1.1 Controller"; +static const char pci_device_8086_5035[] = "Tolapai USB 2.0 Controller"; +static const char pci_device_8086_5037[] = "Tolapai PCI-PCI Bridge (transparent mode)"; +static const char pci_device_8086_5039[] = "Tolapai Controller Area Network (CAN) interface #1"; +static const char pci_device_8086_503a[] = "Tolapai Controller Area Network (CAN) interface #2"; +static const char pci_device_8086_503b[] = "Tolapai Synchronous Serial Port (SPP)"; +static const char pci_device_8086_503c[] = "Tolapai IEEE 1588 Hardware Assist"; +static const char pci_device_8086_503d[] = "Tolapai Local Expansion Bus"; +static const char pci_device_8086_503e[] = "Tolapai Global Control Unit (GCU)"; +static const char pci_device_8086_503f[] = "Tolapai System Device"; +static const char pci_device_8086_5040[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5041[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5042[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5043[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5044[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5045[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5046[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5047[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5048[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_5049[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_504a[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_504b[] = "Tolapai Gigabit Ethernet MAC"; +static const char pci_device_8086_504c[] = "Tolapai TDM"; static const char pci_device_8086_5200[] = "EtherExpress PRO/100 Intelligent Server"; static const char pci_device_8086_5201[] = "EtherExpress PRO/100 Intelligent Server"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_5201_8086_0001[] = "EtherExpress PRO/100 Server Ethernet Adapter"; #endif -static const char pci_device_8086_530d[] = "80310 IOP [IO Processor]"; -static const char pci_device_8086_65c0[] = "Memory Controller Hub"; -static const char pci_device_8086_65e2[] = "PCI Express x4 Port 2"; -static const char pci_device_8086_65e3[] = "PCI Express x4 Port 3"; -static const char pci_device_8086_65e4[] = "PCI Express x4 Port 4"; -static const char pci_device_8086_65e5[] = "PCI Express x4 Port 5"; -static const char pci_device_8086_65e6[] = "PCI Express x4 Port 6"; -static const char pci_device_8086_65e7[] = "PCI Express x4 Port 7"; -static const char pci_device_8086_65f0[] = "FSB Registers"; -static const char pci_device_8086_65f1[] = "Reserved Registers"; -static const char pci_device_8086_65f3[] = "Reserved Registers"; -static const char pci_device_8086_65f5[] = "DDR Channel 0 Registers"; -static const char pci_device_8086_65f6[] = "DDR Channel 1 Registers"; -static const char pci_device_8086_65f7[] = "PCI Express x8 Port 2-3"; -static const char pci_device_8086_65f8[] = "PCI Express x8 Port 4-5"; -static const char pci_device_8086_65f9[] = "PCI Express x8 Port 6-7"; -static const char pci_device_8086_65fa[] = "PCI Express x16 Port 4-7"; -static const char pci_device_8086_65ff[] = "DMA Engine"; +static const char pci_device_8086_530d[] = "80310 (IOP) IO Processor"; +static const char pci_device_8086_65c0[] = "5100 Chipset Memory Controller Hub"; +static const char pci_device_8086_65e2[] = "5100 Chipset PCI Express x4 Port 2"; +static const char pci_device_8086_65e3[] = "5100 Chipset PCI Express x4 Port 3"; +static const char pci_device_8086_65e4[] = "5100 Chipset PCI Express x4 Port 4"; +static const char pci_device_8086_65e5[] = "5100 Chipset PCI Express x4 Port 5"; +static const char pci_device_8086_65e6[] = "5100 Chipset PCI Express x4 Port 6"; +static const char pci_device_8086_65e7[] = "5100 Chipset PCI Express x4 Port 7"; +static const char pci_device_8086_65f0[] = "5100 Chipset FSB Registers"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_65f0_1028_020f[] = "PowerEdge R300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_65f0_1028_0210[] = "PowerEdge T300"; +#endif +static const char pci_device_8086_65f1[] = "5100 Chipset Reserved Registers"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_65f1_1028_0210[] = "PowerEdge T300"; +#endif +static const char pci_device_8086_65f3[] = "5100 Chipset Reserved Registers"; +static const char pci_device_8086_65f5[] = "5100 Chipset DDR Channel 0 Registers"; +static const char pci_device_8086_65f6[] = "5100 Chipset DDR Channel 1 Registers"; +static const char pci_device_8086_65f7[] = "5100 Chipset PCI Express x8 Port 2-3"; +static const char pci_device_8086_65f8[] = "5100 Chipset PCI Express x8 Port 4-5"; +static const char pci_device_8086_65f9[] = "5100 Chipset PCI Express x8 Port 6-7"; +static const char pci_device_8086_65fa[] = "5100 Chipset PCI Express x16 Port 4-7"; +static const char pci_device_8086_65ff[] = "5100 Chipset DMA Engine"; static const char pci_device_8086_7000[] = "82371SB PIIX3 ISA [Natoma/Triton II]"; static const char pci_device_8086_7010[] = "82371SB PIIX3 IDE [Natoma/Triton II]"; static const char pci_device_8086_7020[] = "82371SB PIIX3 USB [Natoma/Triton II]"; @@ -25999,28 +29485,28 @@ static const char pci_device_8086_7051[] = "PB 642365-003 (Business Video Confer static const char pci_device_8086_7100[] = "430TX - 82439TX MTXC"; static const char pci_device_8086_7110[] = "82371AB/EB/MB PIIX4 ISA"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_7110_15ad_1976[] = "virtualHW v3"; +static const char pci_subsys_8086_7110_15ad_1976[] = "Virtual Machine Chipset"; #endif static const char pci_device_8086_7111[] = "82371AB/EB/MB PIIX4 IDE"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_7111_15ad_1976[] = "virtualHW v3"; +static const char pci_subsys_8086_7111_15ad_1976[] = "Virtual Machine Chipset"; #endif static const char pci_device_8086_7112[] = "82371AB/EB/MB PIIX4 USB"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_7112_15ad_1976[] = "virtualHW v3"; +static const char pci_subsys_8086_7112_15ad_1976[] = "Virtual Machine Chipset"; #endif static const char pci_device_8086_7113[] = "82371AB/EB/MB PIIX4 ACPI"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_7113_15ad_1976[] = "virtualHW v3"; +static const char pci_subsys_8086_7113_15ad_1976[] = "Virtual Machine Chipset"; #endif -static const char pci_device_8086_7120[] = "82810 GMCH [Graphics Memory Controller Hub]"; +static const char pci_device_8086_7120[] = "82810 GMCH (Graphics Memory Controller Hub)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_7120_4c53_1040[] = "CL7 mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_7120_4c53_1060[] = "PC7 mainboard"; #endif -static const char pci_device_8086_7121[] = "82810 CGC [Chipset Graphics Controller]"; +static const char pci_device_8086_7121[] = "82810 (CGC) Chipset Graphics Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_7121_4c53_1040[] = "CL7 mainboard"; #endif @@ -26030,10 +29516,16 @@ static const char pci_subsys_8086_7121_4c53_1060[] = "PC7 mainboard"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_7121_8086_4341[] = "Cayman (CA810) Mainboard"; #endif -static const char pci_device_8086_7122[] = "82810 DC-100 GMCH [Graphics Memory Controller Hub]"; -static const char pci_device_8086_7123[] = "82810 DC-100 CGC [Chipset Graphics Controller]"; -static const char pci_device_8086_7124[] = "82810E DC-133 GMCH [Graphics Memory Controller Hub]"; -static const char pci_device_8086_7125[] = "82810E DC-133 CGC [Chipset Graphics Controller]"; +static const char pci_device_8086_7122[] = "82810 DC-100 (GMCH) Graphics Memory Controller Hub"; +static const char pci_device_8086_7123[] = "82810 DC-100 (CGC) Chipset Graphics Controller"; +static const char pci_device_8086_7124[] = "82810E DC-133 (GMCH) Graphics Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_7124_1028_00b4[] = "OptiPlex GX110"; +#endif +static const char pci_device_8086_7125[] = "82810E DC-133 (CGC) Chipset Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_7125_1028_00b4[] = "OptiPlex GX110"; +#endif static const char pci_device_8086_7126[] = "82810 DC-133 System and Graphics Controller"; static const char pci_device_8086_7128[] = "82810-M DC-100 System and Graphics Controller"; static const char pci_device_8086_712a[] = "82810-M DC-133 System and Graphics Controller"; @@ -26050,10 +29542,13 @@ static const char pci_subsys_8086_7190_0e11_b110[] = "Armada M700/E500"; static const char pci_subsys_8086_7190_1028_008e[] = "PowerEdge 1300 mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_7190_1043_803b[] = "CUBX-L/E Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_7190_1179_0001[] = "Toshiba Tecra 8100 Laptop System Chipset"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_7190_15ad_1976[] = "virtualHW v3"; +static const char pci_subsys_8086_7190_15ad_1976[] = "Virtual Machine Chipset"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_7190_4c53_1050[] = "CT7 mainboard"; @@ -26072,6 +29567,9 @@ static const char pci_subsys_8086_7192_0e11_0460[] = "Armada 1700 Laptop System #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_7192_4c53_1000[] = "CC7/CR7/CP7/VC7/VP7/VR7 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_7192_8086_7190[] = "Dell PowerEdge 350"; +#endif static const char pci_device_8086_7194[] = "82440MX Host Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_7194_1033_0000[] = "Versa Note Vxi"; @@ -26136,6 +29634,22 @@ static const char pci_subsys_8086_7800_8086_0000[] = "Terminator 2x/i"; static const char pci_subsys_8086_7800_8086_0100[] = "Intel740 Graphics Accelerator"; #endif static const char pci_device_8086_8002[] = "Trusted Execution Technology Registers"; +static const char pci_device_8086_8003[] = "Trusted Execution Technology Registers"; +static const char pci_device_8086_8100[] = "System Controller Hub (SCH Poulsbo)"; +static const char pci_device_8086_8108[] = "System Controller Hub (SCH Poulsbo) Graphics Controller"; +static const char pci_device_8086_8110[] = "System Controller Hub (SCH Poulsbo) PCI Express Port 1"; +static const char pci_device_8086_8112[] = "System Controller Hub (SCH Poulsbo) PCI Express Port 2"; +static const char pci_device_8086_8114[] = "System Controller Hub (SCH Poulsbo) USB UHCI #1"; +static const char pci_device_8086_8115[] = "System Controller Hub (SCH Poulsbo) USB UHCI #2"; +static const char pci_device_8086_8116[] = "System Controller Hub (SCH Poulsbo) USB UHCI #3"; +static const char pci_device_8086_8117[] = "System Controller Hub (SCH Poulsbo) USB EHCI #1"; +static const char pci_device_8086_8118[] = "System Controller Hub (SCH Poulsbo) USB Client Controller"; +static const char pci_device_8086_8119[] = "System Controller Hub (SCH Poulsbo) LPC Bridge"; +static const char pci_device_8086_811a[] = "System Controller Hub (SCH Poulsbo) IDE Controller"; +static const char pci_device_8086_811b[] = "System Controller Hub (SCH Poulsbo) HD Audio Controller"; +static const char pci_device_8086_811c[] = "System Controller Hub (SCH Poulsbo) SDIO Controller #1"; +static const char pci_device_8086_811d[] = "System Controller Hub (SCH Poulsbo) SDIO Controller #2"; +static const char pci_device_8086_811e[] = "System Controller Hub (SCH Poulsbo) SDIO Controller #3"; static const char pci_device_8086_84c4[] = "450KX/GX [Orion] - 82454KX/GX PCI bridge"; static const char pci_device_8086_84c5[] = "450KX/GX [Orion] - 82453KX/GX Memory controller"; static const char pci_device_8086_84ca[] = "450NX - 82451NX Memory & I/O Controller"; @@ -26535,6 +30049,8 @@ static const char pci_subsys_9005_00cf_8086_3411[] = "SDS2 Mainboard"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_9005_0241[] = "Serial ATA II RAID 1420SA"; +static const char pci_device_9005_0242[] = "Serial ATA II RAID 1220SA"; +static const char pci_device_9005_0243[] = "Serial ATA II RAID 1430SA"; static const char pci_device_9005_0250[] = "ServeRAID Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0250_1014_0279[] = "ServeRAID-xx"; @@ -26575,6 +30091,38 @@ static const char pci_subsys_9005_0285_1028_0291[] = "CERC SATA RAID 2 PCI SATA static const char pci_subsys_9005_0285_103c_3227[] = "AAR-2610SA"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_108e_0286[] = "STK RAID INT"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_108e_0287[] = "STK RAID EXT"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_108e_7aac[] = "STK RAID REM"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_108e_7aae[] = "STK RAID EX"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_15d9_02b5[] = "AOC-USAS-S4i"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_15d9_02b6[] = "AOC-USAS-S8i"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_15d9_02c9[] = "AOC-USAS-S4iR"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_15d9_02ca[] = "AOC-USAS-S8iR"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0285_17aa_0286[] = "Legend S220 (Legend Crusader)"; #endif @@ -26701,6 +30249,18 @@ static const char pci_subsys_9005_0285_9005_02c7[] = "3085"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0285_9005_02c8[] = "ICP5805BL"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_02ce[] = "51245"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_02cf[] = "51645"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_02d0[] = "52445"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_02d1[] = "5405"; +#endif static const char pci_device_9005_0286[] = "AAC-RAID (Rocket)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0286_1014_034d[] = "8s"; @@ -26791,6 +30351,8 @@ static const char pci_subsys_9005_0412_9005_0412[] = "ASC-48300 (Spirit non-RAID #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0412_9005_0413[] = "ASC-58300 (Oakmont non-RAID)"; #endif +static const char pci_device_9005_0415[] = "ASC-58300 SAS (Razor-External HBA RAID)"; +static const char pci_device_9005_0416[] = "ASC-58300 SAS (Razor-External HBA non-RAID)"; static const char pci_device_9005_041e[] = "AIC-9410W SAS (Razor ASIC non-RAID)"; static const char pci_device_9005_041f[] = "AIC-9410W SAS (Razor ASIC RAID)"; #ifdef INIT_SUBSYS_INFO @@ -26818,6 +30380,9 @@ static const char pci_device_9005_0503[] = "Scamp chipset SCSI controller"; static const char pci_subsys_9005_0503_1014_02bf[] = "Quad Channel PCI-X DDR U320 SCSI RAID Adapter (571E)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0503_1014_02c3[] = "PCI-X DDR 3Gb SAS RAID Adapter (572F)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0503_1014_02d5[] = "Quad Channel PCI-X DDR U320 SCSI RAID Adapter (571F)"; #endif static const char pci_device_9005_0910[] = "AUA-3100B"; @@ -26848,6 +30413,9 @@ static const char pci_subsys_9005_8017_9005_0045[] = "ASC-29320LPE PCIe U320"; #endif static const char pci_device_9005_801c[] = "ASC-39320D U320"; static const char pci_device_9005_801d[] = "AIC-7902B U320"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_801d_1014_02cc[] = "ServeRAID 7e"; +#endif static const char pci_device_9005_801e[] = "AIC-7901A U320"; static const char pci_device_9005_801f[] = "AIC-7902 U320"; #ifdef INIT_SUBSYS_INFO @@ -26865,6 +30433,9 @@ static const char pci_device_9005_8096[] = "ASC-39320A U320 w/HostRAID"; static const char pci_device_9005_8097[] = "ASC-29320ALP U320 w/HostRAID"; static const char pci_device_9005_809c[] = "ASC-39320D(B) U320 w/HostRAID"; static const char pci_device_9005_809d[] = "AIC-7902(B) U320 w/HostRAID"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_809d_1014_02cc[] = "ServeRAID 7e"; +#endif static const char pci_device_9005_809e[] = "AIC-7901A U320 w/HostRAID"; static const char pci_device_9005_809f[] = "AIC-7902 U320 w/HostRAID"; #endif @@ -26997,13 +30568,15 @@ static const char pci_device_cddd_0200[] = "DeepSea 2 High Speed Stereo Vision F #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_d161[] = "Digium, Inc."; -static const char pci_device_d161_0205[] = "Wildcard TE205P"; -static const char pci_device_d161_0210[] = "Wildcard TE210P"; -static const char pci_device_d161_0405[] = "Wildcard TE405P Quad-Span togglable E1/T1/J1 card 5.0v"; -static const char pci_device_d161_0406[] = "Wildcard TE406P Quad-Span togglable E1/T1/J1 echo cancellation card 5.0v"; -static const char pci_device_d161_0410[] = "Wildcard TE410P Quad-Span togglable E1/T1/J1 card 3.3v"; -static const char pci_device_d161_0411[] = "Wildcard TE411P Quad-Span togglable E1/T1/J1 echo cancellation card 3.3v"; -static const char pci_device_d161_2400[] = "Wildcard TDM2400P"; +static const char pci_device_d161_0120[] = "Wildcard TE120P single-span T1/E1/J1 card"; +static const char pci_device_d161_0205[] = "Wildcard TE205P dual-span T1/E1/J1 card 5.0V"; +static const char pci_device_d161_0210[] = "Wildcard TE210P dual-span T1/E1/J1 card 3.3V"; +static const char pci_device_d161_0405[] = "Wildcard TE405P quad-span T1/E1/J1 card 5.0V"; +static const char pci_device_d161_0410[] = "Wildcard TE410P quad-span T1/E1/J1 card 3.3V"; +static const char pci_device_d161_0800[] = "Wildcard TDM800P 8-port analog card"; +static const char pci_device_d161_2400[] = "Wildcard TDM2400P 24-port analog card"; +static const char pci_device_d161_3400[] = "Wildcard TC400P transcoder base card"; +static const char pci_device_d161_b410[] = "Wildcard B410 quad-BRI card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_d4d4[] = "Dy4 Systems Inc"; @@ -27142,6 +30715,10 @@ static const char pci_device_fffe_0710[] = "Virtual SVGA"; static const char pci_vendor_ffff[] = "Illegal Vendor ID"; #endif #ifdef INIT_SUBSYS_INFO +static const pciSubsystemInfo pci_ss_info_0e11_0046_0e11_4091 = + {0x0e11, 0x4091, pci_subsys_0e11_0046_0e11_4091, 0}; +#undef pci_ss_info_0e11_4091 +#define pci_ss_info_0e11_4091 pci_ss_info_0e11_0046_0e11_4091 static const pciSubsystemInfo pci_ss_info_0e11_0046_0e11_409a = {0x0e11, 0x409a, pci_subsys_0e11_0046_0e11_409a, 0}; #undef pci_ss_info_0e11_409a @@ -27402,6 +30979,12 @@ static const pciSubsystemInfo pci_ss_info_1000_0030_1028_0183 = #define pci_ss_info_1028_0183 pci_ss_info_1000_0030_1028_0183 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_1000_0030_1028_018a = + {0x1028, 0x018a, pci_subsys_1000_0030_1028_018a, 0}; +#undef pci_ss_info_1028_018a +#define pci_ss_info_1028_018a pci_ss_info_1000_0030_1028_018a +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1000_0030_1028_1010 = {0x1028, 0x1010, pci_subsys_1000_0030_1028_1010, 0}; #undef pci_ss_info_1028_1010 @@ -27434,11 +31017,83 @@ static const pciSubsystemInfo pci_ss_info_1000_0040_1000_0066 = #undef pci_ss_info_1000_0066 #define pci_ss_info_1000_0066 pci_ss_info_1000_0040_1000_0066 #endif +static const pciSubsystemInfo pci_ss_info_1000_0050_1028_1f04 = + {0x1028, 0x1f04, pci_subsys_1000_0050_1028_1f04, 0}; +#undef pci_ss_info_1028_1f04 +#define pci_ss_info_1028_1f04 pci_ss_info_1000_0050_1028_1f04 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0050_1028_1f09 = + {0x1028, 0x1f09, pci_subsys_1000_0050_1028_1f09, 0}; +#undef pci_ss_info_1028_1f09 +#define pci_ss_info_1028_1f09 pci_ss_info_1000_0050_1028_1f09 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0054_1028_1f04 = + {0x1028, 0x1f04, pci_subsys_1000_0054_1028_1f04, 0}; +#undef pci_ss_info_1028_1f04 +#define pci_ss_info_1028_1f04 pci_ss_info_1000_0054_1028_1f04 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0054_1028_1f05 = + {0x1028, 0x1f05, pci_subsys_1000_0054_1028_1f05, 0}; +#undef pci_ss_info_1028_1f05 +#define pci_ss_info_1028_1f05 pci_ss_info_1000_0054_1028_1f05 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0054_1028_1f06 = + {0x1028, 0x1f06, pci_subsys_1000_0054_1028_1f06, 0}; +#undef pci_ss_info_1028_1f06 +#define pci_ss_info_1028_1f06 pci_ss_info_1000_0054_1028_1f06 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0054_1028_1f07 = + {0x1028, 0x1f07, pci_subsys_1000_0054_1028_1f07, 0}; +#undef pci_ss_info_1028_1f07 +#define pci_ss_info_1028_1f07 pci_ss_info_1000_0054_1028_1f07 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0054_1028_1f08 = + {0x1028, 0x1f08, pci_subsys_1000_0054_1028_1f08, 0}; +#undef pci_ss_info_1028_1f08 +#define pci_ss_info_1028_1f08 pci_ss_info_1000_0054_1028_1f08 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0054_1028_1f09 = + {0x1028, 0x1f09, pci_subsys_1000_0054_1028_1f09, 0}; +#undef pci_ss_info_1028_1f09 +#define pci_ss_info_1028_1f09 pci_ss_info_1000_0054_1028_1f09 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1000_0055_1033_8336 = {0x1033, 0x8336, pci_subsys_1000_0055_1033_8336, 0}; #undef pci_ss_info_1033_8336 #define pci_ss_info_1033_8336 pci_ss_info_1000_0055_1033_8336 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0058_1028_021d = + {0x1028, 0x021d, pci_subsys_1000_0058_1028_021d, 0}; +#undef pci_ss_info_1028_021d +#define pci_ss_info_1028_021d pci_ss_info_1000_0058_1028_021d +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0058_1028_1f0e = + {0x1028, 0x1f0e, pci_subsys_1000_0058_1028_1f0e, 0}; +#undef pci_ss_info_1028_1f0e +#define pci_ss_info_1028_1f0e pci_ss_info_1000_0058_1028_1f0e +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0058_1028_1f0f = + {0x1028, 0x1f0f, pci_subsys_1000_0058_1028_1f0f, 0}; +#undef pci_ss_info_1028_1f0f +#define pci_ss_info_1028_1f0f pci_ss_info_1000_0058_1028_1f0f +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0058_1028_1f10 = + {0x1028, 0x1f10, pci_subsys_1000_0058_1028_1f10, 0}; +#undef pci_ss_info_1028_1f10 +#define pci_ss_info_1028_1f10 pci_ss_info_1000_0058_1028_1f10 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1006 = {0x1000, 0x1006, pci_subsys_1000_0060_1000_1006, 0}; #undef pci_ss_info_1000_1006 @@ -27467,6 +31122,10 @@ static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1012 = {0x1000, 0x1012, pci_subsys_1000_0060_1000_1012, 0}; #undef pci_ss_info_1000_1012 #define pci_ss_info_1000_1012 pci_ss_info_1000_0060_1000_1012 +static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1016 = + {0x1000, 0x1016, pci_subsys_1000_0060_1000_1016, 0}; +#undef pci_ss_info_1000_1016 +#define pci_ss_info_1000_1016 pci_ss_info_1000_0060_1000_1016 static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0363 = {0x1014, 0x0363, pci_subsys_1000_0060_1014_0363, 0}; #undef pci_ss_info_1014_0363 @@ -27479,6 +31138,10 @@ static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0365 = {0x1014, 0x0365, pci_subsys_1000_0060_1014_0365, 0}; #undef pci_ss_info_1014_0365 #define pci_ss_info_1014_0365 pci_ss_info_1000_0060_1014_0365 +static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0379 = + {0x1014, 0x0379, pci_subsys_1000_0060_1014_0379, 0}; +#undef pci_ss_info_1014_0379 +#define pci_ss_info_1014_0379 pci_ss_info_1000_0060_1014_0379 #endif static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f0a = {0x1028, 0x1f0a, pci_subsys_1000_0060_1028_1f0a, 0}; @@ -27509,6 +31172,12 @@ static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f11 = #undef pci_ss_info_1028_1f11 #define pci_ss_info_1028_1f11 pci_ss_info_1000_0060_1028_1f11 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0060_1033_835a = + {0x1033, 0x835a, pci_subsys_1000_0060_1033_835a, 0}; +#undef pci_ss_info_1033_835a +#define pci_ss_info_1033_835a pci_ss_info_1000_0060_1033_835a +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1000_0060_1043_824d = {0x1043, 0x824d, pci_subsys_1000_0060_1043_824d, 0}; #undef pci_ss_info_1043_824d @@ -27517,6 +31186,36 @@ static const pciSubsystemInfo pci_ss_info_1000_0060_1170_002f = {0x1170, 0x002f, pci_subsys_1000_0060_1170_002f, 0}; #undef pci_ss_info_1170_002f #define pci_ss_info_1170_002f pci_ss_info_1000_0060_1170_002f +static const pciSubsystemInfo pci_ss_info_1000_0060_1170_0036 = + {0x1170, 0x0036, pci_subsys_1000_0060_1170_0036, 0}; +#undef pci_ss_info_1170_0036 +#define pci_ss_info_1170_0036 pci_ss_info_1000_0060_1170_0036 +static const pciSubsystemInfo pci_ss_info_1000_0060_15d9_c080 = + {0x15d9, 0xc080, pci_subsys_1000_0060_15d9_c080, 0}; +#undef pci_ss_info_15d9_c080 +#define pci_ss_info_15d9_c080 pci_ss_info_1000_0060_15d9_c080 +static const pciSubsystemInfo pci_ss_info_1000_0060_17aa_6b7c = + {0x17aa, 0x6b7c, pci_subsys_1000_0060_17aa_6b7c, 0}; +#undef pci_ss_info_17aa_6b7c +#define pci_ss_info_17aa_6b7c pci_ss_info_1000_0060_17aa_6b7c +#endif +static const pciSubsystemInfo pci_ss_info_1000_0060_8086_1006 = + {0x8086, 0x1006, pci_subsys_1000_0060_8086_1006, 0}; +#undef pci_ss_info_8086_1006 +#define pci_ss_info_8086_1006 pci_ss_info_1000_0060_8086_1006 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0060_8086_100a = + {0x8086, 0x100a, pci_subsys_1000_0060_8086_100a, 0}; +#undef pci_ss_info_8086_100a +#define pci_ss_info_8086_100a pci_ss_info_1000_0060_8086_100a +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1000_0060_8086_1010 = + {0x8086, 0x1010, pci_subsys_1000_0060_8086_1010, 0}; +#undef pci_ss_info_8086_1010 +#define pci_ss_info_8086_1010 pci_ss_info_1000_0060_8086_1010 +#ifdef VENDOR_INCLUDE_NONVIDEO #endif static const pciSubsystemInfo pci_ss_info_1000_0060_8086_34cc = {0x8086, 0x34cc, pci_subsys_1000_0060_8086_34cc, 0}; @@ -27533,6 +31232,10 @@ static const pciSubsystemInfo pci_ss_info_1000_0062_1000_0062 = {0x1000, 0x0062, pci_subsys_1000_0062_1000_0062, 0}; #undef pci_ss_info_1000_0062 #define pci_ss_info_1000_0062 pci_ss_info_1000_0062_1000_0062 +static const pciSubsystemInfo pci_ss_info_1000_007c_1014_0395 = + {0x1014, 0x0395, pci_subsys_1000_007c_1014_0395, 0}; +#undef pci_ss_info_1014_0395 +#define pci_ss_info_1014_0395 pci_ss_info_1000_007c_1014_0395 #endif static const pciSubsystemInfo pci_ss_info_1000_008f_1092_8000 = {0x1092, 0x8000, pci_subsys_1000_008f_1092_8000, 0}; @@ -27822,6 +31525,10 @@ static const pciSubsystemInfo pci_ss_info_1000_1960_8086_0523 = #define pci_ss_info_8086_0523 pci_ss_info_1000_1960_8086_0523 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_1002_3150_103c_0934 = + {0x103c, 0x0934, pci_subsys_1002_3150_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_1002_3150_103c_0934 static const pciSubsystemInfo pci_ss_info_1002_4150_1002_0002 = {0x1002, 0x0002, pci_subsys_1002_4150_1002_0002, 0}; #undef pci_ss_info_1002_0002 @@ -27986,6 +31693,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4370_1025_0079 = {0x1025, 0x0079, pci_subsys_1002_4370_1025_0079, 0}; #undef pci_ss_info_1025_0079 #define pci_ss_info_1025_0079 pci_ss_info_1002_4370_1025_0079 +static const pciSubsystemInfo pci_ss_info_1002_4370_1025_0091 = + {0x1025, 0x0091, pci_subsys_1002_4370_1025_0091, 0}; +#undef pci_ss_info_1025_0091 +#define pci_ss_info_1025_0091 pci_ss_info_1002_4370_1025_0091 static const pciSubsystemInfo pci_ss_info_1002_4370_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4370_103c_308b, 0}; #undef pci_ss_info_103c_308b @@ -28002,6 +31713,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4371_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4371_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_4371_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4371_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_4371_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_4371_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_4372_1025_0080 = {0x1025, 0x0080, pci_subsys_1002_4372_1025_0080, 0}; #undef pci_ss_info_1025_0080 @@ -28010,6 +31725,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4372_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4372_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_4372_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4372_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_4372_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_4372_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_4373_1025_0080 = {0x1025, 0x0080, pci_subsys_1002_4373_1025_0080, 0}; #undef pci_ss_info_1025_0080 @@ -28018,10 +31737,18 @@ static const pciSubsystemInfo pci_ss_info_1002_4373_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4373_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_4373_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4373_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_4373_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_4373_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_4374_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4374_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_4374_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4374_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_4374_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_4374_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_4375_1025_0080 = {0x1025, 0x0080, pci_subsys_1002_4375_1025_0080, 0}; #undef pci_ss_info_1025_0080 @@ -28030,6 +31757,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4375_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4375_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_4375_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4375_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_4375_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_4375_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_4376_1025_0080 = {0x1025, 0x0080, pci_subsys_1002_4376_1025_0080, 0}; #undef pci_ss_info_1025_0080 @@ -28038,6 +31769,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4376_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4376_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_4376_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4376_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_4376_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_4376_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_4377_1025_0080 = {0x1025, 0x0080, pci_subsys_1002_4377_1025_0080, 0}; #undef pci_ss_info_1025_0080 @@ -28046,6 +31781,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4377_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4377_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_4377_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4377_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_4377_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_4377_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_4378_1025_0080 = {0x1025, 0x0080, pci_subsys_1002_4378_1025_0080, 0}; #undef pci_ss_info_1025_0080 @@ -28054,6 +31793,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4378_103c_308b = {0x103c, 0x308b, pci_subsys_1002_4378_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_4378_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4379_1462_7141 = + {0x1462, 0x7141, pci_subsys_1002_4379_1462_7141, 0}; +#undef pci_ss_info_1462_7141 +#define pci_ss_info_1462_7141 pci_ss_info_1002_4379_1462_7141 static const pciSubsystemInfo pci_ss_info_1002_437a_1002_4379 = {0x1002, 0x4379, pci_subsys_1002_437a_1002_4379, 0}; #undef pci_ss_info_1002_4379 @@ -28062,14 +31805,118 @@ static const pciSubsystemInfo pci_ss_info_1002_437a_1002_437a = {0x1002, 0x437a, pci_subsys_1002_437a_1002_437a, 0}; #undef pci_ss_info_1002_437a #define pci_ss_info_1002_437a pci_ss_info_1002_437a_1002_437a +static const pciSubsystemInfo pci_ss_info_1002_437a_1462_7141 = + {0x1462, 0x7141, pci_subsys_1002_437a_1462_7141, 0}; +#undef pci_ss_info_1462_7141 +#define pci_ss_info_1462_7141 pci_ss_info_1002_437a_1462_7141 static const pciSubsystemInfo pci_ss_info_1002_437a_14f1_8800 = {0x14f1, 0x8800, pci_subsys_1002_437a_14f1_8800, 0}; #undef pci_ss_info_14f1_8800 #define pci_ss_info_14f1_8800 pci_ss_info_1002_437a_14f1_8800 +static const pciSubsystemInfo pci_ss_info_1002_437b_1002_437b = + {0x1002, 0x437b, pci_subsys_1002_437b_1002_437b, 0}; +#undef pci_ss_info_1002_437b +#define pci_ss_info_1002_437b pci_ss_info_1002_437b_1002_437b +static const pciSubsystemInfo pci_ss_info_1002_437b_10cf_1326 = + {0x10cf, 0x1326, pci_subsys_1002_437b_10cf_1326, 0}; +#undef pci_ss_info_10cf_1326 +#define pci_ss_info_10cf_1326 pci_ss_info_1002_437b_10cf_1326 static const pciSubsystemInfo pci_ss_info_1002_437b_1734_10b8 = {0x1734, 0x10b8, pci_subsys_1002_437b_1734_10b8, 0}; #undef pci_ss_info_1734_10b8 #define pci_ss_info_1734_10b8 pci_ss_info_1002_437b_1734_10b8 +static const pciSubsystemInfo pci_ss_info_1002_4380_103c_2813 = + {0x103c, 0x2813, pci_subsys_1002_4380_103c_2813, 0}; +#undef pci_ss_info_103c_2813 +#define pci_ss_info_103c_2813 pci_ss_info_1002_4380_103c_2813 +static const pciSubsystemInfo pci_ss_info_1002_4380_17f2_5999 = + {0x17f2, 0x5999, pci_subsys_1002_4380_17f2_5999, 0}; +#undef pci_ss_info_17f2_5999 +#define pci_ss_info_17f2_5999 pci_ss_info_1002_4380_17f2_5999 +static const pciSubsystemInfo pci_ss_info_1002_4383_0206_1028 = + {0x0206, 0x1028, pci_subsys_1002_4383_0206_1028, 0}; +#undef pci_ss_info_0206_1028 +#define pci_ss_info_0206_1028 pci_ss_info_1002_4383_0206_1028 +static const pciSubsystemInfo pci_ss_info_1002_4383_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_4383_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_4383_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_4383_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_4383_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_4383_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_4385_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_4385_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_4385_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_4385_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_4385_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_4385_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_4386_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_4386_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_4386_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_4386_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_4386_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_4386_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_4387_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_4387_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_4387_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_4387_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_4387_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_4387_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_4388_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_4388_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_4388_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_4388_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_4388_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_4388_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_4389_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_4389_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_4389_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_4389_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_4389_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_4389_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_438a_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_438a_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_438a_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_438a_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_438a_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_438a_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_438b_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_438b_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_438b_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_438b_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_438b_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_438b_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_438c_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_438c_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_438c_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_438c_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_438c_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_438c_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_438d_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_438d_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_438d_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_438d_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_438d_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_438d_17f2_5000 static const pciSubsystemInfo pci_ss_info_1002_4742_1002_0040 = {0x1002, 0x0040, pci_subsys_1002_4742_1002_0040, 0}; #undef pci_ss_info_1002_0040 @@ -28230,6 +32077,14 @@ static const pciSubsystemInfo pci_ss_info_1002_4752_1028_0134 = {0x1028, 0x0134, pci_subsys_1002_4752_1028_0134, 0}; #undef pci_ss_info_1028_0134 #define pci_ss_info_1028_0134 pci_ss_info_1002_4752_1028_0134 +static const pciSubsystemInfo pci_ss_info_1002_4752_1028_014a = + {0x1028, 0x014a, pci_subsys_1002_4752_1028_014a, 0}; +#undef pci_ss_info_1028_014a +#define pci_ss_info_1028_014a pci_ss_info_1002_4752_1028_014a +static const pciSubsystemInfo pci_ss_info_1002_4752_1028_0165 = + {0x1028, 0x0165, pci_subsys_1002_4752_1028_0165, 0}; +#undef pci_ss_info_1028_0165 +#define pci_ss_info_1028_0165 pci_ss_info_1002_4752_1028_0165 static const pciSubsystemInfo pci_ss_info_1002_4752_103c_10e1 = {0x103c, 0x10e1, pci_subsys_1002_4752_103c_10e1, 0}; #undef pci_ss_info_103c_10e1 @@ -28362,6 +32217,14 @@ static const pciSubsystemInfo pci_ss_info_1002_4c42_1028_0085 = {0x1028, 0x0085, pci_subsys_1002_4c42_1028_0085, 0}; #undef pci_ss_info_1028_0085 #define pci_ss_info_1028_0085 pci_ss_info_1002_4c42_1028_0085 +static const pciSubsystemInfo pci_ss_info_1002_4c46_1002_0155 = + {0x1002, 0x0155, pci_subsys_1002_4c46_1002_0155, 0}; +#undef pci_ss_info_1002_0155 +#define pci_ss_info_1002_0155 pci_ss_info_1002_4c46_1002_0155 +static const pciSubsystemInfo pci_ss_info_1002_4c46_1014_0155 = + {0x1014, 0x0155, pci_subsys_1002_4c46_1014_0155, 0}; +#undef pci_ss_info_1014_0155 +#define pci_ss_info_1014_0155 pci_ss_info_1002_4c46_1014_0155 static const pciSubsystemInfo pci_ss_info_1002_4c46_1028_00b1 = {0x1028, 0x00b1, pci_subsys_1002_4c46_1028_00b1, 0}; #undef pci_ss_info_1028_00b1 @@ -28406,10 +32269,6 @@ static const pciSubsystemInfo pci_ss_info_1002_4c4d_1028_00bb = {0x1028, 0x00bb, pci_subsys_1002_4c4d_1028_00bb, 0}; #undef pci_ss_info_1028_00bb #define pci_ss_info_1028_00bb pci_ss_info_1002_4c4d_1028_00bb -static const pciSubsystemInfo pci_ss_info_1002_4c4d_10e1_10cf = - {0x10e1, 0x10cf, pci_subsys_1002_4c4d_10e1_10cf, 0}; -#undef pci_ss_info_10e1_10cf -#define pci_ss_info_10e1_10cf pci_ss_info_1002_4c4d_10e1_10cf static const pciSubsystemInfo pci_ss_info_1002_4c4d_1179_ff00 = {0x1179, 0xff00, pci_subsys_1002_4c4d_1179_ff00, 0}; #undef pci_ss_info_1179_ff00 @@ -28438,6 +32297,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4c57_1028_012a = {0x1028, 0x012a, pci_subsys_1002_4c57_1028_012a, 0}; #undef pci_ss_info_1028_012a #define pci_ss_info_1028_012a pci_ss_info_1002_4c57_1028_012a +static const pciSubsystemInfo pci_ss_info_1002_4c57_1043_1622 = + {0x1043, 0x1622, pci_subsys_1002_4c57_1043_1622, 0}; +#undef pci_ss_info_1043_1622 +#define pci_ss_info_1043_1622 pci_ss_info_1002_4c57_1043_1622 static const pciSubsystemInfo pci_ss_info_1002_4c57_144d_c006 = {0x144d, 0xc006, pci_subsys_1002_4c57_144d_c006, 0}; #undef pci_ss_info_144d_c006 @@ -28486,6 +32349,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4e45_1681_0002 = {0x1681, 0x0002, pci_subsys_1002_4e45_1681_0002, 0}; #undef pci_ss_info_1681_0002 #define pci_ss_info_1681_0002 pci_ss_info_1002_4e45_1681_0002 +static const pciSubsystemInfo pci_ss_info_1002_4e4a_1002_4e4a = + {0x1002, 0x4e4a, pci_subsys_1002_4e4a_1002_4e4a, 0}; +#undef pci_ss_info_1002_4e4a +#define pci_ss_info_1002_4e4a pci_ss_info_1002_4e4a_1002_4e4a static const pciSubsystemInfo pci_ss_info_1002_4e50_1025_005a = {0x1025, 0x005a, pci_subsys_1002_4e50_1025_005a, 0}; #undef pci_ss_info_1025_005a @@ -28522,6 +32389,10 @@ static const pciSubsystemInfo pci_ss_info_1002_4e65_1681_0003 = {0x1681, 0x0003, pci_subsys_1002_4e65_1681_0003, 0}; #undef pci_ss_info_1681_0003 #define pci_ss_info_1681_0003 pci_ss_info_1002_4e65_1681_0003 +static const pciSubsystemInfo pci_ss_info_1002_4e6a_1002_4e6a = + {0x1002, 0x4e6a, pci_subsys_1002_4e6a_1002_4e6a, 0}; +#undef pci_ss_info_1002_4e6a +#define pci_ss_info_1002_4e6a pci_ss_info_1002_4e6a_1002_4e6a static const pciSubsystemInfo pci_ss_info_1002_4e6a_1002_4e71 = {0x1002, 0x4e71, pci_subsys_1002_4e6a_1002_4e71, 0}; #undef pci_ss_info_1002_4e71 @@ -28738,6 +32609,14 @@ static const pciSubsystemInfo pci_ss_info_1002_5159_1014_02c8 = {0x1014, 0x02c8, pci_subsys_1002_5159_1014_02c8, 0}; #undef pci_ss_info_1014_02c8 #define pci_ss_info_1014_02c8 pci_ss_info_1002_5159_1014_02c8 +static const pciSubsystemInfo pci_ss_info_1002_5159_1028_016c = + {0x1028, 0x016c, pci_subsys_1002_5159_1028_016c, 0}; +#undef pci_ss_info_1028_016c +#define pci_ss_info_1028_016c pci_ss_info_1002_5159_1028_016c +static const pciSubsystemInfo pci_ss_info_1002_5159_1028_016d = + {0x1028, 0x016d, pci_subsys_1002_5159_1028_016d, 0}; +#undef pci_ss_info_1028_016d +#define pci_ss_info_1028_016d pci_ss_info_1002_5159_1028_016d static const pciSubsystemInfo pci_ss_info_1002_5159_1028_019a = {0x1028, 0x019a, pci_subsys_1002_5159_1028_019a, 0}; #undef pci_ss_info_1028_019a @@ -28774,6 +32653,22 @@ static const pciSubsystemInfo pci_ss_info_1002_5159_17ee_1001 = {0x17ee, 0x1001, pci_subsys_1002_5159_17ee_1001, 0}; #undef pci_ss_info_17ee_1001 #define pci_ss_info_17ee_1001 pci_ss_info_1002_5159_17ee_1001 +static const pciSubsystemInfo pci_ss_info_1002_515e_1028_01df = + {0x1028, 0x01df, pci_subsys_1002_515e_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_1002_515e_1028_01df +static const pciSubsystemInfo pci_ss_info_1002_515e_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_1002_515e_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_1002_515e_1028_01e6 +static const pciSubsystemInfo pci_ss_info_1002_515e_1028_020f = + {0x1028, 0x020f, pci_subsys_1002_515e_1028_020f, 0}; +#undef pci_ss_info_1028_020f +#define pci_ss_info_1028_020f pci_ss_info_1002_515e_1028_020f +static const pciSubsystemInfo pci_ss_info_1002_515e_1028_0210 = + {0x1028, 0x0210, pci_subsys_1002_515e_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_1002_515e_1028_0210 static const pciSubsystemInfo pci_ss_info_1002_5245_1002_0008 = {0x1002, 0x0008, pci_subsys_1002_5245_1002_0008, 0}; #undef pci_ss_info_1002_0008 @@ -28878,14 +32773,26 @@ static const pciSubsystemInfo pci_ss_info_1002_5452_103c_1279 = {0x103c, 0x1279, pci_subsys_1002_5452_103c_1279, 0}; #undef pci_ss_info_103c_1279 #define pci_ss_info_103c_1279 pci_ss_info_1002_5452_103c_1279 +static const pciSubsystemInfo pci_ss_info_1002_5460_1775_1100 = + {0x1775, 0x1100, pci_subsys_1002_5460_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_1002_5460_1775_1100 static const pciSubsystemInfo pci_ss_info_1002_5653_1025_0080 = {0x1025, 0x0080, pci_subsys_1002_5653_1025_0080, 0}; #undef pci_ss_info_1025_0080 #define pci_ss_info_1025_0080 pci_ss_info_1002_5653_1025_0080 +static const pciSubsystemInfo pci_ss_info_1002_5653_103c_0940 = + {0x103c, 0x0940, pci_subsys_1002_5653_103c_0940, 0}; +#undef pci_ss_info_103c_0940 +#define pci_ss_info_103c_0940 pci_ss_info_1002_5653_103c_0940 static const pciSubsystemInfo pci_ss_info_1002_5654_1002_5654 = {0x1002, 0x5654, pci_subsys_1002_5654_1002_5654, 0}; #undef pci_ss_info_1002_5654 #define pci_ss_info_1002_5654 pci_ss_info_1002_5654_1002_5654 +static const pciSubsystemInfo pci_ss_info_1002_5940_17af_2021 = + {0x17af, 0x2021, pci_subsys_1002_5940_17af_2021, 0}; +#undef pci_ss_info_17af_2021 +#define pci_ss_info_17af_2021 pci_ss_info_1002_5940_17af_2021 static const pciSubsystemInfo pci_ss_info_1002_5941_1458_4019 = {0x1458, 0x4019, pci_subsys_1002_5941_1458_4019, 0}; #undef pci_ss_info_1458_4019 @@ -28906,10 +32813,18 @@ static const pciSubsystemInfo pci_ss_info_1002_5950_1025_0080 = {0x1025, 0x0080, pci_subsys_1002_5950_1025_0080, 0}; #undef pci_ss_info_1025_0080 #define pci_ss_info_1025_0080 pci_ss_info_1002_5950_1025_0080 +static const pciSubsystemInfo pci_ss_info_1002_5950_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_5950_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_5950_103c_280a static const pciSubsystemInfo pci_ss_info_1002_5950_103c_308b = {0x103c, 0x308b, pci_subsys_1002_5950_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_5950_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_5950_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_5950_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_5950_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_5954_1002_5954 = {0x1002, 0x5954, pci_subsys_1002_5954_1002_5954, 0}; #undef pci_ss_info_1002_5954 @@ -28922,6 +32837,10 @@ static const pciSubsystemInfo pci_ss_info_1002_5955_103c_308b = {0x103c, 0x308b, pci_subsys_1002_5955_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_1002_5955_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_5960_17af_2020 = + {0x17af, 0x2020, pci_subsys_1002_5960_17af_2020, 0}; +#undef pci_ss_info_17af_2020 +#define pci_ss_info_17af_2020 pci_ss_info_1002_5960_17af_2020 static const pciSubsystemInfo pci_ss_info_1002_5961_1002_2f72 = {0x1002, 0x2f72, pci_subsys_1002_5961_1002_2f72, 0}; #undef pci_ss_info_1002_2f72 @@ -29002,6 +32921,18 @@ static const pciSubsystemInfo pci_ss_info_1002_5964_18bc_0173 = {0x18bc, 0x0173, pci_subsys_1002_5964_18bc_0173, 0}; #undef pci_ss_info_18bc_0173 #define pci_ss_info_18bc_0173 pci_ss_info_1002_5964_18bc_0173 +static const pciSubsystemInfo pci_ss_info_1002_5974_103c_280a = + {0x103c, 0x280a, pci_subsys_1002_5974_103c_280a, 0}; +#undef pci_ss_info_103c_280a +#define pci_ss_info_103c_280a pci_ss_info_1002_5974_103c_280a +static const pciSubsystemInfo pci_ss_info_1002_5974_1462_7141 = + {0x1462, 0x7141, pci_subsys_1002_5974_1462_7141, 0}; +#undef pci_ss_info_1462_7141 +#define pci_ss_info_1462_7141 pci_ss_info_1002_5974_1462_7141 +static const pciSubsystemInfo pci_ss_info_1002_5a3f_1462_7217 = + {0x1462, 0x7217, pci_subsys_1002_5a3f_1462_7217, 0}; +#undef pci_ss_info_1462_7217 +#define pci_ss_info_1462_7217 pci_ss_info_1002_5a3f_1462_7217 static const pciSubsystemInfo pci_ss_info_1002_5b60_1043_002a = {0x1043, 0x002a, pci_subsys_1002_5b60_1043_002a, 0}; #undef pci_ss_info_1043_002a @@ -29010,6 +32941,10 @@ static const pciSubsystemInfo pci_ss_info_1002_5b60_1043_032e = {0x1043, 0x032e, pci_subsys_1002_5b60_1043_032e, 0}; #undef pci_ss_info_1043_032e #define pci_ss_info_1043_032e pci_ss_info_1002_5b60_1043_032e +static const pciSubsystemInfo pci_ss_info_1002_5b60_1458_2102 = + {0x1458, 0x2102, pci_subsys_1002_5b60_1458_2102, 0}; +#undef pci_ss_info_1458_2102 +#define pci_ss_info_1458_2102 pci_ss_info_1002_5b60_1458_2102 static const pciSubsystemInfo pci_ss_info_1002_5b60_1462_0400 = {0x1462, 0x0400, pci_subsys_1002_5b60_1462_0400, 0}; #undef pci_ss_info_1462_0400 @@ -29018,6 +32953,10 @@ static const pciSubsystemInfo pci_ss_info_1002_5b60_1462_0402 = {0x1462, 0x0402, pci_subsys_1002_5b60_1462_0402, 0}; #undef pci_ss_info_1462_0402 #define pci_ss_info_1462_0402 pci_ss_info_1002_5b60_1462_0402 +static const pciSubsystemInfo pci_ss_info_1002_5b60_174b_0500 = + {0x174b, 0x0500, pci_subsys_1002_5b60_174b_0500, 0}; +#undef pci_ss_info_174b_0500 +#define pci_ss_info_174b_0500 pci_ss_info_1002_5b60_174b_0500 static const pciSubsystemInfo pci_ss_info_1002_5b60_196d_1086 = {0x196d, 0x1086, pci_subsys_1002_5b60_196d_1086, 0}; #undef pci_ss_info_196d_1086 @@ -29026,6 +32965,10 @@ static const pciSubsystemInfo pci_ss_info_1002_5b70_1462_0403 = {0x1462, 0x0403, pci_subsys_1002_5b70_1462_0403, 0}; #undef pci_ss_info_1462_0403 #define pci_ss_info_1462_0403 pci_ss_info_1002_5b70_1462_0403 +static const pciSubsystemInfo pci_ss_info_1002_5b70_174b_0501 = + {0x174b, 0x0501, pci_subsys_1002_5b70_174b_0501, 0}; +#undef pci_ss_info_174b_0501 +#define pci_ss_info_174b_0501 pci_ss_info_1002_5b70_174b_0501 static const pciSubsystemInfo pci_ss_info_1002_5b70_196d_1087 = {0x196d, 0x1087, pci_subsys_1002_5b70_196d_1087, 0}; #undef pci_ss_info_196d_1087 @@ -29046,6 +32989,10 @@ static const pciSubsystemInfo pci_ss_info_1002_5d44_1458_4032 = {0x1458, 0x4032, pci_subsys_1002_5d44_1458_4032, 0}; #undef pci_ss_info_1458_4032 #define pci_ss_info_1458_4032 pci_ss_info_1002_5d44_1458_4032 +static const pciSubsystemInfo pci_ss_info_1002_5d44_147b_6190 = + {0x147b, 0x6190, pci_subsys_1002_5d44_147b_6190, 0}; +#undef pci_ss_info_147b_6190 +#define pci_ss_info_147b_6190 pci_ss_info_1002_5d44_147b_6190 static const pciSubsystemInfo pci_ss_info_1002_5d44_174b_7c12 = {0x174b, 0x7c12, pci_subsys_1002_5d44_174b_7c12, 0}; #undef pci_ss_info_174b_7c12 @@ -29102,10 +33049,18 @@ static const pciSubsystemInfo pci_ss_info_1002_7142_1002_0322 = {0x1002, 0x0322, pci_subsys_1002_7142_1002_0322, 0}; #undef pci_ss_info_1002_0322 #define pci_ss_info_1002_0322 pci_ss_info_1002_7142_1002_0322 +static const pciSubsystemInfo pci_ss_info_1002_7145_17aa_2006 = + {0x17aa, 0x2006, pci_subsys_1002_7145_17aa_2006, 0}; +#undef pci_ss_info_17aa_2006 +#define pci_ss_info_17aa_2006 pci_ss_info_1002_7145_17aa_2006 static const pciSubsystemInfo pci_ss_info_1002_7146_1002_0322 = {0x1002, 0x0322, pci_subsys_1002_7146_1002_0322, 0}; #undef pci_ss_info_1002_0322 #define pci_ss_info_1002_0322 pci_ss_info_1002_7146_1002_0322 +static const pciSubsystemInfo pci_ss_info_1002_7146_1545_1996 = + {0x1545, 0x1996, pci_subsys_1002_7146_1545_1996, 0}; +#undef pci_ss_info_1545_1996 +#define pci_ss_info_1545_1996 pci_ss_info_1002_7146_1545_1996 static const pciSubsystemInfo pci_ss_info_1002_7162_1002_0323 = {0x1002, 0x0323, pci_subsys_1002_7162_1002_0323, 0}; #undef pci_ss_info_1002_0323 @@ -29114,10 +33069,18 @@ static const pciSubsystemInfo pci_ss_info_1002_7166_1002_0323 = {0x1002, 0x0323, pci_subsys_1002_7166_1002_0323, 0}; #undef pci_ss_info_1002_0323 #define pci_ss_info_1002_0323 pci_ss_info_1002_7166_1002_0323 +static const pciSubsystemInfo pci_ss_info_1002_7166_1545_1997 = + {0x1545, 0x1997, pci_subsys_1002_7166_1545_1997, 0}; +#undef pci_ss_info_1545_1997 +#define pci_ss_info_1545_1997 pci_ss_info_1002_7166_1545_1997 static const pciSubsystemInfo pci_ss_info_1002_71c4_17aa_2007 = {0x17aa, 0x2007, pci_subsys_1002_71c4_17aa_2007, 0}; #undef pci_ss_info_17aa_2007 #define pci_ss_info_17aa_2007 pci_ss_info_1002_71c4_17aa_2007 +static const pciSubsystemInfo pci_ss_info_1002_71c5_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_1002_71c5_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_1002_71c5_103c_30a3 static const pciSubsystemInfo pci_ss_info_1002_724b_1002_0b12 = {0x1002, 0x0b12, pci_subsys_1002_724b_1002_0b12, 0}; #undef pci_ss_info_1002_0b12 @@ -29126,6 +33089,46 @@ static const pciSubsystemInfo pci_ss_info_1002_724b_1002_0b13 = {0x1002, 0x0b13, pci_subsys_1002_724b_1002_0b13, 0}; #undef pci_ss_info_1002_0b13 #define pci_ss_info_1002_0b13 pci_ss_info_1002_724b_1002_0b13 +static const pciSubsystemInfo pci_ss_info_1002_7910_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_7910_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_7910_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_7919_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_7919_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_7919_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_791e_17f2_5000 = + {0x17f2, 0x5000, pci_subsys_1002_791e_17f2_5000, 0}; +#undef pci_ss_info_17f2_5000 +#define pci_ss_info_17f2_5000 pci_ss_info_1002_791e_17f2_5000 +static const pciSubsystemInfo pci_ss_info_1002_9400_1002_3000 = + {0x1002, 0x3000, pci_subsys_1002_9400_1002_3000, 0}; +#undef pci_ss_info_1002_3000 +#define pci_ss_info_1002_3000 pci_ss_info_1002_9400_1002_3000 +static const pciSubsystemInfo pci_ss_info_1002_94c1_1028_0211 = + {0x1028, 0x0211, pci_subsys_1002_94c1_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_1002_94c1_1028_0211 +static const pciSubsystemInfo pci_ss_info_1002_94c3_1002_94c3 = + {0x1002, 0x94c3, pci_subsys_1002_94c3_1002_94c3, 0}; +#undef pci_ss_info_1002_94c3 +#define pci_ss_info_1002_94c3 pci_ss_info_1002_94c3_1002_94c3 +static const pciSubsystemInfo pci_ss_info_1002_94c3_174b_e400 = + {0x174b, 0xe400, pci_subsys_1002_94c3_174b_e400, 0}; +#undef pci_ss_info_174b_e400 +#define pci_ss_info_174b_e400 pci_ss_info_1002_94c3_174b_e400 +static const pciSubsystemInfo pci_ss_info_1002_94c9_1002_94c9 = + {0x1002, 0x94c9, pci_subsys_1002_94c9_1002_94c9, 0}; +#undef pci_ss_info_1002_94c9 +#define pci_ss_info_1002_94c9 pci_ss_info_1002_94c9_1002_94c9 +static const pciSubsystemInfo pci_ss_info_1002_9588_1458_216c = + {0x1458, 0x216c, pci_subsys_1002_9588_1458_216c, 0}; +#undef pci_ss_info_1458_216c +#define pci_ss_info_1458_216c pci_ss_info_1002_9588_1458_216c +static const pciSubsystemInfo pci_ss_info_1002_aa10_174b_aa10 = + {0x174b, 0xaa10, pci_subsys_1002_aa10_174b_aa10, 0}; +#undef pci_ss_info_174b_aa10 +#define pci_ss_info_174b_aa10 pci_ss_info_1002_aa10_174b_aa10 #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1004_0304_1004_0304 = {0x1004, 0x0304, pci_subsys_1004_0304_1004_0304, 0}; @@ -29176,6 +33179,26 @@ static const pciSubsystemInfo pci_ss_info_100b_0020_1385_f311 = {0x1385, 0xf311, pci_subsys_100b_0020_1385_f311, 0}; #undef pci_ss_info_1385_f311 #define pci_ss_info_1385_f311 pci_ss_info_100b_0020_1385_f311 +static const pciSubsystemInfo pci_ss_info_100b_0502_100b_0502 = + {0x100b, 0x0502, pci_subsys_100b_0502_100b_0502, 0}; +#undef pci_ss_info_100b_0502 +#define pci_ss_info_100b_0502 pci_ss_info_100b_0502_100b_0502 +static const pciSubsystemInfo pci_ss_info_100b_0503_100b_0503 = + {0x100b, 0x0503, pci_subsys_100b_0503_100b_0503, 0}; +#undef pci_ss_info_100b_0503 +#define pci_ss_info_100b_0503 pci_ss_info_100b_0503_100b_0503 +static const pciSubsystemInfo pci_ss_info_100b_0510_100b_0500 = + {0x100b, 0x0500, pci_subsys_100b_0510_100b_0500, 0}; +#undef pci_ss_info_100b_0500 +#define pci_ss_info_100b_0500 pci_ss_info_100b_0510_100b_0500 +static const pciSubsystemInfo pci_ss_info_100b_0511_100b_0501 = + {0x100b, 0x0501, pci_subsys_100b_0511_100b_0501, 0}; +#undef pci_ss_info_100b_0501 +#define pci_ss_info_100b_0501 pci_ss_info_100b_0511_100b_0501 +static const pciSubsystemInfo pci_ss_info_100b_0515_100b_0505 = + {0x100b, 0x0505, pci_subsys_100b_0515_100b_0505, 0}; +#undef pci_ss_info_100b_0505 +#define pci_ss_info_100b_0505 pci_ss_info_100b_0515_100b_0505 static const pciSubsystemInfo pci_ss_info_1011_0009_1025_0310 = {0x1025, 0x0310, pci_subsys_1011_0009_1025_0310, 0}; #undef pci_ss_info_1025_0310 @@ -29659,6 +33682,14 @@ static const pciSubsystemInfo pci_ss_info_1014_01bd_1014_0259 = {0x1014, 0x0259, pci_subsys_1014_01bd_1014_0259, 0}; #undef pci_ss_info_1014_0259 #define pci_ss_info_1014_0259 pci_ss_info_1014_01bd_1014_0259 +static const pciSubsystemInfo pci_ss_info_1014_01ef_1734_102b = + {0x1734, 0x102b, pci_subsys_1014_01ef_1734_102b, 0}; +#undef pci_ss_info_1734_102b +#define pci_ss_info_1734_102b pci_ss_info_1014_01ef_1734_102b +static const pciSubsystemInfo pci_ss_info_1014_01ef_1734_10f8 = + {0x1734, 0x10f8, pci_subsys_1014_01ef_1734_10f8, 0}; +#undef pci_ss_info_1734_10f8 +#define pci_ss_info_1734_10f8 pci_ss_info_1014_01ef_1734_10f8 static const pciSubsystemInfo pci_ss_info_1014_0219_1014_021a = {0x1014, 0x021a, pci_subsys_1014_0219_1014_021a, 0}; #undef pci_ss_info_1014_021a @@ -29695,6 +33726,26 @@ static const pciSubsystemInfo pci_ss_info_1014_02bd_1014_02c2 = {0x1014, 0x02c2, pci_subsys_1014_02bd_1014_02c2, 0}; #undef pci_ss_info_1014_02c2 #define pci_ss_info_1014_02c2 pci_ss_info_1014_02bd_1014_02c2 +static const pciSubsystemInfo pci_ss_info_1014_02bd_1014_0338 = + {0x1014, 0x0338, pci_subsys_1014_02bd_1014_0338, 0}; +#undef pci_ss_info_1014_0338 +#define pci_ss_info_1014_0338 pci_ss_info_1014_02bd_1014_0338 +static const pciSubsystemInfo pci_ss_info_1014_032d_1014_03a1 = + {0x1014, 0x03a1, pci_subsys_1014_032d_1014_03a1, 0}; +#undef pci_ss_info_1014_03a1 +#define pci_ss_info_1014_03a1 pci_ss_info_1014_032d_1014_03a1 +static const pciSubsystemInfo pci_ss_info_1014_0339_1014_030a = + {0x1014, 0x030a, pci_subsys_1014_0339_1014_030a, 0}; +#undef pci_ss_info_1014_030a +#define pci_ss_info_1014_030a pci_ss_info_1014_0339_1014_030a +static const pciSubsystemInfo pci_ss_info_1014_0339_1014_033a = + {0x1014, 0x033a, pci_subsys_1014_0339_1014_033a, 0}; +#undef pci_ss_info_1014_033a +#define pci_ss_info_1014_033a pci_ss_info_1014_0339_1014_033a +static const pciSubsystemInfo pci_ss_info_1014_0339_1014_0360 = + {0x1014, 0x0360, pci_subsys_1014_0339_1014_0360, 0}; +#undef pci_ss_info_1014_0360 +#define pci_ss_info_1014_0360 pci_ss_info_1014_0339_1014_0360 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_101a_1dc1_101a_0019 = @@ -29938,10 +33989,6 @@ static const pciSubsystemInfo pci_ss_info_1023_8620_1014_1025 = {0x1014, 0x1025, pci_subsys_1023_8620_1014_1025, 0}; #undef pci_ss_info_1014_1025 #define pci_ss_info_1014_1025 pci_ss_info_1023_8620_1014_1025 -static const pciSubsystemInfo pci_ss_info_1023_9525_10cf_1094 = - {0x10cf, 0x1094, pci_subsys_1023_9525_10cf_1094, 0}; -#undef pci_ss_info_10cf_1094 -#define pci_ss_info_10cf_1094 pci_ss_info_1023_9525_10cf_1094 static const pciSubsystemInfo pci_ss_info_1023_9750_1014_9750 = {0x1014, 0x9750, pci_subsys_1023_9750_1014_9750, 0}; #undef pci_ss_info_1014_9750 @@ -30010,6 +34057,10 @@ static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0121 = {0x1028, 0x0121, pci_subsys_1028_000a_1028_0121, 0}; #undef pci_ss_info_1028_0121 #define pci_ss_info_1028_0121 pci_ss_info_1028_000a_1028_0121 +static const pciSubsystemInfo pci_ss_info_1028_000f_1028_014a = + {0x1028, 0x014a, pci_subsys_1028_000f_1028_014a, 0}; +#undef pci_ss_info_1028_014a +#define pci_ss_info_1028_014a pci_ss_info_1028_000f_1028_014a static const pciSubsystemInfo pci_ss_info_1028_0013_1028_016c = {0x1028, 0x016c, pci_subsys_1028_0013_1028_016c, 0}; #undef pci_ss_info_1028_016c @@ -30038,6 +34089,10 @@ static const pciSubsystemInfo pci_ss_info_1028_0015_1028_1f02 = {0x1028, 0x1f02, pci_subsys_1028_0015_1028_1f02, 0}; #undef pci_ss_info_1028_1f02 #define pci_ss_info_1028_1f02 pci_ss_info_1028_0015_1028_1f02 +static const pciSubsystemInfo pci_ss_info_1028_0015_1028_1f03 = + {0x1028, 0x1f03, pci_subsys_1028_0015_1028_1f03, 0}; +#undef pci_ss_info_1028_1f03 +#define pci_ss_info_1028_1f03 pci_ss_info_1028_0015_1028_1f03 #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_102a_001f_9005_000f = {0x9005, 0x000f, pci_subsys_102a_001f_9005_000f, 0}; @@ -30518,6 +34573,10 @@ static const pciSubsystemInfo pci_ss_info_102b_2527_102b_1e41 = {0x102b, 0x1e41, pci_subsys_102b_2527_102b_1e41, 0}; #undef pci_ss_info_102b_1e41 #define pci_ss_info_102b_1e41 pci_ss_info_102b_2527_102b_1e41 +static const pciSubsystemInfo pci_ss_info_102b_2527_102b_2300 = + {0x102b, 0x2300, pci_subsys_102b_2527_102b_2300, 0}; +#undef pci_ss_info_102b_2300 +#define pci_ss_info_102b_2300 pci_ss_info_102b_2527_102b_2300 static const pciSubsystemInfo pci_ss_info_102b_2537_102b_1820 = {0x102b, 0x1820, pci_subsys_102b_2537_102b_1820, 0}; #undef pci_ss_info_102b_1820 @@ -30546,6 +34605,10 @@ static const pciSubsystemInfo pci_ss_info_102b_2538_102b_0907 = {0x102b, 0x0907, pci_subsys_102b_2538_102b_0907, 0}; #undef pci_ss_info_102b_0907 #define pci_ss_info_102b_0907 pci_ss_info_102b_2538_102b_0907 +static const pciSubsystemInfo pci_ss_info_102b_2538_102b_0947 = + {0x102b, 0x0947, pci_subsys_102b_2538_102b_0947, 0}; +#undef pci_ss_info_102b_0947 +#define pci_ss_info_102b_0947 pci_ss_info_102b_2538_102b_0947 static const pciSubsystemInfo pci_ss_info_102b_2538_102b_1047 = {0x102b, 0x1047, pci_subsys_102b_2538_102b_1047, 0}; #undef pci_ss_info_102b_1047 @@ -30708,6 +34771,10 @@ static const pciSubsystemInfo pci_ss_info_1033_00e0_807d_1043 = {0x807d, 0x1043, pci_subsys_1033_00e0_807d_1043, 0}; #undef pci_ss_info_807d_1043 #define pci_ss_info_807d_1043 pci_ss_info_1033_00e0_807d_1043 +static const pciSubsystemInfo pci_ss_info_1039_0182_1734_1095 = + {0x1734, 0x1095, pci_subsys_1039_0182_1734_1095, 0}; +#undef pci_ss_info_1734_1095 +#define pci_ss_info_1734_1095 pci_ss_info_1039_0182_1734_1095 static const pciSubsystemInfo pci_ss_info_1039_0200_1039_0000 = {0x1039, 0x0000, pci_subsys_1039_0200_1039_0000, 0}; #undef pci_ss_info_1039_0000 @@ -30716,6 +34783,10 @@ static const pciSubsystemInfo pci_ss_info_1039_0300_107d_2720 = {0x107d, 0x2720, pci_subsys_1039_0300_107d_2720, 0}; #undef pci_ss_info_107d_2720 #define pci_ss_info_107d_2720 pci_ss_info_1039_0300_107d_2720 +static const pciSubsystemInfo pci_ss_info_1039_0761_1734_1099 = + {0x1734, 0x1099, pci_subsys_1039_0761_1734_1099, 0}; +#undef pci_ss_info_1734_1099 +#define pci_ss_info_1734_1099 pci_ss_info_1039_0761_1734_1099 static const pciSubsystemInfo pci_ss_info_1039_0900_1019_0a14 = {0x1019, 0x0a14, pci_subsys_1039_0900_1019_0a14, 0}; #undef pci_ss_info_1019_0a14 @@ -30748,6 +34819,10 @@ static const pciSubsystemInfo pci_ss_info_1039_5513_1462_7010 = {0x1462, 0x7010, pci_subsys_1039_5513_1462_7010, 0}; #undef pci_ss_info_1462_7010 #define pci_ss_info_1462_7010 pci_ss_info_1039_5513_1462_7010 +static const pciSubsystemInfo pci_ss_info_1039_5513_1734_1095 = + {0x1734, 0x1095, pci_subsys_1039_5513_1734_1095, 0}; +#undef pci_ss_info_1734_1095 +#define pci_ss_info_1734_1095 pci_ss_info_1039_5513_1734_1095 static const pciSubsystemInfo pci_ss_info_1039_6300_1019_0970 = {0x1019, 0x0970, pci_subsys_1039_6300_1019_0970, 0}; #undef pci_ss_info_1019_0970 @@ -30760,6 +34835,10 @@ static const pciSubsystemInfo pci_ss_info_1039_6306_1039_6306 = {0x1039, 0x6306, pci_subsys_1039_6306_1039_6306, 0}; #undef pci_ss_info_1039_6306 #define pci_ss_info_1039_6306 pci_ss_info_1039_6306_1039_6306 +static const pciSubsystemInfo pci_ss_info_1039_6325_1039_6325 = + {0x1039, 0x6325, pci_subsys_1039_6325_1039_6325, 0}; +#undef pci_ss_info_1039_6325 +#define pci_ss_info_1039_6325 pci_ss_info_1039_6325_1039_6325 static const pciSubsystemInfo pci_ss_info_1039_6326_1039_6326 = {0x1039, 0x6326, pci_subsys_1039_6326_1039_6326, 0}; #undef pci_ss_info_1039_6326 @@ -30792,6 +34871,14 @@ static const pciSubsystemInfo pci_ss_info_1039_6330_1043_8113 = {0x1043, 0x8113, pci_subsys_1039_6330_1043_8113, 0}; #undef pci_ss_info_1043_8113 #define pci_ss_info_1043_8113 pci_ss_info_1039_6330_1043_8113 +static const pciSubsystemInfo pci_ss_info_1039_6330_1458_d000 = + {0x1458, 0xd000, pci_subsys_1039_6330_1458_d000, 0}; +#undef pci_ss_info_1458_d000 +#define pci_ss_info_1458_d000 pci_ss_info_1039_6330_1458_d000 +static const pciSubsystemInfo pci_ss_info_1039_6330_1734_1099 = + {0x1734, 0x1099, pci_subsys_1039_6330_1734_1099, 0}; +#undef pci_ss_info_1734_1099 +#define pci_ss_info_1734_1099 pci_ss_info_1039_6330_1734_1099 static const pciSubsystemInfo pci_ss_info_1039_7001_1019_0a14 = {0x1019, 0x0a14, pci_subsys_1039_7001_1019_0a14, 0}; #undef pci_ss_info_1019_0a14 @@ -30808,6 +34895,14 @@ static const pciSubsystemInfo pci_ss_info_1039_7001_1462_7010 = {0x1462, 0x7010, pci_subsys_1039_7001_1462_7010, 0}; #undef pci_ss_info_1462_7010 #define pci_ss_info_1462_7010 pci_ss_info_1039_7001_1462_7010 +static const pciSubsystemInfo pci_ss_info_1039_7001_1734_1095 = + {0x1734, 0x1095, pci_subsys_1039_7001_1734_1095, 0}; +#undef pci_ss_info_1734_1095 +#define pci_ss_info_1734_1095 pci_ss_info_1039_7001_1734_1095 +static const pciSubsystemInfo pci_ss_info_1039_7002_1462_5470 = + {0x1462, 0x5470, pci_subsys_1039_7002_1462_5470, 0}; +#undef pci_ss_info_1462_5470 +#define pci_ss_info_1462_5470 pci_ss_info_1039_7002_1462_5470 static const pciSubsystemInfo pci_ss_info_1039_7002_1462_7010 = {0x1462, 0x7010, pci_subsys_1039_7002_1462_7010, 0}; #undef pci_ss_info_1462_7010 @@ -30816,10 +34911,26 @@ static const pciSubsystemInfo pci_ss_info_1039_7002_1509_7002 = {0x1509, 0x7002, pci_subsys_1039_7002_1509_7002, 0}; #undef pci_ss_info_1509_7002 #define pci_ss_info_1509_7002 pci_ss_info_1039_7002_1509_7002 +static const pciSubsystemInfo pci_ss_info_1039_7002_1734_1095 = + {0x1734, 0x1095, pci_subsys_1039_7002_1734_1095, 0}; +#undef pci_ss_info_1734_1095 +#define pci_ss_info_1734_1095 pci_ss_info_1039_7002_1734_1095 static const pciSubsystemInfo pci_ss_info_1039_7007_1462_701d = {0x1462, 0x701d, pci_subsys_1039_7007_1462_701d, 0}; #undef pci_ss_info_1462_701d #define pci_ss_info_1462_701d pci_ss_info_1039_7007_1462_701d +static const pciSubsystemInfo pci_ss_info_1039_7012_1043_818f = + {0x1043, 0x818f, pci_subsys_1039_7012_1043_818f, 0}; +#undef pci_ss_info_1043_818f +#define pci_ss_info_1043_818f pci_ss_info_1039_7012_1043_818f +static const pciSubsystemInfo pci_ss_info_1039_7012_13f6_0300 = + {0x13f6, 0x0300, pci_subsys_1039_7012_13f6_0300, 0}; +#undef pci_ss_info_13f6_0300 +#define pci_ss_info_13f6_0300 pci_ss_info_1039_7012_13f6_0300 +static const pciSubsystemInfo pci_ss_info_1039_7012_1462_5850 = + {0x1462, 0x5850, pci_subsys_1039_7012_1462_5850, 0}; +#undef pci_ss_info_1462_5850 +#define pci_ss_info_1462_5850 pci_ss_info_1039_7012_1462_5850 static const pciSubsystemInfo pci_ss_info_1039_7012_1462_7010 = {0x1462, 0x7010, pci_subsys_1039_7012_1462_7010, 0}; #undef pci_ss_info_1462_7010 @@ -30828,6 +34939,10 @@ static const pciSubsystemInfo pci_ss_info_1039_7012_15bd_1001 = {0x15bd, 0x1001, pci_subsys_1039_7012_15bd_1001, 0}; #undef pci_ss_info_15bd_1001 #define pci_ss_info_15bd_1001 pci_ss_info_1039_7012_15bd_1001 +static const pciSubsystemInfo pci_ss_info_1039_7012_1734_109f = + {0x1734, 0x109f, pci_subsys_1039_7012_1734_109f, 0}; +#undef pci_ss_info_1734_109f +#define pci_ss_info_1734_109f pci_ss_info_1039_7012_1734_109f static const pciSubsystemInfo pci_ss_info_1039_7016_1039_7016 = {0x1039, 0x7016, pci_subsys_1039_7016_1039_7016, 0}; #undef pci_ss_info_1039_7016 @@ -30856,6 +34971,10 @@ static const pciSubsystemInfo pci_ss_info_1039_7018_1039_7018 = {0x1039, 0x7018, pci_subsys_1039_7018_1039_7018, 0}; #undef pci_ss_info_1039_7018 #define pci_ss_info_1039_7018 pci_ss_info_1039_7018_1039_7018 +static const pciSubsystemInfo pci_ss_info_1039_7018_1043_1453 = + {0x1043, 0x1453, pci_subsys_1039_7018_1043_1453, 0}; +#undef pci_ss_info_1043_1453 +#define pci_ss_info_1043_1453 pci_ss_info_1039_7018_1043_1453 static const pciSubsystemInfo pci_ss_info_1039_7018_1043_800b = {0x1043, 0x800b, pci_subsys_1039_7018_1043_800b, 0}; #undef pci_ss_info_1043_800b @@ -30988,10 +35107,34 @@ static const pciSubsystemInfo pci_ss_info_103c_1048_103c_1301 = {0x103c, 0x1301, pci_subsys_103c_1048_103c_1301, 0}; #undef pci_ss_info_103c_1301 #define pci_ss_info_103c_1301 pci_ss_info_103c_1048_103c_1301 +static const pciSubsystemInfo pci_ss_info_103c_1290_103c_1291 = + {0x103c, 0x1291, pci_subsys_103c_1290_103c_1291, 0}; +#undef pci_ss_info_103c_1291 +#define pci_ss_info_103c_1291 pci_ss_info_103c_1290_103c_1291 static const pciSubsystemInfo pci_ss_info_103c_3220_103c_3225 = {0x103c, 0x3225, pci_subsys_103c_3220_103c_3225, 0}; #undef pci_ss_info_103c_3225 #define pci_ss_info_103c_3225 pci_ss_info_103c_3220_103c_3225 +static const pciSubsystemInfo pci_ss_info_103c_3230_103c_3223 = + {0x103c, 0x3223, pci_subsys_103c_3230_103c_3223, 0}; +#undef pci_ss_info_103c_3223 +#define pci_ss_info_103c_3223 pci_ss_info_103c_3230_103c_3223 +static const pciSubsystemInfo pci_ss_info_103c_3230_103c_3234 = + {0x103c, 0x3234, pci_subsys_103c_3230_103c_3234, 0}; +#undef pci_ss_info_103c_3234 +#define pci_ss_info_103c_3234 pci_ss_info_103c_3230_103c_3234 +static const pciSubsystemInfo pci_ss_info_103c_3230_103c_3235 = + {0x103c, 0x3235, pci_subsys_103c_3230_103c_3235, 0}; +#undef pci_ss_info_103c_3235 +#define pci_ss_info_103c_3235 pci_ss_info_103c_3230_103c_3235 +static const pciSubsystemInfo pci_ss_info_103c_3230_103c_3237 = + {0x103c, 0x3237, pci_subsys_103c_3230_103c_3237, 0}; +#undef pci_ss_info_103c_3237 +#define pci_ss_info_103c_3237 pci_ss_info_103c_3230_103c_3237 +static const pciSubsystemInfo pci_ss_info_103c_3230_103c_323d = + {0x103c, 0x323d, pci_subsys_103c_3230_103c_323d, 0}; +#undef pci_ss_info_103c_323d +#define pci_ss_info_103c_323d pci_ss_info_103c_3230_103c_323d #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1043_0675_0675_1704 = {0x0675, 0x1704, pci_subsys_1043_0675_0675_1704, 0}; @@ -31210,6 +35353,10 @@ static const pciSubsystemInfo pci_ss_info_104c_3d07_107d_2633 = {0x107d, 0x2633, pci_subsys_104c_3d07_107d_2633, 0}; #undef pci_ss_info_107d_2633 #define pci_ss_info_107d_2633 pci_ss_info_104c_3d07_107d_2633 +static const pciSubsystemInfo pci_ss_info_104c_3d07_1092_0126 = + {0x1092, 0x0126, pci_subsys_104c_3d07_1092_0126, 0}; +#undef pci_ss_info_1092_0126 +#define pci_ss_info_1092_0126 pci_ss_info_104c_3d07_1092_0126 static const pciSubsystemInfo pci_ss_info_104c_3d07_1092_0127 = {0x1092, 0x0127, pci_subsys_104c_3d07_1092_0127, 0}; #undef pci_ss_info_1092_0127 @@ -31322,6 +35469,10 @@ static const pciSubsystemInfo pci_ss_info_104c_8025_1458_1000 = {0x1458, 0x1000, pci_subsys_104c_8025_1458_1000, 0}; #undef pci_ss_info_1458_1000 #define pci_ss_info_1458_1000 pci_ss_info_104c_8025_1458_1000 +static const pciSubsystemInfo pci_ss_info_104c_8026_1025_0035 = + {0x1025, 0x0035, pci_subsys_104c_8026_1025_0035, 0}; +#undef pci_ss_info_1025_0035 +#define pci_ss_info_1025_0035 pci_ss_info_104c_8026_1025_0035 static const pciSubsystemInfo pci_ss_info_104c_8026_1025_003c = {0x1025, 0x003c, pci_subsys_104c_8026_1025_003c, 0}; #undef pci_ss_info_1025_003c @@ -31358,10 +35509,18 @@ static const pciSubsystemInfo pci_ss_info_104c_802b_1028_014e = {0x1028, 0x014e, pci_subsys_104c_802b_1028_014e, 0}; #undef pci_ss_info_1028_014e #define pci_ss_info_1028_014e pci_ss_info_104c_802b_1028_014e +static const pciSubsystemInfo pci_ss_info_104c_802e_1028_018d = + {0x1028, 0x018d, pci_subsys_104c_802e_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_104c_802e_1028_018d static const pciSubsystemInfo pci_ss_info_104c_8031_1025_0080 = {0x1025, 0x0080, pci_subsys_104c_8031_1025_0080, 0}; #undef pci_ss_info_1025_0080 #define pci_ss_info_1025_0080 pci_ss_info_104c_8031_1025_0080 +static const pciSubsystemInfo pci_ss_info_104c_8031_103c_0934 = + {0x103c, 0x0934, pci_subsys_104c_8031_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_104c_8031_103c_0934 static const pciSubsystemInfo pci_ss_info_104c_8031_103c_099c = {0x103c, 0x099c, pci_subsys_104c_8031_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -31374,6 +35533,10 @@ static const pciSubsystemInfo pci_ss_info_104c_8032_1025_0080 = {0x1025, 0x0080, pci_subsys_104c_8032_1025_0080, 0}; #undef pci_ss_info_1025_0080 #define pci_ss_info_1025_0080 pci_ss_info_104c_8032_1025_0080 +static const pciSubsystemInfo pci_ss_info_104c_8032_103c_0934 = + {0x103c, 0x0934, pci_subsys_104c_8032_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_104c_8032_103c_0934 static const pciSubsystemInfo pci_ss_info_104c_8032_103c_099c = {0x103c, 0x099c, pci_subsys_104c_8032_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -31386,6 +35549,10 @@ static const pciSubsystemInfo pci_ss_info_104c_8033_1025_0080 = {0x1025, 0x0080, pci_subsys_104c_8033_1025_0080, 0}; #undef pci_ss_info_1025_0080 #define pci_ss_info_1025_0080 pci_ss_info_104c_8033_1025_0080 +static const pciSubsystemInfo pci_ss_info_104c_8033_103c_0934 = + {0x103c, 0x0934, pci_subsys_104c_8033_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_104c_8033_103c_0934 static const pciSubsystemInfo pci_ss_info_104c_8033_103c_099c = {0x103c, 0x099c, pci_subsys_104c_8033_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -31398,6 +35565,10 @@ static const pciSubsystemInfo pci_ss_info_104c_8034_1025_0080 = {0x1025, 0x0080, pci_subsys_104c_8034_1025_0080, 0}; #undef pci_ss_info_1025_0080 #define pci_ss_info_1025_0080 pci_ss_info_104c_8034_1025_0080 +static const pciSubsystemInfo pci_ss_info_104c_8034_103c_0934 = + {0x103c, 0x0934, pci_subsys_104c_8034_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_104c_8034_103c_0934 static const pciSubsystemInfo pci_ss_info_104c_8034_103c_099c = {0x103c, 0x099c, pci_subsys_104c_8034_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -31406,6 +35577,10 @@ static const pciSubsystemInfo pci_ss_info_104c_8034_103c_308b = {0x103c, 0x308b, pci_subsys_104c_8034_103c_308b, 0}; #undef pci_ss_info_103c_308b #define pci_ss_info_103c_308b pci_ss_info_104c_8034_103c_308b +static const pciSubsystemInfo pci_ss_info_104c_8035_103c_0934 = + {0x103c, 0x0934, pci_subsys_104c_8035_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_104c_8035_103c_0934 static const pciSubsystemInfo pci_ss_info_104c_8035_103c_099c = {0x103c, 0x099c, pci_subsys_104c_8035_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -31418,6 +35593,10 @@ static const pciSubsystemInfo pci_ss_info_104c_8039_103c_30a1 = {0x103c, 0x30a1, pci_subsys_104c_8039_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_104c_8039_103c_30a1 +static const pciSubsystemInfo pci_ss_info_104c_8039_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_104c_8039_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_104c_8039_103c_30a3 static const pciSubsystemInfo pci_ss_info_104c_803a_103c_309f = {0x103c, 0x309f, pci_subsys_104c_803a_103c_309f, 0}; #undef pci_ss_info_103c_309f @@ -31426,14 +35605,26 @@ static const pciSubsystemInfo pci_ss_info_104c_803a_103c_30a1 = {0x103c, 0x30a1, pci_subsys_104c_803a_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_104c_803a_103c_30a1 +static const pciSubsystemInfo pci_ss_info_104c_803a_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_104c_803a_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_104c_803a_103c_30a3 static const pciSubsystemInfo pci_ss_info_104c_803b_103c_309f = {0x103c, 0x309f, pci_subsys_104c_803b_103c_309f, 0}; #undef pci_ss_info_103c_309f #define pci_ss_info_103c_309f pci_ss_info_104c_803b_103c_309f +static const pciSubsystemInfo pci_ss_info_104c_803b_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_104c_803b_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_104c_803b_103c_30a3 static const pciSubsystemInfo pci_ss_info_104c_803c_103c_309f = {0x103c, 0x309f, pci_subsys_104c_803c_103c_309f, 0}; #undef pci_ss_info_103c_309f #define pci_ss_info_103c_309f pci_ss_info_104c_803c_103c_309f +static const pciSubsystemInfo pci_ss_info_104c_803c_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_104c_803c_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_104c_803c_103c_30a3 static const pciSubsystemInfo pci_ss_info_104c_803d_103c_309f = {0x103c, 0x309f, pci_subsys_104c_803d_103c_309f, 0}; #undef pci_ss_info_103c_309f @@ -31478,10 +35669,18 @@ static const pciSubsystemInfo pci_ss_info_104c_9066_13d1_aba0 = {0x13d1, 0xaba0, pci_subsys_104c_9066_13d1_aba0, 0}; #undef pci_ss_info_13d1_aba0 #define pci_ss_info_13d1_aba0 pci_ss_info_104c_9066_13d1_aba0 +static const pciSubsystemInfo pci_ss_info_104c_9066_16ec_010d = + {0x16ec, 0x010d, pci_subsys_104c_9066_16ec_010d, 0}; +#undef pci_ss_info_16ec_010d +#define pci_ss_info_16ec_010d pci_ss_info_104c_9066_16ec_010d static const pciSubsystemInfo pci_ss_info_104c_9066_1737_0033 = {0x1737, 0x0033, pci_subsys_104c_9066_1737_0033, 0}; #undef pci_ss_info_1737_0033 #define pci_ss_info_1737_0033 pci_ss_info_104c_9066_1737_0033 +static const pciSubsystemInfo pci_ss_info_104c_9066_17cf_0033 = + {0x17cf, 0x0033, pci_subsys_104c_9066_17cf_0033, 0}; +#undef pci_ss_info_17cf_0033 +#define pci_ss_info_17cf_0033 pci_ss_info_104c_9066_17cf_0033 static const pciSubsystemInfo pci_ss_info_104c_a106_175c_5000 = {0x175c, 0x5000, pci_subsys_104c_a106_175c_5000, 0}; #undef pci_ss_info_175c_5000 @@ -31534,6 +35733,10 @@ static const pciSubsystemInfo pci_ss_info_104c_ac44_1071_8160 = {0x1071, 0x8160, pci_subsys_104c_ac44_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_104c_ac44_1071_8160 +static const pciSubsystemInfo pci_ss_info_104c_ac46_1014_0552 = + {0x1014, 0x0552, pci_subsys_104c_ac46_1014_0552, 0}; +#undef pci_ss_info_1014_0552 +#define pci_ss_info_1014_0552 pci_ss_info_104c_ac46_1014_0552 static const pciSubsystemInfo pci_ss_info_104c_ac47_1028_0139 = {0x1028, 0x0139, pci_subsys_104c_ac47_1028_0139, 0}; #undef pci_ss_info_1028_0139 @@ -31578,10 +35781,6 @@ static const pciSubsystemInfo pci_ss_info_104c_ac51_1033_80cd = {0x1033, 0x80cd, pci_subsys_104c_ac51_1033_80cd, 0}; #undef pci_ss_info_1033_80cd #define pci_ss_info_1033_80cd pci_ss_info_104c_ac51_1033_80cd -static const pciSubsystemInfo pci_ss_info_104c_ac51_1095_10cf = - {0x1095, 0x10cf, pci_subsys_104c_ac51_1095_10cf, 0}; -#undef pci_ss_info_1095_10cf -#define pci_ss_info_1095_10cf pci_ss_info_104c_ac51_1095_10cf static const pciSubsystemInfo pci_ss_info_104c_ac51_10cf_1095 = {0x10cf, 0x1095, pci_subsys_104c_ac51_10cf_1095, 0}; #undef pci_ss_info_10cf_1095 @@ -31626,6 +35825,10 @@ static const pciSubsystemInfo pci_ss_info_104c_ac60_175c_8800 = {0x175c, 0x8800, pci_subsys_104c_ac60_175c_8800, 0}; #undef pci_ss_info_175c_8800 #define pci_ss_info_175c_8800 pci_ss_info_104c_ac60_175c_8800 +static const pciSubsystemInfo pci_ss_info_104c_ac8e_1028_018d = + {0x1028, 0x018d, pci_subsys_104c_ac8e_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_104c_ac8e_1028_018d static const pciSubsystemInfo pci_ss_info_104c_ac8f_1028_018d = {0x1028, 0x018d, pci_subsys_104c_ac8f_1028_018d, 0}; #undef pci_ss_info_1028_018d @@ -31973,10 +36176,18 @@ static const pciSubsystemInfo pci_ss_info_105a_8650_105a_4600 = {0x105a, 0x4600, pci_subsys_105a_8650_105a_4600, 0}; #undef pci_ss_info_105a_4600 #define pci_ss_info_105a_4600 pci_ss_info_105a_8650_105a_4600 +static const pciSubsystemInfo pci_ss_info_105a_8650_105a_4601 = + {0x105a, 0x4601, pci_subsys_105a_8650_105a_4601, 0}; +#undef pci_ss_info_105a_4601 +#define pci_ss_info_105a_4601 pci_ss_info_105a_8650_105a_4601 static const pciSubsystemInfo pci_ss_info_105a_8650_105a_4610 = {0x105a, 0x4610, pci_subsys_105a_8650_105a_4610, 0}; #undef pci_ss_info_105a_4610 #define pci_ss_info_105a_4610 pci_ss_info_105a_8650_105a_4610 +static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8600 = + {0x105a, 0x8600, pci_subsys_105a_8650_105a_8600, 0}; +#undef pci_ss_info_105a_8600 +#define pci_ss_info_105a_8600 pci_ss_info_105a_8650_105a_8600 static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8601 = {0x105a, 0x8601, pci_subsys_105a_8650_105a_8601, 0}; #undef pci_ss_info_105a_8601 @@ -31985,6 +36196,22 @@ static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8602 = {0x105a, 0x8602, pci_subsys_105a_8650_105a_8602, 0}; #undef pci_ss_info_105a_8602 #define pci_ss_info_105a_8602 pci_ss_info_105a_8650_105a_8602 +static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8603 = + {0x105a, 0x8603, pci_subsys_105a_8650_105a_8603, 0}; +#undef pci_ss_info_105a_8603 +#define pci_ss_info_105a_8603 pci_ss_info_105a_8650_105a_8603 +static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8604 = + {0x105a, 0x8604, pci_subsys_105a_8650_105a_8604, 0}; +#undef pci_ss_info_105a_8604 +#define pci_ss_info_105a_8604 pci_ss_info_105a_8650_105a_8604 +static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8610 = + {0x105a, 0x8610, pci_subsys_105a_8650_105a_8610, 0}; +#undef pci_ss_info_105a_8610 +#define pci_ss_info_105a_8610 pci_ss_info_105a_8650_105a_8610 +static const pciSubsystemInfo pci_ss_info_105a_8650_105a_b600 = + {0x105a, 0xb600, pci_subsys_105a_8650_105a_b600, 0}; +#undef pci_ss_info_105a_b600 +#define pci_ss_info_105a_b600 pci_ss_info_105a_8650_105a_b600 #endif static const pciSubsystemInfo pci_ss_info_105d_2339_105d_0000 = {0x105d, 0x0000, pci_subsys_105d_2339_105d_0000, 0}; @@ -32292,6 +36519,18 @@ static const pciSubsystemInfo pci_ss_info_108d_0019_108d_0017 = #undef pci_ss_info_108d_0017 #define pci_ss_info_108d_0017 pci_ss_info_108d_0019_108d_0017 #endif +static const pciSubsystemInfo pci_ss_info_108e_5000_108e_5000 = + {0x108e, 0x5000, pci_subsys_108e_5000_108e_5000, 0}; +#undef pci_ss_info_108e_5000 +#define pci_ss_info_108e_5000 pci_ss_info_108e_5000_108e_5000 +static const pciSubsystemInfo pci_ss_info_108e_a001_108e_a001 = + {0x108e, 0xa001, pci_subsys_108e_a001_108e_a001, 0}; +#undef pci_ss_info_108e_a001 +#define pci_ss_info_108e_a001 pci_ss_info_108e_a001_108e_a001 +static const pciSubsystemInfo pci_ss_info_1092_0028_1092_4a00 = + {0x1092, 0x4a00, pci_subsys_1092_0028_1092_4a00, 0}; +#undef pci_ss_info_1092_4a00 +#define pci_ss_info_1092_4a00 pci_ss_info_1092_0028_1092_4a00 #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1095_0648_1043_8025 = {0x1043, 0x8025, pci_subsys_1095_0648_1043_8025, 0}; @@ -32823,14 +37062,26 @@ static const pciSubsystemInfo pci_ss_info_10b4_1b1d_10b4_237e = #define pci_ss_info_10b4_237e pci_ss_info_10b4_1b1d_10b4_237e #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_10b5_6540_1775_1100 = + {0x1775, 0x1100, pci_subsys_10b5_6540_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_10b5_6540_1775_1100 static const pciSubsystemInfo pci_ss_info_10b5_6540_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_10b5_6540_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 #define pci_ss_info_4c53_10e0 pci_ss_info_10b5_6540_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_10b5_6541_1775_1100 = + {0x1775, 0x1100, pci_subsys_10b5_6541_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_10b5_6541_1775_1100 static const pciSubsystemInfo pci_ss_info_10b5_6541_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_10b5_6541_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 #define pci_ss_info_4c53_10e0 pci_ss_info_10b5_6541_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_10b5_6542_1775_1100 = + {0x1775, 0x1100, pci_subsys_10b5_6542_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_10b5_6542_1775_1100 static const pciSubsystemInfo pci_ss_info_10b5_6542_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_10b5_6542_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 @@ -33434,6 +37685,12 @@ static const pciSubsystemInfo pci_ss_info_10b7_9200_1028_0097 = #define pci_ss_info_1028_0097 pci_ss_info_10b7_9200_1028_0097 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_10b7_9200_1028_00b4 = + {0x1028, 0x00b4, pci_subsys_10b7_9200_1028_00b4, 0}; +#undef pci_ss_info_1028_00b4 +#define pci_ss_info_1028_00b4 pci_ss_info_10b7_9200_1028_00b4 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_10b7_9200_1028_00fe = {0x1028, 0x00fe, pci_subsys_10b7_9200_1028_00fe, 0}; #undef pci_ss_info_1028_00fe @@ -33457,6 +37714,10 @@ static const pciSubsystemInfo pci_ss_info_10b7_9200_10f1_2466 = {0x10f1, 0x2466, pci_subsys_10b7_9200_10f1_2466, 0}; #undef pci_ss_info_10f1_2466 #define pci_ss_info_10f1_2466 pci_ss_info_10b7_9200_10f1_2466 +static const pciSubsystemInfo pci_ss_info_10b7_9200_144d_c005 = + {0x144d, 0xc005, pci_subsys_10b7_9200_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_10b7_9200_144d_c005 static const pciSubsystemInfo pci_ss_info_10b7_9201_1043_80ab = {0x1043, 0x80ab, pci_subsys_10b7_9201_1043_80ab, 0}; #undef pci_ss_info_1043_80ab @@ -33589,6 +37850,14 @@ static const pciSubsystemInfo pci_ss_info_10b9_1541_10b9_1541 = {0x10b9, 0x1541, pci_subsys_10b9_1541_10b9_1541, 0}; #undef pci_ss_info_10b9_1541 #define pci_ss_info_10b9_1541 pci_ss_info_10b9_1541_10b9_1541 +static const pciSubsystemInfo pci_ss_info_10b9_1563_10b9_1563 = + {0x10b9, 0x1563, pci_subsys_10b9_1563_10b9_1563, 0}; +#undef pci_ss_info_10b9_1563 +#define pci_ss_info_10b9_1563 pci_ss_info_10b9_1563_10b9_1563 +static const pciSubsystemInfo pci_ss_info_10b9_1563_1849_1563 = + {0x1849, 0x1563, pci_subsys_10b9_1563_1849_1563, 0}; +#undef pci_ss_info_1849_1563 +#define pci_ss_info_1849_1563 pci_ss_info_10b9_1563_1849_1563 static const pciSubsystemInfo pci_ss_info_10b9_5229_1014_050f = {0x1014, 0x050f, pci_subsys_10b9_5229_1014_050f, 0}; #undef pci_ss_info_1014_050f @@ -33627,6 +37896,26 @@ static const pciSubsystemInfo pci_ss_info_10b9_5237_104d_810f = #undef pci_ss_info_104d_810f #define pci_ss_info_104d_810f pci_ss_info_10b9_5237_104d_810f #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_10b9_5237_10b9_5237 = + {0x10b9, 0x5237, pci_subsys_10b9_5237_10b9_5237, 0}; +#undef pci_ss_info_10b9_5237 +#define pci_ss_info_10b9_5237 pci_ss_info_10b9_5237_10b9_5237 +static const pciSubsystemInfo pci_ss_info_10b9_5237_1849_5237 = + {0x1849, 0x5237, pci_subsys_10b9_5237_1849_5237, 0}; +#undef pci_ss_info_1849_5237 +#define pci_ss_info_1849_5237 pci_ss_info_10b9_5237_1849_5237 +static const pciSubsystemInfo pci_ss_info_10b9_5239_10b9_5239 = + {0x10b9, 0x5239, pci_subsys_10b9_5239_10b9_5239, 0}; +#undef pci_ss_info_10b9_5239 +#define pci_ss_info_10b9_5239 pci_ss_info_10b9_5239_10b9_5239 +static const pciSubsystemInfo pci_ss_info_10b9_5239_1849_5239 = + {0x1849, 0x5239, pci_subsys_10b9_5239_1849_5239, 0}; +#undef pci_ss_info_1849_5239 +#define pci_ss_info_1849_5239 pci_ss_info_10b9_5239_1849_5239 +static const pciSubsystemInfo pci_ss_info_10b9_5288_1043_8056 = + {0x1043, 0x8056, pci_subsys_10b9_5288_1043_8056, 0}; +#undef pci_ss_info_1043_8056 +#define pci_ss_info_1043_8056 pci_ss_info_10b9_5288_1043_8056 static const pciSubsystemInfo pci_ss_info_10b9_5451_1014_0506 = {0x1014, 0x0506, pci_subsys_10b9_5451_1014_0506, 0}; #undef pci_ss_info_1014_0506 @@ -33645,6 +37934,14 @@ static const pciSubsystemInfo pci_ss_info_10b9_5451_10b9_5451 = {0x10b9, 0x5451, pci_subsys_10b9_5451_10b9_5451, 0}; #undef pci_ss_info_10b9_5451 #define pci_ss_info_10b9_5451 pci_ss_info_10b9_5451_10b9_5451 +static const pciSubsystemInfo pci_ss_info_10b9_5455_10b9_5455 = + {0x10b9, 0x5455, pci_subsys_10b9_5455_10b9_5455, 0}; +#undef pci_ss_info_10b9_5455 +#define pci_ss_info_10b9_5455 pci_ss_info_10b9_5455_10b9_5455 +static const pciSubsystemInfo pci_ss_info_10b9_5455_1849_0850 = + {0x1849, 0x0850, pci_subsys_10b9_5455_1849_0850, 0}; +#undef pci_ss_info_1849_0850 +#define pci_ss_info_1849_0850 pci_ss_info_10b9_5455_1849_0850 static const pciSubsystemInfo pci_ss_info_10b9_5457_1014_0535 = {0x1014, 0x0535, pci_subsys_10b9_5457_1014_0535, 0}; #undef pci_ss_info_1014_0535 @@ -33669,6 +37966,20 @@ static const pciSubsystemInfo pci_ss_info_10b9_7101_103c_0024 = #undef pci_ss_info_103c_0024 #define pci_ss_info_103c_0024 pci_ss_info_10b9_7101_103c_0024 #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_10b9_7101_10b9_7101 = + {0x10b9, 0x7101, pci_subsys_10b9_7101_10b9_7101, 0}; +#undef pci_ss_info_10b9_7101 +#define pci_ss_info_10b9_7101 pci_ss_info_10b9_7101_10b9_7101 +static const pciSubsystemInfo pci_ss_info_10b9_7101_1849_7101 = + {0x1849, 0x7101, pci_subsys_10b9_7101_1849_7101, 0}; +#undef pci_ss_info_1849_7101 +#define pci_ss_info_1849_7101 pci_ss_info_10b9_7101_1849_7101 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_10ba_0308_10dd_0024 = + {0x10dd, 0x0024, pci_subsys_10ba_0308_10dd_0024, 0}; +#undef pci_ss_info_10dd_0024 +#define pci_ss_info_10dd_0024 pci_ss_info_10ba_0308_10dd_0024 #endif static const pciSubsystemInfo pci_ss_info_10c8_0004_1014_00ba = {0x1014, 0x00ba, pci_subsys_10c8_0004_1014_00ba, 0}; @@ -33818,6 +38129,12 @@ static const pciSubsystemInfo pci_ss_info_10d9_0531_1186_1200 = #undef pci_ss_info_1186_1200 #define pci_ss_info_1186_1200 pci_ss_info_10d9_0531_1186_1200 #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_10dd_0100_10dd_0023 = + {0x10dd, 0x0023, pci_subsys_10dd_0100_10dd_0023, 0}; +#undef pci_ss_info_10dd_0023 +#define pci_ss_info_10dd_0023 pci_ss_info_10dd_0100_10dd_0023 +#endif static const pciSubsystemInfo pci_ss_info_10de_0020_1043_0200 = {0x1043, 0x0200, pci_subsys_10de_0020_1043_0200, 0}; #undef pci_ss_info_1043_0200 @@ -34138,6 +38455,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0050_1043_815a = {0x1043, 0x815a, pci_subsys_10de_0050_1043_815a, 0}; #undef pci_ss_info_1043_815a #define pci_ss_info_1043_815a pci_ss_info_10de_0050_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0050_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_0050_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_0050_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_0050_1458_0c11 = {0x1458, 0x0c11, pci_subsys_10de_0050_1458_0c11, 0}; #undef pci_ss_info_1458_0c11 @@ -34150,10 +38471,18 @@ static const pciSubsystemInfo pci_ss_info_10de_0050_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_0050_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_0050_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_0050_1565_3402 = + {0x1565, 0x3402, pci_subsys_10de_0050_1565_3402, 0}; +#undef pci_ss_info_1565_3402 +#define pci_ss_info_1565_3402 pci_ss_info_10de_0050_1565_3402 static const pciSubsystemInfo pci_ss_info_10de_0052_1043_815a = {0x1043, 0x815a, pci_subsys_10de_0052_1043_815a, 0}; #undef pci_ss_info_1043_815a #define pci_ss_info_1043_815a pci_ss_info_10de_0052_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0052_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_0052_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_0052_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_0052_1458_0c11 = {0x1458, 0x0c11, pci_subsys_10de_0052_1458_0c11, 0}; #undef pci_ss_info_1458_0c11 @@ -34166,10 +38495,18 @@ static const pciSubsystemInfo pci_ss_info_10de_0052_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_0052_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_0052_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_0052_1565_3402 = + {0x1565, 0x3402, pci_subsys_10de_0052_1565_3402, 0}; +#undef pci_ss_info_1565_3402 +#define pci_ss_info_1565_3402 pci_ss_info_10de_0052_1565_3402 static const pciSubsystemInfo pci_ss_info_10de_0053_1043_815a = {0x1043, 0x815a, pci_subsys_10de_0053_1043_815a, 0}; #undef pci_ss_info_1043_815a #define pci_ss_info_1043_815a pci_ss_info_10de_0053_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0053_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_0053_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_0053_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_0053_1458_5002 = {0x1458, 0x5002, pci_subsys_10de_0053_1458_5002, 0}; #undef pci_ss_info_1458_5002 @@ -34182,10 +38519,18 @@ static const pciSubsystemInfo pci_ss_info_10de_0053_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_0053_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_0053_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_0053_1565_3402 = + {0x1565, 0x3402, pci_subsys_10de_0053_1565_3402, 0}; +#undef pci_ss_info_1565_3402 +#define pci_ss_info_1565_3402 pci_ss_info_10de_0053_1565_3402 static const pciSubsystemInfo pci_ss_info_10de_0054_1043_815a = {0x1043, 0x815a, pci_subsys_10de_0054_1043_815a, 0}; #undef pci_ss_info_1043_815a #define pci_ss_info_1043_815a pci_ss_info_10de_0054_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0054_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_0054_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_0054_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_0054_1458_b003 = {0x1458, 0xb003, pci_subsys_10de_0054_1458_b003, 0}; #undef pci_ss_info_1458_b003 @@ -34198,10 +38543,18 @@ static const pciSubsystemInfo pci_ss_info_10de_0054_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_0054_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_0054_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_0054_1565_5401 = + {0x1565, 0x5401, pci_subsys_10de_0054_1565_5401, 0}; +#undef pci_ss_info_1565_5401 +#define pci_ss_info_1565_5401 pci_ss_info_10de_0054_1565_5401 static const pciSubsystemInfo pci_ss_info_10de_0055_1043_815a = {0x1043, 0x815a, pci_subsys_10de_0055_1043_815a, 0}; #undef pci_ss_info_1043_815a #define pci_ss_info_1043_815a pci_ss_info_10de_0055_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0055_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_0055_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_0055_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_0055_1458_b003 = {0x1458, 0xb003, pci_subsys_10de_0055_1458_b003, 0}; #undef pci_ss_info_1458_b003 @@ -34210,10 +38563,18 @@ static const pciSubsystemInfo pci_ss_info_10de_0055_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_0055_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_0055_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_0055_1565_5401 = + {0x1565, 0x5401, pci_subsys_10de_0055_1565_5401, 0}; +#undef pci_ss_info_1565_5401 +#define pci_ss_info_1565_5401 pci_ss_info_10de_0055_1565_5401 static const pciSubsystemInfo pci_ss_info_10de_0057_1043_8141 = {0x1043, 0x8141, pci_subsys_10de_0057_1043_8141, 0}; #undef pci_ss_info_1043_8141 #define pci_ss_info_1043_8141 pci_ss_info_10de_0057_1043_8141 +static const pciSubsystemInfo pci_ss_info_10de_0057_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_0057_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_0057_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_0057_1458_e000 = {0x1458, 0xe000, pci_subsys_10de_0057_1458_e000, 0}; #undef pci_ss_info_1458_e000 @@ -34226,18 +38587,34 @@ static const pciSubsystemInfo pci_ss_info_10de_0057_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_0057_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_0057_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_0057_1565_2501 = + {0x1565, 0x2501, pci_subsys_10de_0057_1565_2501, 0}; +#undef pci_ss_info_1565_2501 +#define pci_ss_info_1565_2501 pci_ss_info_10de_0057_1565_2501 static const pciSubsystemInfo pci_ss_info_10de_0059_1043_812a = {0x1043, 0x812a, pci_subsys_10de_0059_1043_812a, 0}; #undef pci_ss_info_1043_812a #define pci_ss_info_1043_812a pci_ss_info_10de_0059_1043_812a +static const pciSubsystemInfo pci_ss_info_10de_0059_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_0059_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_0059_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_0059_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_0059_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_0059_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_0059_1565_8211 = + {0x1565, 0x8211, pci_subsys_10de_0059_1565_8211, 0}; +#undef pci_ss_info_1565_8211 +#define pci_ss_info_1565_8211 pci_ss_info_10de_0059_1565_8211 static const pciSubsystemInfo pci_ss_info_10de_005a_1043_815a = {0x1043, 0x815a, pci_subsys_10de_005a_1043_815a, 0}; #undef pci_ss_info_1043_815a #define pci_ss_info_1043_815a pci_ss_info_10de_005a_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_005a_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_005a_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_005a_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_005a_1458_5004 = {0x1458, 0x5004, pci_subsys_10de_005a_1458_5004, 0}; #undef pci_ss_info_1458_5004 @@ -34250,10 +38627,18 @@ static const pciSubsystemInfo pci_ss_info_10de_005a_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_005a_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_005a_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_005a_1565_3402 = + {0x1565, 0x3402, pci_subsys_10de_005a_1565_3402, 0}; +#undef pci_ss_info_1565_3402 +#define pci_ss_info_1565_3402 pci_ss_info_10de_005a_1565_3402 static const pciSubsystemInfo pci_ss_info_10de_005b_1043_815a = {0x1043, 0x815a, pci_subsys_10de_005b_1043_815a, 0}; #undef pci_ss_info_1043_815a #define pci_ss_info_1043_815a pci_ss_info_10de_005b_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_005b_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_005b_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_005b_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_005b_1458_5004 = {0x1458, 0x5004, pci_subsys_10de_005b_1458_5004, 0}; #undef pci_ss_info_1458_5004 @@ -34266,10 +38651,18 @@ static const pciSubsystemInfo pci_ss_info_10de_005b_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_005b_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_005b_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_005b_1565_3402 = + {0x1565, 0x3402, pci_subsys_10de_005b_1565_3402, 0}; +#undef pci_ss_info_1565_3402 +#define pci_ss_info_1565_3402 pci_ss_info_10de_005b_1565_3402 static const pciSubsystemInfo pci_ss_info_10de_005e_1043_815a = {0x1043, 0x815a, pci_subsys_10de_005e_1043_815a, 0}; #undef pci_ss_info_1043_815a #define pci_ss_info_1043_815a pci_ss_info_10de_005e_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_005e_10f1_2865 = + {0x10f1, 0x2865, pci_subsys_10de_005e_10f1_2865, 0}; +#undef pci_ss_info_10f1_2865 +#define pci_ss_info_10f1_2865 pci_ss_info_10de_005e_10f1_2865 static const pciSubsystemInfo pci_ss_info_10de_005e_10f1_2891 = {0x10f1, 0x2891, pci_subsys_10de_005e_10f1_2891, 0}; #undef pci_ss_info_10f1_2891 @@ -34286,6 +38679,10 @@ static const pciSubsystemInfo pci_ss_info_10de_005e_147b_1c1a = {0x147b, 0x1c1a, pci_subsys_10de_005e_147b_1c1a, 0}; #undef pci_ss_info_147b_1c1a #define pci_ss_info_147b_1c1a pci_ss_info_10de_005e_147b_1c1a +static const pciSubsystemInfo pci_ss_info_10de_005e_1565_3402 = + {0x1565, 0x3402, pci_subsys_10de_005e_1565_3402, 0}; +#undef pci_ss_info_1565_3402 +#define pci_ss_info_1565_3402 pci_ss_info_10de_005e_1565_3402 static const pciSubsystemInfo pci_ss_info_10de_0060_1043_80ad = {0x1043, 0x80ad, pci_subsys_10de_0060_1043_80ad, 0}; #undef pci_ss_info_1043_80ad @@ -34298,6 +38695,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0064_a0a0_03bb = {0xa0a0, 0x03bb, pci_subsys_10de_0064_a0a0_03bb, 0}; #undef pci_ss_info_a0a0_03bb #define pci_ss_info_a0a0_03bb pci_ss_info_10de_0064_a0a0_03bb +static const pciSubsystemInfo pci_ss_info_10de_0065_10de_0c11 = + {0x10de, 0x0c11, pci_subsys_10de_0065_10de_0c11, 0}; +#undef pci_ss_info_10de_0c11 +#define pci_ss_info_10de_0c11 pci_ss_info_10de_0065_10de_0c11 static const pciSubsystemInfo pci_ss_info_10de_0065_a0a0_03b2 = {0xa0a0, 0x03b2, pci_subsys_10de_0065_a0a0_03b2, 0}; #undef pci_ss_info_a0a0_03b2 @@ -34306,10 +38707,22 @@ static const pciSubsystemInfo pci_ss_info_10de_0066_1043_80a7 = {0x1043, 0x80a7, pci_subsys_10de_0066_1043_80a7, 0}; #undef pci_ss_info_1043_80a7 #define pci_ss_info_1043_80a7 pci_ss_info_10de_0066_1043_80a7 +static const pciSubsystemInfo pci_ss_info_10de_0066_10de_0c11 = + {0x10de, 0x0c11, pci_subsys_10de_0066_10de_0c11, 0}; +#undef pci_ss_info_10de_0c11 +#define pci_ss_info_10de_0c11 pci_ss_info_10de_0066_10de_0c11 +static const pciSubsystemInfo pci_ss_info_10de_0066_a0a0_03b3 = + {0xa0a0, 0x03b3, pci_subsys_10de_0066_a0a0_03b3, 0}; +#undef pci_ss_info_a0a0_03b3 +#define pci_ss_info_a0a0_03b3 pci_ss_info_10de_0066_a0a0_03b3 static const pciSubsystemInfo pci_ss_info_10de_0067_1043_0c11 = {0x1043, 0x0c11, pci_subsys_10de_0067_1043_0c11, 0}; #undef pci_ss_info_1043_0c11 #define pci_ss_info_1043_0c11 pci_ss_info_10de_0067_1043_0c11 +static const pciSubsystemInfo pci_ss_info_10de_0067_a0a0_03b4 = + {0xa0a0, 0x03b4, pci_subsys_10de_0067_a0a0_03b4, 0}; +#undef pci_ss_info_a0a0_03b4 +#define pci_ss_info_a0a0_03b4 pci_ss_info_10de_0067_a0a0_03b4 static const pciSubsystemInfo pci_ss_info_10de_0068_1043_0c11 = {0x1043, 0x0c11, pci_subsys_10de_0068_1043_0c11, 0}; #undef pci_ss_info_1043_0c11 @@ -34330,6 +38743,10 @@ static const pciSubsystemInfo pci_ss_info_10de_006b_10de_006b = {0x10de, 0x006b, pci_subsys_10de_006b_10de_006b, 0}; #undef pci_ss_info_10de_006b #define pci_ss_info_10de_006b pci_ss_info_10de_006b_10de_006b +static const pciSubsystemInfo pci_ss_info_10de_006b_a0a0_0304 = + {0xa0a0, 0x0304, pci_subsys_10de_006b_a0a0_0304, 0}; +#undef pci_ss_info_a0a0_0304 +#define pci_ss_info_a0a0_0304 pci_ss_info_10de_006b_a0a0_0304 static const pciSubsystemInfo pci_ss_info_10de_006e_a0a0_0306 = {0xa0a0, 0x0306, pci_subsys_10de_006e_a0a0_0306, 0}; #undef pci_ss_info_a0a0_0306 @@ -34366,6 +38783,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00cd_10de_029b = {0x10de, 0x029b, pci_subsys_10de_00cd_10de_029b, 0}; #undef pci_ss_info_10de_029b #define pci_ss_info_10de_029b pci_ss_info_10de_00cd_10de_029b +static const pciSubsystemInfo pci_ss_info_10de_00df_1043_80a7 = + {0x1043, 0x80a7, pci_subsys_10de_00df_1043_80a7, 0}; +#undef pci_ss_info_1043_80a7 +#define pci_ss_info_1043_80a7 pci_ss_info_10de_00df_1043_80a7 static const pciSubsystemInfo pci_ss_info_10de_00df_105b_0c43 = {0x105b, 0x0c43, pci_subsys_10de_00df_105b_0c43, 0}; #undef pci_ss_info_105b_0c43 @@ -34374,6 +38795,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00df_147b_1c0b = {0x147b, 0x1c0b, pci_subsys_10de_00df_147b_1c0b, 0}; #undef pci_ss_info_147b_1c0b #define pci_ss_info_147b_1c0b pci_ss_info_10de_00df_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e0_1043_813f = + {0x1043, 0x813f, pci_subsys_10de_00e0_1043_813f, 0}; +#undef pci_ss_info_1043_813f +#define pci_ss_info_1043_813f pci_ss_info_10de_00e0_1043_813f static const pciSubsystemInfo pci_ss_info_10de_00e0_10de_0c11 = {0x10de, 0x0c11, pci_subsys_10de_00e0_10de_0c11, 0}; #undef pci_ss_info_10de_0c11 @@ -34386,6 +38811,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00e0_147b_1c0b = {0x147b, 0x1c0b, pci_subsys_10de_00e0_147b_1c0b, 0}; #undef pci_ss_info_147b_1c0b #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e0_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e1_1043_813f = + {0x1043, 0x813f, pci_subsys_10de_00e1_1043_813f, 0}; +#undef pci_ss_info_1043_813f +#define pci_ss_info_1043_813f pci_ss_info_10de_00e1_1043_813f static const pciSubsystemInfo pci_ss_info_10de_00e1_1462_7030 = {0x1462, 0x7030, pci_subsys_10de_00e1_1462_7030, 0}; #undef pci_ss_info_1462_7030 @@ -34394,6 +38823,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00e1_147b_1c0b = {0x147b, 0x1c0b, pci_subsys_10de_00e1_147b_1c0b, 0}; #undef pci_ss_info_147b_1c0b #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e1_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e3_1043_813f = + {0x1043, 0x813f, pci_subsys_10de_00e3_1043_813f, 0}; +#undef pci_ss_info_1043_813f +#define pci_ss_info_1043_813f pci_ss_info_10de_00e3_1043_813f static const pciSubsystemInfo pci_ss_info_10de_00e3_105b_0c43 = {0x105b, 0x0c43, pci_subsys_10de_00e3_105b_0c43, 0}; #undef pci_ss_info_105b_0c43 @@ -34402,6 +38835,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00e3_147b_1c0b = {0x147b, 0x1c0b, pci_subsys_10de_00e3_147b_1c0b, 0}; #undef pci_ss_info_147b_1c0b #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e3_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e4_1043_813f = + {0x1043, 0x813f, pci_subsys_10de_00e4_1043_813f, 0}; +#undef pci_ss_info_1043_813f +#define pci_ss_info_1043_813f pci_ss_info_10de_00e4_1043_813f static const pciSubsystemInfo pci_ss_info_10de_00e4_105b_0c43 = {0x105b, 0x0c43, pci_subsys_10de_00e4_105b_0c43, 0}; #undef pci_ss_info_105b_0c43 @@ -34414,6 +38851,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00e4_147b_1c0b = {0x147b, 0x1c0b, pci_subsys_10de_00e4_147b_1c0b, 0}; #undef pci_ss_info_147b_1c0b #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e4_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e5_1043_813f = + {0x1043, 0x813f, pci_subsys_10de_00e5_1043_813f, 0}; +#undef pci_ss_info_1043_813f +#define pci_ss_info_1043_813f pci_ss_info_10de_00e5_1043_813f static const pciSubsystemInfo pci_ss_info_10de_00e5_105b_0c43 = {0x105b, 0x0c43, pci_subsys_10de_00e5_105b_0c43, 0}; #undef pci_ss_info_105b_0c43 @@ -34426,6 +38867,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00e5_147b_1c0b = {0x147b, 0x1c0b, pci_subsys_10de_00e5_147b_1c0b, 0}; #undef pci_ss_info_147b_1c0b #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e5_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e7_1043_813f = + {0x1043, 0x813f, pci_subsys_10de_00e7_1043_813f, 0}; +#undef pci_ss_info_1043_813f +#define pci_ss_info_1043_813f pci_ss_info_10de_00e7_1043_813f static const pciSubsystemInfo pci_ss_info_10de_00e7_105b_0c43 = {0x105b, 0x0c43, pci_subsys_10de_00e7_105b_0c43, 0}; #undef pci_ss_info_105b_0c43 @@ -34438,6 +38883,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00e7_147b_1c0b = {0x147b, 0x1c0b, pci_subsys_10de_00e7_147b_1c0b, 0}; #undef pci_ss_info_147b_1c0b #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e7_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e8_1043_813f = + {0x1043, 0x813f, pci_subsys_10de_00e8_1043_813f, 0}; +#undef pci_ss_info_1043_813f +#define pci_ss_info_1043_813f pci_ss_info_10de_00e8_1043_813f static const pciSubsystemInfo pci_ss_info_10de_00e8_105b_0c43 = {0x105b, 0x0c43, pci_subsys_10de_00e8_105b_0c43, 0}; #undef pci_ss_info_105b_0c43 @@ -34450,6 +38899,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00e8_147b_1c0b = {0x147b, 0x1c0b, pci_subsys_10de_00e8_147b_1c0b, 0}; #undef pci_ss_info_147b_1c0b #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e8_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00ea_1043_819d = + {0x1043, 0x819d, pci_subsys_10de_00ea_1043_819d, 0}; +#undef pci_ss_info_1043_819d +#define pci_ss_info_1043_819d pci_ss_info_10de_00ea_1043_819d static const pciSubsystemInfo pci_ss_info_10de_00ea_105b_0c43 = {0x105b, 0x0c43, pci_subsys_10de_00ea_105b_0c43, 0}; #undef pci_ss_info_105b_0c43 @@ -34482,6 +38935,10 @@ static const pciSubsystemInfo pci_ss_info_10de_00f6_1682_217e = {0x1682, 0x217e, pci_subsys_10de_00f6_1682_217e, 0}; #undef pci_ss_info_1682_217e #define pci_ss_info_1682_217e pci_ss_info_10de_00f6_1682_217e +static const pciSubsystemInfo pci_ss_info_10de_00f9_10de_00f9 = + {0x10de, 0x00f9, pci_subsys_10de_00f9_10de_00f9, 0}; +#undef pci_ss_info_10de_00f9 +#define pci_ss_info_10de_00f9 pci_ss_info_10de_00f9_10de_00f9 static const pciSubsystemInfo pci_ss_info_10de_00f9_1682_2120 = {0x1682, 0x2120, pci_subsys_10de_00f9_1682_2120, 0}; #undef pci_ss_info_1682_2120 @@ -34626,6 +39083,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0110_14af_7103 = {0x14af, 0x7103, pci_subsys_10de_0110_14af_7103, 0}; #undef pci_ss_info_14af_7103 #define pci_ss_info_14af_7103 pci_ss_info_10de_0110_14af_7103 +static const pciSubsystemInfo pci_ss_info_10de_0110_1545_0023 = + {0x1545, 0x0023, pci_subsys_10de_0110_1545_0023, 0}; +#undef pci_ss_info_1545_0023 +#define pci_ss_info_1545_0023 pci_ss_info_10de_0110_1545_0023 static const pciSubsystemInfo pci_ss_info_10de_0141_1043_81b0 = {0x1043, 0x81b0, pci_subsys_10de_0141_1043_81b0, 0}; #undef pci_ss_info_1043_81b0 @@ -34702,6 +39163,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0176_103c_08b0 = {0x103c, 0x08b0, pci_subsys_10de_0176_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 #define pci_ss_info_103c_08b0 pci_ss_info_10de_0176_103c_08b0 +static const pciSubsystemInfo pci_ss_info_10de_0176_144d_c005 = + {0x144d, 0xc005, pci_subsys_10de_0176_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_10de_0176_144d_c005 static const pciSubsystemInfo pci_ss_info_10de_0176_4c53_1090 = {0x4c53, 0x1090, pci_subsys_10de_0176_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 @@ -34762,6 +39227,10 @@ static const pciSubsystemInfo pci_ss_info_10de_01ed_a0a0_03b9 = {0xa0a0, 0x03b9, pci_subsys_10de_01ed_a0a0_03b9, 0}; #undef pci_ss_info_a0a0_03b9 #define pci_ss_info_a0a0_03b9 pci_ss_info_10de_01ed_a0a0_03b9 +static const pciSubsystemInfo pci_ss_info_10de_01ee_10de_01ee = + {0x10de, 0x01ee, pci_subsys_10de_01ee_10de_01ee, 0}; +#undef pci_ss_info_10de_01ee +#define pci_ss_info_10de_01ee pci_ss_info_10de_01ee_10de_01ee static const pciSubsystemInfo pci_ss_info_10de_01ee_a0a0_03b9 = {0xa0a0, 0x03b9, pci_subsys_10de_01ee_a0a0_03b9, 0}; #undef pci_ss_info_a0a0_03b9 @@ -34790,6 +39259,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0202_1545_002f = {0x1545, 0x002f, pci_subsys_10de_0202_1545_002f, 0}; #undef pci_ss_info_1545_002f #define pci_ss_info_1545_002f pci_ss_info_10de_0202_1545_002f +static const pciSubsystemInfo pci_ss_info_10de_0221_3842_a341 = + {0x3842, 0xa341, pci_subsys_10de_0221_3842_a341, 0}; +#undef pci_ss_info_3842_a341 +#define pci_ss_info_3842_a341 pci_ss_info_10de_0221_3842_a341 static const pciSubsystemInfo pci_ss_info_10de_0240_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_0240_1043_81cd, 0}; #undef pci_ss_info_1043_81cd @@ -34798,6 +39271,14 @@ static const pciSubsystemInfo pci_ss_info_10de_0240_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_0240_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_0240_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_0244_103c_30b5 = + {0x103c, 0x30b5, pci_subsys_10de_0244_103c_30b5, 0}; +#undef pci_ss_info_103c_30b5 +#define pci_ss_info_103c_30b5 pci_ss_info_10de_0244_103c_30b5 +static const pciSubsystemInfo pci_ss_info_10de_0244_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_0244_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_0244_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_0244_10de_0244 = {0x10de, 0x0244, pci_subsys_10de_0244_10de_0244, 0}; #undef pci_ss_info_10de_0244 @@ -34810,6 +39291,14 @@ static const pciSubsystemInfo pci_ss_info_10de_0251_1043_8023 = {0x1043, 0x8023, pci_subsys_10de_0251_1043_8023, 0}; #undef pci_ss_info_1043_8023 #define pci_ss_info_1043_8023 pci_ss_info_10de_0251_1043_8023 +static const pciSubsystemInfo pci_ss_info_10de_0251_10de_0251 = + {0x10de, 0x0251, pci_subsys_10de_0251_10de_0251, 0}; +#undef pci_ss_info_10de_0251 +#define pci_ss_info_10de_0251 pci_ss_info_10de_0251_10de_0251 +static const pciSubsystemInfo pci_ss_info_10de_0251_1462_8710 = + {0x1462, 0x8710, pci_subsys_10de_0251_1462_8710, 0}; +#undef pci_ss_info_1462_8710 +#define pci_ss_info_1462_8710 pci_ss_info_10de_0251_1462_8710 static const pciSubsystemInfo pci_ss_info_10de_0253_107d_2896 = {0x107d, 0x2896, pci_subsys_10de_0253_107d_2896, 0}; #undef pci_ss_info_107d_2896 @@ -34818,14 +39307,26 @@ static const pciSubsystemInfo pci_ss_info_10de_0253_147b_8f09 = {0x147b, 0x8f09, pci_subsys_10de_0253_147b_8f09, 0}; #undef pci_ss_info_147b_8f09 #define pci_ss_info_147b_8f09 pci_ss_info_10de_0253_147b_8f09 +static const pciSubsystemInfo pci_ss_info_10de_0260_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_0260_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_0260_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_0260_1043_81bc = {0x1043, 0x81bc, pci_subsys_10de_0260_1043_81bc, 0}; #undef pci_ss_info_1043_81bc #define pci_ss_info_1043_81bc pci_ss_info_10de_0260_1043_81bc +static const pciSubsystemInfo pci_ss_info_10de_0260_1458_5001 = + {0x1458, 0x5001, pci_subsys_10de_0260_1458_5001, 0}; +#undef pci_ss_info_1458_5001 +#define pci_ss_info_1458_5001 pci_ss_info_10de_0260_1458_5001 static const pciSubsystemInfo pci_ss_info_10de_0260_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_0260_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_0260_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_0264_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_0264_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_0264_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_0264_1043_81bc = {0x1043, 0x81bc, pci_subsys_10de_0264_1043_81bc, 0}; #undef pci_ss_info_1043_81bc @@ -34834,6 +39335,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0264_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_0264_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_0264_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_0265_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_0265_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_0265_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_0265_1043_81bc = {0x1043, 0x81bc, pci_subsys_10de_0265_1043_81bc, 0}; #undef pci_ss_info_1043_81bc @@ -34842,6 +39347,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0265_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_0265_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_0265_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_0266_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_0266_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_0266_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_0266_1043_81bc = {0x1043, 0x81bc, pci_subsys_10de_0266_1043_81bc, 0}; #undef pci_ss_info_1043_81bc @@ -34858,6 +39367,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0267_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_0267_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_0267_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_0269_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_0269_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_0269_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_0269_1043_8141 = {0x1043, 0x8141, pci_subsys_10de_0269_1043_8141, 0}; #undef pci_ss_info_1043_8141 @@ -34866,6 +39379,14 @@ static const pciSubsystemInfo pci_ss_info_10de_0269_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_0269_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_0269_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_026c_103c_30b5 = + {0x103c, 0x30b5, pci_subsys_10de_026c_103c_30b5, 0}; +#undef pci_ss_info_103c_30b5 +#define pci_ss_info_103c_30b5 pci_ss_info_10de_026c_103c_30b5 +static const pciSubsystemInfo pci_ss_info_10de_026c_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_026c_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_026c_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_026c_10de_cb84 = {0x10de, 0xcb84, pci_subsys_10de_026c_10de_cb84, 0}; #undef pci_ss_info_10de_cb84 @@ -34874,6 +39395,10 @@ static const pciSubsystemInfo pci_ss_info_10de_026c_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_026c_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_026c_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_026d_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_026d_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_026d_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_026d_1043_81bc = {0x1043, 0x81bc, pci_subsys_10de_026d_1043_81bc, 0}; #undef pci_ss_info_1043_81bc @@ -34882,6 +39407,10 @@ static const pciSubsystemInfo pci_ss_info_10de_026d_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_026d_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_026d_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_026e_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_026e_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_026e_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_026e_1043_81bc = {0x1043, 0x81bc, pci_subsys_10de_026e_1043_81bc, 0}; #undef pci_ss_info_1043_81bc @@ -34890,26 +39419,62 @@ static const pciSubsystemInfo pci_ss_info_10de_026e_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_026e_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_026e_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_026f_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_026f_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_026f_103c_30b7 +static const pciSubsystemInfo pci_ss_info_10de_0270_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_0270_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_0270_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_0270_1043_81bc = {0x1043, 0x81bc, pci_subsys_10de_0270_1043_81bc, 0}; #undef pci_ss_info_1043_81bc #define pci_ss_info_1043_81bc pci_ss_info_10de_0270_1043_81bc +static const pciSubsystemInfo pci_ss_info_10de_0270_1458_5001 = + {0x1458, 0x5001, pci_subsys_10de_0270_1458_5001, 0}; +#undef pci_ss_info_1458_5001 +#define pci_ss_info_1458_5001 pci_ss_info_10de_0270_1458_5001 static const pciSubsystemInfo pci_ss_info_10de_0270_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_0270_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_0270_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_0271_103c_30b5 = + {0x103c, 0x30b5, pci_subsys_10de_0271_103c_30b5, 0}; +#undef pci_ss_info_103c_30b5 +#define pci_ss_info_103c_30b5 pci_ss_info_10de_0271_103c_30b5 +static const pciSubsystemInfo pci_ss_info_10de_0271_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_0271_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_0271_103c_30b7 +static const pciSubsystemInfo pci_ss_info_10de_027e_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_027e_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_027e_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_027e_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_027e_1043_81cd, 0}; #undef pci_ss_info_1043_81cd #define pci_ss_info_1043_81cd pci_ss_info_10de_027e_1043_81cd +static const pciSubsystemInfo pci_ss_info_10de_027e_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_027e_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_027e_1458_5000 static const pciSubsystemInfo pci_ss_info_10de_027e_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_027e_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_027e_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_027f_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_027f_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_027f_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_027f_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_027f_1043_81cd, 0}; #undef pci_ss_info_1043_81cd #define pci_ss_info_1043_81cd pci_ss_info_10de_027f_1043_81cd +static const pciSubsystemInfo pci_ss_info_10de_027f_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_027f_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_027f_1458_5000 static const pciSubsystemInfo pci_ss_info_10de_027f_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_027f_1462_7207, 0}; #undef pci_ss_info_1462_7207 @@ -34918,10 +39483,34 @@ static const pciSubsystemInfo pci_ss_info_10de_0291_10de_042b = {0x10de, 0x042b, pci_subsys_10de_0291_10de_042b, 0}; #undef pci_ss_info_10de_042b #define pci_ss_info_10de_042b pci_ss_info_10de_0291_10de_042b +static const pciSubsystemInfo pci_ss_info_10de_0295_1043_8225 = + {0x1043, 0x8225, pci_subsys_10de_0295_1043_8225, 0}; +#undef pci_ss_info_1043_8225 +#define pci_ss_info_1043_8225 pci_ss_info_10de_0295_1043_8225 static const pciSubsystemInfo pci_ss_info_10de_0295_107d_2a68 = {0x107d, 0x2a68, pci_subsys_10de_0295_107d_2a68, 0}; #undef pci_ss_info_107d_2a68 #define pci_ss_info_107d_2a68 pci_ss_info_10de_0295_107d_2a68 +static const pciSubsystemInfo pci_ss_info_10de_0295_1462_0663 = + {0x1462, 0x0663, pci_subsys_10de_0295_1462_0663, 0}; +#undef pci_ss_info_1462_0663 +#define pci_ss_info_1462_0663 pci_ss_info_10de_0295_1462_0663 +static const pciSubsystemInfo pci_ss_info_10de_02e0_02e0_2249 = + {0x02e0, 0x2249, pci_subsys_10de_02e0_02e0_2249, 0}; +#undef pci_ss_info_02e0_2249 +#define pci_ss_info_02e0_2249 pci_ss_info_10de_02e0_02e0_2249 +static const pciSubsystemInfo pci_ss_info_10de_02e1_1682_222b = + {0x1682, 0x222b, pci_subsys_10de_02e1_1682_222b, 0}; +#undef pci_ss_info_1682_222b +#define pci_ss_info_1682_222b pci_ss_info_10de_02e1_1682_222b +static const pciSubsystemInfo pci_ss_info_10de_02e4_1682_2271 = + {0x1682, 0x2271, pci_subsys_10de_02e4_1682_2271, 0}; +#undef pci_ss_info_1682_2271 +#define pci_ss_info_1682_2271 pci_ss_info_10de_02e4_1682_2271 +static const pciSubsystemInfo pci_ss_info_10de_02f0_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_02f0_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_02f0_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_02f0_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_02f0_1043_81cd, 0}; #undef pci_ss_info_1043_81cd @@ -34930,42 +39519,94 @@ static const pciSubsystemInfo pci_ss_info_10de_02f0_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_02f0_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_02f0_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_02f1_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_02f1_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_02f1_1458_5000 +static const pciSubsystemInfo pci_ss_info_10de_02f8_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_02f8_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_02f8_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_02f8_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_02f8_1043_81cd, 0}; #undef pci_ss_info_1043_81cd #define pci_ss_info_1043_81cd pci_ss_info_10de_02f8_1043_81cd +static const pciSubsystemInfo pci_ss_info_10de_02f8_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_02f8_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_02f8_1458_5000 static const pciSubsystemInfo pci_ss_info_10de_02f8_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_02f8_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_02f8_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_02f9_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_02f9_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_02f9_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_02f9_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_02f9_1043_81cd, 0}; #undef pci_ss_info_1043_81cd #define pci_ss_info_1043_81cd pci_ss_info_10de_02f9_1043_81cd +static const pciSubsystemInfo pci_ss_info_10de_02f9_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_02f9_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_02f9_1458_5000 static const pciSubsystemInfo pci_ss_info_10de_02f9_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_02f9_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_02f9_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_02fa_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_02fa_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_02fa_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_02fa_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_02fa_1043_81cd, 0}; #undef pci_ss_info_1043_81cd #define pci_ss_info_1043_81cd pci_ss_info_10de_02fa_1043_81cd +static const pciSubsystemInfo pci_ss_info_10de_02fa_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_02fa_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_02fa_1458_5000 static const pciSubsystemInfo pci_ss_info_10de_02fa_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_02fa_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_02fa_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_02fc_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_02fc_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_02fc_103c_30b7 +static const pciSubsystemInfo pci_ss_info_10de_02fd_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_02fd_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_02fd_103c_30b7 +static const pciSubsystemInfo pci_ss_info_10de_02fe_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_02fe_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_02fe_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_02fe_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_02fe_1043_81cd, 0}; #undef pci_ss_info_1043_81cd #define pci_ss_info_1043_81cd pci_ss_info_10de_02fe_1043_81cd +static const pciSubsystemInfo pci_ss_info_10de_02fe_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_02fe_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_02fe_1458_5000 static const pciSubsystemInfo pci_ss_info_10de_02fe_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_02fe_1462_7207, 0}; #undef pci_ss_info_1462_7207 #define pci_ss_info_1462_7207 pci_ss_info_10de_02fe_1462_7207 +static const pciSubsystemInfo pci_ss_info_10de_02ff_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_10de_02ff_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_10de_02ff_103c_30b7 static const pciSubsystemInfo pci_ss_info_10de_02ff_1043_81cd = {0x1043, 0x81cd, pci_subsys_10de_02ff_1043_81cd, 0}; #undef pci_ss_info_1043_81cd #define pci_ss_info_1043_81cd pci_ss_info_10de_02ff_1043_81cd +static const pciSubsystemInfo pci_ss_info_10de_02ff_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_02ff_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_02ff_1458_5000 static const pciSubsystemInfo pci_ss_info_10de_02ff_1462_7207 = {0x1462, 0x7207, pci_subsys_10de_02ff_1462_7207, 0}; #undef pci_ss_info_1462_7207 @@ -34978,6 +39619,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0322_1043_02fb = {0x1043, 0x02fb, pci_subsys_10de_0322_1043_02fb, 0}; #undef pci_ss_info_1043_02fb #define pci_ss_info_1043_02fb pci_ss_info_10de_0322_1043_02fb +static const pciSubsystemInfo pci_ss_info_10de_0322_1462_9110 = + {0x1462, 0x9110, pci_subsys_10de_0322_1462_9110, 0}; +#undef pci_ss_info_1462_9110 +#define pci_ss_info_1462_9110 pci_ss_info_10de_0322_1462_9110 static const pciSubsystemInfo pci_ss_info_10de_0322_1462_9171 = {0x1462, 0x9171, pci_subsys_10de_0322_1462_9171, 0}; #undef pci_ss_info_1462_9171 @@ -34990,18 +39635,74 @@ static const pciSubsystemInfo pci_ss_info_10de_0324_1028_0196 = {0x1028, 0x0196, pci_subsys_10de_0324_1028_0196, 0}; #undef pci_ss_info_1028_0196 #define pci_ss_info_1028_0196 pci_ss_info_10de_0324_1028_0196 +static const pciSubsystemInfo pci_ss_info_10de_0324_103c_006a = + {0x103c, 0x006a, pci_subsys_10de_0324_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_10de_0324_103c_006a static const pciSubsystemInfo pci_ss_info_10de_0324_1071_8160 = {0x1071, 0x8160, pci_subsys_10de_0324_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_10de_0324_1071_8160 +static const pciSubsystemInfo pci_ss_info_10de_0326_1458_310d = + {0x1458, 0x310d, pci_subsys_10de_0326_1458_310d, 0}; +#undef pci_ss_info_1458_310d +#define pci_ss_info_1458_310d pci_ss_info_10de_0326_1458_310d +static const pciSubsystemInfo pci_ss_info_10de_0326_1682_2034 = + {0x1682, 0x2034, pci_subsys_10de_0326_1682_2034, 0}; +#undef pci_ss_info_1682_2034 +#define pci_ss_info_1682_2034 pci_ss_info_10de_0326_1682_2034 +static const pciSubsystemInfo pci_ss_info_10de_0329_10de_0010 = + {0x10de, 0x0010, pci_subsys_10de_0329_10de_0010, 0}; +#undef pci_ss_info_10de_0010 +#define pci_ss_info_10de_0010 pci_ss_info_10de_0329_10de_0010 +static const pciSubsystemInfo pci_ss_info_10de_0330_1043_8137 = + {0x1043, 0x8137, pci_subsys_10de_0330_1043_8137, 0}; +#undef pci_ss_info_1043_8137 +#define pci_ss_info_1043_8137 pci_ss_info_10de_0330_1043_8137 static const pciSubsystemInfo pci_ss_info_10de_0331_1043_8145 = {0x1043, 0x8145, pci_subsys_10de_0331_1043_8145, 0}; #undef pci_ss_info_1043_8145 #define pci_ss_info_1043_8145 pci_ss_info_10de_0331_1043_8145 +static const pciSubsystemInfo pci_ss_info_10de_0341_1462_9380 = + {0x1462, 0x9380, pci_subsys_10de_0341_1462_9380, 0}; +#undef pci_ss_info_1462_9380 +#define pci_ss_info_1462_9380 pci_ss_info_10de_0341_1462_9380 static const pciSubsystemInfo pci_ss_info_10de_0347_103c_006a = {0x103c, 0x006a, pci_subsys_10de_0347_103c_006a, 0}; #undef pci_ss_info_103c_006a #define pci_ss_info_103c_006a pci_ss_info_10de_0347_103c_006a +static const pciSubsystemInfo pci_ss_info_10de_0362_147b_12c4 = + {0x147b, 0x12c4, pci_subsys_10de_0362_147b_12c4, 0}; +#undef pci_ss_info_147b_12c4 +#define pci_ss_info_147b_12c4 pci_ss_info_10de_0362_147b_12c4 +static const pciSubsystemInfo pci_ss_info_10de_0368_147b_12c4 = + {0x147b, 0x12c4, pci_subsys_10de_0368_147b_12c4, 0}; +#undef pci_ss_info_147b_12c4 +#define pci_ss_info_147b_12c4 pci_ss_info_10de_0368_147b_12c4 +static const pciSubsystemInfo pci_ss_info_10de_0369_147b_12c4 = + {0x147b, 0x12c4, pci_subsys_10de_0369_147b_12c4, 0}; +#undef pci_ss_info_147b_12c4 +#define pci_ss_info_147b_12c4 pci_ss_info_10de_0369_147b_12c4 +static const pciSubsystemInfo pci_ss_info_10de_036c_147b_12c4 = + {0x147b, 0x12c4, pci_subsys_10de_036c_147b_12c4, 0}; +#undef pci_ss_info_147b_12c4 +#define pci_ss_info_147b_12c4 pci_ss_info_10de_036c_147b_12c4 +static const pciSubsystemInfo pci_ss_info_10de_036d_147b_12c4 = + {0x147b, 0x12c4, pci_subsys_10de_036d_147b_12c4, 0}; +#undef pci_ss_info_147b_12c4 +#define pci_ss_info_147b_12c4 pci_ss_info_10de_036d_147b_12c4 +static const pciSubsystemInfo pci_ss_info_10de_036e_147b_12c4 = + {0x147b, 0x12c4, pci_subsys_10de_036e_147b_12c4, 0}; +#undef pci_ss_info_147b_12c4 +#define pci_ss_info_147b_12c4 pci_ss_info_10de_036e_147b_12c4 +static const pciSubsystemInfo pci_ss_info_10de_0373_147b_12c4 = + {0x147b, 0x12c4, pci_subsys_10de_0373_147b_12c4, 0}; +#undef pci_ss_info_147b_12c4 +#define pci_ss_info_147b_12c4 pci_ss_info_10de_0373_147b_12c4 +static const pciSubsystemInfo pci_ss_info_10de_037f_147b_12c4 = + {0x147b, 0x12c4, pci_subsys_10de_037f_147b_12c4, 0}; +#undef pci_ss_info_147b_12c4 +#define pci_ss_info_147b_12c4 pci_ss_info_10de_037f_147b_12c4 static const pciSubsystemInfo pci_ss_info_10de_0391_1458_3427 = {0x1458, 0x3427, pci_subsys_10de_0391_1458_3427, 0}; #undef pci_ss_info_1458_3427 @@ -35010,6 +39711,90 @@ static const pciSubsystemInfo pci_ss_info_10de_0392_1462_0622 = {0x1462, 0x0622, pci_subsys_10de_0392_1462_0622, 0}; #undef pci_ss_info_1462_0622 #define pci_ss_info_1462_0622 pci_ss_info_10de_0392_1462_0622 +static const pciSubsystemInfo pci_ss_info_10de_0393_10de_0412 = + {0x10de, 0x0412, pci_subsys_10de_0393_10de_0412, 0}; +#undef pci_ss_info_10de_0412 +#define pci_ss_info_10de_0412 pci_ss_info_10de_0393_10de_0412 +static const pciSubsystemInfo pci_ss_info_10de_0393_1462_0412 = + {0x1462, 0x0412, pci_subsys_10de_0393_1462_0412, 0}; +#undef pci_ss_info_1462_0412 +#define pci_ss_info_1462_0412 pci_ss_info_10de_0393_1462_0412 +static const pciSubsystemInfo pci_ss_info_10de_0398_1025_006c = + {0x1025, 0x006c, pci_subsys_10de_0398_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_10de_0398_1025_006c +static const pciSubsystemInfo pci_ss_info_10de_039c_10de_039c = + {0x10de, 0x039c, pci_subsys_10de_039c_10de_039c, 0}; +#undef pci_ss_info_10de_039c +#define pci_ss_info_10de_039c pci_ss_info_10de_039c_10de_039c +static const pciSubsystemInfo pci_ss_info_10de_03e0_1849_03e0 = + {0x1849, 0x03e0, pci_subsys_10de_03e0_1849_03e0, 0}; +#undef pci_ss_info_1849_03e0 +#define pci_ss_info_1849_03e0 pci_ss_info_10de_03e0_1849_03e0 +static const pciSubsystemInfo pci_ss_info_10de_03e8_1849_03e8 = + {0x1849, 0x03e8, pci_subsys_10de_03e8_1849_03e8, 0}; +#undef pci_ss_info_1849_03e8 +#define pci_ss_info_1849_03e8 pci_ss_info_10de_03e8_1849_03e8 +static const pciSubsystemInfo pci_ss_info_10de_03e9_1849_03e9 = + {0x1849, 0x03e9, pci_subsys_10de_03e9_1849_03e9, 0}; +#undef pci_ss_info_1849_03e9 +#define pci_ss_info_1849_03e9 pci_ss_info_10de_03e9_1849_03e9 +static const pciSubsystemInfo pci_ss_info_10de_03ea_1849_03ea = + {0x1849, 0x03ea, pci_subsys_10de_03ea_1849_03ea, 0}; +#undef pci_ss_info_1849_03ea +#define pci_ss_info_1849_03ea pci_ss_info_10de_03ea_1849_03ea +static const pciSubsystemInfo pci_ss_info_10de_03eb_1849_03eb = + {0x1849, 0x03eb, pci_subsys_10de_03eb_1849_03eb, 0}; +#undef pci_ss_info_1849_03eb +#define pci_ss_info_1849_03eb pci_ss_info_10de_03eb_1849_03eb +static const pciSubsystemInfo pci_ss_info_10de_03ec_1849_03ec = + {0x1849, 0x03ec, pci_subsys_10de_03ec_1849_03ec, 0}; +#undef pci_ss_info_1849_03ec +#define pci_ss_info_1849_03ec pci_ss_info_10de_03ec_1849_03ec +static const pciSubsystemInfo pci_ss_info_10de_03ef_1849_03ef = + {0x1849, 0x03ef, pci_subsys_10de_03ef_1849_03ef, 0}; +#undef pci_ss_info_1849_03ef +#define pci_ss_info_1849_03ef pci_ss_info_10de_03ef_1849_03ef +static const pciSubsystemInfo pci_ss_info_10de_03f0_1849_0888 = + {0x1849, 0x0888, pci_subsys_10de_03f0_1849_0888, 0}; +#undef pci_ss_info_1849_0888 +#define pci_ss_info_1849_0888 pci_ss_info_10de_03f0_1849_0888 +static const pciSubsystemInfo pci_ss_info_10de_03f1_1849_03f1 = + {0x1849, 0x03f1, pci_subsys_10de_03f1_1849_03f1, 0}; +#undef pci_ss_info_1849_03f1 +#define pci_ss_info_1849_03f1 pci_ss_info_10de_03f1_1849_03f1 +static const pciSubsystemInfo pci_ss_info_10de_03f2_1849_03f2 = + {0x1849, 0x03f2, pci_subsys_10de_03f2_1849_03f2, 0}; +#undef pci_ss_info_1849_03f2 +#define pci_ss_info_1849_03f2 pci_ss_info_10de_03f2_1849_03f2 +static const pciSubsystemInfo pci_ss_info_10de_03f5_1849_03eb = + {0x1849, 0x03eb, pci_subsys_10de_03f5_1849_03eb, 0}; +#undef pci_ss_info_1849_03eb +#define pci_ss_info_1849_03eb pci_ss_info_10de_03f5_1849_03eb +static const pciSubsystemInfo pci_ss_info_10de_03f6_1849_03f6 = + {0x1849, 0x03f6, pci_subsys_10de_03f6_1849_03f6, 0}; +#undef pci_ss_info_1849_03f6 +#define pci_ss_info_1849_03f6 pci_ss_info_10de_03f6_1849_03f6 +static const pciSubsystemInfo pci_ss_info_10de_0429_17aa_20d8 = + {0x17aa, 0x20d8, pci_subsys_10de_0429_17aa_20d8, 0}; +#undef pci_ss_info_17aa_20d8 +#define pci_ss_info_17aa_20d8 pci_ss_info_10de_0429_17aa_20d8 +static const pciSubsystemInfo pci_ss_info_10de_0547_1849_0547 = + {0x1849, 0x0547, pci_subsys_10de_0547_1849_0547, 0}; +#undef pci_ss_info_1849_0547 +#define pci_ss_info_1849_0547 pci_ss_info_10de_0547_1849_0547 +static const pciSubsystemInfo pci_ss_info_10de_054c_1849_054c = + {0x1849, 0x054c, pci_subsys_10de_054c_1849_054c, 0}; +#undef pci_ss_info_1849_054c +#define pci_ss_info_1849_054c pci_ss_info_10de_054c_1849_054c +static const pciSubsystemInfo pci_ss_info_10de_0562_1849_0562 = + {0x1849, 0x0562, pci_subsys_10de_0562_1849_0562, 0}; +#undef pci_ss_info_1849_0562 +#define pci_ss_info_1849_0562 pci_ss_info_10de_0562_1849_0562 +static const pciSubsystemInfo pci_ss_info_10de_07fc_10de_07fc = + {0x10de, 0x07fc, pci_subsys_10de_07fc_10de_07fc, 0}; +#undef pci_ss_info_10de_07fc +#define pci_ss_info_10de_07fc pci_ss_info_10de_07fc_10de_07fc #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_10e1_0391_10e1_0391 = {0x10e1, 0x0391, pci_subsys_10e1_0391_10e1_0391, 0}; @@ -35017,6 +39802,12 @@ static const pciSubsystemInfo pci_ss_info_10e1_0391_10e1_0391 = #define pci_ss_info_10e1_0391 pci_ss_info_10e1_0391_10e1_0391 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_10e3_0148_1775_1100 = + {0x1775, 0x1100, pci_subsys_10e3_0148_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_10e3_0148_1775_1100 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #endif static const pciSubsystemInfo pci_ss_info_10ec_0883_1025_1605 = {0x1025, 0x1605, pci_subsys_10ec_0883_1025_1605, 0}; @@ -35047,6 +39838,10 @@ static const pciSubsystemInfo pci_ss_info_10ec_8129_10ec_8129 = {0x10ec, 0x8129, pci_subsys_10ec_8129_10ec_8129, 0}; #undef pci_ss_info_10ec_8129 #define pci_ss_info_10ec_8129 pci_ss_info_10ec_8129_10ec_8129 +static const pciSubsystemInfo pci_ss_info_10ec_8129_11ec_8129 = + {0x11ec, 0x8129, pci_subsys_10ec_8129_11ec_8129, 0}; +#undef pci_ss_info_11ec_8129 +#define pci_ss_info_11ec_8129 pci_ss_info_10ec_8129_11ec_8129 static const pciSubsystemInfo pci_ss_info_10ec_8138_10ec_8138 = {0x10ec, 0x8138, pci_subsys_10ec_8138_10ec_8138, 0}; #undef pci_ss_info_10ec_8138 @@ -35151,6 +39946,10 @@ static const pciSubsystemInfo pci_ss_info_10ec_8139_1458_e000 = {0x1458, 0xe000, pci_subsys_10ec_8139_1458_e000, 0}; #undef pci_ss_info_1458_e000 #define pci_ss_info_1458_e000 pci_ss_info_10ec_8139_1458_e000 +static const pciSubsystemInfo pci_ss_info_10ec_8139_1462_217c = + {0x1462, 0x217c, pci_subsys_10ec_8139_1462_217c, 0}; +#undef pci_ss_info_1462_217c +#define pci_ss_info_1462_217c pci_ss_info_10ec_8139_1462_217c static const pciSubsystemInfo pci_ss_info_10ec_8139_1462_788c = {0x1462, 0x788c, pci_subsys_10ec_8139_1462_788c, 0}; #undef pci_ss_info_1462_788c @@ -35179,6 +39978,10 @@ static const pciSubsystemInfo pci_ss_info_10ec_8139_14cb_0200 = {0x14cb, 0x0200, pci_subsys_10ec_8139_14cb_0200, 0}; #undef pci_ss_info_14cb_0200 #define pci_ss_info_14cb_0200 pci_ss_info_10ec_8139_14cb_0200 +static const pciSubsystemInfo pci_ss_info_10ec_8139_1565_2300 = + {0x1565, 0x2300, pci_subsys_10ec_8139_1565_2300, 0}; +#undef pci_ss_info_1565_2300 +#define pci_ss_info_1565_2300 pci_ss_info_10ec_8139_1565_2300 static const pciSubsystemInfo pci_ss_info_10ec_8139_1695_9001 = {0x1695, 0x9001, pci_subsys_10ec_8139_1695_9001, 0}; #undef pci_ss_info_1695_9001 @@ -35211,6 +40014,10 @@ static const pciSubsystemInfo pci_ss_info_10ec_8167_1462_235c = {0x1462, 0x235c, pci_subsys_10ec_8167_1462_235c, 0}; #undef pci_ss_info_1462_235c #define pci_ss_info_1462_235c pci_ss_info_10ec_8167_1462_235c +static const pciSubsystemInfo pci_ss_info_10ec_8167_1462_236c = + {0x1462, 0x236c, pci_subsys_10ec_8167_1462_236c, 0}; +#undef pci_ss_info_1462_236c +#define pci_ss_info_1462_236c pci_ss_info_10ec_8167_1462_236c #endif static const pciSubsystemInfo pci_ss_info_10ec_8169_1025_0079 = {0x1025, 0x0079, pci_subsys_10ec_8169_1025_0079, 0}; @@ -35237,6 +40044,18 @@ static const pciSubsystemInfo pci_ss_info_10ec_8169_1462_702c = {0x1462, 0x702c, pci_subsys_10ec_8169_1462_702c, 0}; #undef pci_ss_info_1462_702c #define pci_ss_info_1462_702c pci_ss_info_10ec_8169_1462_702c +static const pciSubsystemInfo pci_ss_info_10ec_8169_1462_7094 = + {0x1462, 0x7094, pci_subsys_10ec_8169_1462_7094, 0}; +#undef pci_ss_info_1462_7094 +#define pci_ss_info_1462_7094 pci_ss_info_10ec_8169_1462_7094 +static const pciSubsystemInfo pci_ss_info_10ec_8169_1734_1091 = + {0x1734, 0x1091, pci_subsys_10ec_8169_1734_1091, 0}; +#undef pci_ss_info_1734_1091 +#define pci_ss_info_1734_1091 pci_ss_info_10ec_8169_1734_1091 +static const pciSubsystemInfo pci_ss_info_10ec_8169_a0a0_0449 = + {0xa0a0, 0x0449, pci_subsys_10ec_8169_a0a0_0449, 0}; +#undef pci_ss_info_a0a0_0449 +#define pci_ss_info_a0a0_0449 pci_ss_info_10ec_8169_a0a0_0449 #endif static const pciSubsystemInfo pci_ss_info_1102_0002_1102_0020 = {0x1102, 0x0020, pci_subsys_1102_0002_1102_0020, 0}; @@ -35366,6 +40185,10 @@ static const pciSubsystemInfo pci_ss_info_1102_0007_1102_1006 = {0x1102, 0x1006, pci_subsys_1102_0007_1102_1006, 0}; #undef pci_ss_info_1102_1006 #define pci_ss_info_1102_1006 pci_ss_info_1102_0007_1102_1006 +static const pciSubsystemInfo pci_ss_info_1102_0007_1102_1012 = + {0x1102, 0x1012, pci_subsys_1102_0007_1102_1012, 0}; +#undef pci_ss_info_1102_1012 +#define pci_ss_info_1102_1012 pci_ss_info_1102_0007_1102_1012 static const pciSubsystemInfo pci_ss_info_1102_0007_1462_1009 = {0x1462, 0x1009, pci_subsys_1102_0007_1462_1009, 0}; #undef pci_ss_info_1462_1009 @@ -35374,6 +40197,10 @@ static const pciSubsystemInfo pci_ss_info_1102_0008_1102_0008 = {0x1102, 0x0008, pci_subsys_1102_0008_1102_0008, 0}; #undef pci_ss_info_1102_0008 #define pci_ss_info_1102_0008 pci_ss_info_1102_0008_1102_0008 +static const pciSubsystemInfo pci_ss_info_1102_0009_1102_0010 = + {0x1102, 0x0010, pci_subsys_1102_0009_1102_0010, 0}; +#undef pci_ss_info_1102_0010 +#define pci_ss_info_1102_0010 pci_ss_info_1102_0009_1102_0010 static const pciSubsystemInfo pci_ss_info_1102_4001_1102_0010 = {0x1102, 0x0010, pci_subsys_1102_4001_1102_0010, 0}; #undef pci_ss_info_1102_0010 @@ -35459,10 +40286,6 @@ static const pciSubsystemInfo pci_ss_info_1103_0004_1103_0001 = {0x1103, 0x0001, pci_subsys_1103_0004_1103_0001, 0}; #undef pci_ss_info_1103_0001 #define pci_ss_info_1103_0001 pci_ss_info_1103_0004_1103_0001 -static const pciSubsystemInfo pci_ss_info_1103_0004_1103_0003 = - {0x1103, 0x0003, pci_subsys_1103_0004_1103_0003, 0}; -#undef pci_ss_info_1103_0003 -#define pci_ss_info_1103_0003 pci_ss_info_1103_0004_1103_0003 static const pciSubsystemInfo pci_ss_info_1103_0004_1103_0004 = {0x1103, 0x0004, pci_subsys_1103_0004_1103_0004, 0}; #undef pci_ss_info_1103_0004 @@ -35559,6 +40382,14 @@ static const pciSubsystemInfo pci_ss_info_1106_0571_1462_7020 = {0x1462, 0x7020, pci_subsys_1106_0571_1462_7020, 0}; #undef pci_ss_info_1462_7020 #define pci_ss_info_1462_7020 pci_ss_info_1106_0571_1462_7020 +static const pciSubsystemInfo pci_ss_info_1106_0571_1462_7094 = + {0x1462, 0x7094, pci_subsys_1106_0571_1462_7094, 0}; +#undef pci_ss_info_1462_7094 +#define pci_ss_info_1462_7094 pci_ss_info_1106_0571_1462_7094 +static const pciSubsystemInfo pci_ss_info_1106_0571_1462_7181 = + {0x1462, 0x7181, pci_subsys_1106_0571_1462_7181, 0}; +#undef pci_ss_info_1462_7181 +#define pci_ss_info_1462_7181 pci_ss_info_1106_0571_1462_7181 static const pciSubsystemInfo pci_ss_info_1106_0571_147b_1407 = {0x147b, 0x1407, pci_subsys_1106_0571_147b_1407, 0}; #undef pci_ss_info_147b_1407 @@ -35675,6 +40506,14 @@ static const pciSubsystemInfo pci_ss_info_1106_3038_1462_7020 = {0x1462, 0x7020, pci_subsys_1106_3038_1462_7020, 0}; #undef pci_ss_info_1462_7020 #define pci_ss_info_1462_7020 pci_ss_info_1106_3038_1462_7020 +static const pciSubsystemInfo pci_ss_info_1106_3038_1462_7094 = + {0x1462, 0x7094, pci_subsys_1106_3038_1462_7094, 0}; +#undef pci_ss_info_1462_7094 +#define pci_ss_info_1462_7094 pci_ss_info_1106_3038_1462_7094 +static const pciSubsystemInfo pci_ss_info_1106_3038_1462_7181 = + {0x1462, 0x7181, pci_subsys_1106_3038_1462_7181, 0}; +#undef pci_ss_info_1462_7181 +#define pci_ss_info_1462_7181 pci_ss_info_1106_3038_1462_7181 static const pciSubsystemInfo pci_ss_info_1106_3038_147b_1407 = {0x147b, 0x1407, pci_subsys_1106_3038_147b_1407, 0}; #undef pci_ss_info_147b_1407 @@ -35821,6 +40660,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3059_1043_812a = {0x1043, 0x812a, pci_subsys_1106_3059_1043_812a, 0}; #undef pci_ss_info_1043_812a #define pci_ss_info_1043_812a pci_ss_info_1106_3059_1043_812a +static const pciSubsystemInfo pci_ss_info_1106_3059_10ec_8168 = + {0x10ec, 0x8168, pci_subsys_1106_3059_10ec_8168, 0}; +#undef pci_ss_info_10ec_8168 +#define pci_ss_info_10ec_8168 pci_ss_info_1106_3059_10ec_8168 static const pciSubsystemInfo pci_ss_info_1106_3059_1106_3059 = {0x1106, 0x3059, pci_subsys_1106_3059_1106_3059, 0}; #undef pci_ss_info_1106_3059 @@ -35857,6 +40700,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3059_1462_3800 = {0x1462, 0x3800, pci_subsys_1106_3059_1462_3800, 0}; #undef pci_ss_info_1462_3800 #define pci_ss_info_1462_3800 pci_ss_info_1106_3059_1462_3800 +static const pciSubsystemInfo pci_ss_info_1106_3059_1462_7181 = + {0x1462, 0x7181, pci_subsys_1106_3059_1462_7181, 0}; +#undef pci_ss_info_1462_7181 +#define pci_ss_info_1462_7181 pci_ss_info_1106_3059_1462_7181 static const pciSubsystemInfo pci_ss_info_1106_3059_147b_1407 = {0x147b, 0x1407, pci_subsys_1106_3059_147b_1407, 0}; #undef pci_ss_info_147b_1407 @@ -35869,10 +40716,6 @@ static const pciSubsystemInfo pci_ss_info_1106_3059_1849_9761 = {0x1849, 0x9761, pci_subsys_1106_3059_1849_9761, 0}; #undef pci_ss_info_1849_9761 #define pci_ss_info_1849_9761 pci_ss_info_1106_3059_1849_9761 -static const pciSubsystemInfo pci_ss_info_1106_3059_3005_1695 = - {0x3005, 0x1695, pci_subsys_1106_3059_3005_1695, 0}; -#undef pci_ss_info_3005_1695 -#define pci_ss_info_3005_1695 pci_ss_info_1106_3059_3005_1695 #endif static const pciSubsystemInfo pci_ss_info_1106_3059_4005_4710 = {0x4005, 0x4710, pci_subsys_1106_3059_4005_4710, 0}; @@ -35883,6 +40726,14 @@ static const pciSubsystemInfo pci_ss_info_1106_3059_a0a0_01b6 = {0xa0a0, 0x01b6, pci_subsys_1106_3059_a0a0_01b6, 0}; #undef pci_ss_info_a0a0_01b6 #define pci_ss_info_a0a0_01b6 pci_ss_info_1106_3059_a0a0_01b6 +static const pciSubsystemInfo pci_ss_info_1106_3059_a0a0_0342 = + {0xa0a0, 0x0342, pci_subsys_1106_3059_a0a0_0342, 0}; +#undef pci_ss_info_a0a0_0342 +#define pci_ss_info_a0a0_0342 pci_ss_info_1106_3059_a0a0_0342 +static const pciSubsystemInfo pci_ss_info_1106_3059_aa01_1106 = + {0xaa01, 0x1106, pci_subsys_1106_3059_aa01_1106, 0}; +#undef pci_ss_info_aa01_1106 +#define pci_ss_info_aa01_1106 pci_ss_info_1106_3059_aa01_1106 static const pciSubsystemInfo pci_ss_info_1106_3065_1043_80a1 = {0x1043, 0x80a1, pci_subsys_1106_3065_1043_80a1, 0}; #undef pci_ss_info_1043_80a1 @@ -35903,6 +40754,14 @@ static const pciSubsystemInfo pci_ss_info_1106_3065_13b9_1421 = {0x13b9, 0x1421, pci_subsys_1106_3065_13b9_1421, 0}; #undef pci_ss_info_13b9_1421 #define pci_ss_info_13b9_1421 pci_ss_info_1106_3065_13b9_1421 +static const pciSubsystemInfo pci_ss_info_1106_3065_1462_7061 = + {0x1462, 0x7061, pci_subsys_1106_3065_1462_7061, 0}; +#undef pci_ss_info_1462_7061 +#define pci_ss_info_1462_7061 pci_ss_info_1106_3065_1462_7061 +static const pciSubsystemInfo pci_ss_info_1106_3065_1462_7181 = + {0x1462, 0x7181, pci_subsys_1106_3065_1462_7181, 0}; +#undef pci_ss_info_1462_7181 +#define pci_ss_info_1462_7181 pci_ss_info_1106_3065_1462_7181 static const pciSubsystemInfo pci_ss_info_1106_3065_147b_1c09 = {0x147b, 0x1c09, pci_subsys_1106_3065_147b_1c09, 0}; #undef pci_ss_info_147b_1c09 @@ -35967,6 +40826,14 @@ static const pciSubsystemInfo pci_ss_info_1106_3104_1462_7020 = {0x1462, 0x7020, pci_subsys_1106_3104_1462_7020, 0}; #undef pci_ss_info_1462_7020 #define pci_ss_info_1462_7020 pci_ss_info_1106_3104_1462_7020 +static const pciSubsystemInfo pci_ss_info_1106_3104_1462_7094 = + {0x1462, 0x7094, pci_subsys_1106_3104_1462_7094, 0}; +#undef pci_ss_info_1462_7094 +#define pci_ss_info_1462_7094 pci_ss_info_1106_3104_1462_7094 +static const pciSubsystemInfo pci_ss_info_1106_3104_1462_7181 = + {0x1462, 0x7181, pci_subsys_1106_3104_1462_7181, 0}; +#undef pci_ss_info_1462_7181 +#define pci_ss_info_1462_7181 pci_ss_info_1106_3104_1462_7181 static const pciSubsystemInfo pci_ss_info_1106_3104_147b_1407 = {0x147b, 0x1407, pci_subsys_1106_3104_147b_1407, 0}; #undef pci_ss_info_147b_1407 @@ -35983,6 +40850,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3106_1186_1403 = {0x1186, 0x1403, pci_subsys_1106_3106_1186_1403, 0}; #undef pci_ss_info_1186_1403 #define pci_ss_info_1186_1403 pci_ss_info_1106_3106_1186_1403 +static const pciSubsystemInfo pci_ss_info_1106_3106_1186_1407 = + {0x1186, 0x1407, pci_subsys_1106_3106_1186_1407, 0}; +#undef pci_ss_info_1186_1407 +#define pci_ss_info_1186_1407 pci_ss_info_1106_3106_1186_1407 static const pciSubsystemInfo pci_ss_info_1106_3116_1297_f641 = {0x1297, 0xf641, pci_subsys_1106_3116_1297_f641, 0}; #undef pci_ss_info_1297_f641 @@ -36003,6 +40874,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3149_1462_7020 = {0x1462, 0x7020, pci_subsys_1106_3149_1462_7020, 0}; #undef pci_ss_info_1462_7020 #define pci_ss_info_1462_7020 pci_ss_info_1106_3149_1462_7020 +static const pciSubsystemInfo pci_ss_info_1106_3149_1462_7094 = + {0x1462, 0x7094, pci_subsys_1106_3149_1462_7094, 0}; +#undef pci_ss_info_1462_7094 +#define pci_ss_info_1462_7094 pci_ss_info_1106_3149_1462_7094 static const pciSubsystemInfo pci_ss_info_1106_3149_147b_1407 = {0x147b, 0x1407, pci_subsys_1106_3149_147b_1407, 0}; #undef pci_ss_info_147b_1407 @@ -36015,6 +40890,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3149_1849_3149 = {0x1849, 0x3149, pci_subsys_1106_3149_1849_3149, 0}; #undef pci_ss_info_1849_3149 #define pci_ss_info_1849_3149 pci_ss_info_1106_3149_1849_3149 +static const pciSubsystemInfo pci_ss_info_1106_3149_a0a0_04ad = + {0xa0a0, 0x04ad, pci_subsys_1106_3149_a0a0_04ad, 0}; +#undef pci_ss_info_a0a0_04ad +#define pci_ss_info_a0a0_04ad pci_ss_info_1106_3149_a0a0_04ad static const pciSubsystemInfo pci_ss_info_1106_3164_1043_80f4 = {0x1043, 0x80f4, pci_subsys_1106_3164_1043_80f4, 0}; #undef pci_ss_info_1043_80f4 @@ -36095,6 +40974,10 @@ static const pciSubsystemInfo pci_ss_info_1106_7205_1458_d000 = {0x1458, 0xd000, pci_subsys_1106_7205_1458_d000, 0}; #undef pci_ss_info_1458_d000 #define pci_ss_info_1458_d000 pci_ss_info_1106_7205_1458_d000 +static const pciSubsystemInfo pci_ss_info_1106_7205_1462_7061 = + {0x1462, 0x7061, pci_subsys_1106_7205_1462_7061, 0}; +#undef pci_ss_info_1462_7061 +#define pci_ss_info_1462_7061 pci_ss_info_1106_7205_1462_7061 static const pciSubsystemInfo pci_ss_info_1106_8598_1019_0985 = {0x1019, 0x0985, pci_subsys_1106_8598_1019_0985, 0}; #undef pci_ss_info_1019_0985 @@ -36307,6 +41190,10 @@ static const pciSubsystemInfo pci_ss_info_1131_7133_1461_1044 = {0x1461, 0x1044, pci_subsys_1131_7133_1461_1044, 0}; #undef pci_ss_info_1461_1044 #define pci_ss_info_1461_1044 pci_ss_info_1131_7133_1461_1044 +static const pciSubsystemInfo pci_ss_info_1131_7133_1461_a14b = + {0x1461, 0xa14b, pci_subsys_1131_7133_1461_a14b, 0}; +#undef pci_ss_info_1461_a14b +#define pci_ss_info_1461_a14b pci_ss_info_1131_7133_1461_a14b static const pciSubsystemInfo pci_ss_info_1131_7133_1461_f31f = {0x1461, 0xf31f, pci_subsys_1131_7133_1461_f31f, 0}; #undef pci_ss_info_1461_f31f @@ -36339,6 +41226,10 @@ static const pciSubsystemInfo pci_ss_info_1131_7133_185b_c100 = {0x185b, 0xc100, pci_subsys_1131_7133_185b_c100, 0}; #undef pci_ss_info_185b_c100 #define pci_ss_info_185b_c100 pci_ss_info_1131_7133_185b_c100 +static const pciSubsystemInfo pci_ss_info_1131_7133_185b_c900 = + {0x185b, 0xc900, pci_subsys_1131_7133_185b_c900, 0}; +#undef pci_ss_info_185b_c900 +#define pci_ss_info_185b_c900 pci_ss_info_1131_7133_185b_c900 static const pciSubsystemInfo pci_ss_info_1131_7133_5168_0306 = {0x5168, 0x0306, pci_subsys_1131_7133_5168_0306, 0}; #undef pci_ss_info_5168_0306 @@ -36471,6 +41362,10 @@ static const pciSubsystemInfo pci_ss_info_1131_7134_1894_fe01 = {0x1894, 0xfe01, pci_subsys_1131_7134_1894_fe01, 0}; #undef pci_ss_info_1894_fe01 #define pci_ss_info_1894_fe01 pci_ss_info_1131_7134_1894_fe01 +static const pciSubsystemInfo pci_ss_info_1131_7134_5168_0138 = + {0x5168, 0x0138, pci_subsys_1131_7134_5168_0138, 0}; +#undef pci_ss_info_5168_0138 +#define pci_ss_info_5168_0138 pci_ss_info_1131_7134_5168_0138 static const pciSubsystemInfo pci_ss_info_1131_7146_110a_0000 = {0x110a, 0x0000, pci_subsys_1131_7146_110a_0000, 0}; #undef pci_ss_info_110a_0000 @@ -36595,6 +41490,10 @@ static const pciSubsystemInfo pci_ss_info_1131_7146_153b_1156 = {0x153b, 0x1156, pci_subsys_1131_7146_153b_1156, 0}; #undef pci_ss_info_153b_1156 #define pci_ss_info_153b_1156 pci_ss_info_1131_7146_153b_1156 +static const pciSubsystemInfo pci_ss_info_1131_7146_1894_0020 = + {0x1894, 0x0020, pci_subsys_1131_7146_1894_0020, 0}; +#undef pci_ss_info_1894_0020 +#define pci_ss_info_1894_0020 pci_ss_info_1131_7146_1894_0020 static const pciSubsystemInfo pci_ss_info_1131_9730_1131_0000 = {0x1131, 0x0000, pci_subsys_1131_9730_1131_0000, 0}; #undef pci_ss_info_1131_0000 @@ -36613,10 +41512,6 @@ static const pciSubsystemInfo pci_ss_info_1133_e013_1133_e013 = {0x1133, 0xe013, pci_subsys_1133_e013_1133_e013, 0}; #undef pci_ss_info_1133_e013 #define pci_ss_info_1133_e013 pci_ss_info_1133_e013_1133_e013 -static const pciSubsystemInfo pci_ss_info_1133_e015_1133_e015 = - {0x1133, 0xe015, pci_subsys_1133_e015_1133_e015, 0}; -#undef pci_ss_info_1133_e015 -#define pci_ss_info_1133_e015 pci_ss_info_1133_e015_1133_e015 static const pciSubsystemInfo pci_ss_info_1133_e017_1133_e017 = {0x1133, 0xe017, pci_subsys_1133_e017_1133_e017, 0}; #undef pci_ss_info_1133_e017 @@ -36685,6 +41580,30 @@ static const pciSubsystemInfo pci_ss_info_1133_e01c_1133_1c0c = {0x1133, 0x1c0c, pci_subsys_1133_e01c_1133_1c0c, 0}; #undef pci_ss_info_1133_1c0c #define pci_ss_info_1133_1c0c pci_ss_info_1133_e01c_1133_1c0c +static const pciSubsystemInfo pci_ss_info_1133_e01e_1133_1e01 = + {0x1133, 0x1e01, pci_subsys_1133_e01e_1133_1e01, 0}; +#undef pci_ss_info_1133_1e01 +#define pci_ss_info_1133_1e01 pci_ss_info_1133_e01e_1133_1e01 +static const pciSubsystemInfo pci_ss_info_1133_e01e_1133_e01e = + {0x1133, 0xe01e, pci_subsys_1133_e01e_1133_e01e, 0}; +#undef pci_ss_info_1133_e01e +#define pci_ss_info_1133_e01e pci_ss_info_1133_e01e_1133_e01e +static const pciSubsystemInfo pci_ss_info_1133_e020_1133_2001 = + {0x1133, 0x2001, pci_subsys_1133_e020_1133_2001, 0}; +#undef pci_ss_info_1133_2001 +#define pci_ss_info_1133_2001 pci_ss_info_1133_e020_1133_2001 +static const pciSubsystemInfo pci_ss_info_1133_e020_1133_e020 = + {0x1133, 0xe020, pci_subsys_1133_e020_1133_e020, 0}; +#undef pci_ss_info_1133_e020 +#define pci_ss_info_1133_e020 pci_ss_info_1133_e020_1133_e020 +static const pciSubsystemInfo pci_ss_info_1133_e022_1133_2200 = + {0x1133, 0x2200, pci_subsys_1133_e022_1133_2200, 0}; +#undef pci_ss_info_1133_2200 +#define pci_ss_info_1133_2200 pci_ss_info_1133_e022_1133_2200 +static const pciSubsystemInfo pci_ss_info_1133_e022_1133_e022 = + {0x1133, 0xe022, pci_subsys_1133_e022_1133_e022, 0}; +#undef pci_ss_info_1133_e022 +#define pci_ss_info_1133_e022 pci_ss_info_1133_e022_1133_e022 static const pciSubsystemInfo pci_ss_info_1133_e024_1133_2400 = {0x1133, 0x2400, pci_subsys_1133_e024_1133_2400, 0}; #undef pci_ss_info_1133_2400 @@ -36701,6 +41620,22 @@ static const pciSubsystemInfo pci_ss_info_1133_e028_1133_e028 = {0x1133, 0xe028, pci_subsys_1133_e028_1133_e028, 0}; #undef pci_ss_info_1133_e028 #define pci_ss_info_1133_e028 pci_ss_info_1133_e028_1133_e028 +static const pciSubsystemInfo pci_ss_info_1133_e02e_1133_2e01 = + {0x1133, 0x2e01, pci_subsys_1133_e02e_1133_2e01, 0}; +#undef pci_ss_info_1133_2e01 +#define pci_ss_info_1133_2e01 pci_ss_info_1133_e02e_1133_2e01 +static const pciSubsystemInfo pci_ss_info_1133_e02e_1133_e02e = + {0x1133, 0xe02e, pci_subsys_1133_e02e_1133_e02e, 0}; +#undef pci_ss_info_1133_e02e +#define pci_ss_info_1133_e02e pci_ss_info_1133_e02e_1133_e02e +static const pciSubsystemInfo pci_ss_info_1133_e032_1133_3201 = + {0x1133, 0x3201, pci_subsys_1133_e032_1133_3201, 0}; +#undef pci_ss_info_1133_3201 +#define pci_ss_info_1133_3201 pci_ss_info_1133_e032_1133_3201 +static const pciSubsystemInfo pci_ss_info_1133_e032_1133_e032 = + {0x1133, 0xe032, pci_subsys_1133_e032_1133_e032, 0}; +#undef pci_ss_info_1133_e032 +#define pci_ss_info_1133_e032 pci_ss_info_1133_e032_1133_e032 #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif @@ -37105,6 +42040,12 @@ static const pciSubsystemInfo pci_ss_info_1166_0203_1734_1012 = {0x1734, 0x1012, pci_subsys_1166_0203_1734_1012, 0}; #undef pci_ss_info_1734_1012 #define pci_ss_info_1734_1012 pci_ss_info_1166_0203_1734_1012 +#endif +static const pciSubsystemInfo pci_ss_info_1166_0212_1028_810b = + {0x1028, 0x810b, pci_subsys_1166_0212_1028_810b, 0}; +#undef pci_ss_info_1028_810b +#define pci_ss_info_1028_810b pci_ss_info_1166_0212_1028_810b +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1166_0212_4c53_1080 = {0x4c53, 0x1080, pci_subsys_1166_0212_4c53_1080, 0}; #undef pci_ss_info_4c53_1080 @@ -37182,6 +42123,12 @@ static const pciSubsystemInfo pci_ss_info_1180_0476_1014_0185 = #undef pci_ss_info_1014_0185 #define pci_ss_info_1014_0185 pci_ss_info_1180_0476_1014_0185 #endif +static const pciSubsystemInfo pci_ss_info_1180_0476_1028_014f = + {0x1028, 0x014f, pci_subsys_1180_0476_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_1180_0476_1028_014f +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1180_0476_1028_0188 = {0x1028, 0x0188, pci_subsys_1180_0476_1028_0188, 0}; #undef pci_ss_info_1028_0188 @@ -37217,6 +42164,10 @@ static const pciSubsystemInfo pci_ss_info_1180_0476_10f7_8338 = {0x10f7, 0x8338, pci_subsys_1180_0476_10f7_8338, 0}; #undef pci_ss_info_10f7_8338 #define pci_ss_info_10f7_8338 pci_ss_info_1180_0476_10f7_8338 +static const pciSubsystemInfo pci_ss_info_1180_0476_144d_c005 = + {0x144d, 0xc005, pci_subsys_1180_0476_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_1180_0476_144d_c005 static const pciSubsystemInfo pci_ss_info_1180_0476_144d_c00c = {0x144d, 0xc00c, pci_subsys_1180_0476_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -37250,11 +42201,21 @@ static const pciSubsystemInfo pci_ss_info_1180_0552_1014_0511 = #undef pci_ss_info_1014_0511 #define pci_ss_info_1014_0511 pci_ss_info_1180_0552_1014_0511 #endif +static const pciSubsystemInfo pci_ss_info_1180_0552_1028_014f = + {0x1028, 0x014f, pci_subsys_1180_0552_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_1180_0552_1028_014f +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1180_0552_1028_0188 = {0x1028, 0x0188, pci_subsys_1180_0552_1028_0188, 0}; #undef pci_ss_info_1028_0188 #define pci_ss_info_1028_0188 pci_ss_info_1180_0552_1028_0188 #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1180_0552_144d_c005 = + {0x144d, 0xc005, pci_subsys_1180_0552_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_1180_0552_144d_c005 static const pciSubsystemInfo pci_ss_info_1180_0552_144d_c00c = {0x144d, 0xc00c, pci_subsys_1180_0552_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -37263,6 +42224,12 @@ static const pciSubsystemInfo pci_ss_info_1180_0552_17aa_201e = {0x17aa, 0x201e, pci_subsys_1180_0552_17aa_201e, 0}; #undef pci_ss_info_17aa_201e #define pci_ss_info_17aa_201e pci_ss_info_1180_0552_17aa_201e +#endif +static const pciSubsystemInfo pci_ss_info_1180_0592_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_1180_0592_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_1180_0592_103c_30b7 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1180_0592_1043_1967 = {0x1043, 0x1967, pci_subsys_1180_0592_1043_1967, 0}; #undef pci_ss_info_1043_1967 @@ -37291,6 +42258,12 @@ static const pciSubsystemInfo pci_ss_info_1180_0822_1028_01a2 = #undef pci_ss_info_1028_01a2 #define pci_ss_info_1028_01a2 pci_ss_info_1180_0822_1028_01a2 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1180_0822_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_1180_0822_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_1180_0822_103c_30b7 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1180_0822_1043_1967 = {0x1043, 0x1967, pci_subsys_1180_0822_1043_1967, 0}; #undef pci_ss_info_1043_1967 @@ -37307,6 +42280,24 @@ static const pciSubsystemInfo pci_ss_info_1180_0822_17aa_201d = {0x17aa, 0x201d, pci_subsys_1180_0822_17aa_201d, 0}; #undef pci_ss_info_17aa_201d #define pci_ss_info_17aa_201d pci_ss_info_1180_0822_17aa_201d +#endif +static const pciSubsystemInfo pci_ss_info_1180_0832_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_1180_0832_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_1180_0832_103c_30b7 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1180_0843_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_1180_0843_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_1180_0843_103c_30b7 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1180_0852_103c_30b7 = + {0x103c, 0x30b7, pci_subsys_1180_0852_103c_30b7, 0}; +#undef pci_ss_info_103c_30b7 +#define pci_ss_info_103c_30b7 pci_ss_info_1180_0852_103c_30b7 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1180_0852_1043_1967 = {0x1043, 0x1967, pci_subsys_1180_0852_1043_1967, 0}; #undef pci_ss_info_1043_1967 @@ -37343,6 +42334,10 @@ static const pciSubsystemInfo pci_ss_info_11ab_1faa_1385_4e00 = {0x1385, 0x4e00, pci_subsys_11ab_1faa_1385_4e00, 0}; #undef pci_ss_info_1385_4e00 #define pci_ss_info_1385_4e00 pci_ss_info_11ab_1faa_1385_4e00 +static const pciSubsystemInfo pci_ss_info_11ab_1faa_1385_6b00 = + {0x1385, 0x6b00, pci_subsys_11ab_1faa_1385_6b00, 0}; +#undef pci_ss_info_1385_6b00 +#define pci_ss_info_1385_6b00 pci_ss_info_11ab_1faa_1385_6b00 static const pciSubsystemInfo pci_ss_info_11ab_4320_1019_0f38 = {0x1019, 0x0f38, pci_subsys_11ab_4320_1019_0f38, 0}; #undef pci_ss_info_1019_0f38 @@ -38114,12 +43109,6 @@ static const pciSubsystemInfo pci_ss_info_11c1_0450_1468_0450 = #undef pci_ss_info_1468_0450 #define pci_ss_info_1468_0450 pci_ss_info_11c1_0450_1468_0450 #endif -static const pciSubsystemInfo pci_ss_info_11c1_0450_4005_144f = - {0x4005, 0x144f, pci_subsys_11c1_0450_4005_144f, 0}; -#undef pci_ss_info_4005_144f -#define pci_ss_info_4005_144f pci_ss_info_11c1_0450_4005_144f -#ifdef VENDOR_INCLUDE_NONVIDEO -#endif static const pciSubsystemInfo pci_ss_info_11c1_5811_8086_524c = {0x8086, 0x524c, pci_subsys_11c1_5811_8086_524c, 0}; #undef pci_ss_info_8086_524c @@ -38165,6 +43154,12 @@ static const pciSubsystemInfo pci_ss_info_11cb_2000_11cb_b008 = #define pci_ss_info_11cb_b008 pci_ss_info_11cb_2000_11cb_b008 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_11d4_1986_11d4_1986 = + {0x11d4, 0x1986, pci_subsys_11d4_1986_11d4_1986, 0}; +#undef pci_ss_info_11d4_1986 +#define pci_ss_info_11d4_1986 pci_ss_info_11d4_1986_11d4_1986 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #endif static const pciSubsystemInfo pci_ss_info_11de_6057_1031_7efe = {0x1031, 0x7efe, pci_subsys_11de_6057_1031_7efe, 0}; @@ -38646,6 +43641,12 @@ static const pciSubsystemInfo pci_ss_info_1260_3873_1737_3874 = #undef pci_ss_info_1737_3874 #define pci_ss_info_1737_3874 pci_ss_info_1260_3873_1737_3874 #endif +static const pciSubsystemInfo pci_ss_info_1260_3873_8086_2510 = + {0x8086, 0x2510, pci_subsys_1260_3873_8086_2510, 0}; +#undef pci_ss_info_8086_2510 +#define pci_ss_info_8086_2510 pci_ss_info_1260_3873_8086_2510 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1260_3873_8086_2513 = {0x8086, 0x2513, pci_subsys_1260_3873_8086_2513, 0}; #undef pci_ss_info_8086_2513 @@ -38675,6 +43676,10 @@ static const pciSubsystemInfo pci_ss_info_1260_3890_1113_8201 = {0x1113, 0x8201, pci_subsys_1260_3890_1113_8201, 0}; #undef pci_ss_info_1113_8201 #define pci_ss_info_1113_8201 pci_ss_info_1260_3890_1113_8201 +static const pciSubsystemInfo pci_ss_info_1260_3890_1113_b301 = + {0x1113, 0xb301, pci_subsys_1260_3890_1113_b301, 0}; +#undef pci_ss_info_1113_b301 +#define pci_ss_info_1113_b301 pci_ss_info_1260_3890_1113_b301 static const pciSubsystemInfo pci_ss_info_1260_3890_1113_ee03 = {0x1113, 0xee03, pci_subsys_1260_3890_1113_ee03, 0}; #undef pci_ss_info_1113_ee03 @@ -39461,6 +44466,10 @@ static const pciSubsystemInfo pci_ss_info_12b9_1008_12b9_00ad = {0x12b9, 0x00ad, pci_subsys_12b9_1008_12b9_00ad, 0}; #undef pci_ss_info_12b9_00ad #define pci_ss_info_12b9_00ad pci_ss_info_12b9_1008_12b9_00ad +static const pciSubsystemInfo pci_ss_info_12b9_1008_12b9_baba = + {0x12b9, 0xbaba, pci_subsys_12b9_1008_12b9_baba, 0}; +#undef pci_ss_info_12b9_baba +#define pci_ss_info_12b9_baba pci_ss_info_12b9_1008_12b9_baba #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_12be_3042_12be_3042 = @@ -39545,6 +44554,10 @@ static const pciSubsystemInfo pci_ss_info_12d9_1078_12d9_000d = {0x12d9, 0x000d, pci_subsys_12d9_1078_12d9_000d, 0}; #undef pci_ss_info_12d9_000d #define pci_ss_info_12d9_000d pci_ss_info_12d9_1078_12d9_000d +static const pciSubsystemInfo pci_ss_info_12d9_1078_12d9_000e = + {0x12d9, 0x000e, pci_subsys_12d9_1078_12d9_000e, 0}; +#undef pci_ss_info_12d9_000e +#define pci_ss_info_12d9_000e pci_ss_info_12d9_1078_12d9_000e #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif @@ -39759,6 +44772,10 @@ static const pciSubsystemInfo pci_ss_info_1397_08b4_1397_b540 = {0x1397, 0xb540, pci_subsys_1397_08b4_1397_b540, 0}; #undef pci_ss_info_1397_b540 #define pci_ss_info_1397_b540 pci_ss_info_1397_08b4_1397_b540 +static const pciSubsystemInfo pci_ss_info_1397_08b4_1397_b556 = + {0x1397, 0xb556, pci_subsys_1397_08b4_1397_b556, 0}; +#undef pci_ss_info_1397_b556 +#define pci_ss_info_1397_b556 pci_ss_info_1397_08b4_1397_b556 static const pciSubsystemInfo pci_ss_info_1397_2bd0_0675_1704 = {0x0675, 0x1704, pci_subsys_1397_2bd0_0675_1704, 0}; #undef pci_ss_info_0675_1704 @@ -39817,10 +44834,74 @@ static const pciSubsystemInfo pci_ss_info_13f6_0111_13f6_0111 = {0x13f6, 0x0111, pci_subsys_13f6_0111_13f6_0111, 0}; #undef pci_ss_info_13f6_0111 #define pci_ss_info_13f6_0111 pci_ss_info_13f6_0111_13f6_0111 +static const pciSubsystemInfo pci_ss_info_13f6_0111_13f6_9761 = + {0x13f6, 0x9761, pci_subsys_13f6_0111_13f6_9761, 0}; +#undef pci_ss_info_13f6_9761 +#define pci_ss_info_13f6_9761 pci_ss_info_13f6_0111_13f6_9761 +static const pciSubsystemInfo pci_ss_info_13f6_0111_153b_1144 = + {0x153b, 0x1144, pci_subsys_13f6_0111_153b_1144, 0}; +#undef pci_ss_info_153b_1144 +#define pci_ss_info_153b_1144 pci_ss_info_13f6_0111_153b_1144 +static const pciSubsystemInfo pci_ss_info_13f6_0111_153b_1170 = + {0x153b, 0x1170, pci_subsys_13f6_0111_153b_1170, 0}; +#undef pci_ss_info_153b_1170 +#define pci_ss_info_153b_1170 pci_ss_info_13f6_0111_153b_1170 static const pciSubsystemInfo pci_ss_info_13f6_0111_1681_a000 = {0x1681, 0xa000, pci_subsys_13f6_0111_1681_a000, 0}; #undef pci_ss_info_1681_a000 #define pci_ss_info_1681_a000 pci_ss_info_13f6_0111_1681_a000 +static const pciSubsystemInfo pci_ss_info_13f6_0111_270f_1103 = + {0x270f, 0x1103, pci_subsys_13f6_0111_270f_1103, 0}; +#undef pci_ss_info_270f_1103 +#define pci_ss_info_270f_1103 pci_ss_info_13f6_0111_270f_1103 +static const pciSubsystemInfo pci_ss_info_13f6_0111_584d_3731 = + {0x584d, 0x3731, pci_subsys_13f6_0111_584d_3731, 0}; +#undef pci_ss_info_584d_3731 +#define pci_ss_info_584d_3731 pci_ss_info_13f6_0111_584d_3731 +static const pciSubsystemInfo pci_ss_info_13f6_0111_584d_3741 = + {0x584d, 0x3741, pci_subsys_13f6_0111_584d_3741, 0}; +#undef pci_ss_info_584d_3741 +#define pci_ss_info_584d_3741 pci_ss_info_13f6_0111_584d_3741 +static const pciSubsystemInfo pci_ss_info_13f6_0111_584d_3751 = + {0x584d, 0x3751, pci_subsys_13f6_0111_584d_3751, 0}; +#undef pci_ss_info_584d_3751 +#define pci_ss_info_584d_3751 pci_ss_info_13f6_0111_584d_3751 +static const pciSubsystemInfo pci_ss_info_13f6_0111_584d_3761 = + {0x584d, 0x3761, pci_subsys_13f6_0111_584d_3761, 0}; +#undef pci_ss_info_584d_3761 +#define pci_ss_info_584d_3761 pci_ss_info_13f6_0111_584d_3761 +static const pciSubsystemInfo pci_ss_info_13f6_0111_584d_3771 = + {0x584d, 0x3771, pci_subsys_13f6_0111_584d_3771, 0}; +#undef pci_ss_info_584d_3771 +#define pci_ss_info_584d_3771 pci_ss_info_13f6_0111_584d_3771 +static const pciSubsystemInfo pci_ss_info_13f6_0111_7284_8384 = + {0x7284, 0x8384, pci_subsys_13f6_0111_7284_8384, 0}; +#undef pci_ss_info_7284_8384 +#define pci_ss_info_7284_8384 pci_ss_info_13f6_0111_7284_8384 +static const pciSubsystemInfo pci_ss_info_13f6_8788_1043_8269 = + {0x1043, 0x8269, pci_subsys_13f6_8788_1043_8269, 0}; +#undef pci_ss_info_1043_8269 +#define pci_ss_info_1043_8269 pci_ss_info_13f6_8788_1043_8269 +static const pciSubsystemInfo pci_ss_info_13f6_8788_14c3_1710 = + {0x14c3, 0x1710, pci_subsys_13f6_8788_14c3_1710, 0}; +#undef pci_ss_info_14c3_1710 +#define pci_ss_info_14c3_1710 pci_ss_info_13f6_8788_14c3_1710 +static const pciSubsystemInfo pci_ss_info_13f6_8788_1a58_0910 = + {0x1a58, 0x0910, pci_subsys_13f6_8788_1a58_0910, 0}; +#undef pci_ss_info_1a58_0910 +#define pci_ss_info_1a58_0910 pci_ss_info_13f6_8788_1a58_0910 +static const pciSubsystemInfo pci_ss_info_13f6_8788_415a_5431 = + {0x415a, 0x5431, pci_subsys_13f6_8788_415a_5431, 0}; +#undef pci_ss_info_415a_5431 +#define pci_ss_info_415a_5431 pci_ss_info_13f6_8788_415a_5431 +static const pciSubsystemInfo pci_ss_info_13f6_8788_584d_3781 = + {0x584d, 0x3781, pci_subsys_13f6_8788_584d_3781, 0}; +#undef pci_ss_info_584d_3781 +#define pci_ss_info_584d_3781 pci_ss_info_13f6_8788_584d_3781 +static const pciSubsystemInfo pci_ss_info_13f6_8788_7284_9761 = + {0x7284, 0x9761, pci_subsys_13f6_8788_7284_9761, 0}; +#undef pci_ss_info_7284_9761 +#define pci_ss_info_7284_9761 pci_ss_info_13f6_8788_7284_9761 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_13fe_1600_1601_0002 = @@ -39961,10 +45042,6 @@ static const pciSubsystemInfo pci_ss_info_1412_1724_270f_f645 = {0x270f, 0xf645, pci_subsys_1412_1724_270f_f645, 0}; #undef pci_ss_info_270f_f645 #define pci_ss_info_270f_f645 pci_ss_info_1412_1724_270f_f645 -static const pciSubsystemInfo pci_ss_info_1412_1724_3136_4154 = - {0x3136, 0x4154, pci_subsys_1412_1724_3136_4154, 0}; -#undef pci_ss_info_3136_4154 -#define pci_ss_info_3136_4154 pci_ss_info_1412_1724_3136_4154 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1415_9501_12c4_0201 = @@ -40305,6 +45382,12 @@ static const pciSubsystemInfo pci_ss_info_14e4_1648_0e11_00d1 = #undef pci_ss_info_0e11_00d1 #define pci_ss_info_0e11_00d1 pci_ss_info_14e4_1648_0e11_00d1 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_1648_103c_310f = + {0x103c, 0x310f, pci_subsys_14e4_1648_103c_310f, 0}; +#undef pci_ss_info_103c_310f +#define pci_ss_info_103c_310f pci_ss_info_14e4_1648_103c_310f +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_14e4_1648_10a9_8013 = {0x10a9, 0x8013, pci_subsys_14e4_1648_10a9_8013, 0}; #undef pci_ss_info_10a9_8013 @@ -40452,6 +45535,12 @@ static const pciSubsystemInfo pci_ss_info_14e4_1668_103c_7039 = #define pci_ss_info_103c_7039 pci_ss_info_14e4_1668_103c_7039 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_14e4_1677_1028_0177 = + {0x1028, 0x0177, pci_subsys_14e4_1677_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_14e4_1677_1028_0177 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_14e4_1677_1028_0179 = {0x1028, 0x0179, pci_subsys_14e4_1677_1028_0179, 0}; #undef pci_ss_info_1028_0179 @@ -40485,6 +45574,10 @@ static const pciSubsystemInfo pci_ss_info_14e4_1677_1734_105d = {0x1734, 0x105d, pci_subsys_14e4_1677_1734_105d, 0}; #undef pci_ss_info_1734_105d #define pci_ss_info_1734_105d pci_ss_info_14e4_1677_1734_105d +static const pciSubsystemInfo pci_ss_info_14e4_1677_3007_103c = + {0x3007, 0x103c, pci_subsys_14e4_1677_3007_103c, 0}; +#undef pci_ss_info_3007_103c +#define pci_ss_info_3007_103c pci_ss_info_14e4_1677_3007_103c #endif static const pciSubsystemInfo pci_ss_info_14e4_1679_103c_1707 = {0x103c, 0x1707, pci_subsys_14e4_1679_103c_1707, 0}; @@ -40503,6 +45596,12 @@ static const pciSubsystemInfo pci_ss_info_14e4_1679_103c_703c = #undef pci_ss_info_103c_703c #define pci_ss_info_103c_703c pci_ss_info_14e4_1679_103c_703c #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_167d_103c_0940 = + {0x103c, 0x0940, pci_subsys_14e4_167d_103c_0940, 0}; +#undef pci_ss_info_103c_0940 +#define pci_ss_info_103c_0940 pci_ss_info_14e4_167d_103c_0940 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_14e4_167d_17aa_2081 = {0x17aa, 0x2081, pci_subsys_14e4_167d_17aa_2081, 0}; #undef pci_ss_info_17aa_2081 @@ -40595,6 +45694,10 @@ static const pciSubsystemInfo pci_ss_info_14e4_16aa_103c_3102 = #undef pci_ss_info_103c_3102 #define pci_ss_info_103c_3102 pci_ss_info_14e4_16aa_103c_3102 #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_14e4_16ac_1014_0304 = + {0x1014, 0x0304, pci_subsys_14e4_16ac_1014_0304, 0}; +#undef pci_ss_info_1014_0304 +#define pci_ss_info_1014_0304 pci_ss_info_14e4_16ac_1014_0304 #endif static const pciSubsystemInfo pci_ss_info_14e4_16ac_103c_1706 = {0x103c, 0x1706, pci_subsys_14e4_16ac_103c_1706, 0}; @@ -40670,6 +45773,12 @@ static const pciSubsystemInfo pci_ss_info_14e4_170c_1028_0188 = #define pci_ss_info_1028_0188 pci_ss_info_14e4_170c_1028_0188 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_14e4_170c_1028_018d = + {0x1028, 0x018d, pci_subsys_14e4_170c_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_14e4_170c_1028_018d +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_14e4_170c_1028_0196 = {0x1028, 0x0196, pci_subsys_14e4_170c_1028_0196, 0}; #undef pci_ss_info_1028_0196 @@ -40731,6 +45840,10 @@ static const pciSubsystemInfo pci_ss_info_14e4_4318_16ec_0119 = {0x16ec, 0x0119, pci_subsys_14e4_4318_16ec_0119, 0}; #undef pci_ss_info_16ec_0119 #define pci_ss_info_16ec_0119 pci_ss_info_14e4_4318_16ec_0119 +static const pciSubsystemInfo pci_ss_info_14e4_4318_1737_0042 = + {0x1737, 0x0042, pci_subsys_14e4_4318_1737_0042, 0}; +#undef pci_ss_info_1737_0042 +#define pci_ss_info_1737_0042 pci_ss_info_14e4_4318_1737_0042 static const pciSubsystemInfo pci_ss_info_14e4_4318_1737_0048 = {0x1737, 0x0048, pci_subsys_14e4_4318_1737_0048, 0}; #undef pci_ss_info_1737_0048 @@ -40830,6 +45943,12 @@ static const pciSubsystemInfo pci_ss_info_14e4_4325_1414_0004 = #undef pci_ss_info_1414_0004 #define pci_ss_info_1414_0004 pci_ss_info_14e4_4325_1414_0004 #endif +static const pciSubsystemInfo pci_ss_info_14e4_4328_1028_000a = + {0x1028, 0x000a, pci_subsys_14e4_4328_1028_000a, 0}; +#undef pci_ss_info_1028_000a +#define pci_ss_info_1028_000a pci_ss_info_14e4_4328_1028_000a +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_14e4_4401_103c_08b0 = {0x103c, 0x08b0, pci_subsys_14e4_4401_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 @@ -41249,10 +46368,18 @@ static const pciSubsystemInfo pci_ss_info_14f1_8800_7063_3000 = {0x7063, 0x3000, pci_subsys_14f1_8800_7063_3000, 0}; #undef pci_ss_info_7063_3000 #define pci_ss_info_7063_3000 pci_ss_info_14f1_8800_7063_3000 +static const pciSubsystemInfo pci_ss_info_14f1_8800_7063_5500 = + {0x7063, 0x5500, pci_subsys_14f1_8800_7063_5500, 0}; +#undef pci_ss_info_7063_5500 +#define pci_ss_info_7063_5500 pci_ss_info_14f1_8800_7063_5500 static const pciSubsystemInfo pci_ss_info_14f1_8801_0070_2801 = {0x0070, 0x2801, pci_subsys_14f1_8801_0070_2801, 0}; #undef pci_ss_info_0070_2801 #define pci_ss_info_0070_2801 pci_ss_info_14f1_8801_0070_2801 +static const pciSubsystemInfo pci_ss_info_14f1_8801_7063_5500 = + {0x7063, 0x5500, pci_subsys_14f1_8801_7063_5500, 0}; +#undef pci_ss_info_7063_5500 +#define pci_ss_info_7063_5500 pci_ss_info_14f1_8801_7063_5500 static const pciSubsystemInfo pci_ss_info_14f1_8802_0070_2801 = {0x0070, 0x2801, pci_subsys_14f1_8802_0070_2801, 0}; #undef pci_ss_info_0070_2801 @@ -41269,6 +46396,10 @@ static const pciSubsystemInfo pci_ss_info_14f1_8802_107d_663c = {0x107d, 0x663c, pci_subsys_14f1_8802_107d_663c, 0}; #undef pci_ss_info_107d_663c #define pci_ss_info_107d_663c pci_ss_info_14f1_8802_107d_663c +static const pciSubsystemInfo pci_ss_info_14f1_8802_107d_665f = + {0x107d, 0x665f, pci_subsys_14f1_8802_107d_665f, 0}; +#undef pci_ss_info_107d_665f +#define pci_ss_info_107d_665f pci_ss_info_14f1_8802_107d_665f static const pciSubsystemInfo pci_ss_info_14f1_8802_14f1_0187 = {0x14f1, 0x0187, pci_subsys_14f1_8802_14f1_0187, 0}; #undef pci_ss_info_14f1_0187 @@ -41305,10 +46436,18 @@ static const pciSubsystemInfo pci_ss_info_14f1_8802_7063_3000 = {0x7063, 0x3000, pci_subsys_14f1_8802_7063_3000, 0}; #undef pci_ss_info_7063_3000 #define pci_ss_info_7063_3000 pci_ss_info_14f1_8802_7063_3000 +static const pciSubsystemInfo pci_ss_info_14f1_8802_7063_5500 = + {0x7063, 0x5500, pci_subsys_14f1_8802_7063_5500, 0}; +#undef pci_ss_info_7063_5500 +#define pci_ss_info_7063_5500 pci_ss_info_14f1_8802_7063_5500 static const pciSubsystemInfo pci_ss_info_14f1_8804_0070_9002 = {0x0070, 0x9002, pci_subsys_14f1_8804_0070_9002, 0}; #undef pci_ss_info_0070_9002 #define pci_ss_info_0070_9002 pci_ss_info_14f1_8804_0070_9002 +static const pciSubsystemInfo pci_ss_info_14f1_8804_7063_5500 = + {0x7063, 0x5500, pci_subsys_14f1_8804_7063_5500, 0}; +#undef pci_ss_info_7063_5500 +#define pci_ss_info_7063_5500 pci_ss_info_14f1_8804_7063_5500 static const pciSubsystemInfo pci_ss_info_14f1_8811_0070_3401 = {0x0070, 0x3401, pci_subsys_14f1_8811_0070_3401, 0}; #undef pci_ss_info_0070_3401 @@ -41413,6 +46552,38 @@ static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2700 = {0x1522, 0x2700, pci_subsys_1522_0100_1522_2700, 0}; #undef pci_ss_info_1522_2700 #define pci_ss_info_1522_2700 pci_ss_info_1522_0100_1522_2700 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_3000 = + {0x1522, 0x3000, pci_subsys_1522_0100_1522_3000, 0}; +#undef pci_ss_info_1522_3000 +#define pci_ss_info_1522_3000 pci_ss_info_1522_0100_1522_3000 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_3100 = + {0x1522, 0x3100, pci_subsys_1522_0100_1522_3100, 0}; +#undef pci_ss_info_1522_3100 +#define pci_ss_info_1522_3100 pci_ss_info_1522_0100_1522_3100 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_3200 = + {0x1522, 0x3200, pci_subsys_1522_0100_1522_3200, 0}; +#undef pci_ss_info_1522_3200 +#define pci_ss_info_1522_3200 pci_ss_info_1522_0100_1522_3200 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_3300 = + {0x1522, 0x3300, pci_subsys_1522_0100_1522_3300, 0}; +#undef pci_ss_info_1522_3300 +#define pci_ss_info_1522_3300 pci_ss_info_1522_0100_1522_3300 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_3400 = + {0x1522, 0x3400, pci_subsys_1522_0100_1522_3400, 0}; +#undef pci_ss_info_1522_3400 +#define pci_ss_info_1522_3400 pci_ss_info_1522_0100_1522_3400 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_3500 = + {0x1522, 0x3500, pci_subsys_1522_0100_1522_3500, 0}; +#undef pci_ss_info_1522_3500 +#define pci_ss_info_1522_3500 pci_ss_info_1522_0100_1522_3500 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_3c00 = + {0x1522, 0x3c00, pci_subsys_1522_0100_1522_3c00, 0}; +#undef pci_ss_info_1522_3c00 +#define pci_ss_info_1522_3c00 pci_ss_info_1522_0100_1522_3c00 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_3d00 = + {0x1522, 0x3d00, pci_subsys_1522_0100_1522_3d00, 0}; +#undef pci_ss_info_1522_3d00 +#define pci_ss_info_1522_3d00 pci_ss_info_1522_0100_1522_3d00 #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif @@ -41440,6 +46611,10 @@ static const pciSubsystemInfo pci_ss_info_1524_1411_103c_006a = #define pci_ss_info_103c_006a pci_ss_info_1524_1411_103c_006a #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_15ad_0801_15ad_0800 = + {0x15ad, 0x0800, pci_subsys_15ad_0801_15ad_0800, 0}; +#undef pci_ss_info_15ad_0800 +#define pci_ss_info_15ad_0800 pci_ss_info_15ad_0801_15ad_0800 #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_167b_2102_187e_3406 = {0x187e, 0x3406, pci_subsys_167b_2102_187e_3406, 0}; @@ -41503,6 +46678,10 @@ static const pciSubsystemInfo pci_ss_info_168c_0013_1458_e911 = {0x1458, 0xe911, pci_subsys_168c_0013_1458_e911, 0}; #undef pci_ss_info_1458_e911 #define pci_ss_info_1458_e911 pci_ss_info_168c_0013_1458_e911 +static const pciSubsystemInfo pci_ss_info_168c_0013_1468_0408 = + {0x1468, 0x0408, pci_subsys_168c_0013_1468_0408, 0}; +#undef pci_ss_info_1468_0408 +#define pci_ss_info_1468_0408 pci_ss_info_168c_0013_1468_0408 static const pciSubsystemInfo pci_ss_info_168c_0013_14b7_0a60 = {0x14b7, 0x0a60, pci_subsys_168c_0013_14b7_0a60, 0}; #undef pci_ss_info_14b7_0a60 @@ -41527,6 +46706,10 @@ static const pciSubsystemInfo pci_ss_info_168c_0013_168c_1042 = {0x168c, 0x1042, pci_subsys_168c_0013_168c_1042, 0}; #undef pci_ss_info_168c_1042 #define pci_ss_info_168c_1042 pci_ss_info_168c_0013_168c_1042 +static const pciSubsystemInfo pci_ss_info_168c_0013_168c_1051 = + {0x168c, 0x1051, pci_subsys_168c_0013_168c_1051, 0}; +#undef pci_ss_info_168c_1051 +#define pci_ss_info_168c_1051 pci_ss_info_168c_0013_168c_1051 static const pciSubsystemInfo pci_ss_info_168c_0013_168c_2026 = {0x168c, 0x2026, pci_subsys_168c_0013_168c_2026, 0}; #undef pci_ss_info_168c_2026 @@ -41627,10 +46810,30 @@ static const pciSubsystemInfo pci_ss_info_168c_001b_168c_2063 = {0x168c, 0x2063, pci_subsys_168c_001b_168c_2063, 0}; #undef pci_ss_info_168c_2063 #define pci_ss_info_168c_2063 pci_ss_info_168c_001b_168c_2063 +static const pciSubsystemInfo pci_ss_info_168c_001b_185f_1600 = + {0x185f, 0x1600, pci_subsys_168c_001b_185f_1600, 0}; +#undef pci_ss_info_185f_1600 +#define pci_ss_info_185f_1600 pci_ss_info_168c_001b_185f_1600 static const pciSubsystemInfo pci_ss_info_168c_001b_a727_6804 = {0xa727, 0x6804, pci_subsys_168c_001b_a727_6804, 0}; #undef pci_ss_info_a727_6804 #define pci_ss_info_a727_6804 pci_ss_info_168c_001b_a727_6804 +static const pciSubsystemInfo pci_ss_info_168c_001c_168c_3061 = + {0x168c, 0x3061, pci_subsys_168c_001c_168c_3061, 0}; +#undef pci_ss_info_168c_3061 +#define pci_ss_info_168c_3061 pci_ss_info_168c_001c_168c_3061 +static const pciSubsystemInfo pci_ss_info_168c_001c_168c_3062 = + {0x168c, 0x3062, pci_subsys_168c_001c_168c_3062, 0}; +#undef pci_ss_info_168c_3062 +#define pci_ss_info_168c_3062 pci_ss_info_168c_001c_168c_3062 +static const pciSubsystemInfo pci_ss_info_168c_001c_168c_3063 = + {0x168c, 0x3063, pci_subsys_168c_001c_168c_3063, 0}; +#undef pci_ss_info_168c_3063 +#define pci_ss_info_168c_3063 pci_ss_info_168c_001c_168c_3063 +static const pciSubsystemInfo pci_ss_info_168c_001c_168c_3065 = + {0x168c, 0x3065, pci_subsys_168c_001c_168c_3065, 0}; +#undef pci_ss_info_168c_3065 +#define pci_ss_info_168c_3065 pci_ss_info_168c_001c_168c_3065 static const pciSubsystemInfo pci_ss_info_168c_1014_1014_058a = {0x1014, 0x058a, pci_subsys_168c_1014_1014_058a, 0}; #undef pci_ss_info_1014_058a @@ -41671,6 +46874,12 @@ static const pciSubsystemInfo pci_ss_info_17d5_5831_10a9_8024 = {0x10a9, 0x8024, pci_subsys_17d5_5831_10a9_8024, 0}; #undef pci_ss_info_10a9_8024 #define pci_ss_info_10a9_8024 pci_ss_info_17d5_5831_10a9_8024 +#endif +static const pciSubsystemInfo pci_ss_info_17d5_5832_103c_1337 = + {0x103c, 0x1337, pci_subsys_17d5_5832_103c_1337, 0}; +#undef pci_ss_info_103c_1337 +#define pci_ss_info_103c_1337 pci_ss_info_17d5_5832_103c_1337 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_17d5_5832_10a9_8021 = {0x10a9, 0x8021, pci_subsys_17d5_5832_10a9_8021, 0}; #undef pci_ss_info_10a9_8021 @@ -41725,6 +46934,10 @@ static const pciSubsystemInfo pci_ss_info_1814_0201_1458_e931 = {0x1458, 0xe931, pci_subsys_1814_0201_1458_e931, 0}; #undef pci_ss_info_1458_e931 #define pci_ss_info_1458_e931 pci_ss_info_1814_0201_1458_e931 +static const pciSubsystemInfo pci_ss_info_1814_0201_1462_6833 = + {0x1462, 0x6833, pci_subsys_1814_0201_1462_6833, 0}; +#undef pci_ss_info_1462_6833 +#define pci_ss_info_1462_6833 pci_ss_info_1814_0201_1462_6833 static const pciSubsystemInfo pci_ss_info_1814_0201_1462_6835 = {0x1462, 0x6835, pci_subsys_1814_0201_1462_6835, 0}; #undef pci_ss_info_1462_6835 @@ -41753,6 +46966,10 @@ static const pciSubsystemInfo pci_ss_info_1814_0301_1186_3c09 = {0x1186, 0x3c09, pci_subsys_1814_0301_1186_3c09, 0}; #undef pci_ss_info_1186_3c09 #define pci_ss_info_1186_3c09 pci_ss_info_1814_0301_1186_3c09 +static const pciSubsystemInfo pci_ss_info_1814_0301_13d1_abe3 = + {0x13d1, 0xabe3, pci_subsys_1814_0301_13d1_abe3, 0}; +#undef pci_ss_info_13d1_abe3 +#define pci_ss_info_13d1_abe3 pci_ss_info_1814_0301_13d1_abe3 static const pciSubsystemInfo pci_ss_info_1814_0301_1458_e934 = {0x1458, 0xe934, pci_subsys_1814_0301_1458_e934, 0}; #undef pci_ss_info_1458_e934 @@ -41761,6 +46978,10 @@ static const pciSubsystemInfo pci_ss_info_1814_0301_1737_0055 = {0x1737, 0x0055, pci_subsys_1814_0301_1737_0055, 0}; #undef pci_ss_info_1737_0055 #define pci_ss_info_1737_0055 pci_ss_info_1814_0301_1737_0055 +static const pciSubsystemInfo pci_ss_info_1814_0301_1814_2561 = + {0x1814, 0x2561, pci_subsys_1814_0301_1814_2561, 0}; +#undef pci_ss_info_1814_2561 +#define pci_ss_info_1814_2561 pci_ss_info_1814_0301_1814_2561 static const pciSubsystemInfo pci_ss_info_1814_0302_1186_3c08 = {0x1186, 0x3c08, pci_subsys_1814_0302_1186_3c08, 0}; #undef pci_ss_info_1186_3c08 @@ -41947,6 +47168,20 @@ static const pciSubsystemInfo pci_ss_info_4005_4000_4005_4000 = #undef pci_ss_info_4005_4000 #define pci_ss_info_4005_4000 pci_ss_info_4005_4000_4005_4000 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_4040_0001_103c_7047 = + {0x103c, 0x7047, pci_subsys_4040_0001_103c_7047, 0}; +#undef pci_ss_info_103c_7047 +#define pci_ss_info_103c_7047 pci_ss_info_4040_0001_103c_7047 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_4040_0001_103c_7048 = + {0x103c, 0x7048, pci_subsys_4040_0001_103c_7048, 0}; +#undef pci_ss_info_103c_7048 +#define pci_ss_info_103c_7048 pci_ss_info_4040_0001_103c_7048 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_4444_0016_0070_0003 = {0x0070, 0x0003, pci_subsys_4444_0016_0070_0003, 0}; #undef pci_ss_info_0070_0003 @@ -42007,6 +47242,12 @@ static const pciSubsystemInfo pci_ss_info_4444_0016_0270_0801 = {0x0270, 0x0801, pci_subsys_4444_0016_0270_0801, 0}; #undef pci_ss_info_0270_0801 #define pci_ss_info_0270_0801 pci_ss_info_4444_0016_0270_0801 +#endif +static const pciSubsystemInfo pci_ss_info_4444_0016_104d_013d = + {0x104d, 0x013d, pci_subsys_4444_0016_104d_013d, 0}; +#undef pci_ss_info_104d_013d +#define pci_ss_info_104d_013d pci_ss_info_4444_0016_104d_013d +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_4444_0016_10fc_d038 = {0x10fc, 0xd038, pci_subsys_4444_0016_10fc_d038, 0}; #undef pci_ss_info_10fc_d038 @@ -42268,6 +47509,10 @@ static const pciSubsystemInfo pci_ss_info_5333_8c2e_1014_01fc = {0x1014, 0x01fc, pci_subsys_5333_8c2e_1014_01fc, 0}; #undef pci_ss_info_1014_01fc #define pci_ss_info_1014_01fc pci_ss_info_5333_8c2e_1014_01fc +static const pciSubsystemInfo pci_ss_info_5333_8e48_5333_0130 = + {0x5333, 0x0130, pci_subsys_5333_8e48_5333_0130, 0}; +#undef pci_ss_info_5333_0130 +#define pci_ss_info_5333_0130 pci_ss_info_5333_8e48_5333_0130 static const pciSubsystemInfo pci_ss_info_5333_9102_1092_5932 = {0x1092, 0x5932, pci_subsys_5333_9102_1092_5932, 0}; #undef pci_ss_info_1092_5932 @@ -42300,6 +47545,18 @@ static const pciSubsystemInfo pci_ss_info_5333_9102_1092_5a57 = {0x1092, 0x5a57, pci_subsys_5333_9102_1092_5a57, 0}; #undef pci_ss_info_1092_5a57 #define pci_ss_info_1092_5a57 pci_ss_info_5333_9102_1092_5a57 +static const pciSubsystemInfo pci_ss_info_8086_0326_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_0326_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_0326_1775_1100 +static const pciSubsystemInfo pci_ss_info_8086_0327_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_0327_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_0327_1775_1100 +static const pciSubsystemInfo pci_ss_info_8086_0600_8086_0136 = + {0x8086, 0x0136, pci_subsys_8086_0600_8086_0136, 0}; +#undef pci_ss_info_8086_0136 +#define pci_ss_info_8086_0136 pci_ss_info_8086_0600_8086_0136 static const pciSubsystemInfo pci_ss_info_8086_0600_8086_01af = {0x8086, 0x01af, pci_subsys_8086_0600_8086_01af, 0}; #undef pci_ss_info_8086_01af @@ -42384,6 +47641,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1008_1014_0269 = {0x1014, 0x0269, pci_subsys_8086_1008_1014_0269, 0}; #undef pci_ss_info_1014_0269 #define pci_ss_info_1014_0269 pci_ss_info_8086_1008_1014_0269 +static const pciSubsystemInfo pci_ss_info_8086_1008_1028_011b = + {0x1028, 0x011b, pci_subsys_8086_1008_1028_011b, 0}; +#undef pci_ss_info_1028_011b +#define pci_ss_info_1028_011b pci_ss_info_8086_1008_1028_011b static const pciSubsystemInfo pci_ss_info_8086_1008_1028_011c = {0x1028, 0x011c, pci_subsys_8086_1008_1028_011c, 0}; #undef pci_ss_info_1028_011c @@ -42492,6 +47753,10 @@ static const pciSubsystemInfo pci_ss_info_8086_100f_1014_028e = {0x1014, 0x028e, pci_subsys_8086_100f_1014_028e, 0}; #undef pci_ss_info_1014_028e #define pci_ss_info_1014_028e pci_ss_info_8086_100f_1014_028e +static const pciSubsystemInfo pci_ss_info_8086_100f_15ad_0750 = + {0x15ad, 0x0750, pci_subsys_8086_100f_15ad_0750, 0}; +#undef pci_ss_info_15ad_0750 +#define pci_ss_info_15ad_0750 pci_ss_info_8086_100f_15ad_0750 static const pciSubsystemInfo pci_ss_info_8086_100f_8086_1000 = {0x8086, 0x1000, pci_subsys_8086_100f_8086_1000, 0}; #undef pci_ss_info_8086_1000 @@ -42508,6 +47773,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1010_1014_027c = {0x1014, 0x027c, pci_subsys_8086_1010_1014_027c, 0}; #undef pci_ss_info_1014_027c #define pci_ss_info_1014_027c pci_ss_info_8086_1010_1014_027c +static const pciSubsystemInfo pci_ss_info_8086_1010_15ad_0760 = + {0x15ad, 0x0760, pci_subsys_8086_1010_15ad_0760, 0}; +#undef pci_ss_info_15ad_0760 +#define pci_ss_info_15ad_0760 pci_ss_info_8086_1010_15ad_0760 static const pciSubsystemInfo pci_ss_info_8086_1010_18fb_7872 = {0x18fb, 0x7872, pci_subsys_8086_1010_18fb_7872, 0}; #undef pci_ss_info_18fb_7872 @@ -42740,10 +48009,18 @@ static const pciSubsystemInfo pci_ss_info_8086_1039_1014_0267 = {0x1014, 0x0267, pci_subsys_8086_1039_1014_0267, 0}; #undef pci_ss_info_1014_0267 #define pci_ss_info_1014_0267 pci_ss_info_8086_1039_1014_0267 +static const pciSubsystemInfo pci_ss_info_8086_1039_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_1039_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_1039_114a_0582 static const pciSubsystemInfo pci_ss_info_8086_103d_1014_0522 = {0x1014, 0x0522, pci_subsys_8086_103d_1014_0522, 0}; #undef pci_ss_info_1014_0522 #define pci_ss_info_1014_0522 pci_ss_info_8086_103d_1014_0522 +static const pciSubsystemInfo pci_ss_info_8086_103d_8086_103d = + {0x8086, 0x103d, pci_subsys_8086_103d_8086_103d, 0}; +#undef pci_ss_info_8086_103d +#define pci_ss_info_8086_103d pci_ss_info_8086_103d_8086_103d static const pciSubsystemInfo pci_ss_info_8086_1040_16be_1040 = {0x16be, 0x1040, pci_subsys_8086_1040_16be_1040, 0}; #undef pci_ss_info_16be_1040 @@ -42752,6 +48029,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1043_103c_08b0 = {0x103c, 0x08b0, pci_subsys_8086_1043_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 #define pci_ss_info_103c_08b0 pci_ss_info_8086_1043_103c_08b0 +static const pciSubsystemInfo pci_ss_info_8086_1043_2527_8086 = + {0x2527, 0x8086, pci_subsys_8086_1043_2527_8086, 0}; +#undef pci_ss_info_2527_8086 +#define pci_ss_info_2527_8086 pci_ss_info_8086_1043_2527_8086 static const pciSubsystemInfo pci_ss_info_8086_1043_8086_2522 = {0x8086, 0x2522, pci_subsys_8086_1043_8086_2522, 0}; #undef pci_ss_info_8086_2522 @@ -42760,6 +48041,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1043_8086_2527 = {0x8086, 0x2527, pci_subsys_8086_1043_8086_2527, 0}; #undef pci_ss_info_8086_2527 #define pci_ss_info_8086_2527 pci_ss_info_8086_1043_8086_2527 +static const pciSubsystemInfo pci_ss_info_8086_1043_8086_2561 = + {0x8086, 0x2561, pci_subsys_8086_1043_8086_2561, 0}; +#undef pci_ss_info_8086_2561 +#define pci_ss_info_8086_2561 pci_ss_info_8086_1043_8086_2561 static const pciSubsystemInfo pci_ss_info_8086_1043_8086_2581 = {0x8086, 0x2581, pci_subsys_8086_1043_8086_2581, 0}; #undef pci_ss_info_8086_2581 @@ -42772,6 +48057,18 @@ static const pciSubsystemInfo pci_ss_info_8086_1048_8086_a11f = {0x8086, 0xa11f, pci_subsys_8086_1048_8086_a11f, 0}; #undef pci_ss_info_8086_a11f #define pci_ss_info_8086_a11f pci_ss_info_8086_1048_8086_a11f +static const pciSubsystemInfo pci_ss_info_8086_1049_17aa_20b9 = + {0x17aa, 0x20b9, pci_subsys_8086_1049_17aa_20b9, 0}; +#undef pci_ss_info_17aa_20b9 +#define pci_ss_info_17aa_20b9 pci_ss_info_8086_1049_17aa_20b9 +static const pciSubsystemInfo pci_ss_info_8086_1049_30c5_103c = + {0x30c5, 0x103c, pci_subsys_8086_1049_30c5_103c, 0}; +#undef pci_ss_info_30c5_103c +#define pci_ss_info_30c5_103c pci_ss_info_8086_1049_30c5_103c +static const pciSubsystemInfo pci_ss_info_8086_1050_1028_019d = + {0x1028, 0x019d, pci_subsys_8086_1050_1028_019d, 0}; +#undef pci_ss_info_1028_019d +#define pci_ss_info_1028_019d pci_ss_info_8086_1050_1028_019d static const pciSubsystemInfo pci_ss_info_8086_1050_1462_728c = {0x1462, 0x728c, pci_subsys_8086_1050_1462_728c, 0}; #undef pci_ss_info_1462_728c @@ -42796,6 +48093,14 @@ static const pciSubsystemInfo pci_ss_info_8086_105e_103c_7044 = {0x103c, 0x7044, pci_subsys_8086_105e_103c_7044, 0}; #undef pci_ss_info_103c_7044 #define pci_ss_info_103c_7044 pci_ss_info_8086_105e_103c_7044 +static const pciSubsystemInfo pci_ss_info_8086_105e_103c_704e = + {0x103c, 0x704e, pci_subsys_8086_105e_103c_704e, 0}; +#undef pci_ss_info_103c_704e +#define pci_ss_info_103c_704e pci_ss_info_8086_105e_103c_704e +static const pciSubsystemInfo pci_ss_info_8086_105e_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_105e_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_105e_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_105e_1775_6003 = {0x1775, 0x6003, pci_subsys_8086_105e_1775_6003, 0}; #undef pci_ss_info_1775_6003 @@ -42824,6 +48129,10 @@ static const pciSubsystemInfo pci_ss_info_8086_105e_8086_135e = {0x8086, 0x135e, pci_subsys_8086_105e_8086_135e, 0}; #undef pci_ss_info_8086_135e #define pci_ss_info_8086_135e pci_ss_info_8086_105e_8086_135e +static const pciSubsystemInfo pci_ss_info_8086_105f_103c_704f = + {0x103c, 0x704f, pci_subsys_8086_105f_103c_704f, 0}; +#undef pci_ss_info_103c_704f +#define pci_ss_info_103c_704f pci_ss_info_8086_105f_103c_704f static const pciSubsystemInfo pci_ss_info_8086_105f_8086_115f = {0x8086, 0x115f, pci_subsys_8086_105f_8086_115f, 0}; #undef pci_ss_info_8086_115f @@ -42868,10 +48177,18 @@ static const pciSubsystemInfo pci_ss_info_8086_1076_1028_0165 = {0x1028, 0x0165, pci_subsys_8086_1076_1028_0165, 0}; #undef pci_ss_info_1028_0165 #define pci_ss_info_1028_0165 pci_ss_info_8086_1076_1028_0165 +static const pciSubsystemInfo pci_ss_info_8086_1076_1028_016d = + {0x1028, 0x016d, pci_subsys_8086_1076_1028_016d, 0}; +#undef pci_ss_info_1028_016d +#define pci_ss_info_1028_016d pci_ss_info_8086_1076_1028_016d static const pciSubsystemInfo pci_ss_info_8086_1076_1028_019a = {0x1028, 0x019a, pci_subsys_8086_1076_1028_019a, 0}; #undef pci_ss_info_1028_019a #define pci_ss_info_1028_019a pci_ss_info_8086_1076_1028_019a +static const pciSubsystemInfo pci_ss_info_8086_1076_1028_106d = + {0x1028, 0x106d, pci_subsys_8086_1076_1028_106d, 0}; +#undef pci_ss_info_1028_106d +#define pci_ss_info_1028_106d pci_ss_info_8086_1076_1028_106d static const pciSubsystemInfo pci_ss_info_8086_1076_8086_0076 = {0x8086, 0x0076, pci_subsys_8086_1076_8086_0076, 0}; #undef pci_ss_info_8086_0076 @@ -42980,6 +48297,10 @@ static const pciSubsystemInfo pci_ss_info_8086_107d_8086_1082 = {0x8086, 0x1082, pci_subsys_8086_107d_8086_1082, 0}; #undef pci_ss_info_8086_1082 #define pci_ss_info_8086_1082 pci_ss_info_8086_107d_8086_1082 +static const pciSubsystemInfo pci_ss_info_8086_107d_8086_1084 = + {0x8086, 0x1084, pci_subsys_8086_107d_8086_1084, 0}; +#undef pci_ss_info_8086_1084 +#define pci_ss_info_8086_1084 pci_ss_info_8086_107d_8086_1084 static const pciSubsystemInfo pci_ss_info_8086_107d_8086_1092 = {0x8086, 0x1092, pci_subsys_8086_107d_8086_1092, 0}; #undef pci_ss_info_8086_1092 @@ -42988,6 +48309,10 @@ static const pciSubsystemInfo pci_ss_info_8086_107e_8086_1084 = {0x8086, 0x1084, pci_subsys_8086_107e_8086_1084, 0}; #undef pci_ss_info_8086_1084 #define pci_ss_info_8086_1084 pci_ss_info_8086_107e_8086_1084 +static const pciSubsystemInfo pci_ss_info_8086_107e_8086_1085 = + {0x8086, 0x1085, pci_subsys_8086_107e_8086_1085, 0}; +#undef pci_ss_info_8086_1085 +#define pci_ss_info_8086_1085 pci_ss_info_8086_107e_8086_1085 static const pciSubsystemInfo pci_ss_info_8086_107e_8086_1094 = {0x8086, 0x1094, pci_subsys_8086_107e_8086_1094, 0}; #undef pci_ss_info_8086_1094 @@ -43020,6 +48345,14 @@ static const pciSubsystemInfo pci_ss_info_8086_109a_8086_109a = {0x8086, 0x109a, pci_subsys_8086_109a_8086_109a, 0}; #undef pci_ss_info_8086_109a #define pci_ss_info_8086_109a pci_ss_info_8086_109a_8086_109a +static const pciSubsystemInfo pci_ss_info_8086_109a_8086_309c = + {0x8086, 0x309c, pci_subsys_8086_109a_8086_309c, 0}; +#undef pci_ss_info_8086_309c +#define pci_ss_info_8086_309c pci_ss_info_8086_109a_8086_309c +static const pciSubsystemInfo pci_ss_info_8086_109a_8086_30a5 = + {0x8086, 0x30a5, pci_subsys_8086_109a_8086_30a5, 0}; +#undef pci_ss_info_8086_30a5 +#define pci_ss_info_8086_30a5 pci_ss_info_8086_109a_8086_30a5 static const pciSubsystemInfo pci_ss_info_8086_109e_8086_a01f = {0x8086, 0xa01f, pci_subsys_8086_109e_8086_a01f, 0}; #undef pci_ss_info_8086_a01f @@ -43036,6 +48369,18 @@ static const pciSubsystemInfo pci_ss_info_8086_10a4_8086_11a4 = {0x8086, 0x11a4, pci_subsys_8086_10a4_8086_11a4, 0}; #undef pci_ss_info_8086_11a4 #define pci_ss_info_8086_11a4 pci_ss_info_8086_10a4_8086_11a4 +static const pciSubsystemInfo pci_ss_info_8086_10a5_8086_10a5 = + {0x8086, 0x10a5, pci_subsys_8086_10a5_8086_10a5, 0}; +#undef pci_ss_info_8086_10a5 +#define pci_ss_info_8086_10a5 pci_ss_info_8086_10a5_8086_10a5 +static const pciSubsystemInfo pci_ss_info_8086_10a5_8086_10a6 = + {0x8086, 0x10a6, pci_subsys_8086_10a5_8086_10a6, 0}; +#undef pci_ss_info_8086_10a6 +#define pci_ss_info_8086_10a6 pci_ss_info_8086_10a5_8086_10a6 +static const pciSubsystemInfo pci_ss_info_8086_10a7_8086_10a8 = + {0x8086, 0x10a8, pci_subsys_8086_10a7_8086_10a8, 0}; +#undef pci_ss_info_8086_10a8 +#define pci_ss_info_8086_10a8 pci_ss_info_8086_10a7_8086_10a8 static const pciSubsystemInfo pci_ss_info_8086_10b5_103c_3109 = {0x103c, 0x3109, pci_subsys_8086_10b5_103c_3109, 0}; #undef pci_ss_info_103c_3109 @@ -43048,6 +48393,10 @@ static const pciSubsystemInfo pci_ss_info_8086_10b5_8086_1199 = {0x8086, 0x1199, pci_subsys_8086_10b5_8086_1199, 0}; #undef pci_ss_info_8086_1199 #define pci_ss_info_8086_1199 pci_ss_info_8086_10b5_8086_1199 +static const pciSubsystemInfo pci_ss_info_8086_10b9_103c_704a = + {0x103c, 0x704a, pci_subsys_8086_10b9_103c_704a, 0}; +#undef pci_ss_info_103c_704a +#define pci_ss_info_103c_704a pci_ss_info_8086_10b9_103c_704a static const pciSubsystemInfo pci_ss_info_8086_10b9_8086_1083 = {0x8086, 0x1083, pci_subsys_8086_10b9_8086_1083, 0}; #undef pci_ss_info_8086_1083 @@ -43056,6 +48405,10 @@ static const pciSubsystemInfo pci_ss_info_8086_10b9_8086_1093 = {0x8086, 0x1093, pci_subsys_8086_10b9_8086_1093, 0}; #undef pci_ss_info_8086_1093 #define pci_ss_info_8086_1093 pci_ss_info_8086_10b9_8086_1093 +static const pciSubsystemInfo pci_ss_info_8086_10bc_103c_704b = + {0x103c, 0x704b, pci_subsys_8086_10bc_103c_704b, 0}; +#undef pci_ss_info_103c_704b +#define pci_ss_info_103c_704b pci_ss_info_8086_10bc_103c_704b static const pciSubsystemInfo pci_ss_info_8086_10bc_8086_10bc = {0x8086, 0x10bc, pci_subsys_8086_10bc_8086_10bc, 0}; #undef pci_ss_info_8086_10bc @@ -43064,6 +48417,54 @@ static const pciSubsystemInfo pci_ss_info_8086_10bc_8086_11bc = {0x8086, 0x11bc, pci_subsys_8086_10bc_8086_11bc, 0}; #undef pci_ss_info_8086_11bc #define pci_ss_info_8086_11bc pci_ss_info_8086_10bc_8086_11bc +static const pciSubsystemInfo pci_ss_info_8086_10bd_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_10bd_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_10bd_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_10bd_3039_17aa = + {0x3039, 0x17aa, pci_subsys_8086_10bd_3039_17aa, 0}; +#undef pci_ss_info_3039_17aa +#define pci_ss_info_3039_17aa pci_ss_info_8086_10bd_3039_17aa +static const pciSubsystemInfo pci_ss_info_8086_10c6_8086_a05f = + {0x8086, 0xa05f, pci_subsys_8086_10c6_8086_a05f, 0}; +#undef pci_ss_info_8086_a05f +#define pci_ss_info_8086_a05f pci_ss_info_8086_10c6_8086_a05f +static const pciSubsystemInfo pci_ss_info_8086_10c6_8086_a15f = + {0x8086, 0xa15f, pci_subsys_8086_10c6_8086_a15f, 0}; +#undef pci_ss_info_8086_a15f +#define pci_ss_info_8086_a15f pci_ss_info_8086_10c6_8086_a15f +static const pciSubsystemInfo pci_ss_info_8086_10c7_8086_a05f = + {0x8086, 0xa05f, pci_subsys_8086_10c7_8086_a05f, 0}; +#undef pci_ss_info_8086_a05f +#define pci_ss_info_8086_a05f pci_ss_info_8086_10c7_8086_a05f +static const pciSubsystemInfo pci_ss_info_8086_10c7_8086_a15f = + {0x8086, 0xa15f, pci_subsys_8086_10c7_8086_a15f, 0}; +#undef pci_ss_info_8086_a15f +#define pci_ss_info_8086_a15f pci_ss_info_8086_10c7_8086_a15f +static const pciSubsystemInfo pci_ss_info_8086_10c7_8086_a16f = + {0x8086, 0xa16f, pci_subsys_8086_10c7_8086_a16f, 0}; +#undef pci_ss_info_8086_a16f +#define pci_ss_info_8086_a16f pci_ss_info_8086_10c7_8086_a16f +static const pciSubsystemInfo pci_ss_info_8086_10d6_8086_10d6 = + {0x8086, 0x10d6, pci_subsys_8086_10d6_8086_10d6, 0}; +#undef pci_ss_info_8086_10d6 +#define pci_ss_info_8086_10d6 pci_ss_info_8086_10d6_8086_10d6 +static const pciSubsystemInfo pci_ss_info_8086_10d6_8086_145a = + {0x8086, 0x145a, pci_subsys_8086_10d6_8086_145a, 0}; +#undef pci_ss_info_8086_145a +#define pci_ss_info_8086_145a pci_ss_info_8086_10d6_8086_145a +static const pciSubsystemInfo pci_ss_info_8086_10d9_103c_1716 = + {0x103c, 0x1716, pci_subsys_8086_10d9_103c_1716, 0}; +#undef pci_ss_info_103c_1716 +#define pci_ss_info_103c_1716 pci_ss_info_8086_10d9_103c_1716 +static const pciSubsystemInfo pci_ss_info_8086_10da_103c_1717 = + {0x103c, 0x1717, pci_subsys_8086_10da_103c_1717, 0}; +#undef pci_ss_info_103c_1717 +#define pci_ss_info_103c_1717 pci_ss_info_8086_10da_103c_1717 +static const pciSubsystemInfo pci_ss_info_8086_10e2_8086_10e2 = + {0x8086, 0x10e2, pci_subsys_8086_10e2_8086_10e2, 0}; +#undef pci_ss_info_8086_10e2 +#define pci_ss_info_8086_10e2 pci_ss_info_8086_10e2_8086_10e2 static const pciSubsystemInfo pci_ss_info_8086_1130_1025_1016 = {0x1025, 0x1016, pci_subsys_8086_1130_1025_1016, 0}; #undef pci_ss_info_1025_1016 @@ -43088,6 +48489,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1132_1025_1016 = {0x1025, 0x1016, pci_subsys_8086_1132_1025_1016, 0}; #undef pci_ss_info_1025_1016 #define pci_ss_info_1025_1016 pci_ss_info_8086_1132_1025_1016 +static const pciSubsystemInfo pci_ss_info_8086_1132_103c_2001 = + {0x103c, 0x2001, pci_subsys_8086_1132_103c_2001, 0}; +#undef pci_ss_info_103c_2001 +#define pci_ss_info_103c_2001 pci_ss_info_8086_1132_103c_2001 static const pciSubsystemInfo pci_ss_info_8086_1132_104d_80df = {0x104d, 0x80df, pci_subsys_8086_1132_104d_80df, 0}; #undef pci_ss_info_104d_80df @@ -43356,6 +48761,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1229_110a_008b = {0x110a, 0x008b, pci_subsys_8086_1229_110a_008b, 0}; #undef pci_ss_info_110a_008b #define pci_ss_info_110a_008b pci_ss_info_8086_1229_110a_008b +static const pciSubsystemInfo pci_ss_info_8086_1229_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_1229_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_1229_114a_0582 static const pciSubsystemInfo pci_ss_info_8086_1229_1179_0001 = {0x1179, 0x0001, pci_subsys_8086_1229_1179_0001, 0}; #undef pci_ss_info_1179_0001 @@ -43396,6 +48805,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1229_1668_1100 = {0x1668, 0x1100, pci_subsys_8086_1229_1668_1100, 0}; #undef pci_ss_info_1668_1100 #define pci_ss_info_1668_1100 pci_ss_info_8086_1229_1668_1100 +static const pciSubsystemInfo pci_ss_info_8086_1229_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_1229_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_1229_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_1229_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_1229_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -43872,6 +49285,18 @@ static const pciSubsystemInfo pci_ss_info_8086_1a30_1028_010e = {0x1028, 0x010e, pci_subsys_8086_1a30_1028_010e, 0}; #undef pci_ss_info_1028_010e #define pci_ss_info_1028_010e pci_ss_info_8086_1a30_1028_010e +static const pciSubsystemInfo pci_ss_info_8086_1a30_15d9_3280 = + {0x15d9, 0x3280, pci_subsys_8086_1a30_15d9_3280, 0}; +#undef pci_ss_info_15d9_3280 +#define pci_ss_info_15d9_3280 pci_ss_info_8086_1a30_15d9_3280 +static const pciSubsystemInfo pci_ss_info_8086_1a48_8086_a01f = + {0x8086, 0xa01f, pci_subsys_8086_1a48_8086_a01f, 0}; +#undef pci_ss_info_8086_a01f +#define pci_ss_info_8086_a01f pci_ss_info_8086_1a48_8086_a01f +static const pciSubsystemInfo pci_ss_info_8086_1a48_8086_a11f = + {0x8086, 0xa11f, pci_subsys_8086_1a48_8086_a11f, 0}; +#undef pci_ss_info_8086_a11f +#define pci_ss_info_8086_a11f pci_ss_info_8086_1a48_8086_a11f static const pciSubsystemInfo pci_ss_info_8086_1b48_8086_a01f = {0x8086, 0xa01f, pci_subsys_8086_1b48_8086_a01f, 0}; #undef pci_ss_info_8086_a01f @@ -43884,6 +49309,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2415_1028_0095 = {0x1028, 0x0095, pci_subsys_8086_2415_1028_0095, 0}; #undef pci_ss_info_1028_0095 #define pci_ss_info_1028_0095 pci_ss_info_8086_2415_1028_0095 +static const pciSubsystemInfo pci_ss_info_8086_2415_1028_00b4 = + {0x1028, 0x00b4, pci_subsys_8086_2415_1028_00b4, 0}; +#undef pci_ss_info_1028_00b4 +#define pci_ss_info_1028_00b4 pci_ss_info_8086_2415_1028_00b4 static const pciSubsystemInfo pci_ss_info_8086_2415_110a_0051 = {0x110a, 0x0051, pci_subsys_8086_2415_110a_0051, 0}; #undef pci_ss_info_110a_0051 @@ -43932,6 +49361,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2442_1028_010e = {0x1028, 0x010e, pci_subsys_8086_2442_1028_010e, 0}; #undef pci_ss_info_1028_010e #define pci_ss_info_1028_010e pci_ss_info_8086_2442_1028_010e +static const pciSubsystemInfo pci_ss_info_8086_2442_103c_126f = + {0x103c, 0x126f, pci_subsys_8086_2442_103c_126f, 0}; +#undef pci_ss_info_103c_126f +#define pci_ss_info_103c_126f pci_ss_info_8086_2442_103c_126f static const pciSubsystemInfo pci_ss_info_8086_2442_1043_8027 = {0x1043, 0x8027, pci_subsys_8086_2442_1043_8027, 0}; #undef pci_ss_info_1043_8027 @@ -43972,6 +49405,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2443_1028_010e = {0x1028, 0x010e, pci_subsys_8086_2443_1028_010e, 0}; #undef pci_ss_info_1028_010e #define pci_ss_info_1028_010e pci_ss_info_8086_2443_1028_010e +static const pciSubsystemInfo pci_ss_info_8086_2443_103c_126f = + {0x103c, 0x126f, pci_subsys_8086_2443_103c_126f, 0}; +#undef pci_ss_info_103c_126f +#define pci_ss_info_103c_126f pci_ss_info_8086_2443_103c_126f static const pciSubsystemInfo pci_ss_info_8086_2443_1043_8027 = {0x1043, 0x8027, pci_subsys_8086_2443_1043_8027, 0}; #undef pci_ss_info_1043_8027 @@ -43984,6 +49421,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2443_147b_0507 = {0x147b, 0x0507, pci_subsys_8086_2443_147b_0507, 0}; #undef pci_ss_info_147b_0507 #define pci_ss_info_147b_0507 pci_ss_info_8086_2443_147b_0507 +static const pciSubsystemInfo pci_ss_info_8086_2443_15d9_3280 = + {0x15d9, 0x3280, pci_subsys_8086_2443_15d9_3280, 0}; +#undef pci_ss_info_15d9_3280 +#define pci_ss_info_15d9_3280 pci_ss_info_8086_2443_15d9_3280 static const pciSubsystemInfo pci_ss_info_8086_2443_8086_4532 = {0x8086, 0x4532, pci_subsys_8086_2443_8086_4532, 0}; #undef pci_ss_info_8086_4532 @@ -44008,6 +49449,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2444_1028_010e = {0x1028, 0x010e, pci_subsys_8086_2444_1028_010e, 0}; #undef pci_ss_info_1028_010e #define pci_ss_info_1028_010e pci_ss_info_8086_2444_1028_010e +static const pciSubsystemInfo pci_ss_info_8086_2444_103c_126f = + {0x103c, 0x126f, pci_subsys_8086_2444_103c_126f, 0}; +#undef pci_ss_info_103c_126f +#define pci_ss_info_103c_126f pci_ss_info_8086_2444_103c_126f static const pciSubsystemInfo pci_ss_info_8086_2444_1043_8027 = {0x1043, 0x8027, pci_subsys_8086_2444_1043_8027, 0}; #undef pci_ss_info_1043_8027 @@ -44044,6 +49489,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2445_1025_1016 = {0x1025, 0x1016, pci_subsys_8086_2445_1025_1016, 0}; #undef pci_ss_info_1025_1016 #define pci_ss_info_1025_1016 pci_ss_info_8086_2445_1025_1016 +static const pciSubsystemInfo pci_ss_info_8086_2445_103c_126f = + {0x103c, 0x126f, pci_subsys_8086_2445_103c_126f, 0}; +#undef pci_ss_info_103c_126f +#define pci_ss_info_103c_126f pci_ss_info_8086_2445_103c_126f static const pciSubsystemInfo pci_ss_info_8086_2445_104d_80df = {0x104d, 0x80df, pci_subsys_8086_2445_104d_80df, 0}; #undef pci_ss_info_104d_80df @@ -44068,10 +49517,18 @@ static const pciSubsystemInfo pci_ss_info_8086_2446_104d_80df = {0x104d, 0x80df, pci_subsys_8086_2446_104d_80df, 0}; #undef pci_ss_info_104d_80df #define pci_ss_info_104d_80df pci_ss_info_8086_2446_104d_80df +static const pciSubsystemInfo pci_ss_info_8086_2448_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_2448_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_2448_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_2448_103c_099c = {0x103c, 0x099c, pci_subsys_8086_2448_103c_099c, 0}; #undef pci_ss_info_103c_099c #define pci_ss_info_103c_099c pci_ss_info_8086_2448_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2448_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_2448_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_2448_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_2448_144d_c00c = {0x144d, 0xc00c, pci_subsys_8086_2448_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -44080,6 +49537,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2448_1734_1055 = {0x1734, 0x1055, pci_subsys_8086_2448_1734_1055, 0}; #undef pci_ss_info_1734_1055 #define pci_ss_info_1734_1055 pci_ss_info_8086_2448_1734_1055 +static const pciSubsystemInfo pci_ss_info_8086_2448_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2448_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2448_e4bf_cc47 static const pciSubsystemInfo pci_ss_info_8086_2449_0e11_0012 = {0x0e11, 0x0012, pci_subsys_8086_2449_0e11_0012, 0}; #undef pci_ss_info_0e11_0012 @@ -44220,6 +49681,10 @@ static const pciSubsystemInfo pci_ss_info_8086_244b_1028_010e = {0x1028, 0x010e, pci_subsys_8086_244b_1028_010e, 0}; #undef pci_ss_info_1028_010e #define pci_ss_info_1028_010e pci_ss_info_8086_244b_1028_010e +static const pciSubsystemInfo pci_ss_info_8086_244b_103c_126f = + {0x103c, 0x126f, pci_subsys_8086_244b_103c_126f, 0}; +#undef pci_ss_info_103c_126f +#define pci_ss_info_103c_126f pci_ss_info_8086_244b_103c_126f static const pciSubsystemInfo pci_ss_info_8086_244b_1043_8027 = {0x1043, 0x8027, pci_subsys_8086_244b_1043_8027, 0}; #undef pci_ss_info_1043_8027 @@ -44228,6 +49693,10 @@ static const pciSubsystemInfo pci_ss_info_8086_244b_147b_0507 = {0x147b, 0x0507, pci_subsys_8086_244b_147b_0507, 0}; #undef pci_ss_info_147b_0507 #define pci_ss_info_147b_0507 pci_ss_info_8086_244b_147b_0507 +static const pciSubsystemInfo pci_ss_info_8086_244b_15d9_3280 = + {0x15d9, 0x3280, pci_subsys_8086_244b_15d9_3280, 0}; +#undef pci_ss_info_15d9_3280 +#define pci_ss_info_15d9_3280 pci_ss_info_8086_244b_15d9_3280 static const pciSubsystemInfo pci_ss_info_8086_244b_8086_4532 = {0x8086, 0x4532, pci_subsys_8086_244b_8086_4532, 0}; #undef pci_ss_info_8086_4532 @@ -44244,6 +49713,10 @@ static const pciSubsystemInfo pci_ss_info_8086_244e_1014_0267 = {0x1014, 0x0267, pci_subsys_8086_244e_1014_0267, 0}; #undef pci_ss_info_1014_0267 #define pci_ss_info_1014_0267 pci_ss_info_8086_244e_1014_0267 +static const pciSubsystemInfo pci_ss_info_8086_244e_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_244e_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_244e_1028_0211 static const pciSubsystemInfo pci_ss_info_8086_2482_0e11_0030 = {0x0e11, 0x0030, pci_subsys_8086_2482_0e11_0030, 0}; #undef pci_ss_info_0e11_0030 @@ -44324,6 +49797,18 @@ static const pciSubsystemInfo pci_ss_info_8086_2485_1014_051c = {0x1014, 0x051c, pci_subsys_8086_2485_1014_051c, 0}; #undef pci_ss_info_1014_051c #define pci_ss_info_1014_051c pci_ss_info_8086_2485_1014_051c +static const pciSubsystemInfo pci_ss_info_8086_2485_1043_1583 = + {0x1043, 0x1583, pci_subsys_8086_2485_1043_1583, 0}; +#undef pci_ss_info_1043_1583 +#define pci_ss_info_1043_1583 pci_ss_info_8086_2485_1043_1583 +static const pciSubsystemInfo pci_ss_info_8086_2485_1043_1623 = + {0x1043, 0x1623, pci_subsys_8086_2485_1043_1623, 0}; +#undef pci_ss_info_1043_1623 +#define pci_ss_info_1043_1623 pci_ss_info_8086_2485_1043_1623 +static const pciSubsystemInfo pci_ss_info_8086_2485_1043_1643 = + {0x1043, 0x1643, pci_subsys_8086_2485_1043_1643, 0}; +#undef pci_ss_info_1043_1643 +#define pci_ss_info_1043_1643 pci_ss_info_8086_2485_1043_1643 static const pciSubsystemInfo pci_ss_info_8086_2485_104d_80e7 = {0x104d, 0x80e7, pci_subsys_8086_2485_104d_80e7, 0}; #undef pci_ss_info_104d_80e7 @@ -44436,6 +49921,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c2_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_24c2_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24c2_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24c2_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_24c2_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_24c2_1028_018d static const pciSubsystemInfo pci_ss_info_8086_24c2_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_24c2_1028_0196, 0}; #undef pci_ss_info_1028_0196 @@ -44452,10 +49941,22 @@ static const pciSubsystemInfo pci_ss_info_8086_24c2_103c_08b0 = {0x103c, 0x08b0, pci_subsys_8086_24c2_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 #define pci_ss_info_103c_08b0 pci_ss_info_8086_24c2_103c_08b0 +static const pciSubsystemInfo pci_ss_info_8086_24c2_1043_8089 = + {0x1043, 0x8089, pci_subsys_8086_24c2_1043_8089, 0}; +#undef pci_ss_info_1043_8089 +#define pci_ss_info_1043_8089 pci_ss_info_8086_24c2_1043_8089 static const pciSubsystemInfo pci_ss_info_8086_24c2_1071_8160 = {0x1071, 0x8160, pci_subsys_8086_24c2_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c2_1071_8160 +static const pciSubsystemInfo pci_ss_info_8086_24c2_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_24c2_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_24c2_114a_0582 +static const pciSubsystemInfo pci_ss_info_8086_24c2_144d_c005 = + {0x144d, 0xc005, pci_subsys_8086_24c2_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_8086_24c2_144d_c005 static const pciSubsystemInfo pci_ss_info_8086_24c2_144d_c00c = {0x144d, 0xc00c, pci_subsys_8086_24c2_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -44480,6 +49981,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c2_4c53_1090 = {0x4c53, 0x1090, pci_subsys_8086_24c2_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24c2_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24c2_8086_24c2 = + {0x8086, 0x24c2, pci_subsys_8086_24c2_8086_24c2, 0}; +#undef pci_ss_info_8086_24c2 +#define pci_ss_info_8086_24c2 pci_ss_info_8086_24c2_8086_24c2 static const pciSubsystemInfo pci_ss_info_8086_24c2_8086_4541 = {0x8086, 0x4541, pci_subsys_8086_24c2_8086_4541, 0}; #undef pci_ss_info_8086_4541 @@ -44508,6 +50013,14 @@ static const pciSubsystemInfo pci_ss_info_8086_24c3_1028_0126 = {0x1028, 0x0126, pci_subsys_8086_24c3_1028_0126, 0}; #undef pci_ss_info_1028_0126 #define pci_ss_info_1028_0126 pci_ss_info_8086_24c3_1028_0126 +static const pciSubsystemInfo pci_ss_info_8086_24c3_1028_014f = + {0x1028, 0x014f, pci_subsys_8086_24c3_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_8086_24c3_1028_014f +static const pciSubsystemInfo pci_ss_info_8086_24c3_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_24c3_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_24c3_1028_018d static const pciSubsystemInfo pci_ss_info_8086_24c3_103c_088c = {0x103c, 0x088c, pci_subsys_8086_24c3_103c_088c, 0}; #undef pci_ss_info_103c_088c @@ -44524,6 +50037,14 @@ static const pciSubsystemInfo pci_ss_info_8086_24c3_1071_8160 = {0x1071, 0x8160, pci_subsys_8086_24c3_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c3_1071_8160 +static const pciSubsystemInfo pci_ss_info_8086_24c3_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_24c3_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_24c3_114a_0582 +static const pciSubsystemInfo pci_ss_info_8086_24c3_144d_c005 = + {0x144d, 0xc005, pci_subsys_8086_24c3_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_8086_24c3_144d_c005 static const pciSubsystemInfo pci_ss_info_8086_24c3_144d_c00c = {0x144d, 0xc00c, pci_subsys_8086_24c3_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -44576,6 +50097,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c4_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_24c4_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24c4_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24c4_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_24c4_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_24c4_1028_018d static const pciSubsystemInfo pci_ss_info_8086_24c4_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_24c4_1028_0196, 0}; #undef pci_ss_info_1028_0196 @@ -44592,6 +50117,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c4_103c_08b0 = {0x103c, 0x08b0, pci_subsys_8086_24c4_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 #define pci_ss_info_103c_08b0 pci_ss_info_8086_24c4_103c_08b0 +static const pciSubsystemInfo pci_ss_info_8086_24c4_1043_8089 = + {0x1043, 0x8089, pci_subsys_8086_24c4_1043_8089, 0}; +#undef pci_ss_info_1043_8089 +#define pci_ss_info_1043_8089 pci_ss_info_8086_24c4_1043_8089 static const pciSubsystemInfo pci_ss_info_8086_24c4_1071_8160 = {0x1071, 0x8160, pci_subsys_8086_24c4_1071_8160, 0}; #undef pci_ss_info_1071_8160 @@ -44616,6 +50145,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c4_4c53_1090 = {0x4c53, 0x1090, pci_subsys_8086_24c4_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24c4_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24c4_8086_24c2 = + {0x8086, 0x24c2, pci_subsys_8086_24c4_8086_24c2, 0}; +#undef pci_ss_info_8086_24c2 +#define pci_ss_info_8086_24c2 pci_ss_info_8086_24c4_8086_24c2 static const pciSubsystemInfo pci_ss_info_8086_24c4_8086_4541 = {0x8086, 0x4541, pci_subsys_8086_24c4_8086_4541, 0}; #undef pci_ss_info_8086_4541 @@ -44652,10 +50185,18 @@ static const pciSubsystemInfo pci_ss_info_8086_24c5_1028_0139 = {0x1028, 0x0139, pci_subsys_8086_24c5_1028_0139, 0}; #undef pci_ss_info_1028_0139 #define pci_ss_info_1028_0139 pci_ss_info_8086_24c5_1028_0139 +static const pciSubsystemInfo pci_ss_info_8086_24c5_1028_014f = + {0x1028, 0x014f, pci_subsys_8086_24c5_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_8086_24c5_1028_014f static const pciSubsystemInfo pci_ss_info_8086_24c5_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_24c5_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24c5_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24c5_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_24c5_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_24c5_1028_018d static const pciSubsystemInfo pci_ss_info_8086_24c5_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_24c5_1028_0196, 0}; #undef pci_ss_info_1028_0196 @@ -44672,10 +50213,18 @@ static const pciSubsystemInfo pci_ss_info_8086_24c5_103c_08b0 = {0x103c, 0x08b0, pci_subsys_8086_24c5_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 #define pci_ss_info_103c_08b0 pci_ss_info_8086_24c5_103c_08b0 +static const pciSubsystemInfo pci_ss_info_8086_24c5_1043_80b0 = + {0x1043, 0x80b0, pci_subsys_8086_24c5_1043_80b0, 0}; +#undef pci_ss_info_1043_80b0 +#define pci_ss_info_1043_80b0 pci_ss_info_8086_24c5_1043_80b0 static const pciSubsystemInfo pci_ss_info_8086_24c5_1071_8160 = {0x1071, 0x8160, pci_subsys_8086_24c5_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c5_1071_8160 +static const pciSubsystemInfo pci_ss_info_8086_24c5_144d_c005 = + {0x144d, 0xc005, pci_subsys_8086_24c5_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_8086_24c5_144d_c005 static const pciSubsystemInfo pci_ss_info_8086_24c5_144d_c00c = {0x144d, 0xc00c, pci_subsys_8086_24c5_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -44688,6 +50237,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c5_1462_5800 = {0x1462, 0x5800, pci_subsys_8086_24c5_1462_5800, 0}; #undef pci_ss_info_1462_5800 #define pci_ss_info_1462_5800 pci_ss_info_8086_24c5_1462_5800 +static const pciSubsystemInfo pci_ss_info_8086_24c5_1713_1043 = + {0x1713, 0x1043, pci_subsys_8086_24c5_1713_1043, 0}; +#undef pci_ss_info_1713_1043 +#define pci_ss_info_1713_1043 pci_ss_info_8086_24c5_1713_1043 static const pciSubsystemInfo pci_ss_info_8086_24c5_1734_1005 = {0x1734, 0x1005, pci_subsys_8086_24c5_1734_1005, 0}; #undef pci_ss_info_1734_1005 @@ -44696,10 +50249,22 @@ static const pciSubsystemInfo pci_ss_info_8086_24c5_1734_1055 = {0x1734, 0x1055, pci_subsys_8086_24c5_1734_1055, 0}; #undef pci_ss_info_1734_1055 #define pci_ss_info_1734_1055 pci_ss_info_8086_24c5_1734_1055 +static const pciSubsystemInfo pci_ss_info_8086_24c5_8086_24c5 = + {0x8086, 0x24c5, pci_subsys_8086_24c5_8086_24c5, 0}; +#undef pci_ss_info_8086_24c5 +#define pci_ss_info_8086_24c5 pci_ss_info_8086_24c5_8086_24c5 +static const pciSubsystemInfo pci_ss_info_8086_24c5_a002_1458 = + {0xa002, 0x1458, pci_subsys_8086_24c5_a002_1458, 0}; +#undef pci_ss_info_a002_1458 +#define pci_ss_info_a002_1458 pci_ss_info_8086_24c5_a002_1458 static const pciSubsystemInfo pci_ss_info_8086_24c6_1014_0524 = {0x1014, 0x0524, pci_subsys_8086_24c6_1014_0524, 0}; #undef pci_ss_info_1014_0524 #define pci_ss_info_1014_0524 pci_ss_info_8086_24c6_1014_0524 +static const pciSubsystemInfo pci_ss_info_8086_24c6_1014_0525 = + {0x1014, 0x0525, pci_subsys_8086_24c6_1014_0525, 0}; +#undef pci_ss_info_1014_0525 +#define pci_ss_info_1014_0525 pci_ss_info_8086_24c6_1014_0525 static const pciSubsystemInfo pci_ss_info_8086_24c6_1014_0559 = {0x1014, 0x0559, pci_subsys_8086_24c6_1014_0559, 0}; #undef pci_ss_info_1014_0559 @@ -44732,10 +50297,22 @@ static const pciSubsystemInfo pci_ss_info_8086_24c6_1071_8160 = {0x1071, 0x8160, pci_subsys_8086_24c6_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c6_1071_8160 +static const pciSubsystemInfo pci_ss_info_8086_24c6_144d_2115 = + {0x144d, 0x2115, pci_subsys_8086_24c6_144d_2115, 0}; +#undef pci_ss_info_144d_2115 +#define pci_ss_info_144d_2115 pci_ss_info_8086_24c6_144d_2115 static const pciSubsystemInfo pci_ss_info_8086_24c6_144d_c00c = {0x144d, 0xc00c, pci_subsys_8086_24c6_144d_c00c, 0}; #undef pci_ss_info_144d_c00c #define pci_ss_info_144d_c00c pci_ss_info_8086_24c6_144d_c00c +static const pciSubsystemInfo pci_ss_info_8086_24c6_14f1_5422 = + {0x14f1, 0x5422, pci_subsys_8086_24c6_14f1_5422, 0}; +#undef pci_ss_info_14f1_5422 +#define pci_ss_info_14f1_5422 pci_ss_info_8086_24c6_14f1_5422 +static const pciSubsystemInfo pci_ss_info_8086_24c6_1826_1043 = + {0x1826, 0x1043, pci_subsys_8086_24c6_1826_1043, 0}; +#undef pci_ss_info_1826_1043 +#define pci_ss_info_1826_1043 pci_ss_info_8086_24c6_1826_1043 static const pciSubsystemInfo pci_ss_info_8086_24c7_1014_0267 = {0x1014, 0x0267, pci_subsys_8086_24c7_1014_0267, 0}; #undef pci_ss_info_1014_0267 @@ -44756,6 +50333,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c7_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_24c7_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24c7_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24c7_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_24c7_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_24c7_1028_018d static const pciSubsystemInfo pci_ss_info_8086_24c7_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_24c7_1028_0196, 0}; #undef pci_ss_info_1028_0196 @@ -44772,6 +50353,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c7_103c_08b0 = {0x103c, 0x08b0, pci_subsys_8086_24c7_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 #define pci_ss_info_103c_08b0 pci_ss_info_8086_24c7_103c_08b0 +static const pciSubsystemInfo pci_ss_info_8086_24c7_1043_8089 = + {0x1043, 0x8089, pci_subsys_8086_24c7_1043_8089, 0}; +#undef pci_ss_info_1043_8089 +#define pci_ss_info_1043_8089 pci_ss_info_8086_24c7_1043_8089 static const pciSubsystemInfo pci_ss_info_8086_24c7_1071_8160 = {0x1071, 0x8160, pci_subsys_8086_24c7_1071_8160, 0}; #undef pci_ss_info_1071_8160 @@ -44796,6 +50381,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24c7_4c53_1090 = {0x4c53, 0x1090, pci_subsys_8086_24c7_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24c7_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24c7_8086_24c2 = + {0x8086, 0x24c2, pci_subsys_8086_24c7_8086_24c2, 0}; +#undef pci_ss_info_8086_24c2 +#define pci_ss_info_8086_24c2 pci_ss_info_8086_24c7_8086_24c2 static const pciSubsystemInfo pci_ss_info_8086_24c7_8086_4541 = {0x8086, 0x4541, pci_subsys_8086_24c7_8086_4541, 0}; #undef pci_ss_info_8086_4541 @@ -44816,10 +50405,18 @@ static const pciSubsystemInfo pci_ss_info_8086_24ca_1025_005a = {0x1025, 0x005a, pci_subsys_8086_24ca_1025_005a, 0}; #undef pci_ss_info_1025_005a #define pci_ss_info_1025_005a pci_ss_info_8086_24ca_1025_005a +static const pciSubsystemInfo pci_ss_info_8086_24ca_1028_014f = + {0x1028, 0x014f, pci_subsys_8086_24ca_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_8086_24ca_1028_014f static const pciSubsystemInfo pci_ss_info_8086_24ca_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_24ca_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24ca_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24ca_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_24ca_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_24ca_1028_018d static const pciSubsystemInfo pci_ss_info_8086_24ca_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_24ca_1028_0196, 0}; #undef pci_ss_info_1028_0196 @@ -44840,6 +50437,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24ca_1071_8160 = {0x1071, 0x8160, pci_subsys_8086_24ca_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_8086_24ca_1071_8160 +static const pciSubsystemInfo pci_ss_info_8086_24ca_144d_c005 = + {0x144d, 0xc005, pci_subsys_8086_24ca_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_8086_24ca_144d_c005 static const pciSubsystemInfo pci_ss_info_8086_24ca_144d_c00c = {0x144d, 0xc00c, pci_subsys_8086_24ca_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -44860,6 +50461,14 @@ static const pciSubsystemInfo pci_ss_info_8086_24cb_1028_0126 = {0x1028, 0x0126, pci_subsys_8086_24cb_1028_0126, 0}; #undef pci_ss_info_1028_0126 #define pci_ss_info_1028_0126 pci_ss_info_8086_24cb_1028_0126 +static const pciSubsystemInfo pci_ss_info_8086_24cb_1043_8089 = + {0x1043, 0x8089, pci_subsys_8086_24cb_1043_8089, 0}; +#undef pci_ss_info_1043_8089 +#define pci_ss_info_1043_8089 pci_ss_info_8086_24cb_1043_8089 +static const pciSubsystemInfo pci_ss_info_8086_24cb_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_24cb_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_24cb_114a_0582 static const pciSubsystemInfo pci_ss_info_8086_24cb_1458_24c2 = {0x1458, 0x24c2, pci_subsys_8086_24cb_1458_24c2, 0}; #undef pci_ss_info_1458_24c2 @@ -44920,6 +50529,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24cd_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_24cd_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24cd_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24cd_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_24cd_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_24cd_1028_018d static const pciSubsystemInfo pci_ss_info_8086_24cd_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_24cd_1028_0196, 0}; #undef pci_ss_info_1028_0196 @@ -44936,14 +50549,26 @@ static const pciSubsystemInfo pci_ss_info_8086_24cd_103c_08b0 = {0x103c, 0x08b0, pci_subsys_8086_24cd_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 #define pci_ss_info_103c_08b0 pci_ss_info_8086_24cd_103c_08b0 +static const pciSubsystemInfo pci_ss_info_8086_24cd_1043_8089 = + {0x1043, 0x8089, pci_subsys_8086_24cd_1043_8089, 0}; +#undef pci_ss_info_1043_8089 +#define pci_ss_info_1043_8089 pci_ss_info_8086_24cd_1043_8089 static const pciSubsystemInfo pci_ss_info_8086_24cd_1071_8160 = {0x1071, 0x8160, pci_subsys_8086_24cd_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_8086_24cd_1071_8160 +static const pciSubsystemInfo pci_ss_info_8086_24cd_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_24cd_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_24cd_114a_0582 static const pciSubsystemInfo pci_ss_info_8086_24cd_1179_ff00 = {0x1179, 0xff00, pci_subsys_8086_24cd_1179_ff00, 0}; #undef pci_ss_info_1179_ff00 #define pci_ss_info_1179_ff00 pci_ss_info_8086_24cd_1179_ff00 +static const pciSubsystemInfo pci_ss_info_8086_24cd_144d_c005 = + {0x144d, 0xc005, pci_subsys_8086_24cd_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_8086_24cd_144d_c005 static const pciSubsystemInfo pci_ss_info_8086_24cd_144d_c00c = {0x144d, 0xc00c, pci_subsys_8086_24cd_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -44968,6 +50593,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24cd_4c53_1090 = {0x4c53, 0x1090, pci_subsys_8086_24cd_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24cd_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24cd_8086_24c2 = + {0x8086, 0x24c2, pci_subsys_8086_24cd_8086_24c2, 0}; +#undef pci_ss_info_8086_24c2 +#define pci_ss_info_8086_24c2 pci_ss_info_8086_24cd_8086_24c2 static const pciSubsystemInfo pci_ss_info_8086_24cd_e4bf_0cc9 = {0xe4bf, 0x0cc9, pci_subsys_8086_24cd_e4bf_0cc9, 0}; #undef pci_ss_info_e4bf_0cc9 @@ -45000,6 +50629,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d1_1462_7280 = {0x1462, 0x7280, pci_subsys_8086_24d1_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d1_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d1_1565_5200 = + {0x1565, 0x5200, pci_subsys_8086_24d1_1565_5200, 0}; +#undef pci_ss_info_1565_5200 +#define pci_ss_info_1565_5200 pci_ss_info_8086_24d1_1565_5200 static const pciSubsystemInfo pci_ss_info_8086_24d1_15d9_4580 = {0x15d9, 0x4580, pci_subsys_8086_24d1_15d9_4580, 0}; #undef pci_ss_info_15d9_4580 @@ -45020,6 +50653,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d1_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d1_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d1_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24d2_1014_02dd = + {0x1014, 0x02dd, pci_subsys_8086_24d2_1014_02dd, 0}; +#undef pci_ss_info_1014_02dd +#define pci_ss_info_1014_02dd pci_ss_info_8086_24d2_1014_02dd static const pciSubsystemInfo pci_ss_info_8086_24d2_1014_02ed = {0x1014, 0x02ed, pci_subsys_8086_24d2_1014_02ed, 0}; #undef pci_ss_info_1014_02ed @@ -45028,6 +50665,14 @@ static const pciSubsystemInfo pci_ss_info_8086_24d2_1028_0169 = {0x1028, 0x0169, pci_subsys_8086_24d2_1028_0169, 0}; #undef pci_ss_info_1028_0169 #define pci_ss_info_1028_0169 pci_ss_info_8086_24d2_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24d2_1028_016c = + {0x1028, 0x016c, pci_subsys_8086_24d2_1028_016c, 0}; +#undef pci_ss_info_1028_016c +#define pci_ss_info_1028_016c pci_ss_info_8086_24d2_1028_016c +static const pciSubsystemInfo pci_ss_info_8086_24d2_1028_016d = + {0x1028, 0x016d, pci_subsys_8086_24d2_1028_016d, 0}; +#undef pci_ss_info_1028_016d +#define pci_ss_info_1028_016d pci_ss_info_8086_24d2_1028_016d static const pciSubsystemInfo pci_ss_info_8086_24d2_1028_0183 = {0x1028, 0x0183, pci_subsys_8086_24d2_1028_0183, 0}; #undef pci_ss_info_1028_0183 @@ -45056,6 +50701,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d2_1462_7280 = {0x1462, 0x7280, pci_subsys_8086_24d2_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d2_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d2_1565_3101 = + {0x1565, 0x3101, pci_subsys_8086_24d2_1565_3101, 0}; +#undef pci_ss_info_1565_3101 +#define pci_ss_info_1565_3101 pci_ss_info_8086_24d2_1565_3101 static const pciSubsystemInfo pci_ss_info_8086_24d2_15d9_4580 = {0x15d9, 0x4580, pci_subsys_8086_24d2_15d9_4580, 0}; #undef pci_ss_info_15d9_4580 @@ -45080,6 +50729,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d2_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d2_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d2_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24d3_1014_02dd = + {0x1014, 0x02dd, pci_subsys_8086_24d3_1014_02dd, 0}; +#undef pci_ss_info_1014_02dd +#define pci_ss_info_1014_02dd pci_ss_info_8086_24d3_1014_02dd static const pciSubsystemInfo pci_ss_info_8086_24d3_1014_02ed = {0x1014, 0x02ed, pci_subsys_8086_24d3_1014_02ed, 0}; #undef pci_ss_info_1014_02ed @@ -45108,6 +50761,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d3_1462_7280 = {0x1462, 0x7280, pci_subsys_8086_24d3_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d3_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d3_1565_3101 = + {0x1565, 0x3101, pci_subsys_8086_24d3_1565_3101, 0}; +#undef pci_ss_info_1565_3101 +#define pci_ss_info_1565_3101 pci_ss_info_8086_24d3_1565_3101 static const pciSubsystemInfo pci_ss_info_8086_24d3_15d9_4580 = {0x15d9, 0x4580, pci_subsys_8086_24d3_15d9_4580, 0}; #undef pci_ss_info_15d9_4580 @@ -45132,6 +50789,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d3_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d3_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d3_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24d4_1014_02dd = + {0x1014, 0x02dd, pci_subsys_8086_24d4_1014_02dd, 0}; +#undef pci_ss_info_1014_02dd +#define pci_ss_info_1014_02dd pci_ss_info_8086_24d4_1014_02dd static const pciSubsystemInfo pci_ss_info_8086_24d4_1014_02ed = {0x1014, 0x02ed, pci_subsys_8086_24d4_1014_02ed, 0}; #undef pci_ss_info_1014_02ed @@ -45140,6 +50801,14 @@ static const pciSubsystemInfo pci_ss_info_8086_24d4_1028_0169 = {0x1028, 0x0169, pci_subsys_8086_24d4_1028_0169, 0}; #undef pci_ss_info_1028_0169 #define pci_ss_info_1028_0169 pci_ss_info_8086_24d4_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24d4_1028_016c = + {0x1028, 0x016c, pci_subsys_8086_24d4_1028_016c, 0}; +#undef pci_ss_info_1028_016c +#define pci_ss_info_1028_016c pci_ss_info_8086_24d4_1028_016c +static const pciSubsystemInfo pci_ss_info_8086_24d4_1028_016d = + {0x1028, 0x016d, pci_subsys_8086_24d4_1028_016d, 0}; +#undef pci_ss_info_1028_016d +#define pci_ss_info_1028_016d pci_ss_info_8086_24d4_1028_016d static const pciSubsystemInfo pci_ss_info_8086_24d4_1028_0183 = {0x1028, 0x0183, pci_subsys_8086_24d4_1028_0183, 0}; #undef pci_ss_info_1028_0183 @@ -45168,6 +50837,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d4_1462_7280 = {0x1462, 0x7280, pci_subsys_8086_24d4_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d4_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d4_1565_3101 = + {0x1565, 0x3101, pci_subsys_8086_24d4_1565_3101, 0}; +#undef pci_ss_info_1565_3101 +#define pci_ss_info_1565_3101 pci_ss_info_8086_24d4_1565_3101 static const pciSubsystemInfo pci_ss_info_8086_24d4_15d9_4580 = {0x15d9, 0x4580, pci_subsys_8086_24d4_15d9_4580, 0}; #undef pci_ss_info_15d9_4580 @@ -45256,6 +50929,14 @@ static const pciSubsystemInfo pci_ss_info_8086_24d7_1028_0169 = {0x1028, 0x0169, pci_subsys_8086_24d7_1028_0169, 0}; #undef pci_ss_info_1028_0169 #define pci_ss_info_1028_0169 pci_ss_info_8086_24d7_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24d7_1028_016c = + {0x1028, 0x016c, pci_subsys_8086_24d7_1028_016c, 0}; +#undef pci_ss_info_1028_016c +#define pci_ss_info_1028_016c pci_ss_info_8086_24d7_1028_016c +static const pciSubsystemInfo pci_ss_info_8086_24d7_1028_016d = + {0x1028, 0x016d, pci_subsys_8086_24d7_1028_016d, 0}; +#undef pci_ss_info_1028_016d +#define pci_ss_info_1028_016d pci_ss_info_8086_24d7_1028_016d static const pciSubsystemInfo pci_ss_info_8086_24d7_1028_0183 = {0x1028, 0x0183, pci_subsys_8086_24d7_1028_0183, 0}; #undef pci_ss_info_1028_0183 @@ -45280,6 +50961,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d7_1462_7280 = {0x1462, 0x7280, pci_subsys_8086_24d7_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d7_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d7_1565_3101 = + {0x1565, 0x3101, pci_subsys_8086_24d7_1565_3101, 0}; +#undef pci_ss_info_1565_3101 +#define pci_ss_info_1565_3101 pci_ss_info_8086_24d7_1565_3101 static const pciSubsystemInfo pci_ss_info_8086_24d7_15d9_4580 = {0x15d9, 0x4580, pci_subsys_8086_24d7_15d9_4580, 0}; #undef pci_ss_info_15d9_4580 @@ -45304,6 +50989,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24d7_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d7_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d7_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24db_1014_02dd = + {0x1014, 0x02dd, pci_subsys_8086_24db_1014_02dd, 0}; +#undef pci_ss_info_1014_02dd +#define pci_ss_info_1014_02dd pci_ss_info_8086_24db_1014_02dd static const pciSubsystemInfo pci_ss_info_8086_24db_1014_02ed = {0x1014, 0x02ed, pci_subsys_8086_24db_1014_02ed, 0}; #undef pci_ss_info_1014_02ed @@ -45312,6 +51001,14 @@ static const pciSubsystemInfo pci_ss_info_8086_24db_1028_0169 = {0x1028, 0x0169, pci_subsys_8086_24db_1028_0169, 0}; #undef pci_ss_info_1028_0169 #define pci_ss_info_1028_0169 pci_ss_info_8086_24db_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24db_1028_016c = + {0x1028, 0x016c, pci_subsys_8086_24db_1028_016c, 0}; +#undef pci_ss_info_1028_016c +#define pci_ss_info_1028_016c pci_ss_info_8086_24db_1028_016c +static const pciSubsystemInfo pci_ss_info_8086_24db_1028_016d = + {0x1028, 0x016d, pci_subsys_8086_24db_1028_016d, 0}; +#undef pci_ss_info_1028_016d +#define pci_ss_info_1028_016d pci_ss_info_8086_24db_1028_016d static const pciSubsystemInfo pci_ss_info_8086_24db_1028_019a = {0x1028, 0x019a, pci_subsys_8086_24db_1028_019a, 0}; #undef pci_ss_info_1028_019a @@ -45340,6 +51037,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24db_1462_7580 = {0x1462, 0x7580, pci_subsys_8086_24db_1462_7580, 0}; #undef pci_ss_info_1462_7580 #define pci_ss_info_1462_7580 pci_ss_info_8086_24db_1462_7580 +static const pciSubsystemInfo pci_ss_info_8086_24db_1565_3101 = + {0x1565, 0x3101, pci_subsys_8086_24db_1565_3101, 0}; +#undef pci_ss_info_1565_3101 +#define pci_ss_info_1565_3101 pci_ss_info_8086_24db_1565_3101 static const pciSubsystemInfo pci_ss_info_8086_24db_15d9_4580 = {0x15d9, 0x4580, pci_subsys_8086_24db_15d9_4580, 0}; #undef pci_ss_info_15d9_4580 @@ -45368,6 +51069,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24db_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24db_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24db_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24dd_1014_02dd = + {0x1014, 0x02dd, pci_subsys_8086_24dd_1014_02dd, 0}; +#undef pci_ss_info_1014_02dd +#define pci_ss_info_1014_02dd pci_ss_info_8086_24dd_1014_02dd static const pciSubsystemInfo pci_ss_info_8086_24dd_1014_02ed = {0x1014, 0x02ed, pci_subsys_8086_24dd_1014_02ed, 0}; #undef pci_ss_info_1014_02ed @@ -45376,6 +51081,14 @@ static const pciSubsystemInfo pci_ss_info_8086_24dd_1028_0169 = {0x1028, 0x0169, pci_subsys_8086_24dd_1028_0169, 0}; #undef pci_ss_info_1028_0169 #define pci_ss_info_1028_0169 pci_ss_info_8086_24dd_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24dd_1028_016c = + {0x1028, 0x016c, pci_subsys_8086_24dd_1028_016c, 0}; +#undef pci_ss_info_1028_016c +#define pci_ss_info_1028_016c pci_ss_info_8086_24dd_1028_016c +static const pciSubsystemInfo pci_ss_info_8086_24dd_1028_016d = + {0x1028, 0x016d, pci_subsys_8086_24dd_1028_016d, 0}; +#undef pci_ss_info_1028_016d +#define pci_ss_info_1028_016d pci_ss_info_8086_24dd_1028_016d static const pciSubsystemInfo pci_ss_info_8086_24dd_1028_0183 = {0x1028, 0x0183, pci_subsys_8086_24dd_1028_0183, 0}; #undef pci_ss_info_1028_0183 @@ -45440,6 +51153,10 @@ static const pciSubsystemInfo pci_ss_info_8086_24de_1462_7280 = {0x1462, 0x7280, pci_subsys_8086_24de_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24de_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24de_1565_3101 = + {0x1565, 0x3101, pci_subsys_8086_24de_1565_3101, 0}; +#undef pci_ss_info_1565_3101 +#define pci_ss_info_1565_3101 pci_ss_info_8086_24de_1565_3101 static const pciSubsystemInfo pci_ss_info_8086_24de_15d9_4580 = {0x15d9, 0x4580, pci_subsys_8086_24de_15d9_4580, 0}; #undef pci_ss_info_15d9_4580 @@ -45532,6 +51249,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2562_1014_0267 = {0x1014, 0x0267, pci_subsys_8086_2562_1014_0267, 0}; #undef pci_ss_info_1014_0267 #define pci_ss_info_1014_0267 pci_ss_info_8086_2562_1014_0267 +static const pciSubsystemInfo pci_ss_info_8086_2562_1734_1003 = + {0x1734, 0x1003, pci_subsys_8086_2562_1734_1003, 0}; +#undef pci_ss_info_1734_1003 +#define pci_ss_info_1734_1003 pci_ss_info_8086_2562_1734_1003 static const pciSubsystemInfo pci_ss_info_8086_2562_1734_1004 = {0x1734, 0x1004, pci_subsys_8086_2562_1734_1004, 0}; #undef pci_ss_info_1734_1004 @@ -45616,14 +51337,34 @@ static const pciSubsystemInfo pci_ss_info_8086_2582_1734_105b = {0x1734, 0x105b, pci_subsys_8086_2582_1734_105b, 0}; #undef pci_ss_info_1734_105b #define pci_ss_info_1734_105b pci_ss_info_8086_2582_1734_105b +static const pciSubsystemInfo pci_ss_info_8086_2582_1849_2582 = + {0x1849, 0x2582, pci_subsys_8086_2582_1849_2582, 0}; +#undef pci_ss_info_1849_2582 +#define pci_ss_info_1849_2582 pci_ss_info_8086_2582_1849_2582 +static const pciSubsystemInfo pci_ss_info_8086_2584_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_2584_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_2584_1028_0177 +static const pciSubsystemInfo pci_ss_info_8086_2590_1014_0575 = + {0x1014, 0x0575, pci_subsys_8086_2590_1014_0575, 0}; +#undef pci_ss_info_1014_0575 +#define pci_ss_info_1014_0575 pci_ss_info_8086_2590_1014_0575 static const pciSubsystemInfo pci_ss_info_8086_2590_1028_0182 = {0x1028, 0x0182, pci_subsys_8086_2590_1028_0182, 0}; #undef pci_ss_info_1028_0182 #define pci_ss_info_1028_0182 pci_ss_info_8086_2590_1028_0182 +static const pciSubsystemInfo pci_ss_info_8086_2590_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_2590_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_2590_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_2590_103c_099c = {0x103c, 0x099c, pci_subsys_8086_2590_103c_099c, 0}; #undef pci_ss_info_103c_099c #define pci_ss_info_103c_099c pci_ss_info_8086_2590_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2590_104d_81b7 = + {0x104d, 0x81b7, pci_subsys_8086_2590_104d_81b7, 0}; +#undef pci_ss_info_104d_81b7 +#define pci_ss_info_104d_81b7 pci_ss_info_8086_2590_104d_81b7 static const pciSubsystemInfo pci_ss_info_8086_2590_a304_81b7 = {0xa304, 0x81b7, pci_subsys_8086_2590_a304_81b7, 0}; #undef pci_ss_info_a304_81b7 @@ -45632,6 +51373,18 @@ static const pciSubsystemInfo pci_ss_info_8086_2590_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_2590_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2590_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2590_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2590_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2590_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2590_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2590_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2590_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2591_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_2591_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_2591_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_2592_103c_099c = {0x103c, 0x099c, pci_subsys_8086_2592_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -45648,10 +51401,22 @@ static const pciSubsystemInfo pci_ss_info_8086_2592_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_2592_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2592_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2592_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2592_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2592_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2592_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2592_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2592_e4bf_58b1 static const pciSubsystemInfo pci_ss_info_8086_25a2_1775_10d0 = {0x1775, 0x10d0, pci_subsys_8086_25a2_1775_10d0, 0}; #undef pci_ss_info_1775_10d0 #define pci_ss_info_1775_10d0 pci_ss_info_8086_25a2_1775_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25a2_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25a2_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25a2_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25a2_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25a2_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45664,6 +51429,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25a2_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_8086_25a2_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a2_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_25a3_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25a3_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25a3_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25a3_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25a3_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45684,6 +51453,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25a4_1775_10d0 = {0x1775, 0x10d0, pci_subsys_8086_25a4_1775_10d0, 0}; #undef pci_ss_info_1775_10d0 #define pci_ss_info_1775_10d0 pci_ss_info_8086_25a4_1775_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25a4_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25a4_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25a4_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25a4_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25a4_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45700,6 +51473,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25a4_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_8086_25a4_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a4_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_25a6_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25a6_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25a6_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25a6_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25a6_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45712,6 +51489,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25a9_1775_10d0 = {0x1775, 0x10d0, pci_subsys_8086_25a9_1775_10d0, 0}; #undef pci_ss_info_1775_10d0 #define pci_ss_info_1775_10d0 pci_ss_info_8086_25a9_1775_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25a9_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25a9_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25a9_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25a9_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25a9_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45728,6 +51509,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25a9_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_8086_25a9_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a9_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_25aa_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25aa_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25aa_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25aa_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25aa_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45736,6 +51521,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25aa_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_25aa_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25aa_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25aa_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_25aa_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_25aa_4c53_10d0 static const pciSubsystemInfo pci_ss_info_8086_25aa_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_8086_25aa_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 @@ -45744,6 +51533,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25ab_1775_10d0 = {0x1775, 0x10d0, pci_subsys_8086_25ab_1775_10d0, 0}; #undef pci_ss_info_1775_10d0 #define pci_ss_info_1775_10d0 pci_ss_info_8086_25ab_1775_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25ab_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25ab_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25ab_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25ab_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25ab_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45764,6 +51557,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25ac_1775_10d0 = {0x1775, 0x10d0, pci_subsys_8086_25ac_1775_10d0, 0}; #undef pci_ss_info_1775_10d0 #define pci_ss_info_1775_10d0 pci_ss_info_8086_25ac_1775_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25ac_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25ac_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25ac_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25ac_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25ac_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45784,6 +51581,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25ad_1775_10d0 = {0x1775, 0x10d0, pci_subsys_8086_25ad_1775_10d0, 0}; #undef pci_ss_info_1775_10d0 #define pci_ss_info_1775_10d0 pci_ss_info_8086_25ad_1775_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25ad_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25ad_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25ad_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25ad_1775_ce90 = {0x1775, 0xce90, pci_subsys_8086_25ad_1775_ce90, 0}; #undef pci_ss_info_1775_ce90 @@ -45800,6 +51601,10 @@ static const pciSubsystemInfo pci_ss_info_8086_25ad_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_8086_25ad_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25ad_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_25b0_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_25b0_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_25b0_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_25b0_4c53_10d0 = {0x4c53, 0x10d0, pci_subsys_8086_25b0_4c53_10d0, 0}; #undef pci_ss_info_4c53_10d0 @@ -45820,6 +51625,18 @@ static const pciSubsystemInfo pci_ss_info_8086_2640_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_2640_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2640_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2640_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2640_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2640_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2640_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2640_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2640_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2641_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_2641_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_2641_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_2641_103c_099c = {0x103c, 0x099c, pci_subsys_8086_2641_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -45844,14 +51661,34 @@ static const pciSubsystemInfo pci_ss_info_8086_2651_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_2651_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2651_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2651_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2651_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2651_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2651_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2651_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2651_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2652_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_2652_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_2652_1028_0177 static const pciSubsystemInfo pci_ss_info_8086_2652_1462_7028 = {0x1462, 0x7028, pci_subsys_8086_2652_1462_7028, 0}; #undef pci_ss_info_1462_7028 #define pci_ss_info_1462_7028 pci_ss_info_8086_2652_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_2658_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_2658_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_2658_1028_0177 static const pciSubsystemInfo pci_ss_info_8086_2658_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_2658_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_2658_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_2658_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_2658_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_2658_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_2658_103c_099c = {0x103c, 0x099c, pci_subsys_8086_2658_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -45876,10 +51713,26 @@ static const pciSubsystemInfo pci_ss_info_8086_2658_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_2658_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2658_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2658_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2658_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2658_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2658_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2658_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2658_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2659_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_2659_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_2659_1028_0177 static const pciSubsystemInfo pci_ss_info_8086_2659_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_2659_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_2659_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_2659_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_2659_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_2659_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_2659_103c_099c = {0x103c, 0x099c, pci_subsys_8086_2659_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -45904,10 +51757,26 @@ static const pciSubsystemInfo pci_ss_info_8086_2659_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_2659_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2659_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2659_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2659_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2659_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2659_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2659_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2659_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_265a_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_265a_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_265a_1028_0177 static const pciSubsystemInfo pci_ss_info_8086_265a_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_265a_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_265a_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_265a_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_265a_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_265a_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_265a_103c_099c = {0x103c, 0x099c, pci_subsys_8086_265a_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -45932,6 +51801,18 @@ static const pciSubsystemInfo pci_ss_info_8086_265a_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_265a_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_265a_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_265a_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_265a_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_265a_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_265a_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_265a_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_265a_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_265b_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_265b_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_265b_1028_0177 static const pciSubsystemInfo pci_ss_info_8086_265b_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_265b_1028_0179, 0}; #undef pci_ss_info_1028_0179 @@ -45960,10 +51841,26 @@ static const pciSubsystemInfo pci_ss_info_8086_265b_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_265b_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_265b_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_265b_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_265b_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_265b_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_265b_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_265b_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_265b_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_265c_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_265c_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_265c_1028_0177 static const pciSubsystemInfo pci_ss_info_8086_265c_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_265c_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_265c_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_265c_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_265c_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_265c_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_265c_103c_099c = {0x103c, 0x099c, pci_subsys_8086_265c_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -45992,10 +51889,78 @@ static const pciSubsystemInfo pci_ss_info_8086_265c_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_265c_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_265c_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_265c_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_265c_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_265c_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_265c_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_265c_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_265c_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2660_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_2660_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_2660_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_2660_103c_099c = {0x103c, 0x099c, pci_subsys_8086_2660_103c_099c, 0}; #undef pci_ss_info_103c_099c #define pci_ss_info_103c_099c pci_ss_info_8086_2660_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2660_e4bf_0ccd = + {0xe4bf, 0x0ccd, pci_subsys_8086_2660_e4bf_0ccd, 0}; +#undef pci_ss_info_e4bf_0ccd +#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2660_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2660_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2660_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2660_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2660_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2660_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2660_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2662_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_2662_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_2662_103c_0934 +static const pciSubsystemInfo pci_ss_info_8086_2662_e4bf_0ccd = + {0xe4bf, 0x0ccd, pci_subsys_8086_2662_e4bf_0ccd, 0}; +#undef pci_ss_info_e4bf_0ccd +#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2662_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2662_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2662_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2662_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2662_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2662_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2662_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2664_e4bf_0ccd = + {0xe4bf, 0x0ccd, pci_subsys_8086_2664_e4bf_0ccd, 0}; +#undef pci_ss_info_e4bf_0ccd +#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2664_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2664_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2664_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2664_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2664_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2664_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2664_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2666_e4bf_0ccd = + {0xe4bf, 0x0ccd, pci_subsys_8086_2666_e4bf_0ccd, 0}; +#undef pci_ss_info_e4bf_0ccd +#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2666_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2666_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2666_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2666_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2666_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2666_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2666_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_2668_1014_05b7 = + {0x1014, 0x05b7, pci_subsys_8086_2668_1014_05b7, 0}; +#undef pci_ss_info_1014_05b7 +#define pci_ss_info_1014_05b7 pci_ss_info_8086_2668_1014_05b7 static const pciSubsystemInfo pci_ss_info_8086_2668_103c_2a09 = {0x103c, 0x2a09, pci_subsys_8086_2668_103c_2a09, 0}; #undef pci_ss_info_103c_2a09 @@ -46004,6 +51969,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2668_1043_814e = {0x1043, 0x814e, pci_subsys_8086_2668_1043_814e, 0}; #undef pci_ss_info_1043_814e #define pci_ss_info_1043_814e pci_ss_info_8086_2668_1043_814e +static const pciSubsystemInfo pci_ss_info_8086_266a_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_266a_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_266a_1028_0177 static const pciSubsystemInfo pci_ss_info_8086_266a_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_266a_1028_0179, 0}; #undef pci_ss_info_1028_0179 @@ -46028,10 +51997,22 @@ static const pciSubsystemInfo pci_ss_info_8086_266a_e4bf_0ccd = {0xe4bf, 0x0ccd, pci_subsys_8086_266a_e4bf_0ccd, 0}; #undef pci_ss_info_e4bf_0ccd #define pci_ss_info_e4bf_0ccd pci_ss_info_8086_266a_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_266a_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_266a_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_266a_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_266a_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_266a_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_266a_e4bf_58b1 static const pciSubsystemInfo pci_ss_info_8086_266d_1025_006a = {0x1025, 0x006a, pci_subsys_8086_266d_1025_006a, 0}; #undef pci_ss_info_1025_006a #define pci_ss_info_1025_006a pci_ss_info_8086_266d_1025_006a +static const pciSubsystemInfo pci_ss_info_8086_266d_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_266d_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_266d_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_266d_103c_099c = {0x103c, 0x099c, pci_subsys_8086_266d_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -46040,6 +52021,10 @@ static const pciSubsystemInfo pci_ss_info_8086_266e_1025_006a = {0x1025, 0x006a, pci_subsys_8086_266e_1025_006a, 0}; #undef pci_ss_info_1025_006a #define pci_ss_info_1025_006a pci_ss_info_8086_266e_1025_006a +static const pciSubsystemInfo pci_ss_info_8086_266e_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_266e_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_266e_1028_0177 static const pciSubsystemInfo pci_ss_info_8086_266e_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_266e_1028_0179, 0}; #undef pci_ss_info_1028_0179 @@ -46052,6 +52037,10 @@ static const pciSubsystemInfo pci_ss_info_8086_266e_1028_0188 = {0x1028, 0x0188, pci_subsys_8086_266e_1028_0188, 0}; #undef pci_ss_info_1028_0188 #define pci_ss_info_1028_0188 pci_ss_info_8086_266e_1028_0188 +static const pciSubsystemInfo pci_ss_info_8086_266e_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_266e_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_266e_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_266e_103c_0944 = {0x103c, 0x0944, pci_subsys_8086_266e_103c_0944, 0}; #undef pci_ss_info_103c_0944 @@ -46076,6 +52065,14 @@ static const pciSubsystemInfo pci_ss_info_8086_266e_1734_105a = {0x1734, 0x105a, pci_subsys_8086_266e_1734_105a, 0}; #undef pci_ss_info_1734_105a #define pci_ss_info_1734_105a pci_ss_info_8086_266e_1734_105a +static const pciSubsystemInfo pci_ss_info_8086_266f_1028_0177 = + {0x1028, 0x0177, pci_subsys_8086_266f_1028_0177, 0}; +#undef pci_ss_info_1028_0177 +#define pci_ss_info_1028_0177 pci_ss_info_8086_266f_1028_0177 +static const pciSubsystemInfo pci_ss_info_8086_266f_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_266f_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_266f_103c_0934 static const pciSubsystemInfo pci_ss_info_8086_266f_103c_099c = {0x103c, 0x099c, pci_subsys_8086_266f_103c_099c, 0}; #undef pci_ss_info_103c_099c @@ -46096,6 +52093,18 @@ static const pciSubsystemInfo pci_ss_info_8086_266f_1734_105c = {0x1734, 0x105c, pci_subsys_8086_266f_1734_105c, 0}; #undef pci_ss_info_1734_105c #define pci_ss_info_1734_105c pci_ss_info_8086_266f_1734_105c +static const pciSubsystemInfo pci_ss_info_8086_266f_e4bf_0ccd = + {0xe4bf, 0x0ccd, pci_subsys_8086_266f_e4bf_0ccd, 0}; +#undef pci_ss_info_e4bf_0ccd +#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_266f_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_266f_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_266f_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_266f_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_266f_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_266f_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_266f_e4bf_58b1 static const pciSubsystemInfo pci_ss_info_8086_2770_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_2770_107b_5048, 0}; #undef pci_ss_info_107b_5048 @@ -46108,6 +52117,18 @@ static const pciSubsystemInfo pci_ss_info_8086_2772_8086_544e = {0x8086, 0x544e, pci_subsys_8086_2772_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_2772_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_2778_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_2778_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_2778_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_2778_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_2778_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_2778_1028_01e6 +static const pciSubsystemInfo pci_ss_info_8086_277c_1043_8178 = + {0x1043, 0x8178, pci_subsys_8086_277c_1043_8178, 0}; +#undef pci_ss_info_1043_8178 +#define pci_ss_info_1043_8178 pci_ss_info_8086_277c_1043_8178 static const pciSubsystemInfo pci_ss_info_8086_2782_1043_2582 = {0x1043, 0x2582, pci_subsys_8086_2782_1043_2582, 0}; #undef pci_ss_info_1043_2582 @@ -46124,14 +52145,38 @@ static const pciSubsystemInfo pci_ss_info_8086_2792_1043_1881 = {0x1043, 0x1881, pci_subsys_8086_2792_1043_1881, 0}; #undef pci_ss_info_1043_1881 #define pci_ss_info_1043_1881 pci_ss_info_8086_2792_1043_1881 +static const pciSubsystemInfo pci_ss_info_8086_2792_e4bf_0ccd = + {0xe4bf, 0x0ccd, pci_subsys_8086_2792_e4bf_0ccd, 0}; +#undef pci_ss_info_e4bf_0ccd +#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2792_e4bf_0ccd +static const pciSubsystemInfo pci_ss_info_8086_2792_e4bf_0cd3 = + {0xe4bf, 0x0cd3, pci_subsys_8086_2792_e4bf_0cd3, 0}; +#undef pci_ss_info_e4bf_0cd3 +#define pci_ss_info_e4bf_0cd3 pci_ss_info_8086_2792_e4bf_0cd3 +static const pciSubsystemInfo pci_ss_info_8086_2792_e4bf_58b1 = + {0xe4bf, 0x58b1, pci_subsys_8086_2792_e4bf_58b1, 0}; +#undef pci_ss_info_e4bf_58b1 +#define pci_ss_info_e4bf_58b1 pci_ss_info_8086_2792_e4bf_58b1 +static const pciSubsystemInfo pci_ss_info_8086_27a0_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27a0_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27a0_1025_006c static const pciSubsystemInfo pci_ss_info_8086_27a0_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27a0_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27a0_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27a0_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27a0_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27a0_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27a0_17aa_2017 = {0x17aa, 0x2017, pci_subsys_8086_27a0_17aa_2017, 0}; #undef pci_ss_info_17aa_2017 #define pci_ss_info_17aa_2017 pci_ss_info_8086_27a0_17aa_2017 +static const pciSubsystemInfo pci_ss_info_8086_27a1_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27a1_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27a1_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27a2_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27a2_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 @@ -46148,6 +52193,14 @@ static const pciSubsystemInfo pci_ss_info_8086_27a6_17aa_201a = {0x17aa, 0x201a, pci_subsys_8086_27a6_17aa_201a, 0}; #undef pci_ss_info_17aa_201a #define pci_ss_info_17aa_201a pci_ss_info_8086_27a6_17aa_201a +static const pciSubsystemInfo pci_ss_info_8086_27b0_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27b0_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27b0_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27b8_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_27b8_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_27b8_1028_01e6 static const pciSubsystemInfo pci_ss_info_8086_27b8_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_27b8_107b_5048, 0}; #undef pci_ss_info_107b_5048 @@ -46160,6 +52213,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27b9_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27b9_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27b9_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27b9_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27b9_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27b9_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27b9_10f7_8338 = {0x10f7, 0x8338, pci_subsys_8086_27b9_10f7_8338, 0}; #undef pci_ss_info_10f7_8338 @@ -46168,22 +52225,78 @@ static const pciSubsystemInfo pci_ss_info_8086_27b9_17aa_2009 = {0x17aa, 0x2009, pci_subsys_8086_27b9_17aa_2009, 0}; #undef pci_ss_info_17aa_2009 #define pci_ss_info_17aa_2009 pci_ss_info_8086_27b9_17aa_2009 +static const pciSubsystemInfo pci_ss_info_8086_27bd_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27bd_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27bd_1025_006c +static const pciSubsystemInfo pci_ss_info_8086_27c0_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27c0_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27c0_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_27c0_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_27c0_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_27c0_1028_01e6 static const pciSubsystemInfo pci_ss_info_8086_27c0_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_27c0_107b_5048, 0}; #undef pci_ss_info_107b_5048 #define pci_ss_info_107b_5048 pci_ss_info_8086_27c0_107b_5048 +static const pciSubsystemInfo pci_ss_info_8086_27c0_1462_7236 = + {0x1462, 0x7236, pci_subsys_8086_27c0_1462_7236, 0}; +#undef pci_ss_info_1462_7236 +#define pci_ss_info_1462_7236 pci_ss_info_8086_27c0_1462_7236 static const pciSubsystemInfo pci_ss_info_8086_27c0_8086_544e = {0x8086, 0x544e, pci_subsys_8086_27c0_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_27c0_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27c1_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27c1_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27c1_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_27c1_8086_5842 = + {0x8086, 0x5842, pci_subsys_8086_27c1_8086_5842, 0}; +#undef pci_ss_info_8086_5842 +#define pci_ss_info_8086_5842 pci_ss_info_8086_27c1_8086_5842 +static const pciSubsystemInfo pci_ss_info_8086_27c3_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27c3_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27c3_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27c4_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27c4_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27c4_1025_006c +static const pciSubsystemInfo pci_ss_info_8086_27c4_17aa_200e = + {0x17aa, 0x200e, pci_subsys_8086_27c4_17aa_200e, 0}; +#undef pci_ss_info_17aa_200e +#define pci_ss_info_17aa_200e pci_ss_info_8086_27c4_17aa_200e +static const pciSubsystemInfo pci_ss_info_8086_27c5_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27c5_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27c5_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27c5_17aa_200d = {0x17aa, 0x200d, pci_subsys_8086_27c5_17aa_200d, 0}; #undef pci_ss_info_17aa_200d #define pci_ss_info_17aa_200d pci_ss_info_8086_27c5_17aa_200d +static const pciSubsystemInfo pci_ss_info_8086_27c8_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27c8_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27c8_1025_006c +static const pciSubsystemInfo pci_ss_info_8086_27c8_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27c8_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27c8_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_27c8_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_27c8_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_27c8_1028_01e6 static const pciSubsystemInfo pci_ss_info_8086_27c8_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27c8_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27c8_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27c8_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27c8_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27c8_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27c8_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_27c8_107b_5048, 0}; #undef pci_ss_info_107b_5048 @@ -46196,10 +52309,26 @@ static const pciSubsystemInfo pci_ss_info_8086_27c8_8086_544e = {0x8086, 0x544e, pci_subsys_8086_27c8_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_27c8_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27c9_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27c9_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27c9_1025_006c +static const pciSubsystemInfo pci_ss_info_8086_27c9_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27c9_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27c9_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_27c9_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_27c9_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_27c9_1028_01e6 static const pciSubsystemInfo pci_ss_info_8086_27c9_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27c9_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27c9_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27c9_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27c9_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27c9_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27c9_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_27c9_107b_5048, 0}; #undef pci_ss_info_107b_5048 @@ -46212,10 +52341,26 @@ static const pciSubsystemInfo pci_ss_info_8086_27c9_8086_544e = {0x8086, 0x544e, pci_subsys_8086_27c9_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_27c9_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27ca_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27ca_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27ca_1025_006c +static const pciSubsystemInfo pci_ss_info_8086_27ca_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27ca_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27ca_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_27ca_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_27ca_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_27ca_1028_01e6 static const pciSubsystemInfo pci_ss_info_8086_27ca_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27ca_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27ca_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27ca_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27ca_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27ca_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27ca_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_27ca_107b_5048, 0}; #undef pci_ss_info_107b_5048 @@ -46228,10 +52373,22 @@ static const pciSubsystemInfo pci_ss_info_8086_27ca_8086_544e = {0x8086, 0x544e, pci_subsys_8086_27ca_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_27ca_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27cb_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27cb_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27cb_1025_006c +static const pciSubsystemInfo pci_ss_info_8086_27cb_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27cb_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27cb_1028_01df static const pciSubsystemInfo pci_ss_info_8086_27cb_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27cb_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27cb_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27cb_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27cb_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27cb_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27cb_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_27cb_107b_5048, 0}; #undef pci_ss_info_107b_5048 @@ -46244,10 +52401,26 @@ static const pciSubsystemInfo pci_ss_info_8086_27cb_8086_544e = {0x8086, 0x544e, pci_subsys_8086_27cb_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_27cb_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27cc_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27cc_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27cc_1025_006c +static const pciSubsystemInfo pci_ss_info_8086_27cc_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27cc_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27cc_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_27cc_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_27cc_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_27cc_1028_01e6 static const pciSubsystemInfo pci_ss_info_8086_27cc_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27cc_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27cc_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27cc_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27cc_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27cc_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27cc_17aa_200b = {0x17aa, 0x200b, pci_subsys_8086_27cc_17aa_200b, 0}; #undef pci_ss_info_17aa_200b @@ -46256,10 +52429,34 @@ static const pciSubsystemInfo pci_ss_info_8086_27cc_8086_544e = {0x8086, 0x544e, pci_subsys_8086_27cc_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_27cc_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27d0_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27d0_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27d0_103c_30a3 +static const pciSubsystemInfo pci_ss_info_8086_27d2_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27d2_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27d2_103c_30a3 +static const pciSubsystemInfo pci_ss_info_8086_27d6_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27d6_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27d6_103c_30a3 +static const pciSubsystemInfo pci_ss_info_8086_27d8_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27d8_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27d8_1025_006c static const pciSubsystemInfo pci_ss_info_8086_27d8_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27d8_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27d8_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27d8_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27d8_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27d8_103c_30a3 +static const pciSubsystemInfo pci_ss_info_8086_27d8_1043_13c4 = + {0x1043, 0x13c4, pci_subsys_8086_27d8_1043_13c4, 0}; +#undef pci_ss_info_1043_13c4 +#define pci_ss_info_1043_13c4 pci_ss_info_8086_27d8_1043_13c4 static const pciSubsystemInfo pci_ss_info_8086_27d8_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_27d8_107b_5048, 0}; #undef pci_ss_info_107b_5048 @@ -46268,6 +52465,10 @@ static const pciSubsystemInfo pci_ss_info_8086_27d8_10f7_8338 = {0x10f7, 0x8338, pci_subsys_8086_27d8_10f7_8338, 0}; #undef pci_ss_info_10f7_8338 #define pci_ss_info_10f7_8338 pci_ss_info_8086_27d8_10f7_8338 +static const pciSubsystemInfo pci_ss_info_8086_27d8_1179_ff10 = + {0x1179, 0xff10, pci_subsys_8086_27d8_1179_ff10, 0}; +#undef pci_ss_info_1179_ff10 +#define pci_ss_info_1179_ff10 pci_ss_info_8086_27d8_1179_ff10 static const pciSubsystemInfo pci_ss_info_8086_27d8_1179_ff31 = {0x1179, 0xff31, pci_subsys_8086_27d8_1179_ff31, 0}; #undef pci_ss_info_1179_ff31 @@ -46284,6 +52485,30 @@ static const pciSubsystemInfo pci_ss_info_8086_27d8_17aa_2010 = {0x17aa, 0x2010, pci_subsys_8086_27d8_17aa_2010, 0}; #undef pci_ss_info_17aa_2010 #define pci_ss_info_17aa_2010 pci_ss_info_8086_27d8_17aa_2010 +static const pciSubsystemInfo pci_ss_info_8086_27d8_17aa_3802 = + {0x17aa, 0x3802, pci_subsys_8086_27d8_17aa_3802, 0}; +#undef pci_ss_info_17aa_3802 +#define pci_ss_info_17aa_3802 pci_ss_info_8086_27d8_17aa_3802 +static const pciSubsystemInfo pci_ss_info_8086_27d8_8086_1112 = + {0x8086, 0x1112, pci_subsys_8086_27d8_8086_1112, 0}; +#undef pci_ss_info_8086_1112 +#define pci_ss_info_8086_1112 pci_ss_info_8086_27d8_8086_1112 +static const pciSubsystemInfo pci_ss_info_8086_27d8_8086_27d8 = + {0x8086, 0x27d8, pci_subsys_8086_27d8_8086_27d8, 0}; +#undef pci_ss_info_8086_27d8 +#define pci_ss_info_8086_27d8 pci_ss_info_8086_27d8_8086_27d8 +static const pciSubsystemInfo pci_ss_info_8086_27da_1025_006c = + {0x1025, 0x006c, pci_subsys_8086_27da_1025_006c, 0}; +#undef pci_ss_info_1025_006c +#define pci_ss_info_1025_006c pci_ss_info_8086_27da_1025_006c +static const pciSubsystemInfo pci_ss_info_8086_27da_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27da_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27da_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_27da_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_27da_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_27da_1028_01e6 static const pciSubsystemInfo pci_ss_info_8086_27da_10f7_8338 = {0x10f7, 0x8338, pci_subsys_8086_27da_10f7_8338, 0}; #undef pci_ss_info_10f7_8338 @@ -46296,14 +52521,34 @@ static const pciSubsystemInfo pci_ss_info_8086_27da_8086_544e = {0x8086, 0x544e, pci_subsys_8086_27da_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_27da_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27da_8086_5842 = + {0x8086, 0x5842, pci_subsys_8086_27da_8086_5842, 0}; +#undef pci_ss_info_8086_5842 +#define pci_ss_info_8086_5842 pci_ss_info_8086_27da_8086_5842 static const pciSubsystemInfo pci_ss_info_8086_27dc_8086_308d = {0x8086, 0x308d, pci_subsys_8086_27dc_8086_308d, 0}; #undef pci_ss_info_8086_308d #define pci_ss_info_8086_308d pci_ss_info_8086_27dc_8086_308d +static const pciSubsystemInfo pci_ss_info_8086_27de_1462_7267 = + {0x1462, 0x7267, pci_subsys_8086_27de_1462_7267, 0}; +#undef pci_ss_info_1462_7267 +#define pci_ss_info_1462_7267 pci_ss_info_8086_27de_1462_7267 +static const pciSubsystemInfo pci_ss_info_8086_27df_1028_01df = + {0x1028, 0x01df, pci_subsys_8086_27df_1028_01df, 0}; +#undef pci_ss_info_1028_01df +#define pci_ss_info_1028_01df pci_ss_info_8086_27df_1028_01df +static const pciSubsystemInfo pci_ss_info_8086_27df_1028_01e6 = + {0x1028, 0x01e6, pci_subsys_8086_27df_1028_01e6, 0}; +#undef pci_ss_info_1028_01e6 +#define pci_ss_info_1028_01e6 pci_ss_info_8086_27df_1028_01e6 static const pciSubsystemInfo pci_ss_info_8086_27df_103c_30a1 = {0x103c, 0x30a1, pci_subsys_8086_27df_103c_30a1, 0}; #undef pci_ss_info_103c_30a1 #define pci_ss_info_103c_30a1 pci_ss_info_8086_27df_103c_30a1 +static const pciSubsystemInfo pci_ss_info_8086_27df_103c_30a3 = + {0x103c, 0x30a3, pci_subsys_8086_27df_103c_30a3, 0}; +#undef pci_ss_info_103c_30a3 +#define pci_ss_info_103c_30a3 pci_ss_info_8086_27df_103c_30a3 static const pciSubsystemInfo pci_ss_info_8086_27df_107b_5048 = {0x107b, 0x5048, pci_subsys_8086_27df_107b_5048, 0}; #undef pci_ss_info_107b_5048 @@ -46320,34 +52565,606 @@ static const pciSubsystemInfo pci_ss_info_8086_27df_8086_544e = {0x8086, 0x544e, pci_subsys_8086_27df_8086_544e, 0}; #undef pci_ss_info_8086_544e #define pci_ss_info_8086_544e pci_ss_info_8086_27df_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_2810_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_2810_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_2810_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_2811_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2811_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2811_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2815_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2815_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2815_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2815_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2815_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2815_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2815_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2815_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2815_104d_9005 +static const pciSubsystemInfo pci_ss_info_8086_2820_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2820_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2820_1028_01da static const pciSubsystemInfo pci_ss_info_8086_2820_1462_7235 = {0x1462, 0x7235, pci_subsys_8086_2820_1462_7235, 0}; #undef pci_ss_info_1462_7235 #define pci_ss_info_1462_7235 pci_ss_info_8086_2820_1462_7235 +static const pciSubsystemInfo pci_ss_info_8086_2824_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_2824_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_2824_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_2825_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2825_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2825_1028_01da static const pciSubsystemInfo pci_ss_info_8086_2825_1462_7235 = {0x1462, 0x7235, pci_subsys_8086_2825_1462_7235, 0}; #undef pci_ss_info_1462_7235 #define pci_ss_info_1462_7235 pci_ss_info_8086_2825_1462_7235 +static const pciSubsystemInfo pci_ss_info_8086_2828_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2828_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2828_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2828_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2828_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2828_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2829_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2829_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2829_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2829_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2829_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2829_104d_9005 +static const pciSubsystemInfo pci_ss_info_8086_2829_17aa_20a7 = + {0x17aa, 0x20a7, pci_subsys_8086_2829_17aa_20a7, 0}; +#undef pci_ss_info_17aa_20a7 +#define pci_ss_info_17aa_20a7 pci_ss_info_8086_2829_17aa_20a7 +static const pciSubsystemInfo pci_ss_info_8086_2830_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2830_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2830_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_2830_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2830_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2830_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2830_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2830_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2830_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2830_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_2830_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_2830_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_2830_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2830_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2830_104d_9005 static const pciSubsystemInfo pci_ss_info_8086_2830_1462_7235 = {0x1462, 0x7235, pci_subsys_8086_2830_1462_7235, 0}; #undef pci_ss_info_1462_7235 #define pci_ss_info_1462_7235 pci_ss_info_8086_2830_1462_7235 +static const pciSubsystemInfo pci_ss_info_8086_2830_17aa_20aa = + {0x17aa, 0x20aa, pci_subsys_8086_2830_17aa_20aa, 0}; +#undef pci_ss_info_17aa_20aa +#define pci_ss_info_17aa_20aa pci_ss_info_8086_2830_17aa_20aa +static const pciSubsystemInfo pci_ss_info_8086_2830_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2830_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2830_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2831_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2831_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2831_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_2831_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2831_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2831_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2831_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2831_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2831_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2831_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_2831_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_2831_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_2831_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2831_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2831_104d_9005 static const pciSubsystemInfo pci_ss_info_8086_2831_1462_7235 = {0x1462, 0x7235, pci_subsys_8086_2831_1462_7235, 0}; #undef pci_ss_info_1462_7235 #define pci_ss_info_1462_7235 pci_ss_info_8086_2831_1462_7235 +static const pciSubsystemInfo pci_ss_info_8086_2831_17aa_20aa = + {0x17aa, 0x20aa, pci_subsys_8086_2831_17aa_20aa, 0}; +#undef pci_ss_info_17aa_20aa +#define pci_ss_info_17aa_20aa pci_ss_info_8086_2831_17aa_20aa +static const pciSubsystemInfo pci_ss_info_8086_2831_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2831_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2831_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2832_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2832_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2832_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_2832_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2832_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2832_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2832_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2832_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2832_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2832_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_2832_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_2832_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_2832_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2832_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2832_104d_9005 +static const pciSubsystemInfo pci_ss_info_8086_2832_17aa_20aa = + {0x17aa, 0x20aa, pci_subsys_8086_2832_17aa_20aa, 0}; +#undef pci_ss_info_17aa_20aa +#define pci_ss_info_17aa_20aa pci_ss_info_8086_2832_17aa_20aa +static const pciSubsystemInfo pci_ss_info_8086_2832_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2832_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2832_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2834_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2834_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2834_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_2834_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2834_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2834_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2834_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2834_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2834_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2834_103c_30c1 = + {0x103c, 0x30c1, pci_subsys_8086_2834_103c_30c1, 0}; +#undef pci_ss_info_103c_30c1 +#define pci_ss_info_103c_30c1 pci_ss_info_8086_2834_103c_30c1 +static const pciSubsystemInfo pci_ss_info_8086_2834_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_2834_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_2834_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_2834_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2834_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2834_104d_9005 static const pciSubsystemInfo pci_ss_info_8086_2834_1462_7235 = {0x1462, 0x7235, pci_subsys_8086_2834_1462_7235, 0}; #undef pci_ss_info_1462_7235 #define pci_ss_info_1462_7235 pci_ss_info_8086_2834_1462_7235 +static const pciSubsystemInfo pci_ss_info_8086_2834_17aa_20aa = + {0x17aa, 0x20aa, pci_subsys_8086_2834_17aa_20aa, 0}; +#undef pci_ss_info_17aa_20aa +#define pci_ss_info_17aa_20aa pci_ss_info_8086_2834_17aa_20aa +static const pciSubsystemInfo pci_ss_info_8086_2834_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2834_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2834_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2835_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2835_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2835_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_2835_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2835_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2835_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2835_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2835_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2835_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2835_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_2835_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_2835_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_2835_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2835_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2835_104d_9005 +static const pciSubsystemInfo pci_ss_info_8086_2835_17aa_20aa = + {0x17aa, 0x20aa, pci_subsys_8086_2835_17aa_20aa, 0}; +#undef pci_ss_info_17aa_20aa +#define pci_ss_info_17aa_20aa pci_ss_info_8086_2835_17aa_20aa +static const pciSubsystemInfo pci_ss_info_8086_2835_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2835_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2835_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2836_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2836_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2836_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_2836_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2836_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2836_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2836_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2836_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2836_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2836_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_2836_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_2836_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_2836_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2836_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2836_104d_9005 static const pciSubsystemInfo pci_ss_info_8086_2836_1462_7235 = {0x1462, 0x7235, pci_subsys_8086_2836_1462_7235, 0}; #undef pci_ss_info_1462_7235 #define pci_ss_info_1462_7235 pci_ss_info_8086_2836_1462_7235 +static const pciSubsystemInfo pci_ss_info_8086_2836_17aa_20ab = + {0x17aa, 0x20ab, pci_subsys_8086_2836_17aa_20ab, 0}; +#undef pci_ss_info_17aa_20ab +#define pci_ss_info_17aa_20ab pci_ss_info_8086_2836_17aa_20ab +static const pciSubsystemInfo pci_ss_info_8086_2836_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2836_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2836_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_283a_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_283a_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_283a_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_283a_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_283a_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_283a_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_283a_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_283a_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_283a_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_283a_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_283a_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_283a_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_283a_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_283a_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_283a_104d_9005 +static const pciSubsystemInfo pci_ss_info_8086_283a_17aa_20ab = + {0x17aa, 0x20ab, pci_subsys_8086_283a_17aa_20ab, 0}; +#undef pci_ss_info_17aa_20ab +#define pci_ss_info_17aa_20ab pci_ss_info_8086_283a_17aa_20ab +static const pciSubsystemInfo pci_ss_info_8086_283a_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_283a_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_283a_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_283e_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_283e_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_283e_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_283e_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_283e_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_283e_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_283e_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_283e_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_283e_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_283e_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_283e_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_283e_104d_9005 static const pciSubsystemInfo pci_ss_info_8086_283e_1462_7235 = {0x1462, 0x7235, pci_subsys_8086_283e_1462_7235, 0}; #undef pci_ss_info_1462_7235 #define pci_ss_info_1462_7235 pci_ss_info_8086_283e_1462_7235 +static const pciSubsystemInfo pci_ss_info_8086_283e_17aa_20a9 = + {0x17aa, 0x20a9, pci_subsys_8086_283e_17aa_20a9, 0}; +#undef pci_ss_info_17aa_20a9 +#define pci_ss_info_17aa_20a9 pci_ss_info_8086_283e_17aa_20a9 +static const pciSubsystemInfo pci_ss_info_8086_283e_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_283e_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_283e_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_283f_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_283f_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_283f_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_2847_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2847_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2847_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_284b_0690_107b = + {0x0690, 0x107b, pci_subsys_8086_284b_0690_107b, 0}; +#undef pci_ss_info_0690_107b +#define pci_ss_info_0690_107b pci_ss_info_8086_284b_0690_107b +static const pciSubsystemInfo pci_ss_info_8086_284b_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_284b_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_284b_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_284b_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_284b_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_284b_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_284b_1028_01f9 = + {0x1028, 0x01f9, pci_subsys_8086_284b_1028_01f9, 0}; +#undef pci_ss_info_1028_01f9 +#define pci_ss_info_1028_01f9 pci_ss_info_8086_284b_1028_01f9 +static const pciSubsystemInfo pci_ss_info_8086_284b_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_284b_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_284b_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_284b_1043_81ec = + {0x1043, 0x81ec, pci_subsys_8086_284b_1043_81ec, 0}; +#undef pci_ss_info_1043_81ec +#define pci_ss_info_1043_81ec pci_ss_info_8086_284b_1043_81ec +static const pciSubsystemInfo pci_ss_info_8086_284b_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_284b_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_284b_104d_9005 +static const pciSubsystemInfo pci_ss_info_8086_284b_17aa_20ac = + {0x17aa, 0x20ac, pci_subsys_8086_284b_17aa_20ac, 0}; +#undef pci_ss_info_17aa_20ac +#define pci_ss_info_17aa_20ac pci_ss_info_8086_284b_17aa_20ac +static const pciSubsystemInfo pci_ss_info_8086_2850_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2850_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2850_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2850_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2850_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2850_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2850_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2850_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2850_104d_9005 +static const pciSubsystemInfo pci_ss_info_8086_2850_17aa_20a6 = + {0x17aa, 0x20a6, pci_subsys_8086_2850_17aa_20a6, 0}; +#undef pci_ss_info_17aa_20a6 +#define pci_ss_info_17aa_20a6 pci_ss_info_8086_2850_17aa_20a6 +static const pciSubsystemInfo pci_ss_info_8086_2850_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2850_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2850_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2914_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2914_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2914_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2920_1028_020f = + {0x1028, 0x020f, pci_subsys_8086_2920_1028_020f, 0}; +#undef pci_ss_info_1028_020f +#define pci_ss_info_1028_020f pci_ss_info_8086_2920_1028_020f +static const pciSubsystemInfo pci_ss_info_8086_2920_1028_0210 = + {0x1028, 0x0210, pci_subsys_8086_2920_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_8086_2920_1028_0210 +static const pciSubsystemInfo pci_ss_info_8086_2920_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2920_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2920_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2926_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2926_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2926_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2930_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2930_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2930_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2934_1028_020f = + {0x1028, 0x020f, pci_subsys_8086_2934_1028_020f, 0}; +#undef pci_ss_info_1028_020f +#define pci_ss_info_1028_020f pci_ss_info_8086_2934_1028_020f +static const pciSubsystemInfo pci_ss_info_8086_2934_1028_0210 = + {0x1028, 0x0210, pci_subsys_8086_2934_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_8086_2934_1028_0210 +static const pciSubsystemInfo pci_ss_info_8086_2934_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2934_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2934_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2934_1028_2011 = + {0x1028, 0x2011, pci_subsys_8086_2934_1028_2011, 0}; +#undef pci_ss_info_1028_2011 +#define pci_ss_info_1028_2011 pci_ss_info_8086_2934_1028_2011 +static const pciSubsystemInfo pci_ss_info_8086_2935_1028_020f = + {0x1028, 0x020f, pci_subsys_8086_2935_1028_020f, 0}; +#undef pci_ss_info_1028_020f +#define pci_ss_info_1028_020f pci_ss_info_8086_2935_1028_020f +static const pciSubsystemInfo pci_ss_info_8086_2935_1028_0210 = + {0x1028, 0x0210, pci_subsys_8086_2935_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_8086_2935_1028_0210 +static const pciSubsystemInfo pci_ss_info_8086_2935_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2935_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2935_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2936_1028_020f = + {0x1028, 0x020f, pci_subsys_8086_2936_1028_020f, 0}; +#undef pci_ss_info_1028_020f +#define pci_ss_info_1028_020f pci_ss_info_8086_2936_1028_020f +static const pciSubsystemInfo pci_ss_info_8086_2936_1028_0210 = + {0x1028, 0x0210, pci_subsys_8086_2936_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_8086_2936_1028_0210 +static const pciSubsystemInfo pci_ss_info_8086_2936_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2936_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2936_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2937_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2937_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2937_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2937_1028_2011 = + {0x1028, 0x2011, pci_subsys_8086_2937_1028_2011, 0}; +#undef pci_ss_info_1028_2011 +#define pci_ss_info_1028_2011 pci_ss_info_8086_2937_1028_2011 +static const pciSubsystemInfo pci_ss_info_8086_2937_8086_2937 = + {0x8086, 0x2937, pci_subsys_8086_2937_8086_2937, 0}; +#undef pci_ss_info_8086_2937 +#define pci_ss_info_8086_2937 pci_ss_info_8086_2937_8086_2937 +static const pciSubsystemInfo pci_ss_info_8086_2938_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2938_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2938_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2938_8086_2938 = + {0x8086, 0x2938, pci_subsys_8086_2938_8086_2938, 0}; +#undef pci_ss_info_8086_2938 +#define pci_ss_info_8086_2938 pci_ss_info_8086_2938_8086_2938 +static const pciSubsystemInfo pci_ss_info_8086_2939_1028_0210 = + {0x1028, 0x0210, pci_subsys_8086_2939_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_8086_2939_1028_0210 +static const pciSubsystemInfo pci_ss_info_8086_293a_1028_020f = + {0x1028, 0x020f, pci_subsys_8086_293a_1028_020f, 0}; +#undef pci_ss_info_1028_020f +#define pci_ss_info_1028_020f pci_ss_info_8086_293a_1028_020f +static const pciSubsystemInfo pci_ss_info_8086_293a_1028_0210 = + {0x1028, 0x0210, pci_subsys_8086_293a_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_8086_293a_1028_0210 +static const pciSubsystemInfo pci_ss_info_8086_293a_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_293a_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_293a_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_293c_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_293c_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_293c_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_293c_8086_293c = + {0x8086, 0x293c, pci_subsys_8086_293c_8086_293c, 0}; +#undef pci_ss_info_8086_293c +#define pci_ss_info_8086_293c pci_ss_info_8086_293c_8086_293c +static const pciSubsystemInfo pci_ss_info_8086_293e_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_293e_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_293e_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_293e_8086_293e = + {0x8086, 0x293e, pci_subsys_8086_293e_8086_293e, 0}; +#undef pci_ss_info_8086_293e +#define pci_ss_info_8086_293e pci_ss_info_8086_293e_8086_293e +static const pciSubsystemInfo pci_ss_info_8086_293e_8086_2940 = + {0x8086, 0x2940, pci_subsys_8086_293e_8086_2940, 0}; +#undef pci_ss_info_8086_2940 +#define pci_ss_info_8086_2940 pci_ss_info_8086_293e_8086_2940 +static const pciSubsystemInfo pci_ss_info_8086_2940_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_2940_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_2940_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2940_8086_2940 = + {0x8086, 0x2940, pci_subsys_8086_2940_8086_2940, 0}; +#undef pci_ss_info_8086_2940 +#define pci_ss_info_8086_2940 pci_ss_info_8086_2940_8086_2940 +static const pciSubsystemInfo pci_ss_info_8086_294c_17aa_302e = + {0x17aa, 0x302e, pci_subsys_8086_294c_17aa_302e, 0}; +#undef pci_ss_info_17aa_302e +#define pci_ss_info_17aa_302e pci_ss_info_8086_294c_17aa_302e +static const pciSubsystemInfo pci_ss_info_8086_2990_1028_01da = + {0x1028, 0x01da, pci_subsys_8086_2990_1028_01da, 0}; +#undef pci_ss_info_1028_01da +#define pci_ss_info_1028_01da pci_ss_info_8086_2990_1028_01da +static const pciSubsystemInfo pci_ss_info_8086_29a0_1043_81ea = + {0x1043, 0x81ea, pci_subsys_8086_29a0_1043_81ea, 0}; +#undef pci_ss_info_1043_81ea +#define pci_ss_info_1043_81ea pci_ss_info_8086_29a0_1043_81ea +static const pciSubsystemInfo pci_ss_info_8086_29a0_1462_7276 = + {0x1462, 0x7276, pci_subsys_8086_29a0_1462_7276, 0}; +#undef pci_ss_info_1462_7276 +#define pci_ss_info_1462_7276 pci_ss_info_8086_29a0_1462_7276 +static const pciSubsystemInfo pci_ss_info_8086_29a2_1462_7276 = + {0x1462, 0x7276, pci_subsys_8086_29a2_1462_7276, 0}; +#undef pci_ss_info_1462_7276 +#define pci_ss_info_1462_7276 pci_ss_info_8086_29a2_1462_7276 +static const pciSubsystemInfo pci_ss_info_8086_29b0_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_29b0_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_29b0_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_29b1_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_29b1_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_29b1_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_29b2_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_29b2_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_29b2_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_29b3_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_29b3_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_29b3_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_29b4_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_29b4_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_29b4_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_29b6_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_29b6_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_29b6_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_29b7_1028_0211 = + {0x1028, 0x0211, pci_subsys_8086_29b7_1028_0211, 0}; +#undef pci_ss_info_1028_0211 +#define pci_ss_info_1028_0211 pci_ss_info_8086_29b7_1028_0211 +static const pciSubsystemInfo pci_ss_info_8086_2a00_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2a00_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2a00_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2a00_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2a00_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2a00_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2a00_104d_9005 = + {0x104d, 0x9005, pci_subsys_8086_2a00_104d_9005, 0}; +#undef pci_ss_info_104d_9005 +#define pci_ss_info_104d_9005 pci_ss_info_8086_2a00_104d_9005 +static const pciSubsystemInfo pci_ss_info_8086_2a00_17aa_20b1 = + {0x17aa, 0x20b1, pci_subsys_8086_2a00_17aa_20b1, 0}; +#undef pci_ss_info_17aa_20b1 +#define pci_ss_info_17aa_20b1 pci_ss_info_8086_2a00_17aa_20b1 +static const pciSubsystemInfo pci_ss_info_8086_2a00_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2a00_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2a00_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2a02_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2a02_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2a02_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2a02_1028_01f9 = + {0x1028, 0x01f9, pci_subsys_8086_2a02_1028_01f9, 0}; +#undef pci_ss_info_1028_01f9 +#define pci_ss_info_1028_01f9 pci_ss_info_8086_2a02_1028_01f9 +static const pciSubsystemInfo pci_ss_info_8086_2a02_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2a02_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2a02_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2a02_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2a02_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2a02_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2a03_1028_01f3 = + {0x1028, 0x01f3, pci_subsys_8086_2a03_1028_01f3, 0}; +#undef pci_ss_info_1028_01f3 +#define pci_ss_info_1028_01f3 pci_ss_info_8086_2a03_1028_01f3 +static const pciSubsystemInfo pci_ss_info_8086_2a03_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_2a03_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_2a03_103c_30c0 +static const pciSubsystemInfo pci_ss_info_8086_2a03_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2a03_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2a03_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2a10_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2a10_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2a10_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2a12_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2a12_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2a12_e4bf_cc47 +static const pciSubsystemInfo pci_ss_info_8086_2a13_e4bf_cc47 = + {0xe4bf, 0xcc47, pci_subsys_8086_2a13_e4bf_cc47, 0}; +#undef pci_ss_info_e4bf_cc47 +#define pci_ss_info_e4bf_cc47 pci_ss_info_8086_2a13_e4bf_cc47 static const pciSubsystemInfo pci_ss_info_8086_3200_1775_c200 = {0x1775, 0xc200, pci_subsys_8086_3200_1775_c200, 0}; #undef pci_ss_info_1775_c200 @@ -46372,6 +53189,10 @@ static const pciSubsystemInfo pci_ss_info_8086_3340_103c_08b0 = {0x103c, 0x08b0, pci_subsys_8086_3340_103c_08b0, 0}; #undef pci_ss_info_103c_08b0 #define pci_ss_info_103c_08b0 pci_ss_info_8086_3340_103c_08b0 +static const pciSubsystemInfo pci_ss_info_8086_3340_144d_c005 = + {0x144d, 0xc005, pci_subsys_8086_3340_144d_c005, 0}; +#undef pci_ss_info_144d_c005 +#define pci_ss_info_144d_c005 pci_ss_info_8086_3340_144d_c005 static const pciSubsystemInfo pci_ss_info_8086_3340_144d_c00c = {0x144d, 0xc00c, pci_subsys_8086_3340_144d_c00c, 0}; #undef pci_ss_info_144d_c00c @@ -46404,14 +53225,26 @@ static const pciSubsystemInfo pci_ss_info_8086_3580_1028_0139 = {0x1028, 0x0139, pci_subsys_8086_3580_1028_0139, 0}; #undef pci_ss_info_1028_0139 #define pci_ss_info_1028_0139 pci_ss_info_8086_3580_1028_0139 +static const pciSubsystemInfo pci_ss_info_8086_3580_1028_014f = + {0x1028, 0x014f, pci_subsys_8086_3580_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_8086_3580_1028_014f static const pciSubsystemInfo pci_ss_info_8086_3580_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_3580_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_3580_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_3580_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_3580_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_3580_1028_018d static const pciSubsystemInfo pci_ss_info_8086_3580_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_3580_1028_0196, 0}; #undef pci_ss_info_1028_0196 #define pci_ss_info_1028_0196 pci_ss_info_8086_3580_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_3580_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_3580_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_3580_114a_0582 static const pciSubsystemInfo pci_ss_info_8086_3580_1734_1055 = {0x1734, 0x1055, pci_subsys_8086_3580_1734_1055, 0}; #undef pci_ss_info_1734_1055 @@ -46452,10 +53285,22 @@ static const pciSubsystemInfo pci_ss_info_8086_3582_1028_0139 = {0x1028, 0x0139, pci_subsys_8086_3582_1028_0139, 0}; #undef pci_ss_info_1028_0139 #define pci_ss_info_1028_0139 pci_ss_info_8086_3582_1028_0139 +static const pciSubsystemInfo pci_ss_info_8086_3582_1028_014f = + {0x1028, 0x014f, pci_subsys_8086_3582_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_8086_3582_1028_014f static const pciSubsystemInfo pci_ss_info_8086_3582_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_3582_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_3582_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_3582_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_3582_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_3582_1028_018d +static const pciSubsystemInfo pci_ss_info_8086_3582_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_3582_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_3582_114a_0582 static const pciSubsystemInfo pci_ss_info_8086_3582_1775_10d0 = {0x1775, 0x10d0, pci_subsys_8086_3582_1775_10d0, 0}; #undef pci_ss_info_1775_10d0 @@ -46488,14 +53333,26 @@ static const pciSubsystemInfo pci_ss_info_8086_3584_1028_0139 = {0x1028, 0x0139, pci_subsys_8086_3584_1028_0139, 0}; #undef pci_ss_info_1028_0139 #define pci_ss_info_1028_0139 pci_ss_info_8086_3584_1028_0139 +static const pciSubsystemInfo pci_ss_info_8086_3584_1028_014f = + {0x1028, 0x014f, pci_subsys_8086_3584_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_8086_3584_1028_014f static const pciSubsystemInfo pci_ss_info_8086_3584_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_3584_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_3584_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_3584_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_3584_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_3584_1028_018d static const pciSubsystemInfo pci_ss_info_8086_3584_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_3584_1028_0196, 0}; #undef pci_ss_info_1028_0196 #define pci_ss_info_1028_0196 pci_ss_info_8086_3584_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_3584_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_3584_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_3584_114a_0582 static const pciSubsystemInfo pci_ss_info_8086_3584_1734_1055 = {0x1734, 0x1055, pci_subsys_8086_3584_1734_1055, 0}; #undef pci_ss_info_1734_1055 @@ -46524,14 +53381,26 @@ static const pciSubsystemInfo pci_ss_info_8086_3585_1028_0139 = {0x1028, 0x0139, pci_subsys_8086_3585_1028_0139, 0}; #undef pci_ss_info_1028_0139 #define pci_ss_info_1028_0139 pci_ss_info_8086_3585_1028_0139 +static const pciSubsystemInfo pci_ss_info_8086_3585_1028_014f = + {0x1028, 0x014f, pci_subsys_8086_3585_1028_014f, 0}; +#undef pci_ss_info_1028_014f +#define pci_ss_info_1028_014f pci_ss_info_8086_3585_1028_014f static const pciSubsystemInfo pci_ss_info_8086_3585_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_3585_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_3585_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_3585_1028_018d = + {0x1028, 0x018d, pci_subsys_8086_3585_1028_018d, 0}; +#undef pci_ss_info_1028_018d +#define pci_ss_info_1028_018d pci_ss_info_8086_3585_1028_018d static const pciSubsystemInfo pci_ss_info_8086_3585_1028_0196 = {0x1028, 0x0196, pci_subsys_8086_3585_1028_0196, 0}; #undef pci_ss_info_1028_0196 #define pci_ss_info_1028_0196 pci_ss_info_8086_3585_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_3585_114a_0582 = + {0x114a, 0x0582, pci_subsys_8086_3585_114a_0582, 0}; +#undef pci_ss_info_114a_0582 +#define pci_ss_info_114a_0582 pci_ss_info_8086_3585_114a_0582 static const pciSubsystemInfo pci_ss_info_8086_3585_1734_1055 = {0x1734, 0x1055, pci_subsys_8086_3585_1734_1055, 0}; #undef pci_ss_info_1734_1055 @@ -46552,6 +53421,18 @@ static const pciSubsystemInfo pci_ss_info_8086_3585_4c53_10e0 = {0x4c53, 0x10e0, pci_subsys_8086_3585_4c53_10e0, 0}; #undef pci_ss_info_4c53_10e0 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_3585_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_3590_1014_02dd = + {0x1014, 0x02dd, pci_subsys_8086_3590_1014_02dd, 0}; +#undef pci_ss_info_1014_02dd +#define pci_ss_info_1014_02dd pci_ss_info_8086_3590_1014_02dd +static const pciSubsystemInfo pci_ss_info_8086_3590_1028_016c = + {0x1028, 0x016c, pci_subsys_8086_3590_1028_016c, 0}; +#undef pci_ss_info_1028_016c +#define pci_ss_info_1028_016c pci_ss_info_8086_3590_1028_016c +static const pciSubsystemInfo pci_ss_info_8086_3590_1028_016d = + {0x1028, 0x016d, pci_subsys_8086_3590_1028_016d, 0}; +#undef pci_ss_info_1028_016d +#define pci_ss_info_1028_016d pci_ss_info_8086_3590_1028_016d static const pciSubsystemInfo pci_ss_info_8086_3590_1028_019a = {0x1028, 0x019a, pci_subsys_8086_3590_1028_019a, 0}; #undef pci_ss_info_1028_019a @@ -46560,10 +53441,18 @@ static const pciSubsystemInfo pci_ss_info_8086_3590_1734_103e = {0x1734, 0x103e, pci_subsys_8086_3590_1734_103e, 0}; #undef pci_ss_info_1734_103e #define pci_ss_info_1734_103e pci_ss_info_8086_3590_1734_103e +static const pciSubsystemInfo pci_ss_info_8086_3590_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_3590_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_3590_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_3590_4c53_10d0 = {0x4c53, 0x10d0, pci_subsys_8086_3590_4c53_10d0, 0}; #undef pci_ss_info_4c53_10d0 #define pci_ss_info_4c53_10d0 pci_ss_info_8086_3590_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_3591_1014_02dd = + {0x1014, 0x02dd, pci_subsys_8086_3591_1014_02dd, 0}; +#undef pci_ss_info_1014_02dd +#define pci_ss_info_1014_02dd pci_ss_info_8086_3591_1014_02dd static const pciSubsystemInfo pci_ss_info_8086_3591_1028_0169 = {0x1028, 0x0169, pci_subsys_8086_3591_1028_0169, 0}; #undef pci_ss_info_1028_0169 @@ -46572,22 +53461,62 @@ static const pciSubsystemInfo pci_ss_info_8086_3591_4c53_10d0 = {0x4c53, 0x10d0, pci_subsys_8086_3591_4c53_10d0, 0}; #undef pci_ss_info_4c53_10d0 #define pci_ss_info_4c53_10d0 pci_ss_info_8086_3591_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_3594_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_3594_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_3594_1775_1100 static const pciSubsystemInfo pci_ss_info_8086_3594_4c53_10d0 = {0x4c53, 0x10d0, pci_subsys_8086_3594_4c53_10d0, 0}; #undef pci_ss_info_4c53_10d0 #define pci_ss_info_4c53_10d0 pci_ss_info_8086_3594_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_3595_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_3595_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_3595_1775_1100 +static const pciSubsystemInfo pci_ss_info_8086_3597_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_3597_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_3597_1775_1100 +static const pciSubsystemInfo pci_ss_info_8086_3598_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_3598_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_3598_1775_1100 +static const pciSubsystemInfo pci_ss_info_8086_3599_1775_1100 = + {0x1775, 0x1100, pci_subsys_8086_3599_1775_1100, 0}; +#undef pci_ss_info_1775_1100 +#define pci_ss_info_1775_1100 pci_ss_info_8086_3599_1775_1100 +static const pciSubsystemInfo pci_ss_info_8086_359b_1014_02dd = + {0x1014, 0x02dd, pci_subsys_8086_359b_1014_02dd, 0}; +#undef pci_ss_info_1014_02dd +#define pci_ss_info_1014_02dd pci_ss_info_8086_359b_1014_02dd static const pciSubsystemInfo pci_ss_info_8086_359e_1028_0169 = {0x1028, 0x0169, pci_subsys_8086_359e_1028_0169, 0}; #undef pci_ss_info_1028_0169 #define pci_ss_info_1028_0169 pci_ss_info_8086_359e_1028_0169 -static const pciSubsystemInfo pci_ss_info_8086_4220_2731_8086 = - {0x2731, 0x8086, pci_subsys_8086_4220_2731_8086, 0}; -#undef pci_ss_info_2731_8086 -#define pci_ss_info_2731_8086 pci_ss_info_8086_4220_2731_8086 +static const pciSubsystemInfo pci_ss_info_8086_4220_103c_0934 = + {0x103c, 0x0934, pci_subsys_8086_4220_103c_0934, 0}; +#undef pci_ss_info_103c_0934 +#define pci_ss_info_103c_0934 pci_ss_info_8086_4220_103c_0934 +static const pciSubsystemInfo pci_ss_info_8086_4220_103c_12f6 = + {0x103c, 0x12f6, pci_subsys_8086_4220_103c_12f6, 0}; +#undef pci_ss_info_103c_12f6 +#define pci_ss_info_103c_12f6 pci_ss_info_8086_4220_103c_12f6 +static const pciSubsystemInfo pci_ss_info_8086_4220_8086_2721 = + {0x8086, 0x2721, pci_subsys_8086_4220_8086_2721, 0}; +#undef pci_ss_info_8086_2721 +#define pci_ss_info_8086_2721 pci_ss_info_8086_4220_8086_2721 static const pciSubsystemInfo pci_ss_info_8086_4220_8086_2731 = {0x8086, 0x2731, pci_subsys_8086_4220_8086_2731, 0}; #undef pci_ss_info_8086_2731 #define pci_ss_info_8086_2731 pci_ss_info_8086_4220_8086_2731 +static const pciSubsystemInfo pci_ss_info_8086_4222_103c_135c = + {0x103c, 0x135c, pci_subsys_8086_4222_103c_135c, 0}; +#undef pci_ss_info_103c_135c +#define pci_ss_info_103c_135c pci_ss_info_8086_4222_103c_135c +static const pciSubsystemInfo pci_ss_info_8086_4222_103c_30c0 = + {0x103c, 0x30c0, pci_subsys_8086_4222_103c_30c0, 0}; +#undef pci_ss_info_103c_30c0 +#define pci_ss_info_103c_30c0 pci_ss_info_8086_4222_103c_30c0 static const pciSubsystemInfo pci_ss_info_8086_4222_8086_1005 = {0x8086, 0x1005, pci_subsys_8086_4222_8086_1005, 0}; #undef pci_ss_info_8086_1005 @@ -46600,6 +53529,22 @@ static const pciSubsystemInfo pci_ss_info_8086_4222_8086_1044 = {0x8086, 0x1044, pci_subsys_8086_4222_8086_1044, 0}; #undef pci_ss_info_8086_1044 #define pci_ss_info_8086_1044 pci_ss_info_8086_4222_8086_1044 +static const pciSubsystemInfo pci_ss_info_8086_4223_1000_8086 = + {0x1000, 0x8086, pci_subsys_8086_4223_1000_8086, 0}; +#undef pci_ss_info_1000_8086 +#define pci_ss_info_1000_8086 pci_ss_info_8086_4223_1000_8086 +static const pciSubsystemInfo pci_ss_info_8086_4223_1001_8086 = + {0x1001, 0x8086, pci_subsys_8086_4223_1001_8086, 0}; +#undef pci_ss_info_1001_8086 +#define pci_ss_info_1001_8086 pci_ss_info_8086_4223_1001_8086 +static const pciSubsystemInfo pci_ss_info_8086_4223_1002_8086 = + {0x1002, 0x8086, pci_subsys_8086_4223_1002_8086, 0}; +#undef pci_ss_info_1002_8086 +#define pci_ss_info_1002_8086 pci_ss_info_8086_4223_1002_8086 +static const pciSubsystemInfo pci_ss_info_8086_4223_1003_8086 = + {0x1003, 0x8086, pci_subsys_8086_4223_1003_8086, 0}; +#undef pci_ss_info_1003_8086 +#define pci_ss_info_1003_8086 pci_ss_info_8086_4223_1003_8086 static const pciSubsystemInfo pci_ss_info_8086_4223_1351_103c = {0x1351, 0x103c, pci_subsys_8086_4223_1351_103c, 0}; #undef pci_ss_info_1351_103c @@ -46612,10 +53557,30 @@ static const pciSubsystemInfo pci_ss_info_8086_4227_8086_1014 = {0x8086, 0x1014, pci_subsys_8086_4227_8086_1014, 0}; #undef pci_ss_info_8086_1014 #define pci_ss_info_8086_1014 pci_ss_info_8086_4227_8086_1014 +static const pciSubsystemInfo pci_ss_info_8086_4230_8086_1110 = + {0x8086, 0x1110, pci_subsys_8086_4230_8086_1110, 0}; +#undef pci_ss_info_8086_1110 +#define pci_ss_info_8086_1110 pci_ss_info_8086_4230_8086_1110 +static const pciSubsystemInfo pci_ss_info_8086_4230_8086_1111 = + {0x8086, 0x1111, pci_subsys_8086_4230_8086_1111, 0}; +#undef pci_ss_info_8086_1111 +#define pci_ss_info_8086_1111 pci_ss_info_8086_4230_8086_1111 static const pciSubsystemInfo pci_ss_info_8086_5201_8086_0001 = {0x8086, 0x0001, pci_subsys_8086_5201_8086_0001, 0}; #undef pci_ss_info_8086_0001 #define pci_ss_info_8086_0001 pci_ss_info_8086_5201_8086_0001 +static const pciSubsystemInfo pci_ss_info_8086_65f0_1028_020f = + {0x1028, 0x020f, pci_subsys_8086_65f0_1028_020f, 0}; +#undef pci_ss_info_1028_020f +#define pci_ss_info_1028_020f pci_ss_info_8086_65f0_1028_020f +static const pciSubsystemInfo pci_ss_info_8086_65f0_1028_0210 = + {0x1028, 0x0210, pci_subsys_8086_65f0_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_8086_65f0_1028_0210 +static const pciSubsystemInfo pci_ss_info_8086_65f1_1028_0210 = + {0x1028, 0x0210, pci_subsys_8086_65f1_1028_0210, 0}; +#undef pci_ss_info_1028_0210 +#define pci_ss_info_1028_0210 pci_ss_info_8086_65f1_1028_0210 static const pciSubsystemInfo pci_ss_info_8086_7110_15ad_1976 = {0x15ad, 0x1976, pci_subsys_8086_7110_15ad_1976, 0}; #undef pci_ss_info_15ad_1976 @@ -46652,6 +53617,14 @@ static const pciSubsystemInfo pci_ss_info_8086_7121_8086_4341 = {0x8086, 0x4341, pci_subsys_8086_7121_8086_4341, 0}; #undef pci_ss_info_8086_4341 #define pci_ss_info_8086_4341 pci_ss_info_8086_7121_8086_4341 +static const pciSubsystemInfo pci_ss_info_8086_7124_1028_00b4 = + {0x1028, 0x00b4, pci_subsys_8086_7124_1028_00b4, 0}; +#undef pci_ss_info_1028_00b4 +#define pci_ss_info_1028_00b4 pci_ss_info_8086_7124_1028_00b4 +static const pciSubsystemInfo pci_ss_info_8086_7125_1028_00b4 = + {0x1028, 0x00b4, pci_subsys_8086_7125_1028_00b4, 0}; +#undef pci_ss_info_1028_00b4 +#define pci_ss_info_1028_00b4 pci_ss_info_8086_7125_1028_00b4 static const pciSubsystemInfo pci_ss_info_8086_7190_0e11_0500 = {0x0e11, 0x0500, pci_subsys_8086_7190_0e11_0500, 0}; #undef pci_ss_info_0e11_0500 @@ -46664,6 +53637,10 @@ static const pciSubsystemInfo pci_ss_info_8086_7190_1028_008e = {0x1028, 0x008e, pci_subsys_8086_7190_1028_008e, 0}; #undef pci_ss_info_1028_008e #define pci_ss_info_1028_008e pci_ss_info_8086_7190_1028_008e +static const pciSubsystemInfo pci_ss_info_8086_7190_1043_803b = + {0x1043, 0x803b, pci_subsys_8086_7190_1043_803b, 0}; +#undef pci_ss_info_1043_803b +#define pci_ss_info_1043_803b pci_ss_info_8086_7190_1043_803b static const pciSubsystemInfo pci_ss_info_8086_7190_1179_0001 = {0x1179, 0x0001, pci_subsys_8086_7190_1179_0001, 0}; #undef pci_ss_info_1179_0001 @@ -46692,6 +53669,10 @@ static const pciSubsystemInfo pci_ss_info_8086_7192_4c53_1000 = {0x4c53, 0x1000, pci_subsys_8086_7192_4c53_1000, 0}; #undef pci_ss_info_4c53_1000 #define pci_ss_info_4c53_1000 pci_ss_info_8086_7192_4c53_1000 +static const pciSubsystemInfo pci_ss_info_8086_7192_8086_7190 = + {0x8086, 0x7190, pci_subsys_8086_7192_8086_7190, 0}; +#undef pci_ss_info_8086_7190 +#define pci_ss_info_8086_7190 pci_ss_info_8086_7192_8086_7190 static const pciSubsystemInfo pci_ss_info_8086_7194_1033_0000 = {0x1033, 0x0000, pci_subsys_8086_7194_1033_0000, 0}; #undef pci_ss_info_1033_0000 @@ -47101,6 +54082,46 @@ static const pciSubsystemInfo pci_ss_info_9005_0285_103c_3227 = #undef pci_ss_info_103c_3227 #define pci_ss_info_103c_3227 pci_ss_info_9005_0285_103c_3227 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_9005_0285_108e_0286 = + {0x108e, 0x0286, pci_subsys_9005_0285_108e_0286, 0}; +#undef pci_ss_info_108e_0286 +#define pci_ss_info_108e_0286 pci_ss_info_9005_0285_108e_0286 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_9005_0285_108e_0287 = + {0x108e, 0x0287, pci_subsys_9005_0285_108e_0287, 0}; +#undef pci_ss_info_108e_0287 +#define pci_ss_info_108e_0287 pci_ss_info_9005_0285_108e_0287 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_9005_0285_108e_7aac = + {0x108e, 0x7aac, pci_subsys_9005_0285_108e_7aac, 0}; +#undef pci_ss_info_108e_7aac +#define pci_ss_info_108e_7aac pci_ss_info_9005_0285_108e_7aac +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_9005_0285_108e_7aae = + {0x108e, 0x7aae, pci_subsys_9005_0285_108e_7aae, 0}; +#undef pci_ss_info_108e_7aae +#define pci_ss_info_108e_7aae pci_ss_info_9005_0285_108e_7aae +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_9005_0285_15d9_02b5 = + {0x15d9, 0x02b5, pci_subsys_9005_0285_15d9_02b5, 0}; +#undef pci_ss_info_15d9_02b5 +#define pci_ss_info_15d9_02b5 pci_ss_info_9005_0285_15d9_02b5 +static const pciSubsystemInfo pci_ss_info_9005_0285_15d9_02b6 = + {0x15d9, 0x02b6, pci_subsys_9005_0285_15d9_02b6, 0}; +#undef pci_ss_info_15d9_02b6 +#define pci_ss_info_15d9_02b6 pci_ss_info_9005_0285_15d9_02b6 +static const pciSubsystemInfo pci_ss_info_9005_0285_15d9_02c9 = + {0x15d9, 0x02c9, pci_subsys_9005_0285_15d9_02c9, 0}; +#undef pci_ss_info_15d9_02c9 +#define pci_ss_info_15d9_02c9 pci_ss_info_9005_0285_15d9_02c9 +static const pciSubsystemInfo pci_ss_info_9005_0285_15d9_02ca = + {0x15d9, 0x02ca, pci_subsys_9005_0285_15d9_02ca, 0}; +#undef pci_ss_info_15d9_02ca +#define pci_ss_info_15d9_02ca pci_ss_info_9005_0285_15d9_02ca static const pciSubsystemInfo pci_ss_info_9005_0285_17aa_0286 = {0x17aa, 0x0286, pci_subsys_9005_0285_17aa_0286, 0}; #undef pci_ss_info_17aa_0286 @@ -47269,6 +54290,22 @@ static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c8 = {0x9005, 0x02c8, pci_subsys_9005_0285_9005_02c8, 0}; #undef pci_ss_info_9005_02c8 #define pci_ss_info_9005_02c8 pci_ss_info_9005_0285_9005_02c8 +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02ce = + {0x9005, 0x02ce, pci_subsys_9005_0285_9005_02ce, 0}; +#undef pci_ss_info_9005_02ce +#define pci_ss_info_9005_02ce pci_ss_info_9005_0285_9005_02ce +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02cf = + {0x9005, 0x02cf, pci_subsys_9005_0285_9005_02cf, 0}; +#undef pci_ss_info_9005_02cf +#define pci_ss_info_9005_02cf pci_ss_info_9005_0285_9005_02cf +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02d0 = + {0x9005, 0x02d0, pci_subsys_9005_0285_9005_02d0, 0}; +#undef pci_ss_info_9005_02d0 +#define pci_ss_info_9005_02d0 pci_ss_info_9005_0285_9005_02d0 +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02d1 = + {0x9005, 0x02d1, pci_subsys_9005_0285_9005_02d1, 0}; +#undef pci_ss_info_9005_02d1 +#define pci_ss_info_9005_02d1 pci_ss_info_9005_0285_9005_02d1 static const pciSubsystemInfo pci_ss_info_9005_0286_1014_034d = {0x1014, 0x034d, pci_subsys_9005_0286_1014_034d, 0}; #undef pci_ss_info_1014_034d @@ -47409,6 +54446,10 @@ static const pciSubsystemInfo pci_ss_info_9005_0503_1014_02bf = {0x1014, 0x02bf, pci_subsys_9005_0503_1014_02bf, 0}; #undef pci_ss_info_1014_02bf #define pci_ss_info_1014_02bf pci_ss_info_9005_0503_1014_02bf +static const pciSubsystemInfo pci_ss_info_9005_0503_1014_02c3 = + {0x1014, 0x02c3, pci_subsys_9005_0503_1014_02c3, 0}; +#undef pci_ss_info_1014_02c3 +#define pci_ss_info_1014_02c3 pci_ss_info_9005_0503_1014_02c3 static const pciSubsystemInfo pci_ss_info_9005_0503_1014_02d5 = {0x1014, 0x02d5, pci_subsys_9005_0503_1014_02d5, 0}; #undef pci_ss_info_1014_02d5 @@ -47431,10 +54472,18 @@ static const pciSubsystemInfo pci_ss_info_9005_8017_9005_0045 = {0x9005, 0x0045, pci_subsys_9005_8017_9005_0045, 0}; #undef pci_ss_info_9005_0045 #define pci_ss_info_9005_0045 pci_ss_info_9005_8017_9005_0045 +static const pciSubsystemInfo pci_ss_info_9005_801d_1014_02cc = + {0x1014, 0x02cc, pci_subsys_9005_801d_1014_02cc, 0}; +#undef pci_ss_info_1014_02cc +#define pci_ss_info_1014_02cc pci_ss_info_9005_801d_1014_02cc static const pciSubsystemInfo pci_ss_info_9005_801f_1734_1011 = {0x1734, 0x1011, pci_subsys_9005_801f_1734_1011, 0}; #undef pci_ss_info_1734_1011 #define pci_ss_info_1734_1011 pci_ss_info_9005_801f_1734_1011 +static const pciSubsystemInfo pci_ss_info_9005_809d_1014_02cc = + {0x1014, 0x02cc, pci_subsys_9005_809d_1014_02cc, 0}; +#undef pci_ss_info_1014_02cc +#define pci_ss_info_1014_02cc pci_ss_info_9005_809d_1014_02cc #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_9710_9815_1000_0020 = @@ -47493,6 +54542,7 @@ static const pciSubsystemInfo pci_ss_info_e159_0001_8086_0003 = #define pci_ss_list_0070_4800 NULL #define pci_ss_list_0070_4801 NULL #define pci_ss_list_0070_4803 NULL +#define pci_ss_list_0070_7801 NULL #define pci_ss_list_0070_8003 NULL #define pci_ss_list_0070_8801 NULL #define pci_ss_list_0070_c801 NULL @@ -47520,13 +54570,15 @@ static const pciSubsystemInfo pci_ss_info_e159_0001_8086_0003 = #define pci_ss_list_0675_1702 NULL #define pci_ss_list_0675_1703 NULL #define pci_ss_list_0675_1704 NULL -#define pci_ss_list_067b_2303 NULL #define pci_ss_list_067b_3507 NULL +#define pci_ss_list_07ca_a301 NULL #define pci_ss_list_07ca_b808 NULL #define pci_ss_list_08ff_afe4 NULL +#define pci_ss_list_0925_1234 NULL #define pci_ss_list_093a_010e NULL #define pci_ss_list_093a_010f NULL #define pci_ss_list_093a_2468 NULL +#define pci_ss_list_093a_2600 NULL #define pci_ss_list_093a_2603 NULL #define pci_ss_list_093a_2608 NULL #define pci_ss_list_09c1_0704 NULL @@ -47550,6 +54602,7 @@ static const pciSubsystemInfo pci_ss_info_e159_0001_8086_0003 = #define pci_ss_list_0e11_0001 NULL #define pci_ss_list_0e11_0002 NULL static const pciSubsystemInfo *pci_ss_list_0e11_0046[] = { + &pci_ss_info_0e11_0046_0e11_4091, &pci_ss_info_0e11_0046_0e11_409a, &pci_ss_info_0e11_0046_0e11_409b, &pci_ss_info_0e11_0046_0e11_409c, @@ -47749,6 +54802,7 @@ static const pciSubsystemInfo *pci_ss_list_1000_0030[] = { &pci_ss_info_1000_0030_1028_014a, &pci_ss_info_1000_0030_1028_016c, &pci_ss_info_1000_0030_1028_0183, + &pci_ss_info_1000_0030_1028_018a, &pci_ss_info_1000_0030_1028_1010, &pci_ss_info_1000_0030_103c_12c5, &pci_ss_info_1000_0030_124b_1170, @@ -47767,14 +54821,34 @@ static const pciSubsystemInfo *pci_ss_list_1000_0040[] = { NULL }; #define pci_ss_list_1000_0041 NULL -#define pci_ss_list_1000_0050 NULL -#define pci_ss_list_1000_0054 NULL +static const pciSubsystemInfo *pci_ss_list_1000_0050[] = { + &pci_ss_info_1000_0050_1028_1f04, + &pci_ss_info_1000_0050_1028_1f09, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1000_0054[] = { + &pci_ss_info_1000_0054_1028_1f04, + &pci_ss_info_1000_0054_1028_1f05, + &pci_ss_info_1000_0054_1028_1f06, + &pci_ss_info_1000_0054_1028_1f07, + &pci_ss_info_1000_0054_1028_1f08, + &pci_ss_info_1000_0054_1028_1f09, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1000_0055[] = { &pci_ss_info_1000_0055_1033_8336, NULL }; #define pci_ss_list_1000_0056 NULL -#define pci_ss_list_1000_0058 NULL +#define pci_ss_list_1000_0057 NULL +static const pciSubsystemInfo *pci_ss_list_1000_0058[] = { + &pci_ss_info_1000_0058_1028_021d, + &pci_ss_info_1000_0058_1028_1f0e, + &pci_ss_info_1000_0058_1028_1f0f, + &pci_ss_info_1000_0058_1028_1f10, + NULL +}; +#define pci_ss_list_1000_0059 NULL #define pci_ss_list_1000_005a NULL #define pci_ss_list_1000_005c NULL #define pci_ss_list_1000_005e NULL @@ -47786,16 +54860,25 @@ static const pciSubsystemInfo *pci_ss_list_1000_0060[] = { &pci_ss_info_1000_0060_1000_1010, &pci_ss_info_1000_0060_1000_1011, &pci_ss_info_1000_0060_1000_1012, + &pci_ss_info_1000_0060_1000_1016, &pci_ss_info_1000_0060_1014_0363, &pci_ss_info_1000_0060_1014_0364, &pci_ss_info_1000_0060_1014_0365, + &pci_ss_info_1000_0060_1014_0379, &pci_ss_info_1000_0060_1028_1f0a, &pci_ss_info_1000_0060_1028_1f0b, &pci_ss_info_1000_0060_1028_1f0c, &pci_ss_info_1000_0060_1028_1f0d, &pci_ss_info_1000_0060_1028_1f11, + &pci_ss_info_1000_0060_1033_835a, &pci_ss_info_1000_0060_1043_824d, &pci_ss_info_1000_0060_1170_002f, + &pci_ss_info_1000_0060_1170_0036, + &pci_ss_info_1000_0060_15d9_c080, + &pci_ss_info_1000_0060_17aa_6b7c, + &pci_ss_info_1000_0060_8086_1006, + &pci_ss_info_1000_0060_8086_100a, + &pci_ss_info_1000_0060_8086_1010, &pci_ss_info_1000_0060_8086_34cc, &pci_ss_info_1000_0060_8086_34cd, NULL @@ -47804,6 +54887,10 @@ static const pciSubsystemInfo *pci_ss_list_1000_0062[] = { &pci_ss_info_1000_0062_1000_0062, NULL }; +static const pciSubsystemInfo *pci_ss_list_1000_007c[] = { + &pci_ss_info_1000_007c_1014_0395, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1000_008f[] = { &pci_ss_info_1000_008f_1092_8000, &pci_ss_info_1000_008f_1092_8760, @@ -47919,9 +55006,14 @@ static const pciSubsystemInfo *pci_ss_list_1000_1960[] = { #define pci_ss_list_1001_0016 NULL #define pci_ss_list_1001_0017 NULL #define pci_ss_list_1001_9100 NULL -#define pci_ss_list_1002_3150 NULL +static const pciSubsystemInfo *pci_ss_list_1002_3150[] = { + &pci_ss_info_1002_3150_103c_0934, + NULL +}; +#define pci_ss_list_1002_3151 NULL #define pci_ss_list_1002_3152 NULL #define pci_ss_list_1002_3154 NULL +#define pci_ss_list_1002_3171 NULL #define pci_ss_list_1002_3e50 NULL #define pci_ss_list_1002_3e54 NULL #define pci_ss_list_1002_3e70 NULL @@ -48020,6 +55112,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_4337[] = { NULL }; #define pci_ss_list_1002_4341 NULL +#define pci_ss_list_1002_4342 NULL #define pci_ss_list_1002_4345 NULL #define pci_ss_list_1002_4347 NULL #define pci_ss_list_1002_4348 NULL @@ -48032,6 +55125,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_4337[] = { #define pci_ss_list_1002_436e NULL static const pciSubsystemInfo *pci_ss_list_1002_4370[] = { &pci_ss_info_1002_4370_1025_0079, + &pci_ss_info_1002_4370_1025_0091, &pci_ss_info_1002_4370_103c_308b, &pci_ss_info_1002_4370_105b_0c81, &pci_ss_info_1002_4370_107b_0300, @@ -48039,35 +55133,42 @@ static const pciSubsystemInfo *pci_ss_list_1002_4370[] = { }; static const pciSubsystemInfo *pci_ss_list_1002_4371[] = { &pci_ss_info_1002_4371_103c_308b, + &pci_ss_info_1002_4371_1462_7217, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_4372[] = { &pci_ss_info_1002_4372_1025_0080, &pci_ss_info_1002_4372_103c_308b, + &pci_ss_info_1002_4372_1462_7217, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_4373[] = { &pci_ss_info_1002_4373_1025_0080, &pci_ss_info_1002_4373_103c_308b, + &pci_ss_info_1002_4373_1462_7217, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_4374[] = { &pci_ss_info_1002_4374_103c_308b, + &pci_ss_info_1002_4374_1462_7217, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_4375[] = { &pci_ss_info_1002_4375_1025_0080, &pci_ss_info_1002_4375_103c_308b, + &pci_ss_info_1002_4375_1462_7217, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_4376[] = { &pci_ss_info_1002_4376_1025_0080, &pci_ss_info_1002_4376_103c_308b, + &pci_ss_info_1002_4376_1462_7217, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_4377[] = { &pci_ss_info_1002_4377_1025_0080, &pci_ss_info_1002_4377_103c_308b, + &pci_ss_info_1002_4377_1462_7217, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_4378[] = { @@ -48075,32 +55176,95 @@ static const pciSubsystemInfo *pci_ss_list_1002_4378[] = { &pci_ss_info_1002_4378_103c_308b, NULL }; -#define pci_ss_list_1002_4379 NULL +static const pciSubsystemInfo *pci_ss_list_1002_4379[] = { + &pci_ss_info_1002_4379_1462_7141, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1002_437a[] = { &pci_ss_info_1002_437a_1002_4379, &pci_ss_info_1002_437a_1002_437a, + &pci_ss_info_1002_437a_1462_7141, &pci_ss_info_1002_437a_14f1_8800, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_437b[] = { + &pci_ss_info_1002_437b_1002_437b, + &pci_ss_info_1002_437b_10cf_1326, &pci_ss_info_1002_437b_1734_10b8, NULL }; -#define pci_ss_list_1002_4380 NULL +static const pciSubsystemInfo *pci_ss_list_1002_4380[] = { + &pci_ss_info_1002_4380_103c_2813, + &pci_ss_info_1002_4380_17f2_5999, + NULL +}; #define pci_ss_list_1002_4381 NULL #define pci_ss_list_1002_4382 NULL -#define pci_ss_list_1002_4383 NULL +static const pciSubsystemInfo *pci_ss_list_1002_4383[] = { + &pci_ss_info_1002_4383_0206_1028, + &pci_ss_info_1002_4383_103c_280a, + &pci_ss_info_1002_4383_17f2_5000, + NULL +}; #define pci_ss_list_1002_4384 NULL -#define pci_ss_list_1002_4385 NULL -#define pci_ss_list_1002_4386 NULL -#define pci_ss_list_1002_4387 NULL -#define pci_ss_list_1002_4388 NULL -#define pci_ss_list_1002_4389 NULL -#define pci_ss_list_1002_438a NULL -#define pci_ss_list_1002_438b NULL -#define pci_ss_list_1002_438c NULL -#define pci_ss_list_1002_438d NULL +static const pciSubsystemInfo *pci_ss_list_1002_4385[] = { + &pci_ss_info_1002_4385_103c_280a, + &pci_ss_info_1002_4385_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4386[] = { + &pci_ss_info_1002_4386_103c_280a, + &pci_ss_info_1002_4386_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4387[] = { + &pci_ss_info_1002_4387_103c_280a, + &pci_ss_info_1002_4387_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4388[] = { + &pci_ss_info_1002_4388_103c_280a, + &pci_ss_info_1002_4388_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4389[] = { + &pci_ss_info_1002_4389_103c_280a, + &pci_ss_info_1002_4389_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_438a[] = { + &pci_ss_info_1002_438a_103c_280a, + &pci_ss_info_1002_438a_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_438b[] = { + &pci_ss_info_1002_438b_103c_280a, + &pci_ss_info_1002_438b_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_438c[] = { + &pci_ss_info_1002_438c_103c_280a, + &pci_ss_info_1002_438c_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_438d[] = { + &pci_ss_info_1002_438d_103c_280a, + &pci_ss_info_1002_438d_17f2_5000, + NULL +}; #define pci_ss_list_1002_438e NULL +#define pci_ss_list_1002_4390 NULL +#define pci_ss_list_1002_4391 NULL +#define pci_ss_list_1002_4392 NULL +#define pci_ss_list_1002_4393 NULL +#define pci_ss_list_1002_4394 NULL +#define pci_ss_list_1002_4395 NULL +#define pci_ss_list_1002_4396 NULL +#define pci_ss_list_1002_4397 NULL +#define pci_ss_list_1002_4398 NULL +#define pci_ss_list_1002_4399 NULL +#define pci_ss_list_1002_439c NULL +#define pci_ss_list_1002_439d NULL #define pci_ss_list_1002_4437 NULL #define pci_ss_list_1002_4554 NULL #define pci_ss_list_1002_4654 NULL @@ -48169,6 +55333,8 @@ static const pciSubsystemInfo *pci_ss_list_1002_4752[] = { &pci_ss_info_1002_4752_1028_00d1, &pci_ss_info_1002_4752_1028_00d9, &pci_ss_info_1002_4752_1028_0134, + &pci_ss_info_1002_4752_1028_014a, + &pci_ss_info_1002_4752_1028_0165, &pci_ss_info_1002_4752_103c_10e1, &pci_ss_info_1002_4752_107b_6400, &pci_ss_info_1002_4752_1734_007a, @@ -48253,6 +55419,8 @@ static const pciSubsystemInfo *pci_ss_list_1002_4c42[] = { #define pci_ss_list_1002_4c44 NULL #define pci_ss_list_1002_4c45 NULL static const pciSubsystemInfo *pci_ss_list_1002_4c46[] = { + &pci_ss_info_1002_4c46_1002_0155, + &pci_ss_info_1002_4c46_1014_0155, &pci_ss_info_1002_4c46_1028_00b1, NULL }; @@ -48271,7 +55439,6 @@ static const pciSubsystemInfo *pci_ss_list_1002_4c4d[] = { &pci_ss_info_1002_4c4d_1014_0154, &pci_ss_info_1002_4c4d_1028_00aa, &pci_ss_info_1002_4c4d_1028_00bb, - &pci_ss_info_1002_4c4d_10e1_10cf, &pci_ss_info_1002_4c4d_1179_ff00, &pci_ss_info_1002_4c4d_13bd_1019, NULL @@ -48292,6 +55459,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_4c57[] = { &pci_ss_info_1002_4c57_1014_0517, &pci_ss_info_1002_4c57_1028_00e6, &pci_ss_info_1002_4c57_1028_012a, + &pci_ss_info_1002_4c57_1043_1622, &pci_ss_info_1002_4c57_144d_c006, NULL }; @@ -48316,6 +55484,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_4c66[] = { #define pci_ss_list_1002_4c6e NULL #define pci_ss_list_1002_4d46 NULL #define pci_ss_list_1002_4d4c NULL +#define pci_ss_list_1002_4d52 NULL static const pciSubsystemInfo *pci_ss_list_1002_4e44[] = { &pci_ss_info_1002_4e44_1002_515e, &pci_ss_info_1002_4e44_1002_5965, @@ -48330,7 +55499,10 @@ static const pciSubsystemInfo *pci_ss_list_1002_4e45[] = { #define pci_ss_list_1002_4e47 NULL #define pci_ss_list_1002_4e48 NULL #define pci_ss_list_1002_4e49 NULL -#define pci_ss_list_1002_4e4a NULL +static const pciSubsystemInfo *pci_ss_list_1002_4e4a[] = { + &pci_ss_info_1002_4e4a_1002_4e4a, + NULL +}; #define pci_ss_list_1002_4e4b NULL static const pciSubsystemInfo *pci_ss_list_1002_4e50[] = { &pci_ss_info_1002_4e50_1025_005a, @@ -48360,6 +55532,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_4e65[] = { #define pci_ss_list_1002_4e68 NULL #define pci_ss_list_1002_4e69 NULL static const pciSubsystemInfo *pci_ss_list_1002_4e6a[] = { + &pci_ss_info_1002_4e6a_1002_4e6a, &pci_ss_info_1002_4e6a_1002_4e71, NULL }; @@ -48474,6 +55647,8 @@ static const pciSubsystemInfo *pci_ss_list_1002_5159[] = { &pci_ss_info_1002_5159_1002_0908, &pci_ss_info_1002_5159_1014_029a, &pci_ss_info_1002_5159_1014_02c8, + &pci_ss_info_1002_5159_1028_016c, + &pci_ss_info_1002_5159_1028_016d, &pci_ss_info_1002_5159_1028_019a, &pci_ss_info_1002_5159_103c_1292, &pci_ss_info_1002_5159_1458_4002, @@ -48486,7 +55661,13 @@ static const pciSubsystemInfo *pci_ss_list_1002_5159[] = { NULL }; #define pci_ss_list_1002_515a NULL -#define pci_ss_list_1002_515e NULL +static const pciSubsystemInfo *pci_ss_list_1002_515e[] = { + &pci_ss_info_1002_515e_1028_01df, + &pci_ss_info_1002_515e_1028_01e6, + &pci_ss_info_1002_515e_1028_020f, + &pci_ss_info_1002_515e_1028_0210, + NULL +}; #define pci_ss_list_1002_515f NULL #define pci_ss_list_1002_5168 NULL #define pci_ss_list_1002_5169 NULL @@ -48555,7 +55736,10 @@ static const pciSubsystemInfo *pci_ss_list_1002_5452[] = { #define pci_ss_list_1002_5453 NULL #define pci_ss_list_1002_5454 NULL #define pci_ss_list_1002_5455 NULL -#define pci_ss_list_1002_5460 NULL +static const pciSubsystemInfo *pci_ss_list_1002_5460[] = { + &pci_ss_info_1002_5460_1775_1100, + NULL +}; #define pci_ss_list_1002_5462 NULL #define pci_ss_list_1002_5464 NULL #define pci_ss_list_1002_5548 NULL @@ -48579,6 +55763,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5452[] = { #define pci_ss_list_1002_5652 NULL static const pciSubsystemInfo *pci_ss_list_1002_5653[] = { &pci_ss_info_1002_5653_1025_0080, + &pci_ss_info_1002_5653_103c_0940, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_5654[] = { @@ -48594,7 +55779,10 @@ static const pciSubsystemInfo *pci_ss_list_1002_5654[] = { #define pci_ss_list_1002_5834 NULL #define pci_ss_list_1002_5835 NULL #define pci_ss_list_1002_5838 NULL -#define pci_ss_list_1002_5940 NULL +static const pciSubsystemInfo *pci_ss_list_1002_5940[] = { + &pci_ss_info_1002_5940_17af_2021, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1002_5941[] = { &pci_ss_info_1002_5941_1458_4019, &pci_ss_info_1002_5941_174b_7c12, @@ -48605,7 +55793,9 @@ static const pciSubsystemInfo *pci_ss_list_1002_5941[] = { #define pci_ss_list_1002_5944 NULL static const pciSubsystemInfo *pci_ss_list_1002_5950[] = { &pci_ss_info_1002_5950_1025_0080, + &pci_ss_info_1002_5950_103c_280a, &pci_ss_info_1002_5950_103c_308b, + &pci_ss_info_1002_5950_1462_7217, NULL }; #define pci_ss_list_1002_5951 NULL @@ -48619,7 +55809,13 @@ static const pciSubsystemInfo *pci_ss_list_1002_5955[] = { &pci_ss_info_1002_5955_103c_308b, NULL }; -#define pci_ss_list_1002_5960 NULL +#define pci_ss_list_1002_5956 NULL +#define pci_ss_list_1002_5957 NULL +#define pci_ss_list_1002_5958 NULL +static const pciSubsystemInfo *pci_ss_list_1002_5960[] = { + &pci_ss_info_1002_5960_17af_2020, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1002_5961[] = { &pci_ss_info_1002_5961_1002_2f72, &pci_ss_info_1002_5961_1019_4c30, @@ -48647,16 +55843,51 @@ static const pciSubsystemInfo *pci_ss_list_1002_5964[] = { &pci_ss_info_1002_5964_18bc_0173, NULL }; +#define pci_ss_list_1002_5965 NULL #define pci_ss_list_1002_5969 NULL -#define pci_ss_list_1002_5974 NULL +static const pciSubsystemInfo *pci_ss_list_1002_5974[] = { + &pci_ss_info_1002_5974_103c_280a, + &pci_ss_info_1002_5974_1462_7141, + NULL +}; #define pci_ss_list_1002_5975 NULL +#define pci_ss_list_1002_5978 NULL +#define pci_ss_list_1002_5979 NULL +#define pci_ss_list_1002_597a NULL +#define pci_ss_list_1002_597b NULL +#define pci_ss_list_1002_597c NULL +#define pci_ss_list_1002_597d NULL +#define pci_ss_list_1002_597e NULL +#define pci_ss_list_1002_597f NULL +#define pci_ss_list_1002_5980 NULL +#define pci_ss_list_1002_5981 NULL +#define pci_ss_list_1002_5982 NULL +#define pci_ss_list_1002_5a10 NULL +#define pci_ss_list_1002_5a11 NULL +#define pci_ss_list_1002_5a12 NULL +#define pci_ss_list_1002_5a13 NULL +#define pci_ss_list_1002_5a14 NULL +#define pci_ss_list_1002_5a15 NULL +#define pci_ss_list_1002_5a16 NULL +#define pci_ss_list_1002_5a17 NULL +#define pci_ss_list_1002_5a18 NULL +#define pci_ss_list_1002_5a19 NULL +#define pci_ss_list_1002_5a1a NULL +#define pci_ss_list_1002_5a1b NULL +#define pci_ss_list_1002_5a1c NULL +#define pci_ss_list_1002_5a1d NULL +#define pci_ss_list_1002_5a1e NULL +#define pci_ss_list_1002_5a1f NULL #define pci_ss_list_1002_5a33 NULL #define pci_ss_list_1002_5a34 NULL #define pci_ss_list_1002_5a36 NULL #define pci_ss_list_1002_5a37 NULL #define pci_ss_list_1002_5a38 NULL #define pci_ss_list_1002_5a39 NULL -#define pci_ss_list_1002_5a3f NULL +static const pciSubsystemInfo *pci_ss_list_1002_5a3f[] = { + &pci_ss_info_1002_5a3f_1462_7217, + NULL +}; #define pci_ss_list_1002_5a41 NULL #define pci_ss_list_1002_5a42 NULL #define pci_ss_list_1002_5a61 NULL @@ -48664,8 +55895,10 @@ static const pciSubsystemInfo *pci_ss_list_1002_5964[] = { static const pciSubsystemInfo *pci_ss_list_1002_5b60[] = { &pci_ss_info_1002_5b60_1043_002a, &pci_ss_info_1002_5b60_1043_032e, + &pci_ss_info_1002_5b60_1458_2102, &pci_ss_info_1002_5b60_1462_0400, &pci_ss_info_1002_5b60_1462_0402, + &pci_ss_info_1002_5b60_174b_0500, &pci_ss_info_1002_5b60_196d_1086, NULL }; @@ -48675,6 +55908,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5b60[] = { #define pci_ss_list_1002_5b65 NULL static const pciSubsystemInfo *pci_ss_list_1002_5b70[] = { &pci_ss_info_1002_5b70_1462_0403, + &pci_ss_info_1002_5b70_174b_0501, &pci_ss_info_1002_5b70_196d_1087, NULL }; @@ -48690,6 +55924,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5c63[] = { static const pciSubsystemInfo *pci_ss_list_1002_5d44[] = { &pci_ss_info_1002_5d44_1458_4019, &pci_ss_info_1002_5d44_1458_4032, + &pci_ss_info_1002_5d44_147b_6190, &pci_ss_info_1002_5d44_174b_7c12, &pci_ss_info_1002_5d44_1787_5965, &pci_ss_info_1002_5d44_17af_2013, @@ -48697,6 +55932,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5d44[] = { &pci_ss_info_1002_5d44_18bc_0172, NULL }; +#define pci_ss_list_1002_5d45 NULL #define pci_ss_list_1002_5d48 NULL #define pci_ss_list_1002_5d49 NULL #define pci_ss_list_1002_5d4a NULL @@ -48758,9 +55994,13 @@ static const pciSubsystemInfo *pci_ss_list_1002_7142[] = { NULL }; #define pci_ss_list_1002_7143 NULL -#define pci_ss_list_1002_7145 NULL +static const pciSubsystemInfo *pci_ss_list_1002_7145[] = { + &pci_ss_info_1002_7145_17aa_2006, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1002_7146[] = { &pci_ss_info_1002_7146_1002_0322, + &pci_ss_info_1002_7146_1545_1996, NULL }; #define pci_ss_list_1002_7147 NULL @@ -48778,15 +56018,19 @@ static const pciSubsystemInfo *pci_ss_list_1002_7162[] = { &pci_ss_info_1002_7162_1002_0323, NULL }; +#define pci_ss_list_1002_7163 NULL static const pciSubsystemInfo *pci_ss_list_1002_7166[] = { &pci_ss_info_1002_7166_1002_0323, + &pci_ss_info_1002_7166_1545_1997, NULL }; +#define pci_ss_list_1002_716e NULL #define pci_ss_list_1002_7172 NULL #define pci_ss_list_1002_7173 NULL #define pci_ss_list_1002_7180 NULL #define pci_ss_list_1002_7181 NULL #define pci_ss_list_1002_7183 NULL +#define pci_ss_list_1002_7186 NULL #define pci_ss_list_1002_7187 NULL #define pci_ss_list_1002_7188 NULL #define pci_ss_list_1002_718a NULL @@ -48801,12 +56045,16 @@ static const pciSubsystemInfo *pci_ss_list_1002_7166[] = { #define pci_ss_list_1002_71a7 NULL #define pci_ss_list_1002_71bb NULL #define pci_ss_list_1002_71c0 NULL +#define pci_ss_list_1002_71c1 NULL #define pci_ss_list_1002_71c2 NULL static const pciSubsystemInfo *pci_ss_list_1002_71c4[] = { &pci_ss_info_1002_71c4_17aa_2007, NULL }; -#define pci_ss_list_1002_71c5 NULL +static const pciSubsystemInfo *pci_ss_list_1002_71c5[] = { + &pci_ss_info_1002_71c5_103c_30a3, + NULL +}; #define pci_ss_list_1002_71c6 NULL #define pci_ss_list_1002_71c7 NULL #define pci_ss_list_1002_71ce NULL @@ -48815,6 +56063,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_71c4[] = { #define pci_ss_list_1002_71d6 NULL #define pci_ss_list_1002_71de NULL #define pci_ss_list_1002_71e0 NULL +#define pci_ss_list_1002_71e1 NULL #define pci_ss_list_1002_71e2 NULL #define pci_ss_list_1002_71e6 NULL #define pci_ss_list_1002_71e7 NULL @@ -48854,11 +56103,91 @@ static const pciSubsystemInfo *pci_ss_list_1002_724b[] = { #define pci_ss_list_1002_7834 NULL #define pci_ss_list_1002_7835 NULL #define pci_ss_list_1002_7838 NULL -#define pci_ss_list_1002_7919 NULL -#define pci_ss_list_1002_791e NULL +static const pciSubsystemInfo *pci_ss_list_1002_7910[] = { + &pci_ss_info_1002_7910_17f2_5000, + NULL +}; +#define pci_ss_list_1002_7912 NULL +#define pci_ss_list_1002_7913 NULL +#define pci_ss_list_1002_7915 NULL +#define pci_ss_list_1002_7916 NULL +#define pci_ss_list_1002_7917 NULL +static const pciSubsystemInfo *pci_ss_list_1002_7919[] = { + &pci_ss_info_1002_7919_17f2_5000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_791e[] = { + &pci_ss_info_1002_791e_17f2_5000, + NULL +}; #define pci_ss_list_1002_791f NULL +#define pci_ss_list_1002_793b NULL #define pci_ss_list_1002_793f NULL +#define pci_ss_list_1002_7941 NULL +#define pci_ss_list_1002_7942 NULL +#define pci_ss_list_1002_796e NULL #define pci_ss_list_1002_7c37 NULL +static const pciSubsystemInfo *pci_ss_list_1002_9400[] = { + &pci_ss_info_1002_9400_1002_3000, + NULL +}; +#define pci_ss_list_1002_940a NULL +#define pci_ss_list_1002_940b NULL +static const pciSubsystemInfo *pci_ss_list_1002_94c1[] = { + &pci_ss_info_1002_94c1_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_94c3[] = { + &pci_ss_info_1002_94c3_1002_94c3, + &pci_ss_info_1002_94c3_174b_e400, + NULL +}; +#define pci_ss_list_1002_94c4 NULL +#define pci_ss_list_1002_94c8 NULL +static const pciSubsystemInfo *pci_ss_list_1002_94c9[] = { + &pci_ss_info_1002_94c9_1002_94c9, + NULL +}; +#define pci_ss_list_1002_94cb NULL +#define pci_ss_list_1002_94cc NULL +#define pci_ss_list_1002_9501 NULL +#define pci_ss_list_1002_9504 NULL +#define pci_ss_list_1002_9505 NULL +#define pci_ss_list_1002_9507 NULL +#define pci_ss_list_1002_9508 NULL +#define pci_ss_list_1002_950f NULL +#define pci_ss_list_1002_9515 NULL +#define pci_ss_list_1002_9559 NULL +#define pci_ss_list_1002_9581 NULL +#define pci_ss_list_1002_9586 NULL +#define pci_ss_list_1002_9587 NULL +static const pciSubsystemInfo *pci_ss_list_1002_9588[] = { + &pci_ss_info_1002_9588_1458_216c, + NULL +}; +#define pci_ss_list_1002_9589 NULL +#define pci_ss_list_1002_9591 NULL +#define pci_ss_list_1002_9593 NULL +#define pci_ss_list_1002_9596 NULL +#define pci_ss_list_1002_9598 NULL +#define pci_ss_list_1002_95c0 NULL +#define pci_ss_list_1002_95c4 NULL +#define pci_ss_list_1002_95c5 NULL +#define pci_ss_list_1002_960f NULL +#define pci_ss_list_1002_9610 NULL +#define pci_ss_list_1002_9611 NULL +#define pci_ss_list_1002_9612 NULL +#define pci_ss_list_1002_9613 NULL +#define pci_ss_list_1002_9614 NULL +#define pci_ss_list_1002_aa00 NULL +#define pci_ss_list_1002_aa08 NULL +static const pciSubsystemInfo *pci_ss_list_1002_aa10[] = { + &pci_ss_info_1002_aa10_174b_aa10, + NULL +}; +#define pci_ss_list_1002_aa18 NULL +#define pci_ss_list_1002_aa20 NULL +#define pci_ss_list_1002_aa28 NULL #define pci_ss_list_1002_cab0 NULL #define pci_ss_list_1002_cab2 NULL #define pci_ss_list_1002_cab3 NULL @@ -48933,13 +56262,28 @@ static const pciSubsystemInfo *pci_ss_list_100b_0020[] = { #define pci_ss_list_100b_0035 NULL #define pci_ss_list_100b_0500 NULL #define pci_ss_list_100b_0501 NULL -#define pci_ss_list_100b_0502 NULL -#define pci_ss_list_100b_0503 NULL +static const pciSubsystemInfo *pci_ss_list_100b_0502[] = { + &pci_ss_info_100b_0502_100b_0502, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_100b_0503[] = { + &pci_ss_info_100b_0503_100b_0503, + NULL +}; #define pci_ss_list_100b_0504 NULL #define pci_ss_list_100b_0505 NULL -#define pci_ss_list_100b_0510 NULL -#define pci_ss_list_100b_0511 NULL -#define pci_ss_list_100b_0515 NULL +static const pciSubsystemInfo *pci_ss_list_100b_0510[] = { + &pci_ss_info_100b_0510_100b_0500, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_100b_0511[] = { + &pci_ss_info_100b_0511_100b_0501, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_100b_0515[] = { + &pci_ss_info_100b_0515_100b_0505, + NULL +}; #define pci_ss_list_100b_d001 NULL #define pci_ss_list_100c_3202 NULL #define pci_ss_list_100c_3205 NULL @@ -48989,6 +56333,7 @@ static const pciSubsystemInfo *pci_ss_list_1011_0014[] = { }; #define pci_ss_list_1011_0016 NULL #define pci_ss_list_1011_0017 NULL +#define pci_ss_list_1011_0018 NULL static const pciSubsystemInfo *pci_ss_list_1011_0019[] = { &pci_ss_info_1011_0019_1011_500a, &pci_ss_info_1011_0019_1011_500b, @@ -49236,6 +56581,11 @@ static const pciSubsystemInfo *pci_ss_list_1014_01bd[] = { }; #define pci_ss_list_1014_01c1 NULL #define pci_ss_list_1014_01e6 NULL +static const pciSubsystemInfo *pci_ss_list_1014_01ef[] = { + &pci_ss_info_1014_01ef_1734_102b, + &pci_ss_info_1014_01ef_1734_10f8, + NULL +}; #define pci_ss_list_1014_01ff NULL static const pciSubsystemInfo *pci_ss_list_1014_0219[] = { &pci_ss_info_1014_0219_1014_021a, @@ -49260,11 +56610,22 @@ static const pciSubsystemInfo *pci_ss_list_1014_028c[] = { static const pciSubsystemInfo *pci_ss_list_1014_02bd[] = { &pci_ss_info_1014_02bd_1014_02c1, &pci_ss_info_1014_02bd_1014_02c2, + &pci_ss_info_1014_02bd_1014_0338, NULL }; #define pci_ss_list_1014_0302 NULL #define pci_ss_list_1014_0308 NULL #define pci_ss_list_1014_0314 NULL +static const pciSubsystemInfo *pci_ss_list_1014_032d[] = { + &pci_ss_info_1014_032d_1014_03a1, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1014_0339[] = { + &pci_ss_info_1014_0339_1014_030a, + &pci_ss_info_1014_0339_1014_033a, + &pci_ss_info_1014_0339_1014_0360, + NULL +}; #define pci_ss_list_1014_3022 NULL #define pci_ss_list_1014_4022 NULL #define pci_ss_list_1014_ffff NULL @@ -49324,6 +56685,16 @@ static const pciSubsystemInfo *pci_ss_list_101e_9063[] = { #define pci_ss_list_1022_1101 NULL #define pci_ss_list_1022_1102 NULL #define pci_ss_list_1022_1103 NULL +#define pci_ss_list_1022_1200 NULL +#define pci_ss_list_1022_1201 NULL +#define pci_ss_list_1022_1202 NULL +#define pci_ss_list_1022_1203 NULL +#define pci_ss_list_1022_1204 NULL +#define pci_ss_list_1022_1300 NULL +#define pci_ss_list_1022_1301 NULL +#define pci_ss_list_1022_1302 NULL +#define pci_ss_list_1022_1303 NULL +#define pci_ss_list_1022_1304 NULL static const pciSubsystemInfo *pci_ss_list_1022_2000[] = { &pci_ss_info_1022_2000_1014_2000, &pci_ss_info_1022_2000_1022_2000, @@ -49439,6 +56810,18 @@ static const pciSubsystemInfo *pci_ss_list_1022_746d[] = { }; #define pci_ss_list_1022_746e NULL #define pci_ss_list_1022_756b NULL +#define pci_ss_list_1022_9600 NULL +#define pci_ss_list_1022_9601 NULL +#define pci_ss_list_1022_9602 NULL +#define pci_ss_list_1022_9603 NULL +#define pci_ss_list_1022_9604 NULL +#define pci_ss_list_1022_9605 NULL +#define pci_ss_list_1022_9606 NULL +#define pci_ss_list_1022_9607 NULL +#define pci_ss_list_1022_9608 NULL +#define pci_ss_list_1022_9609 NULL +#define pci_ss_list_1022_960a NULL +#define pci_ss_list_1022_960b NULL #define pci_ss_list_1023_0194 NULL #define pci_ss_list_1023_2000 NULL static const pciSubsystemInfo *pci_ss_list_1023_2001[] = { @@ -49483,10 +56866,7 @@ static const pciSubsystemInfo *pci_ss_list_1023_8620[] = { #define pci_ss_list_1023_9460 NULL #define pci_ss_list_1023_9470 NULL #define pci_ss_list_1023_9520 NULL -static const pciSubsystemInfo *pci_ss_list_1023_9525[] = { - &pci_ss_info_1023_9525_10cf_1094, - NULL -}; +#define pci_ss_list_1023_9525 NULL #define pci_ss_list_1023_9540 NULL #define pci_ss_list_1023_9660 NULL #define pci_ss_list_1023_9680 NULL @@ -49510,6 +56890,7 @@ static const pciSubsystemInfo *pci_ss_list_1023_9880[] = { }; #define pci_ss_list_1023_9910 NULL #define pci_ss_list_1023_9930 NULL +#define pci_ss_list_1023_9960 NULL #define pci_ss_list_1025_0090 NULL #define pci_ss_list_1025_1435 NULL #define pci_ss_list_1025_1445 NULL @@ -49609,7 +56990,10 @@ static const pciSubsystemInfo *pci_ss_list_1028_000a[] = { #define pci_ss_list_1028_000c NULL #define pci_ss_list_1028_000d NULL #define pci_ss_list_1028_000e NULL -#define pci_ss_list_1028_000f NULL +static const pciSubsystemInfo *pci_ss_list_1028_000f[] = { + &pci_ss_info_1028_000f_1028_014a, + NULL +}; #define pci_ss_list_1028_0010 NULL #define pci_ss_list_1028_0011 NULL #define pci_ss_list_1028_0012 NULL @@ -49625,9 +57009,9 @@ static const pciSubsystemInfo *pci_ss_list_1028_0013[] = { static const pciSubsystemInfo *pci_ss_list_1028_0015[] = { &pci_ss_info_1028_0015_1028_1f01, &pci_ss_info_1028_0015_1028_1f02, + &pci_ss_info_1028_0015_1028_1f03, NULL }; -#define pci_ss_list_1028_1f03 NULL #define pci_ss_list_102a_0000 NULL #define pci_ss_list_102a_0010 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -49796,6 +57180,7 @@ static const pciSubsystemInfo *pci_ss_list_102b_2527[] = { &pci_ss_info_102b_2527_102b_0f83, &pci_ss_info_102b_2527_102b_0f84, &pci_ss_info_102b_2527_102b_1e41, + &pci_ss_info_102b_2527_102b_2300, NULL }; static const pciSubsystemInfo *pci_ss_list_102b_2537[] = { @@ -49809,12 +57194,14 @@ static const pciSubsystemInfo *pci_ss_list_102b_2537[] = { static const pciSubsystemInfo *pci_ss_list_102b_2538[] = { &pci_ss_info_102b_2538_102b_08c7, &pci_ss_info_102b_2538_102b_0907, + &pci_ss_info_102b_2538_102b_0947, &pci_ss_info_102b_2538_102b_1047, &pci_ss_info_102b_2538_102b_1087, &pci_ss_info_102b_2538_102b_2538, &pci_ss_info_102b_2538_102b_3007, NULL }; +#define pci_ss_list_102b_2539 NULL #define pci_ss_list_102b_4536 NULL #define pci_ss_list_102b_4cdc NULL #define pci_ss_list_102b_4fc5 NULL @@ -49958,7 +57345,10 @@ static const pciSubsystemInfo *pci_ss_list_1033_00e0[] = { #define pci_ss_list_1039_0018 NULL #define pci_ss_list_1039_0180 NULL #define pci_ss_list_1039_0181 NULL -#define pci_ss_list_1039_0182 NULL +static const pciSubsystemInfo *pci_ss_list_1039_0182[] = { + &pci_ss_info_1039_0182_1734_1095, + NULL +}; #define pci_ss_list_1039_0186 NULL #define pci_ss_list_1039_0190 NULL #define pci_ss_list_1039_0191 NULL @@ -49990,12 +57380,14 @@ static const pciSubsystemInfo *pci_ss_list_1039_0300[] = { #define pci_ss_list_1039_0645 NULL #define pci_ss_list_1039_0646 NULL #define pci_ss_list_1039_0648 NULL +#define pci_ss_list_1039_0649 NULL #define pci_ss_list_1039_0650 NULL #define pci_ss_list_1039_0651 NULL #define pci_ss_list_1039_0655 NULL #define pci_ss_list_1039_0660 NULL #define pci_ss_list_1039_0661 NULL #define pci_ss_list_1039_0662 NULL +#define pci_ss_list_1039_0671 NULL #define pci_ss_list_1039_0730 NULL #define pci_ss_list_1039_0733 NULL #define pci_ss_list_1039_0735 NULL @@ -50005,7 +57397,10 @@ static const pciSubsystemInfo *pci_ss_list_1039_0300[] = { #define pci_ss_list_1039_0746 NULL #define pci_ss_list_1039_0755 NULL #define pci_ss_list_1039_0760 NULL -#define pci_ss_list_1039_0761 NULL +static const pciSubsystemInfo *pci_ss_list_1039_0761[] = { + &pci_ss_info_1039_0761_1734_1099, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1039_0900[] = { &pci_ss_info_1039_0900_1019_0a14, &pci_ss_info_1039_0900_1039_0900, @@ -50036,6 +57431,7 @@ static const pciSubsystemInfo *pci_ss_list_1039_5513[] = { &pci_ss_info_1039_5513_1039_5513, &pci_ss_info_1039_5513_1043_8035, &pci_ss_info_1039_5513_1462_7010, + &pci_ss_info_1039_5513_1734_1095, NULL }; #define pci_ss_list_1039_5517 NULL @@ -50058,7 +57454,10 @@ static const pciSubsystemInfo *pci_ss_list_1039_6306[] = { &pci_ss_info_1039_6306_1039_6306, NULL }; -#define pci_ss_list_1039_6325 NULL +static const pciSubsystemInfo *pci_ss_list_1039_6325[] = { + &pci_ss_info_1039_6325_1039_6325, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1039_6326[] = { &pci_ss_info_1039_6326_1039_6326, &pci_ss_info_1039_6326_1092_0a50, @@ -50071,6 +57470,8 @@ static const pciSubsystemInfo *pci_ss_list_1039_6326[] = { static const pciSubsystemInfo *pci_ss_list_1039_6330[] = { &pci_ss_info_1039_6330_1039_6330, &pci_ss_info_1039_6330_1043_8113, + &pci_ss_info_1039_6330_1458_d000, + &pci_ss_info_1039_6330_1734_1099, NULL }; #define pci_ss_list_1039_6350 NULL @@ -50080,11 +57481,14 @@ static const pciSubsystemInfo *pci_ss_list_1039_7001[] = { &pci_ss_info_1039_7001_1039_7000, &pci_ss_info_1039_7001_1462_5470, &pci_ss_info_1039_7001_1462_7010, + &pci_ss_info_1039_7001_1734_1095, NULL }; static const pciSubsystemInfo *pci_ss_list_1039_7002[] = { + &pci_ss_info_1039_7002_1462_5470, &pci_ss_info_1039_7002_1462_7010, &pci_ss_info_1039_7002_1509_7002, + &pci_ss_info_1039_7002_1734_1095, NULL }; static const pciSubsystemInfo *pci_ss_list_1039_7007[] = { @@ -50092,8 +57496,12 @@ static const pciSubsystemInfo *pci_ss_list_1039_7007[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_1039_7012[] = { + &pci_ss_info_1039_7012_1043_818f, + &pci_ss_info_1039_7012_13f6_0300, + &pci_ss_info_1039_7012_1462_5850, &pci_ss_info_1039_7012_1462_7010, &pci_ss_info_1039_7012_15bd_1001, + &pci_ss_info_1039_7012_1734_109f, NULL }; #define pci_ss_list_1039_7013 NULL @@ -50108,6 +57516,7 @@ static const pciSubsystemInfo *pci_ss_list_1039_7018[] = { &pci_ss_info_1039_7018_1025_000e, &pci_ss_info_1039_7018_1025_0018, &pci_ss_info_1039_7018_1039_7018, + &pci_ss_info_1039_7018_1043_1453, &pci_ss_info_1039_7018_1043_800b, &pci_ss_info_1039_7018_1054_7018, &pci_ss_info_1039_7018_107d_5330, @@ -50129,6 +57538,7 @@ static const pciSubsystemInfo *pci_ss_list_1039_7018[] = { #define pci_ss_list_1039_7019 NULL #define pci_ss_list_1039_7502 NULL #define pci_ss_list_103c_002a NULL +#define pci_ss_list_103c_08bc NULL #define pci_ss_list_103c_1005 NULL #define pci_ss_list_103c_1008 NULL #define pci_ss_list_103c_1028 NULL @@ -50182,7 +57592,10 @@ static const pciSubsystemInfo *pci_ss_list_103c_1048[] = { #define pci_ss_list_103c_122e NULL #define pci_ss_list_103c_127b NULL #define pci_ss_list_103c_127c NULL -#define pci_ss_list_103c_1290 NULL +static const pciSubsystemInfo *pci_ss_list_103c_1290[] = { + &pci_ss_info_103c_1290_103c_1291, + NULL +}; #define pci_ss_list_103c_1291 NULL #define pci_ss_list_103c_12b4 NULL #define pci_ss_list_103c_12eb NULL @@ -50192,17 +57605,30 @@ static const pciSubsystemInfo *pci_ss_list_103c_1048[] = { #define pci_ss_list_103c_12fa NULL #define pci_ss_list_103c_1302 NULL #define pci_ss_list_103c_1303 NULL +#define pci_ss_list_103c_1361 NULL +#define pci_ss_list_103c_1371 NULL #define pci_ss_list_103c_2910 NULL #define pci_ss_list_103c_2925 NULL #define pci_ss_list_103c_3080 NULL #define pci_ss_list_103c_3085 NULL #define pci_ss_list_103c_30b5 NULL +#define pci_ss_list_103c_31fb NULL static const pciSubsystemInfo *pci_ss_list_103c_3220[] = { &pci_ss_info_103c_3220_103c_3225, NULL }; -#define pci_ss_list_103c_3230 NULL +static const pciSubsystemInfo *pci_ss_list_103c_3230[] = { + &pci_ss_info_103c_3230_103c_3223, + &pci_ss_info_103c_3230_103c_3234, + &pci_ss_info_103c_3230_103c_3235, + &pci_ss_info_103c_3230_103c_3237, + &pci_ss_info_103c_3230_103c_323d, + NULL +}; #define pci_ss_list_103c_3238 NULL +#define pci_ss_list_103c_3300 NULL +#define pci_ss_list_103c_3302 NULL +#define pci_ss_list_103c_3305 NULL #define pci_ss_list_103c_4030 NULL #define pci_ss_list_103c_4031 NULL #define pci_ss_list_103c_4037 NULL @@ -50236,6 +57662,7 @@ static const pciSubsystemInfo *pci_ss_list_1043_0675[] = { #define pci_ss_list_1043_8168 NULL #define pci_ss_list_1043_8187 NULL #define pci_ss_list_1043_8188 NULL +#define pci_ss_list_1043_81e7 NULL #define pci_ss_list_1043_81f4 NULL #endif #define pci_ss_list_1044_1012 NULL @@ -50356,6 +57783,7 @@ static const pciSubsystemInfo *pci_ss_list_104c_3d07[] = { &pci_ss_info_104c_3d07_1048_0a43, &pci_ss_info_104c_3d07_1048_0a44, &pci_ss_info_104c_3d07_107d_2633, + &pci_ss_info_104c_3d07_1092_0126, &pci_ss_info_104c_3d07_1092_0127, &pci_ss_info_104c_3d07_1092_0136, &pci_ss_info_104c_3d07_1092_0141, @@ -50411,6 +57839,7 @@ static const pciSubsystemInfo *pci_ss_list_104c_8025[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_104c_8026[] = { + &pci_ss_info_104c_8026_1025_0035, &pci_ss_info_104c_8026_1025_003c, &pci_ss_info_104c_8026_103c_006a, &pci_ss_info_104c_8026_1043_808d, @@ -50431,32 +57860,40 @@ static const pciSubsystemInfo *pci_ss_list_104c_802b[] = { &pci_ss_info_104c_802b_1028_014e, NULL }; -#define pci_ss_list_104c_802e NULL +static const pciSubsystemInfo *pci_ss_list_104c_802e[] = { + &pci_ss_info_104c_802e_1028_018d, + NULL +}; static const pciSubsystemInfo *pci_ss_list_104c_8031[] = { &pci_ss_info_104c_8031_1025_0080, + &pci_ss_info_104c_8031_103c_0934, &pci_ss_info_104c_8031_103c_099c, &pci_ss_info_104c_8031_103c_308b, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_8032[] = { &pci_ss_info_104c_8032_1025_0080, + &pci_ss_info_104c_8032_103c_0934, &pci_ss_info_104c_8032_103c_099c, &pci_ss_info_104c_8032_103c_308b, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_8033[] = { &pci_ss_info_104c_8033_1025_0080, + &pci_ss_info_104c_8033_103c_0934, &pci_ss_info_104c_8033_103c_099c, &pci_ss_info_104c_8033_103c_308b, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_8034[] = { &pci_ss_info_104c_8034_1025_0080, + &pci_ss_info_104c_8034_103c_0934, &pci_ss_info_104c_8034_103c_099c, &pci_ss_info_104c_8034_103c_308b, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_8035[] = { + &pci_ss_info_104c_8035_103c_0934, &pci_ss_info_104c_8035_103c_099c, NULL }; @@ -50465,19 +57902,23 @@ static const pciSubsystemInfo *pci_ss_list_104c_8035[] = { static const pciSubsystemInfo *pci_ss_list_104c_8039[] = { &pci_ss_info_104c_8039_103c_309f, &pci_ss_info_104c_8039_103c_30a1, + &pci_ss_info_104c_8039_103c_30a3, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_803a[] = { &pci_ss_info_104c_803a_103c_309f, &pci_ss_info_104c_803a_103c_30a1, + &pci_ss_info_104c_803a_103c_30a3, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_803b[] = { &pci_ss_info_104c_803b_103c_309f, + &pci_ss_info_104c_803b_103c_30a3, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_803c[] = { &pci_ss_info_104c_803c_103c_309f, + &pci_ss_info_104c_803c_103c_30a3, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_803d[] = { @@ -50485,6 +57926,7 @@ static const pciSubsystemInfo *pci_ss_list_104c_803d[] = { &pci_ss_info_104c_803d_103c_30a1, NULL }; +#define pci_ss_list_104c_8101 NULL #define pci_ss_list_104c_8201 NULL static const pciSubsystemInfo *pci_ss_list_104c_8204[] = { &pci_ss_info_104c_8204_1028_0139, @@ -50507,7 +57949,9 @@ static const pciSubsystemInfo *pci_ss_list_104c_9066[] = { &pci_ss_info_104c_9066_1186_3b04, &pci_ss_info_104c_9066_1186_3b05, &pci_ss_info_104c_9066_13d1_aba0, + &pci_ss_info_104c_9066_16ec_010d, &pci_ss_info_104c_9066_1737_0033, + &pci_ss_info_104c_9066_17cf_0033, NULL }; #define pci_ss_list_104c_a001 NULL @@ -50564,7 +58008,10 @@ static const pciSubsystemInfo *pci_ss_list_104c_ac44[] = { &pci_ss_info_104c_ac44_1071_8160, NULL }; -#define pci_ss_list_104c_ac46 NULL +static const pciSubsystemInfo *pci_ss_list_104c_ac46[] = { + &pci_ss_info_104c_ac46_1014_0552, + NULL +}; static const pciSubsystemInfo *pci_ss_list_104c_ac47[] = { &pci_ss_info_104c_ac47_1028_0139, &pci_ss_info_104c_ac47_1028_013f, @@ -50584,7 +58031,6 @@ static const pciSubsystemInfo *pci_ss_list_104c_ac51[] = { &pci_ss_info_104c_ac51_1028_00b1, &pci_ss_info_104c_ac51_1028_012a, &pci_ss_info_104c_ac51_1033_80cd, - &pci_ss_info_104c_ac51_1095_10cf, &pci_ss_info_104c_ac51_10cf_1095, &pci_ss_info_104c_ac51_e4bf_1000, NULL @@ -50613,7 +58059,10 @@ static const pciSubsystemInfo *pci_ss_list_104c_ac60[] = { NULL }; #define pci_ss_list_104c_ac8d NULL -#define pci_ss_list_104c_ac8e NULL +static const pciSubsystemInfo *pci_ss_list_104c_ac8e[] = { + &pci_ss_info_104c_ac8e_1028_018d, + NULL +}; static const pciSubsystemInfo *pci_ss_list_104c_ac8f[] = { &pci_ss_info_104c_ac8f_1028_018d, NULL @@ -50656,6 +58105,15 @@ static const pciSubsystemInfo *pci_ss_list_1050_6692[] = { #define pci_ss_list_1050_9922 NULL #define pci_ss_list_1050_9970 NULL #endif +#define pci_ss_list_1054_3009 NULL +#define pci_ss_list_1054_300a NULL +#define pci_ss_list_1054_300b NULL +#define pci_ss_list_1054_300f NULL +#define pci_ss_list_1054_3010 NULL +#define pci_ss_list_1054_3011 NULL +#define pci_ss_list_1054_3012 NULL +#define pci_ss_list_1054_3017 NULL +#define pci_ss_list_1054_301d NULL #define pci_ss_list_1055_9130 NULL #define pci_ss_list_1055_9460 NULL #define pci_ss_list_1055_9462 NULL @@ -50670,6 +58128,8 @@ static const pciSubsystemInfo *pci_ss_list_1050_6692[] = { #define pci_ss_list_1057_0012 NULL #define pci_ss_list_1057_0100 NULL #define pci_ss_list_1057_0431 NULL +#define pci_ss_list_1057_1073 NULL +#define pci_ss_list_1057_1219 NULL static const pciSubsystemInfo *pci_ss_list_1057_1801[] = { &pci_ss_info_1057_1801_14fb_0101, &pci_ss_info_1057_1801_14fb_0102, @@ -50826,6 +58286,7 @@ static const pciSubsystemInfo *pci_ss_list_105a_6269[] = { &pci_ss_info_105a_6269_105a_6269, NULL }; +#define pci_ss_list_105a_6300 NULL #define pci_ss_list_105a_6621 NULL #define pci_ss_list_105a_6622 NULL #define pci_ss_list_105a_6624 NULL @@ -50836,9 +58297,15 @@ static const pciSubsystemInfo *pci_ss_list_105a_6269[] = { #define pci_ss_list_105a_8350 NULL static const pciSubsystemInfo *pci_ss_list_105a_8650[] = { &pci_ss_info_105a_8650_105a_4600, + &pci_ss_info_105a_8650_105a_4601, &pci_ss_info_105a_8650_105a_4610, + &pci_ss_info_105a_8650_105a_8600, &pci_ss_info_105a_8650_105a_8601, &pci_ss_info_105a_8650_105a_8602, + &pci_ss_info_105a_8650_105a_8603, + &pci_ss_info_105a_8650_105a_8604, + &pci_ss_info_105a_8650_105a_8610, + &pci_ss_info_105a_8650_105a_b600, NULL }; #define pci_ss_list_105a_c350 NULL @@ -51013,6 +58480,7 @@ static const pciSubsystemInfo *pci_ss_list_106b_0031[] = { #define pci_ss_list_106b_0053 NULL #define pci_ss_list_106b_0054 NULL #define pci_ss_list_106b_0055 NULL +#define pci_ss_list_106b_0057 NULL #define pci_ss_list_106b_0058 NULL #define pci_ss_list_106b_0059 NULL #define pci_ss_list_106b_0066 NULL @@ -51021,6 +58489,7 @@ static const pciSubsystemInfo *pci_ss_list_106b_0031[] = { #define pci_ss_list_106b_0069 NULL #define pci_ss_list_106b_006a NULL #define pci_ss_list_106b_006b NULL +#define pci_ss_list_106b_0074 NULL #define pci_ss_list_106b_1645 NULL #endif #define pci_ss_list_106c_8801 NULL @@ -51110,6 +58579,7 @@ static const pciSubsystemInfo *pci_ss_list_1077_2422[] = { NULL }; #define pci_ss_list_1077_2432 NULL +#define pci_ss_list_1077_2532 NULL #define pci_ss_list_1077_3022 NULL #define pci_ss_list_1077_3032 NULL #define pci_ss_list_1077_4010 NULL @@ -51118,6 +58588,8 @@ static const pciSubsystemInfo *pci_ss_list_1077_2422[] = { #define pci_ss_list_1077_5432 NULL #define pci_ss_list_1077_6312 NULL #define pci_ss_list_1077_6322 NULL +#define pci_ss_list_1077_7220 NULL +#define pci_ss_list_1077_8432 NULL #endif #define pci_ss_list_1078_0000 NULL #define pci_ss_list_1078_0001 NULL @@ -51135,6 +58607,7 @@ static const pciSubsystemInfo *pci_ss_list_1077_2422[] = { #define pci_ss_list_107d_204d NULL #define pci_ss_list_107d_2134 NULL #define pci_ss_list_107d_2971 NULL +#define pci_ss_list_107d_6654 NULL #define pci_ss_list_107e_0001 NULL #define pci_ss_list_107e_0002 NULL #define pci_ss_list_107e_0004 NULL @@ -51197,17 +58670,53 @@ static const pciSubsystemInfo *pci_ss_list_108d_0019[] = { #define pci_ss_list_108e_1101 NULL #define pci_ss_list_108e_1102 NULL #define pci_ss_list_108e_1103 NULL +#define pci_ss_list_108e_1647 NULL #define pci_ss_list_108e_1648 NULL +#define pci_ss_list_108e_16a7 NULL +#define pci_ss_list_108e_16a8 NULL #define pci_ss_list_108e_2bad NULL -#define pci_ss_list_108e_5000 NULL +static const pciSubsystemInfo *pci_ss_list_108e_5000[] = { + &pci_ss_info_108e_5000_108e_5000, + NULL +}; #define pci_ss_list_108e_5043 NULL +#define pci_ss_list_108e_6300 NULL +#define pci_ss_list_108e_6301 NULL +#define pci_ss_list_108e_6302 NULL +#define pci_ss_list_108e_6303 NULL +#define pci_ss_list_108e_6310 NULL +#define pci_ss_list_108e_6311 NULL +#define pci_ss_list_108e_6312 NULL +#define pci_ss_list_108e_6313 NULL +#define pci_ss_list_108e_6320 NULL +#define pci_ss_list_108e_6323 NULL +#define pci_ss_list_108e_6330 NULL +#define pci_ss_list_108e_6331 NULL +#define pci_ss_list_108e_6332 NULL +#define pci_ss_list_108e_6333 NULL +#define pci_ss_list_108e_6340 NULL +#define pci_ss_list_108e_6343 NULL +#define pci_ss_list_108e_6350 NULL +#define pci_ss_list_108e_6353 NULL +#define pci_ss_list_108e_6722 NULL +#define pci_ss_list_108e_676e NULL +#define pci_ss_list_108e_7063 NULL #define pci_ss_list_108e_8000 NULL #define pci_ss_list_108e_8001 NULL #define pci_ss_list_108e_8002 NULL +#define pci_ss_list_108e_80f0 NULL +#define pci_ss_list_108e_80f8 NULL +#define pci_ss_list_108e_9010 NULL +#define pci_ss_list_108e_9020 NULL +#define pci_ss_list_108e_9102 NULL #define pci_ss_list_108e_a000 NULL -#define pci_ss_list_108e_a001 NULL +static const pciSubsystemInfo *pci_ss_list_108e_a001[] = { + &pci_ss_info_108e_a001_108e_a001, + NULL +}; #define pci_ss_list_108e_a801 NULL #define pci_ss_list_108e_abba NULL +#define pci_ss_list_108e_c416 NULL #define pci_ss_list_1091_0020 NULL #define pci_ss_list_1091_0021 NULL #define pci_ss_list_1091_0040 NULL @@ -51217,6 +58726,10 @@ static const pciSubsystemInfo *pci_ss_list_108d_0019[] = { #define pci_ss_list_1091_0720 NULL #define pci_ss_list_1091_07a0 NULL #define pci_ss_list_1091_1091 NULL +static const pciSubsystemInfo *pci_ss_list_1092_0028[] = { + &pci_ss_info_1092_0028_1092_4a00, + NULL +}; #define pci_ss_list_1092_00a0 NULL #define pci_ss_list_1092_00a8 NULL #define pci_ss_list_1092_0550 NULL @@ -51261,6 +58774,7 @@ static const pciSubsystemInfo *pci_ss_list_108d_0019[] = { #define pci_ss_list_1093_2ca0 NULL #define pci_ss_list_1093_70a9 NULL #define pci_ss_list_1093_70b8 NULL +#define pci_ss_list_1093_7144 NULL #define pci_ss_list_1093_b001 NULL #define pci_ss_list_1093_b011 NULL #define pci_ss_list_1093_b021 NULL @@ -51320,6 +58834,7 @@ static const pciSubsystemInfo *pci_ss_list_1095_3512[] = { &pci_ss_info_1095_3512_1095_6512, NULL }; +#define pci_ss_list_1095_3531 NULL #endif #define pci_ss_list_1098_0001 NULL #define pci_ss_list_1098_0002 NULL @@ -51522,7 +59037,9 @@ static const pciSubsystemInfo *pci_ss_list_10b4_1b1d[] = { }; #endif #define pci_ss_list_10b5_0001 NULL +#define pci_ss_list_10b5_1024 NULL #define pci_ss_list_10b5_1042 NULL +#define pci_ss_list_10b5_106a NULL #define pci_ss_list_10b5_1076 NULL #define pci_ss_list_10b5_1077 NULL #define pci_ss_list_10b5_1078 NULL @@ -51531,23 +59048,46 @@ static const pciSubsystemInfo *pci_ss_list_10b4_1b1d[] = { #define pci_ss_list_10b5_1147 NULL #define pci_ss_list_10b5_2540 NULL #define pci_ss_list_10b5_2724 NULL +#define pci_ss_list_10b5_6140 NULL +#define pci_ss_list_10b5_6150 NULL +#define pci_ss_list_10b5_6152 NULL +#define pci_ss_list_10b5_6154 NULL +#define pci_ss_list_10b5_6254 NULL +#define pci_ss_list_10b5_6466 NULL +#define pci_ss_list_10b5_6520 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_10b5_6540[] = { + &pci_ss_info_10b5_6540_1775_1100, &pci_ss_info_10b5_6540_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_10b5_6541[] = { + &pci_ss_info_10b5_6541_1775_1100, &pci_ss_info_10b5_6541_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_10b5_6542[] = { + &pci_ss_info_10b5_6542_1775_1100, &pci_ss_info_10b5_6542_4c53_10e0, NULL }; #define pci_ss_list_10b5_8111 NULL +#define pci_ss_list_10b5_8112 NULL #define pci_ss_list_10b5_8114 NULL +#define pci_ss_list_10b5_8311 NULL +#define pci_ss_list_10b5_8505 NULL +#define pci_ss_list_10b5_8508 NULL +#define pci_ss_list_10b5_8509 NULL +#define pci_ss_list_10b5_8512 NULL #define pci_ss_list_10b5_8516 NULL +#define pci_ss_list_10b5_8517 NULL +#define pci_ss_list_10b5_8518 NULL +#define pci_ss_list_10b5_8524 NULL +#define pci_ss_list_10b5_8525 NULL #define pci_ss_list_10b5_8532 NULL +#define pci_ss_list_10b5_8533 NULL +#define pci_ss_list_10b5_8547 NULL +#define pci_ss_list_10b5_8548 NULL static const pciSubsystemInfo *pci_ss_list_10b5_9030[] = { &pci_ss_info_10b5_9030_10b5_2862, &pci_ss_info_10b5_9030_10b5_2906, @@ -51608,6 +59148,7 @@ static const pciSubsystemInfo *pci_ss_list_10b5_9050[] = { &pci_ss_info_10b5_9050_d84d_4078, NULL }; +#define pci_ss_list_10b5_9052 NULL static const pciSubsystemInfo *pci_ss_list_10b5_9054[] = { &pci_ss_info_10b5_9054_10b5_2455, &pci_ss_info_10b5_9054_10b5_2696, @@ -51828,11 +59369,13 @@ static const pciSubsystemInfo *pci_ss_list_10b7_9055[] = { static const pciSubsystemInfo *pci_ss_list_10b7_9200[] = { &pci_ss_info_10b7_9200_1028_0095, &pci_ss_info_10b7_9200_1028_0097, + &pci_ss_info_10b7_9200_1028_00b4, &pci_ss_info_10b7_9200_1028_00fe, &pci_ss_info_10b7_9200_1028_012a, &pci_ss_info_10b7_9200_10b7_1000, &pci_ss_info_10b7_9200_10b7_7000, &pci_ss_info_10b7_9200_10f1_2466, + &pci_ss_info_10b7_9200_144d_c005, NULL }; static const pciSubsystemInfo *pci_ss_list_10b7_9201[] = { @@ -51936,7 +59479,11 @@ static const pciSubsystemInfo *pci_ss_list_10b9_1541[] = { NULL }; #define pci_ss_list_10b9_1543 NULL -#define pci_ss_list_10b9_1563 NULL +static const pciSubsystemInfo *pci_ss_list_10b9_1563[] = { + &pci_ss_info_10b9_1563_10b9_1563, + &pci_ss_info_10b9_1563_1849_1563, + NULL +}; #define pci_ss_list_10b9_1573 NULL #define pci_ss_list_10b9_1621 NULL #define pci_ss_list_10b9_1631 NULL @@ -51981,9 +59528,15 @@ static const pciSubsystemInfo *pci_ss_list_10b9_5237[] = { &pci_ss_info_10b9_5237_1014_0540, &pci_ss_info_10b9_5237_103c_0024, &pci_ss_info_10b9_5237_104d_810f, + &pci_ss_info_10b9_5237_10b9_5237, + &pci_ss_info_10b9_5237_1849_5237, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10b9_5239[] = { + &pci_ss_info_10b9_5239_10b9_5239, + &pci_ss_info_10b9_5239_1849_5239, NULL }; -#define pci_ss_list_10b9_5239 NULL #define pci_ss_list_10b9_5243 NULL #define pci_ss_list_10b9_5246 NULL #define pci_ss_list_10b9_5247 NULL @@ -51998,7 +59551,10 @@ static const pciSubsystemInfo *pci_ss_list_10b9_5237[] = { #define pci_ss_list_10b9_5263 NULL #define pci_ss_list_10b9_5281 NULL #define pci_ss_list_10b9_5287 NULL -#define pci_ss_list_10b9_5288 NULL +static const pciSubsystemInfo *pci_ss_list_10b9_5288[] = { + &pci_ss_info_10b9_5288_1043_8056, + NULL +}; #define pci_ss_list_10b9_5289 NULL #define pci_ss_list_10b9_5450 NULL static const pciSubsystemInfo *pci_ss_list_10b9_5451[] = { @@ -52009,7 +59565,11 @@ static const pciSubsystemInfo *pci_ss_list_10b9_5451[] = { NULL }; #define pci_ss_list_10b9_5453 NULL -#define pci_ss_list_10b9_5455 NULL +static const pciSubsystemInfo *pci_ss_list_10b9_5455[] = { + &pci_ss_info_10b9_5455_10b9_5455, + &pci_ss_info_10b9_5455_1849_0850, + NULL +}; static const pciSubsystemInfo *pci_ss_list_10b9_5457[] = { &pci_ss_info_10b9_5457_1014_0535, &pci_ss_info_10b9_5457_103c_0024, @@ -52024,13 +59584,20 @@ static const pciSubsystemInfo *pci_ss_list_10b9_7101[] = { &pci_ss_info_10b9_7101_1014_0510, &pci_ss_info_10b9_7101_1014_053c, &pci_ss_info_10b9_7101_103c_0024, + &pci_ss_info_10b9_7101_10b9_7101, + &pci_ss_info_10b9_7101_1849_7101, NULL }; #endif #define pci_ss_list_10ba_0301 NULL #define pci_ss_list_10ba_0304 NULL -#define pci_ss_list_10ba_0308 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_10ba_0308[] = { + &pci_ss_info_10ba_0308_10dd_0024, + NULL +}; #define pci_ss_list_10ba_1002 NULL +#endif #define pci_ss_list_10bd_0e34 NULL #define pci_ss_list_10c3_1100 NULL #define pci_ss_list_10c8_0001 NULL @@ -52098,6 +59665,7 @@ static const pciSubsystemInfo *pci_ss_list_10cd_1300[] = { }; #define pci_ss_list_10cd_2300 NULL #define pci_ss_list_10cd_2500 NULL +#define pci_ss_list_10cd_2700 NULL #endif #define pci_ss_list_10cf_2001 NULL #define pci_ss_list_10d9_0431 NULL @@ -52118,7 +59686,12 @@ static const pciSubsystemInfo *pci_ss_list_10d9_0531[] = { #define pci_ss_list_10dc_0021 NULL #define pci_ss_list_10dc_0022 NULL #define pci_ss_list_10dc_10dc NULL -#define pci_ss_list_10dd_0100 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_10dd_0100[] = { + &pci_ss_info_10dd_0100_10dd_0023, + NULL +}; +#endif #define pci_ss_list_10de_0008 NULL #define pci_ss_list_10de_0009 NULL #define pci_ss_list_10de_0010 NULL @@ -52248,75 +59821,95 @@ static const pciSubsystemInfo *pci_ss_list_10de_0047[] = { #define pci_ss_list_10de_004e NULL static const pciSubsystemInfo *pci_ss_list_10de_0050[] = { &pci_ss_info_10de_0050_1043_815a, + &pci_ss_info_10de_0050_10f1_2865, &pci_ss_info_10de_0050_1458_0c11, &pci_ss_info_10de_0050_1462_7100, &pci_ss_info_10de_0050_147b_1c1a, + &pci_ss_info_10de_0050_1565_3402, NULL }; #define pci_ss_list_10de_0051 NULL static const pciSubsystemInfo *pci_ss_list_10de_0052[] = { &pci_ss_info_10de_0052_1043_815a, + &pci_ss_info_10de_0052_10f1_2865, &pci_ss_info_10de_0052_1458_0c11, &pci_ss_info_10de_0052_1462_7100, &pci_ss_info_10de_0052_147b_1c1a, + &pci_ss_info_10de_0052_1565_3402, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0053[] = { &pci_ss_info_10de_0053_1043_815a, + &pci_ss_info_10de_0053_10f1_2865, &pci_ss_info_10de_0053_1458_5002, &pci_ss_info_10de_0053_1462_7100, &pci_ss_info_10de_0053_147b_1c1a, + &pci_ss_info_10de_0053_1565_3402, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0054[] = { &pci_ss_info_10de_0054_1043_815a, + &pci_ss_info_10de_0054_10f1_2865, &pci_ss_info_10de_0054_1458_b003, &pci_ss_info_10de_0054_1462_7100, &pci_ss_info_10de_0054_147b_1c1a, + &pci_ss_info_10de_0054_1565_5401, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0055[] = { &pci_ss_info_10de_0055_1043_815a, + &pci_ss_info_10de_0055_10f1_2865, &pci_ss_info_10de_0055_1458_b003, &pci_ss_info_10de_0055_147b_1c1a, + &pci_ss_info_10de_0055_1565_5401, NULL }; #define pci_ss_list_10de_0056 NULL static const pciSubsystemInfo *pci_ss_list_10de_0057[] = { &pci_ss_info_10de_0057_1043_8141, + &pci_ss_info_10de_0057_10f1_2865, &pci_ss_info_10de_0057_1458_e000, &pci_ss_info_10de_0057_1462_7100, &pci_ss_info_10de_0057_147b_1c1a, + &pci_ss_info_10de_0057_1565_2501, NULL }; #define pci_ss_list_10de_0058 NULL static const pciSubsystemInfo *pci_ss_list_10de_0059[] = { &pci_ss_info_10de_0059_1043_812a, + &pci_ss_info_10de_0059_10f1_2865, &pci_ss_info_10de_0059_147b_1c1a, + &pci_ss_info_10de_0059_1565_8211, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_005a[] = { &pci_ss_info_10de_005a_1043_815a, + &pci_ss_info_10de_005a_10f1_2865, &pci_ss_info_10de_005a_1458_5004, &pci_ss_info_10de_005a_1462_7100, &pci_ss_info_10de_005a_147b_1c1a, + &pci_ss_info_10de_005a_1565_3402, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_005b[] = { &pci_ss_info_10de_005b_1043_815a, + &pci_ss_info_10de_005b_10f1_2865, &pci_ss_info_10de_005b_1458_5004, &pci_ss_info_10de_005b_1462_7100, &pci_ss_info_10de_005b_147b_1c1a, + &pci_ss_info_10de_005b_1565_3402, NULL }; #define pci_ss_list_10de_005c NULL #define pci_ss_list_10de_005d NULL static const pciSubsystemInfo *pci_ss_list_10de_005e[] = { &pci_ss_info_10de_005e_1043_815a, + &pci_ss_info_10de_005e_10f1_2865, &pci_ss_info_10de_005e_10f1_2891, &pci_ss_info_10de_005e_1458_5000, &pci_ss_info_10de_005e_1462_7100, &pci_ss_info_10de_005e_147b_1c1a, + &pci_ss_info_10de_005e_1565_3402, NULL }; #define pci_ss_list_10de_005f NULL @@ -52330,15 +59923,19 @@ static const pciSubsystemInfo *pci_ss_list_10de_0064[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0065[] = { + &pci_ss_info_10de_0065_10de_0c11, &pci_ss_info_10de_0065_a0a0_03b2, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0066[] = { &pci_ss_info_10de_0066_1043_80a7, + &pci_ss_info_10de_0066_10de_0c11, + &pci_ss_info_10de_0066_a0a0_03b3, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0067[] = { &pci_ss_info_10de_0067_1043_0c11, + &pci_ss_info_10de_0067_a0a0_03b4, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0068[] = { @@ -52353,6 +59950,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_006a[] = { }; static const pciSubsystemInfo *pci_ss_list_10de_006b[] = { &pci_ss_info_10de_006b_10de_006b, + &pci_ss_info_10de_006b_a0a0_0304, NULL }; #define pci_ss_list_10de_006c NULL @@ -52393,6 +59991,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_008a[] = { #define pci_ss_list_10de_0091 NULL #define pci_ss_list_10de_0092 NULL #define pci_ss_list_10de_0093 NULL +#define pci_ss_list_10de_0095 NULL #define pci_ss_list_10de_0098 NULL #define pci_ss_list_10de_0099 NULL #define pci_ss_list_10de_009d NULL @@ -52425,34 +60024,40 @@ static const pciSubsystemInfo *pci_ss_list_10de_00cd[] = { #define pci_ss_list_10de_00da NULL #define pci_ss_list_10de_00dd NULL static const pciSubsystemInfo *pci_ss_list_10de_00df[] = { + &pci_ss_info_10de_00df_1043_80a7, &pci_ss_info_10de_00df_105b_0c43, &pci_ss_info_10de_00df_147b_1c0b, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_00e0[] = { + &pci_ss_info_10de_00e0_1043_813f, &pci_ss_info_10de_00e0_10de_0c11, &pci_ss_info_10de_00e0_1462_7030, &pci_ss_info_10de_00e0_147b_1c0b, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_00e1[] = { + &pci_ss_info_10de_00e1_1043_813f, &pci_ss_info_10de_00e1_1462_7030, &pci_ss_info_10de_00e1_147b_1c0b, NULL }; #define pci_ss_list_10de_00e2 NULL static const pciSubsystemInfo *pci_ss_list_10de_00e3[] = { + &pci_ss_info_10de_00e3_1043_813f, &pci_ss_info_10de_00e3_105b_0c43, &pci_ss_info_10de_00e3_147b_1c0b, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_00e4[] = { + &pci_ss_info_10de_00e4_1043_813f, &pci_ss_info_10de_00e4_105b_0c43, &pci_ss_info_10de_00e4_1462_7030, &pci_ss_info_10de_00e4_147b_1c0b, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_00e5[] = { + &pci_ss_info_10de_00e5_1043_813f, &pci_ss_info_10de_00e5_105b_0c43, &pci_ss_info_10de_00e5_1462_7030, &pci_ss_info_10de_00e5_147b_1c0b, @@ -52460,18 +60065,21 @@ static const pciSubsystemInfo *pci_ss_list_10de_00e5[] = { }; #define pci_ss_list_10de_00e6 NULL static const pciSubsystemInfo *pci_ss_list_10de_00e7[] = { + &pci_ss_info_10de_00e7_1043_813f, &pci_ss_info_10de_00e7_105b_0c43, &pci_ss_info_10de_00e7_1462_7030, &pci_ss_info_10de_00e7_147b_1c0b, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_00e8[] = { + &pci_ss_info_10de_00e8_1043_813f, &pci_ss_info_10de_00e8_105b_0c43, &pci_ss_info_10de_00e8_1462_7030, &pci_ss_info_10de_00e8_147b_1c0b, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_00ea[] = { + &pci_ss_info_10de_00ea_1043_819d, &pci_ss_info_10de_00ea_105b_0c43, &pci_ss_info_10de_00ea_1462_b010, &pci_ss_info_10de_00ea_147b_1c0b, @@ -52499,6 +60107,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_00f6[] = { }; #define pci_ss_list_10de_00f8 NULL static const pciSubsystemInfo *pci_ss_list_10de_00f9[] = { + &pci_ss_info_10de_00f9_10de_00f9, &pci_ss_info_10de_00f9_1682_2120, NULL }; @@ -52553,6 +60162,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_0110[] = { &pci_ss_info_10de_0110_1462_8817, &pci_ss_info_10de_0110_14af_7102, &pci_ss_info_10de_0110_14af_7103, + &pci_ss_info_10de_0110_1545_0023, NULL }; #define pci_ss_list_10de_0111 NULL @@ -52624,6 +60234,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_0171[] = { #define pci_ss_list_10de_0175 NULL static const pciSubsystemInfo *pci_ss_list_10de_0176[] = { &pci_ss_info_10de_0176_103c_08b0, + &pci_ss_info_10de_0176_144d_c005, &pci_ss_info_10de_0176_4c53_1090, NULL }; @@ -52659,6 +60270,9 @@ static const pciSubsystemInfo *pci_ss_list_10de_0181[] = { #define pci_ss_list_10de_018d NULL #define pci_ss_list_10de_0191 NULL #define pci_ss_list_10de_0193 NULL +#define pci_ss_list_10de_0194 NULL +#define pci_ss_list_10de_019d NULL +#define pci_ss_list_10de_019e NULL #define pci_ss_list_10de_01a0 NULL #define pci_ss_list_10de_01a4 NULL #define pci_ss_list_10de_01ab NULL @@ -52674,6 +60288,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_0181[] = { #define pci_ss_list_10de_01c1 NULL #define pci_ss_list_10de_01c2 NULL #define pci_ss_list_10de_01c3 NULL +#define pci_ss_list_10de_01d0 NULL static const pciSubsystemInfo *pci_ss_list_10de_01d1[] = { &pci_ss_info_10de_01d1_1462_0345, NULL @@ -52683,6 +60298,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_01d1[] = { #define pci_ss_list_10de_01d7 NULL #define pci_ss_list_10de_01d8 NULL #define pci_ss_list_10de_01da NULL +#define pci_ss_list_10de_01db NULL #define pci_ss_list_10de_01dc NULL #define pci_ss_list_10de_01dd NULL static const pciSubsystemInfo *pci_ss_list_10de_01de[] = { @@ -52712,6 +60328,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_01ed[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_10de_01ee[] = { + &pci_ss_info_10de_01ee_10de_01ee, &pci_ss_info_10de_01ee_a0a0_03b9, NULL }; @@ -52739,7 +60356,10 @@ static const pciSubsystemInfo *pci_ss_list_10de_0202[] = { #define pci_ss_list_10de_0212 NULL #define pci_ss_list_10de_0215 NULL #define pci_ss_list_10de_0218 NULL -#define pci_ss_list_10de_0221 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0221[] = { + &pci_ss_info_10de_0221_3842_a341, + NULL +}; #define pci_ss_list_10de_0222 NULL static const pciSubsystemInfo *pci_ss_list_10de_0240[] = { &pci_ss_info_10de_0240_1043_81cd, @@ -52750,6 +60370,8 @@ static const pciSubsystemInfo *pci_ss_list_10de_0240[] = { #define pci_ss_list_10de_0242 NULL #define pci_ss_list_10de_0243 NULL static const pciSubsystemInfo *pci_ss_list_10de_0244[] = { + &pci_ss_info_10de_0244_103c_30b5, + &pci_ss_info_10de_0244_103c_30b7, &pci_ss_info_10de_0244_10de_0244, NULL }; @@ -52770,6 +60392,8 @@ static const pciSubsystemInfo *pci_ss_list_10de_0247[] = { #define pci_ss_list_10de_0250 NULL static const pciSubsystemInfo *pci_ss_list_10de_0251[] = { &pci_ss_info_10de_0251_1043_8023, + &pci_ss_info_10de_0251_10de_0251, + &pci_ss_info_10de_0251_1462_8710, NULL }; #define pci_ss_list_10de_0252 NULL @@ -52782,7 +60406,9 @@ static const pciSubsystemInfo *pci_ss_list_10de_0253[] = { #define pci_ss_list_10de_0259 NULL #define pci_ss_list_10de_025b NULL static const pciSubsystemInfo *pci_ss_list_10de_0260[] = { + &pci_ss_info_10de_0260_103c_30b7, &pci_ss_info_10de_0260_1043_81bc, + &pci_ss_info_10de_0260_1458_5001, &pci_ss_info_10de_0260_1462_7207, NULL }; @@ -52790,16 +60416,19 @@ static const pciSubsystemInfo *pci_ss_list_10de_0260[] = { #define pci_ss_list_10de_0262 NULL #define pci_ss_list_10de_0263 NULL static const pciSubsystemInfo *pci_ss_list_10de_0264[] = { + &pci_ss_info_10de_0264_103c_30b7, &pci_ss_info_10de_0264_1043_81bc, &pci_ss_info_10de_0264_1462_7207, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0265[] = { + &pci_ss_info_10de_0265_103c_30b7, &pci_ss_info_10de_0265_1043_81bc, &pci_ss_info_10de_0265_1462_7207, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_0266[] = { + &pci_ss_info_10de_0266_103c_30b7, &pci_ss_info_10de_0266_1043_81bc, &pci_ss_info_10de_0266_1462_7207, NULL @@ -52811,6 +60440,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_0267[] = { }; #define pci_ss_list_10de_0268 NULL static const pciSubsystemInfo *pci_ss_list_10de_0269[] = { + &pci_ss_info_10de_0269_103c_30b7, &pci_ss_info_10de_0269_1043_8141, &pci_ss_info_10de_0269_1462_7207, NULL @@ -52818,35 +60448,52 @@ static const pciSubsystemInfo *pci_ss_list_10de_0269[] = { #define pci_ss_list_10de_026a NULL #define pci_ss_list_10de_026b NULL static const pciSubsystemInfo *pci_ss_list_10de_026c[] = { + &pci_ss_info_10de_026c_103c_30b5, + &pci_ss_info_10de_026c_103c_30b7, &pci_ss_info_10de_026c_10de_cb84, &pci_ss_info_10de_026c_1462_7207, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_026d[] = { + &pci_ss_info_10de_026d_103c_30b7, &pci_ss_info_10de_026d_1043_81bc, &pci_ss_info_10de_026d_1462_7207, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_026e[] = { + &pci_ss_info_10de_026e_103c_30b7, &pci_ss_info_10de_026e_1043_81bc, &pci_ss_info_10de_026e_1462_7207, NULL }; -#define pci_ss_list_10de_026f NULL +static const pciSubsystemInfo *pci_ss_list_10de_026f[] = { + &pci_ss_info_10de_026f_103c_30b7, + NULL +}; static const pciSubsystemInfo *pci_ss_list_10de_0270[] = { + &pci_ss_info_10de_0270_103c_30b7, &pci_ss_info_10de_0270_1043_81bc, + &pci_ss_info_10de_0270_1458_5001, &pci_ss_info_10de_0270_1462_7207, NULL }; -#define pci_ss_list_10de_0271 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0271[] = { + &pci_ss_info_10de_0271_103c_30b5, + &pci_ss_info_10de_0271_103c_30b7, + NULL +}; #define pci_ss_list_10de_0272 NULL static const pciSubsystemInfo *pci_ss_list_10de_027e[] = { + &pci_ss_info_10de_027e_103c_30b7, &pci_ss_info_10de_027e_1043_81cd, + &pci_ss_info_10de_027e_1458_5000, &pci_ss_info_10de_027e_1462_7207, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_027f[] = { + &pci_ss_info_10de_027f_103c_30b7, &pci_ss_info_10de_027f_1043_81cd, + &pci_ss_info_10de_027f_1458_5000, &pci_ss_info_10de_027f_1462_7207, NULL }; @@ -52866,7 +60513,9 @@ static const pciSubsystemInfo *pci_ss_list_10de_0291[] = { #define pci_ss_list_10de_0293 NULL #define pci_ss_list_10de_0294 NULL static const pciSubsystemInfo *pci_ss_list_10de_0295[] = { + &pci_ss_info_10de_0295_1043_8225, &pci_ss_info_10de_0295_107d_2a68, + &pci_ss_info_10de_0295_1462_0663, NULL }; #define pci_ss_list_10de_0297 NULL @@ -52879,15 +60528,30 @@ static const pciSubsystemInfo *pci_ss_list_10de_0295[] = { #define pci_ss_list_10de_029e NULL #define pci_ss_list_10de_029f NULL #define pci_ss_list_10de_02a0 NULL -#define pci_ss_list_10de_02e0 NULL -#define pci_ss_list_10de_02e1 NULL +static const pciSubsystemInfo *pci_ss_list_10de_02e0[] = { + &pci_ss_info_10de_02e0_02e0_2249, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_02e1[] = { + &pci_ss_info_10de_02e1_1682_222b, + NULL +}; #define pci_ss_list_10de_02e2 NULL +#define pci_ss_list_10de_02e3 NULL +static const pciSubsystemInfo *pci_ss_list_10de_02e4[] = { + &pci_ss_info_10de_02e4_1682_2271, + NULL +}; static const pciSubsystemInfo *pci_ss_list_10de_02f0[] = { + &pci_ss_info_10de_02f0_103c_30b7, &pci_ss_info_10de_02f0_1043_81cd, &pci_ss_info_10de_02f0_1462_7207, NULL }; -#define pci_ss_list_10de_02f1 NULL +static const pciSubsystemInfo *pci_ss_list_10de_02f1[] = { + &pci_ss_info_10de_02f1_1458_5000, + NULL +}; #define pci_ss_list_10de_02f2 NULL #define pci_ss_list_10de_02f3 NULL #define pci_ss_list_10de_02f4 NULL @@ -52895,30 +60559,46 @@ static const pciSubsystemInfo *pci_ss_list_10de_02f0[] = { #define pci_ss_list_10de_02f6 NULL #define pci_ss_list_10de_02f7 NULL static const pciSubsystemInfo *pci_ss_list_10de_02f8[] = { + &pci_ss_info_10de_02f8_103c_30b7, &pci_ss_info_10de_02f8_1043_81cd, + &pci_ss_info_10de_02f8_1458_5000, &pci_ss_info_10de_02f8_1462_7207, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_02f9[] = { + &pci_ss_info_10de_02f9_103c_30b7, &pci_ss_info_10de_02f9_1043_81cd, + &pci_ss_info_10de_02f9_1458_5000, &pci_ss_info_10de_02f9_1462_7207, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_02fa[] = { + &pci_ss_info_10de_02fa_103c_30b7, &pci_ss_info_10de_02fa_1043_81cd, + &pci_ss_info_10de_02fa_1458_5000, &pci_ss_info_10de_02fa_1462_7207, NULL }; #define pci_ss_list_10de_02fb NULL -#define pci_ss_list_10de_02fc NULL -#define pci_ss_list_10de_02fd NULL +static const pciSubsystemInfo *pci_ss_list_10de_02fc[] = { + &pci_ss_info_10de_02fc_103c_30b7, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_02fd[] = { + &pci_ss_info_10de_02fd_103c_30b7, + NULL +}; static const pciSubsystemInfo *pci_ss_list_10de_02fe[] = { + &pci_ss_info_10de_02fe_103c_30b7, &pci_ss_info_10de_02fe_1043_81cd, + &pci_ss_info_10de_02fe_1458_5000, &pci_ss_info_10de_02fe_1462_7207, NULL }; static const pciSubsystemInfo *pci_ss_list_10de_02ff[] = { + &pci_ss_info_10de_02ff_103c_30b7, &pci_ss_info_10de_02ff_1043_81cd, + &pci_ss_info_10de_02ff_1458_5000, &pci_ss_info_10de_02ff_1462_7207, NULL }; @@ -52946,6 +60626,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_0314[] = { #define pci_ss_list_10de_0321 NULL static const pciSubsystemInfo *pci_ss_list_10de_0322[] = { &pci_ss_info_10de_0322_1043_02fb, + &pci_ss_info_10de_0322_1462_9110, &pci_ss_info_10de_0322_1462_9171, &pci_ss_info_10de_0322_1462_9360, NULL @@ -52953,20 +60634,31 @@ static const pciSubsystemInfo *pci_ss_list_10de_0322[] = { #define pci_ss_list_10de_0323 NULL static const pciSubsystemInfo *pci_ss_list_10de_0324[] = { &pci_ss_info_10de_0324_1028_0196, + &pci_ss_info_10de_0324_103c_006a, &pci_ss_info_10de_0324_1071_8160, NULL }; #define pci_ss_list_10de_0325 NULL -#define pci_ss_list_10de_0326 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0326[] = { + &pci_ss_info_10de_0326_1458_310d, + &pci_ss_info_10de_0326_1682_2034, + NULL +}; #define pci_ss_list_10de_0327 NULL #define pci_ss_list_10de_0328 NULL -#define pci_ss_list_10de_0329 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0329[] = { + &pci_ss_info_10de_0329_10de_0010, + NULL +}; #define pci_ss_list_10de_032a NULL #define pci_ss_list_10de_032b NULL #define pci_ss_list_10de_032c NULL #define pci_ss_list_10de_032d NULL #define pci_ss_list_10de_032f NULL -#define pci_ss_list_10de_0330 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0330[] = { + &pci_ss_info_10de_0330_1043_8137, + NULL +}; static const pciSubsystemInfo *pci_ss_list_10de_0331[] = { &pci_ss_info_10de_0331_1043_8145, NULL @@ -52976,7 +60668,10 @@ static const pciSubsystemInfo *pci_ss_list_10de_0331[] = { #define pci_ss_list_10de_0334 NULL #define pci_ss_list_10de_0338 NULL #define pci_ss_list_10de_033f NULL -#define pci_ss_list_10de_0341 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0341[] = { + &pci_ss_info_10de_0341_1462_9380, + NULL +}; #define pci_ss_list_10de_0342 NULL #define pci_ss_list_10de_0343 NULL #define pci_ss_list_10de_0344 NULL @@ -52993,31 +60688,56 @@ static const pciSubsystemInfo *pci_ss_list_10de_0347[] = { #define pci_ss_list_10de_034f NULL #define pci_ss_list_10de_0360 NULL #define pci_ss_list_10de_0361 NULL -#define pci_ss_list_10de_0362 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0362[] = { + &pci_ss_info_10de_0362_147b_12c4, + NULL +}; #define pci_ss_list_10de_0363 NULL #define pci_ss_list_10de_0364 NULL #define pci_ss_list_10de_0365 NULL #define pci_ss_list_10de_0366 NULL #define pci_ss_list_10de_0367 NULL -#define pci_ss_list_10de_0368 NULL -#define pci_ss_list_10de_0369 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0368[] = { + &pci_ss_info_10de_0368_147b_12c4, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_0369[] = { + &pci_ss_info_10de_0369_147b_12c4, + NULL +}; #define pci_ss_list_10de_036a NULL #define pci_ss_list_10de_036b NULL -#define pci_ss_list_10de_036c NULL -#define pci_ss_list_10de_036d NULL -#define pci_ss_list_10de_036e NULL +static const pciSubsystemInfo *pci_ss_list_10de_036c[] = { + &pci_ss_info_10de_036c_147b_12c4, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_036d[] = { + &pci_ss_info_10de_036d_147b_12c4, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_036e[] = { + &pci_ss_info_10de_036e_147b_12c4, + NULL +}; #define pci_ss_list_10de_0370 NULL #define pci_ss_list_10de_0371 NULL #define pci_ss_list_10de_0372 NULL -#define pci_ss_list_10de_0373 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0373[] = { + &pci_ss_info_10de_0373_147b_12c4, + NULL +}; #define pci_ss_list_10de_0374 NULL #define pci_ss_list_10de_0375 NULL #define pci_ss_list_10de_0376 NULL #define pci_ss_list_10de_0377 NULL #define pci_ss_list_10de_0378 NULL #define pci_ss_list_10de_037a NULL +#define pci_ss_list_10de_037c NULL #define pci_ss_list_10de_037e NULL -#define pci_ss_list_10de_037f NULL +static const pciSubsystemInfo *pci_ss_list_10de_037f[] = { + &pci_ss_info_10de_037f_147b_12c4, + NULL +}; #define pci_ss_list_10de_0390 NULL static const pciSubsystemInfo *pci_ss_list_10de_0391[] = { &pci_ss_info_10de_0391_1458_3427, @@ -53027,13 +60747,24 @@ static const pciSubsystemInfo *pci_ss_list_10de_0392[] = { &pci_ss_info_10de_0392_1462_0622, NULL }; -#define pci_ss_list_10de_0393 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0393[] = { + &pci_ss_info_10de_0393_10de_0412, + &pci_ss_info_10de_0393_1462_0412, + NULL +}; #define pci_ss_list_10de_0394 NULL #define pci_ss_list_10de_0395 NULL #define pci_ss_list_10de_0397 NULL -#define pci_ss_list_10de_0398 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0398[] = { + &pci_ss_info_10de_0398_1025_006c, + NULL +}; +#define pci_ss_list_10de_0399 NULL #define pci_ss_list_10de_039b NULL -#define pci_ss_list_10de_039c NULL +static const pciSubsystemInfo *pci_ss_list_10de_039c[] = { + &pci_ss_info_10de_039c_10de_039c, + NULL +}; #define pci_ss_list_10de_039e NULL #define pci_ss_list_10de_03a0 NULL #define pci_ss_list_10de_03a1 NULL @@ -53063,11 +60794,15 @@ static const pciSubsystemInfo *pci_ss_list_10de_0392[] = { #define pci_ss_list_10de_03b9 NULL #define pci_ss_list_10de_03ba NULL #define pci_ss_list_10de_03bb NULL +#define pci_ss_list_10de_03bc NULL #define pci_ss_list_10de_03d0 NULL #define pci_ss_list_10de_03d1 NULL #define pci_ss_list_10de_03d2 NULL #define pci_ss_list_10de_03d5 NULL -#define pci_ss_list_10de_03e0 NULL +static const pciSubsystemInfo *pci_ss_list_10de_03e0[] = { + &pci_ss_info_10de_03e0_1849_03e0, + NULL +}; #define pci_ss_list_10de_03e1 NULL #define pci_ss_list_10de_03e2 NULL #define pci_ss_list_10de_03e3 NULL @@ -53075,21 +60810,82 @@ static const pciSubsystemInfo *pci_ss_list_10de_0392[] = { #define pci_ss_list_10de_03e5 NULL #define pci_ss_list_10de_03e6 NULL #define pci_ss_list_10de_03e7 NULL -#define pci_ss_list_10de_03e8 NULL -#define pci_ss_list_10de_03e9 NULL -#define pci_ss_list_10de_03ea NULL -#define pci_ss_list_10de_03eb NULL -#define pci_ss_list_10de_03ec NULL +static const pciSubsystemInfo *pci_ss_list_10de_03e8[] = { + &pci_ss_info_10de_03e8_1849_03e8, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_03e9[] = { + &pci_ss_info_10de_03e9_1849_03e9, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_03ea[] = { + &pci_ss_info_10de_03ea_1849_03ea, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_03eb[] = { + &pci_ss_info_10de_03eb_1849_03eb, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_03ec[] = { + &pci_ss_info_10de_03ec_1849_03ec, + NULL +}; #define pci_ss_list_10de_03ee NULL -#define pci_ss_list_10de_03ef NULL -#define pci_ss_list_10de_03f0 NULL -#define pci_ss_list_10de_03f1 NULL -#define pci_ss_list_10de_03f2 NULL +static const pciSubsystemInfo *pci_ss_list_10de_03ef[] = { + &pci_ss_info_10de_03ef_1849_03ef, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_03f0[] = { + &pci_ss_info_10de_03f0_1849_0888, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_03f1[] = { + &pci_ss_info_10de_03f1_1849_03f1, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_03f2[] = { + &pci_ss_info_10de_03f2_1849_03f2, + NULL +}; #define pci_ss_list_10de_03f3 NULL #define pci_ss_list_10de_03f4 NULL -#define pci_ss_list_10de_03f5 NULL -#define pci_ss_list_10de_03f6 NULL +static const pciSubsystemInfo *pci_ss_list_10de_03f5[] = { + &pci_ss_info_10de_03f5_1849_03eb, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_03f6[] = { + &pci_ss_info_10de_03f6_1849_03f6, + NULL +}; #define pci_ss_list_10de_03f7 NULL +#define pci_ss_list_10de_0400 NULL +#define pci_ss_list_10de_0402 NULL +#define pci_ss_list_10de_0403 NULL +#define pci_ss_list_10de_0404 NULL +#define pci_ss_list_10de_0407 NULL +#define pci_ss_list_10de_0409 NULL +#define pci_ss_list_10de_040a NULL +#define pci_ss_list_10de_040b NULL +#define pci_ss_list_10de_040c NULL +#define pci_ss_list_10de_040d NULL +#define pci_ss_list_10de_040e NULL +#define pci_ss_list_10de_040f NULL +#define pci_ss_list_10de_0420 NULL +#define pci_ss_list_10de_0421 NULL +#define pci_ss_list_10de_0422 NULL +#define pci_ss_list_10de_0423 NULL +#define pci_ss_list_10de_0425 NULL +#define pci_ss_list_10de_0426 NULL +#define pci_ss_list_10de_0427 NULL +#define pci_ss_list_10de_0428 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0429[] = { + &pci_ss_info_10de_0429_17aa_20d8, + NULL +}; +#define pci_ss_list_10de_042a NULL +#define pci_ss_list_10de_042b NULL +#define pci_ss_list_10de_042d NULL +#define pci_ss_list_10de_042f NULL #define pci_ss_list_10de_0440 NULL #define pci_ss_list_10de_0441 NULL #define pci_ss_list_10de_0442 NULL @@ -53121,7 +60917,68 @@ static const pciSubsystemInfo *pci_ss_list_10de_0392[] = { #define pci_ss_list_10de_045d NULL #define pci_ss_list_10de_045e NULL #define pci_ss_list_10de_045f NULL +#define pci_ss_list_10de_0531 NULL +#define pci_ss_list_10de_0533 NULL +#define pci_ss_list_10de_053a NULL +#define pci_ss_list_10de_053b NULL +#define pci_ss_list_10de_053e NULL +#define pci_ss_list_10de_0541 NULL +#define pci_ss_list_10de_0542 NULL +#define pci_ss_list_10de_0543 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0547[] = { + &pci_ss_info_10de_0547_1849_0547, + NULL +}; +#define pci_ss_list_10de_0548 NULL +static const pciSubsystemInfo *pci_ss_list_10de_054c[] = { + &pci_ss_info_10de_054c_1849_054c, + NULL +}; +#define pci_ss_list_10de_0550 NULL +#define pci_ss_list_10de_0554 NULL +#define pci_ss_list_10de_0555 NULL +#define pci_ss_list_10de_055c NULL +#define pci_ss_list_10de_055d NULL +#define pci_ss_list_10de_055e NULL +#define pci_ss_list_10de_055f NULL +#define pci_ss_list_10de_0560 NULL +#define pci_ss_list_10de_0561 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0562[] = { + &pci_ss_info_10de_0562_1849_0562, + NULL +}; +#define pci_ss_list_10de_0563 NULL +#define pci_ss_list_10de_056a NULL +#define pci_ss_list_10de_0600 NULL +#define pci_ss_list_10de_0606 NULL +#define pci_ss_list_10de_0609 NULL +#define pci_ss_list_10de_060c NULL +#define pci_ss_list_10de_0611 NULL +#define pci_ss_list_10de_061a NULL +#define pci_ss_list_10de_0622 NULL +#define pci_ss_list_10de_07cb NULL +#define pci_ss_list_10de_07cd NULL +#define pci_ss_list_10de_07ce NULL +#define pci_ss_list_10de_07cf NULL +#define pci_ss_list_10de_07d0 NULL +#define pci_ss_list_10de_07d1 NULL +#define pci_ss_list_10de_07d2 NULL +#define pci_ss_list_10de_07d3 NULL +#define pci_ss_list_10de_07d6 NULL +#define pci_ss_list_10de_07dc NULL +#define pci_ss_list_10de_07e1 NULL +#define pci_ss_list_10de_07e3 NULL +#define pci_ss_list_10de_07f4 NULL +static const pciSubsystemInfo *pci_ss_list_10de_07fc[] = { + &pci_ss_info_10de_07fc_10de_07fc, + NULL +}; +#define pci_ss_list_10de_07fe NULL +#define pci_ss_list_10de_0849 NULL +#define pci_ss_list_10de_c615 NULL #define pci_ss_list_10df_1ae5 NULL +#define pci_ss_list_10df_f011 NULL +#define pci_ss_list_10df_f015 NULL #define pci_ss_list_10df_f085 NULL #define pci_ss_list_10df_f095 NULL #define pci_ss_list_10df_f098 NULL @@ -53133,6 +60990,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_0392[] = { #define pci_ss_list_10df_f0e1 NULL #define pci_ss_list_10df_f0e5 NULL #define pci_ss_list_10df_f0f5 NULL +#define pci_ss_list_10df_f100 NULL #define pci_ss_list_10df_f700 NULL #define pci_ss_list_10df_f701 NULL #define pci_ss_list_10df_f800 NULL @@ -53147,8 +61005,10 @@ static const pciSubsystemInfo *pci_ss_list_10de_0392[] = { #define pci_ss_list_10df_fc00 NULL #define pci_ss_list_10df_fc10 NULL #define pci_ss_list_10df_fc20 NULL +#define pci_ss_list_10df_fc40 NULL #define pci_ss_list_10df_fd00 NULL #define pci_ss_list_10df_fe00 NULL +#define pci_ss_list_10df_fe05 NULL #define pci_ss_list_10df_ff00 NULL #define pci_ss_list_10e0_5026 NULL #define pci_ss_list_10e0_5027 NULL @@ -53166,12 +61026,17 @@ static const pciSubsystemInfo *pci_ss_list_10e1_0391[] = { #endif #define pci_ss_list_10e3_0000 NULL #define pci_ss_list_10e3_0108 NULL -#define pci_ss_list_10e3_0148 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_10e3_0148[] = { + &pci_ss_info_10e3_0148_1775_1100, + NULL +}; #define pci_ss_list_10e3_0860 NULL #define pci_ss_list_10e3_0862 NULL #define pci_ss_list_10e3_8260 NULL #define pci_ss_list_10e3_8261 NULL #define pci_ss_list_10e3_a108 NULL +#endif #define pci_ss_list_10e4_8029 NULL #define pci_ss_list_10e8_1072 NULL #define pci_ss_list_10e8_2011 NULL @@ -53217,6 +61082,7 @@ static const pciSubsystemInfo *pci_ss_list_10e1_0391[] = { #define pci_ss_list_10ec_0139 NULL #define pci_ss_list_10ec_0260 NULL #define pci_ss_list_10ec_0261 NULL +#define pci_ss_list_10ec_0262 NULL #define pci_ss_list_10ec_0280 NULL #define pci_ss_list_10ec_0861 NULL #define pci_ss_list_10ec_0862 NULL @@ -53237,6 +61103,7 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8029[] = { }; static const pciSubsystemInfo *pci_ss_list_10ec_8129[] = { &pci_ss_info_10ec_8129_10ec_8129, + &pci_ss_info_10ec_8129_11ec_8129, NULL }; #define pci_ss_list_10ec_8136 NULL @@ -53268,6 +61135,7 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8139[] = { &pci_ss_info_10ec_8139_1436_8139, &pci_ss_info_10ec_8139_144d_c00c, &pci_ss_info_10ec_8139_1458_e000, + &pci_ss_info_10ec_8139_1462_217c, &pci_ss_info_10ec_8139_1462_788c, &pci_ss_info_10ec_8139_146c_1439, &pci_ss_info_10ec_8139_1489_6001, @@ -53275,6 +61143,7 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8139[] = { &pci_ss_info_10ec_8139_149c_139a, &pci_ss_info_10ec_8139_149c_8139, &pci_ss_info_10ec_8139_14cb_0200, + &pci_ss_info_10ec_8139_1565_2300, &pci_ss_info_10ec_8139_1695_9001, &pci_ss_info_10ec_8139_1799_5000, &pci_ss_info_10ec_8139_1904_8139, @@ -53286,6 +61155,7 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8139[] = { }; static const pciSubsystemInfo *pci_ss_list_10ec_8167[] = { &pci_ss_info_10ec_8167_1462_235c, + &pci_ss_info_10ec_8167_1462_236c, NULL }; #define pci_ss_list_10ec_8168 NULL @@ -53296,6 +61166,9 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8169[] = { &pci_ss_info_10ec_8169_1458_e000, &pci_ss_info_10ec_8169_1462_030c, &pci_ss_info_10ec_8169_1462_702c, + &pci_ss_info_10ec_8169_1462_7094, + &pci_ss_info_10ec_8169_1734_1091, + &pci_ss_info_10ec_8169_a0a0_0449, NULL }; #define pci_ss_list_10ec_8180 NULL @@ -53315,8 +61188,12 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8169[] = { #define pci_ss_list_10ee_3fc4 NULL #define pci_ss_list_10ee_3fc5 NULL #define pci_ss_list_10ee_3fc6 NULL +#define pci_ss_list_10ee_8380 NULL #define pci_ss_list_10ee_8381 NULL #define pci_ss_list_10ee_d154 NULL +#define pci_ss_list_10ee_ebf0 NULL +#define pci_ss_list_10ee_ebf1 NULL +#define pci_ss_list_10ee_ebf2 NULL #define pci_ss_list_10ef_8154 NULL #define pci_ss_list_10f1_2865 NULL #define pci_ss_list_10f5_a001 NULL @@ -53324,6 +61201,7 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8169[] = { #define pci_ss_list_10fb_186f NULL #define pci_ss_list_10fc_0003 NULL #define pci_ss_list_10fc_0005 NULL +#define pci_ss_list_1101_0002 NULL #define pci_ss_list_1101_1060 NULL #define pci_ss_list_1101_1622 NULL #define pci_ss_list_1101_9100 NULL @@ -53374,6 +61252,7 @@ static const pciSubsystemInfo *pci_ss_list_1102_0007[] = { &pci_ss_info_1102_0007_1102_1001, &pci_ss_info_1102_0007_1102_1002, &pci_ss_info_1102_0007_1102_1006, + &pci_ss_info_1102_0007_1102_1012, &pci_ss_info_1102_0007_1462_1009, NULL }; @@ -53381,6 +61260,10 @@ static const pciSubsystemInfo *pci_ss_list_1102_0008[] = { &pci_ss_info_1102_0008_1102_0008, NULL }; +static const pciSubsystemInfo *pci_ss_list_1102_0009[] = { + &pci_ss_info_1102_0009_1102_0010, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1102_4001[] = { &pci_ss_info_1102_4001_1102_0010, NULL @@ -53422,7 +61305,6 @@ static const pciSubsystemInfo *pci_ss_list_1102_8938[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1103_0004[] = { &pci_ss_info_1103_0004_1103_0001, - &pci_ss_info_1103_0004_1103_0003, &pci_ss_info_1103_0004_1103_0004, &pci_ss_info_1103_0004_1103_0005, &pci_ss_info_1103_0004_1103_0006, @@ -53433,6 +61315,15 @@ static const pciSubsystemInfo *pci_ss_list_1103_0004[] = { #define pci_ss_list_1103_0007 NULL #define pci_ss_list_1103_0008 NULL #define pci_ss_list_1103_0009 NULL +#define pci_ss_list_1103_1740 NULL +#define pci_ss_list_1103_1742 NULL +#define pci_ss_list_1103_2300 NULL +#define pci_ss_list_1103_2310 NULL +#define pci_ss_list_1103_2320 NULL +#define pci_ss_list_1103_2322 NULL +#define pci_ss_list_1103_2340 NULL +#define pci_ss_list_1103_3220 NULL +#define pci_ss_list_1103_3320 NULL #endif #define pci_ss_list_1105_1105 NULL #define pci_ss_list_1105_8300 NULL @@ -53451,6 +61342,7 @@ static const pciSubsystemInfo *pci_ss_list_1105_8476[] = { }; #define pci_ss_list_1105_8485 NULL #define pci_ss_list_1105_8486 NULL +#define pci_ss_list_1105_c622 NULL #endif #define pci_ss_list_1106_0102 NULL #define pci_ss_list_1106_0130 NULL @@ -53504,6 +61396,8 @@ static const pciSubsystemInfo *pci_ss_list_1106_0571[] = { &pci_ss_info_1106_0571_1297_f641, &pci_ss_info_1106_0571_1458_5002, &pci_ss_info_1106_0571_1462_7020, + &pci_ss_info_1106_0571_1462_7094, + &pci_ss_info_1106_0571_1462_7181, &pci_ss_info_1106_0571_147b_1407, &pci_ss_info_1106_0571_1849_0571, NULL @@ -53573,6 +61467,7 @@ static const pciSubsystemInfo *pci_ss_list_1106_0691[] = { #define pci_ss_list_1106_1364 NULL #define pci_ss_list_1106_1571 NULL #define pci_ss_list_1106_1595 NULL +#define pci_ss_list_1106_2106 NULL #define pci_ss_list_1106_2204 NULL #define pci_ss_list_1106_2208 NULL #define pci_ss_list_1106_2238 NULL @@ -53608,6 +61503,8 @@ static const pciSubsystemInfo *pci_ss_list_1106_3038[] = { &pci_ss_info_1106_3038_1179_0001, &pci_ss_info_1106_3038_1458_5004, &pci_ss_info_1106_3038_1462_7020, + &pci_ss_info_1106_3038_1462_7094, + &pci_ss_info_1106_3038_1462_7181, &pci_ss_info_1106_3038_147b_1407, &pci_ss_info_1106_3038_182d_201d, &pci_ss_info_1106_3038_1849_3038, @@ -53662,6 +61559,7 @@ static const pciSubsystemInfo *pci_ss_list_1106_3059[] = { &pci_ss_info_1106_3059_1043_80a1, &pci_ss_info_1106_3059_1043_80b0, &pci_ss_info_1106_3059_1043_812a, + &pci_ss_info_1106_3059_10ec_8168, &pci_ss_info_1106_3059_1106_3059, &pci_ss_info_1106_3059_1106_4161, &pci_ss_info_1106_3059_1106_4170, @@ -53671,12 +61569,14 @@ static const pciSubsystemInfo *pci_ss_list_1106_3059[] = { &pci_ss_info_1106_3059_1458_a002, &pci_ss_info_1106_3059_1462_0080, &pci_ss_info_1106_3059_1462_3800, + &pci_ss_info_1106_3059_1462_7181, &pci_ss_info_1106_3059_147b_1407, &pci_ss_info_1106_3059_1849_0850, &pci_ss_info_1106_3059_1849_9761, - &pci_ss_info_1106_3059_3005_1695, &pci_ss_info_1106_3059_4005_4710, &pci_ss_info_1106_3059_a0a0_01b6, + &pci_ss_info_1106_3059_a0a0_0342, + &pci_ss_info_1106_3059_aa01_1106, NULL }; static const pciSubsystemInfo *pci_ss_list_1106_3065[] = { @@ -53685,6 +61585,8 @@ static const pciSubsystemInfo *pci_ss_list_1106_3065[] = { &pci_ss_info_1106_3065_1186_1400, &pci_ss_info_1106_3065_1186_1401, &pci_ss_info_1106_3065_13b9_1421, + &pci_ss_info_1106_3065_1462_7061, + &pci_ss_info_1106_3065_1462_7181, &pci_ss_info_1106_3065_147b_1c09, &pci_ss_info_1106_3065_1695_3005, &pci_ss_info_1106_3065_1695_300c, @@ -53717,6 +61619,8 @@ static const pciSubsystemInfo *pci_ss_list_1106_3104[] = { &pci_ss_info_1106_3104_1297_f641, &pci_ss_info_1106_3104_1458_5004, &pci_ss_info_1106_3104_1462_7020, + &pci_ss_info_1106_3104_1462_7094, + &pci_ss_info_1106_3104_1462_7181, &pci_ss_info_1106_3104_147b_1407, &pci_ss_info_1106_3104_182d_201d, &pci_ss_info_1106_3104_1849_3104, @@ -53724,6 +61628,7 @@ static const pciSubsystemInfo *pci_ss_list_1106_3104[] = { }; static const pciSubsystemInfo *pci_ss_list_1106_3106[] = { &pci_ss_info_1106_3106_1186_1403, + &pci_ss_info_1106_3106_1186_1407, NULL }; #define pci_ss_list_1106_3108 NULL @@ -53749,9 +61654,11 @@ static const pciSubsystemInfo *pci_ss_list_1106_3149[] = { &pci_ss_info_1106_3149_1043_80ed, &pci_ss_info_1106_3149_1458_b003, &pci_ss_info_1106_3149_1462_7020, + &pci_ss_info_1106_3149_1462_7094, &pci_ss_info_1106_3149_147b_1407, &pci_ss_info_1106_3149_147b_1408, &pci_ss_info_1106_3149_1849_3149, + &pci_ss_info_1106_3149_a0a0_04ad, NULL }; #define pci_ss_list_1106_3156 NULL @@ -53807,6 +61714,7 @@ static const pciSubsystemInfo *pci_ss_list_1106_3227[] = { #define pci_ss_list_1106_324e NULL #define pci_ss_list_1106_3258 NULL #define pci_ss_list_1106_3259 NULL +#define pci_ss_list_1106_3260 NULL #define pci_ss_list_1106_3269 NULL #define pci_ss_list_1106_3282 NULL #define pci_ss_list_1106_3287 NULL @@ -53818,6 +61726,7 @@ static const pciSubsystemInfo *pci_ss_list_1106_3227[] = { #define pci_ss_list_1106_3336 NULL #define pci_ss_list_1106_3337 NULL #define pci_ss_list_1106_3340 NULL +#define pci_ss_list_1106_3343 NULL #define pci_ss_list_1106_3344 NULL #define pci_ss_list_1106_3349 NULL #define pci_ss_list_1106_3351 NULL @@ -53857,11 +61766,13 @@ static const pciSubsystemInfo *pci_ss_list_1106_3227[] = { #define pci_ss_list_1106_5351 NULL #define pci_ss_list_1106_5364 NULL #define pci_ss_list_1106_6100 NULL +#define pci_ss_list_1106_6287 NULL #define pci_ss_list_1106_6327 NULL #define pci_ss_list_1106_6364 NULL #define pci_ss_list_1106_7204 NULL static const pciSubsystemInfo *pci_ss_list_1106_7205[] = { &pci_ss_info_1106_7205_1458_d000, + &pci_ss_info_1106_7205_1462_7061, NULL }; #define pci_ss_list_1106_7208 NULL @@ -54013,10 +61924,6 @@ static const pciSubsystemInfo *pci_ss_list_1113_9211[] = { #define pci_ss_list_1119_000b NULL #define pci_ss_list_1119_000c NULL #define pci_ss_list_1119_000d NULL -#define pci_ss_list_1119_0010 NULL -#define pci_ss_list_1119_0011 NULL -#define pci_ss_list_1119_0012 NULL -#define pci_ss_list_1119_0013 NULL #define pci_ss_list_1119_0100 NULL #define pci_ss_list_1119_0101 NULL #define pci_ss_list_1119_0102 NULL @@ -54073,6 +61980,7 @@ static const pciSubsystemInfo *pci_ss_list_1113_9211[] = { #define pci_ss_list_1119_0261 NULL #define pci_ss_list_1119_02ff NULL #define pci_ss_list_1119_0300 NULL +#define pci_ss_list_1119_0301 NULL #define pci_ss_list_111a_0000 NULL #define pci_ss_list_111a_0002 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -54169,6 +62077,7 @@ static const pciSubsystemInfo *pci_ss_list_1131_7133[] = { &pci_ss_info_1131_7133_1435_7330, &pci_ss_info_1131_7133_1435_7350, &pci_ss_info_1131_7133_1461_1044, + &pci_ss_info_1131_7133_1461_a14b, &pci_ss_info_1131_7133_1461_f31f, &pci_ss_info_1131_7133_1462_6231, &pci_ss_info_1131_7133_1489_0214, @@ -54177,6 +62086,7 @@ static const pciSubsystemInfo *pci_ss_list_1131_7133[] = { &pci_ss_info_1131_7133_153b_1162, &pci_ss_info_1131_7133_17de_7350, &pci_ss_info_1131_7133_185b_c100, + &pci_ss_info_1131_7133_185b_c900, &pci_ss_info_1131_7133_5168_0306, &pci_ss_info_1131_7133_5168_0319, &pci_ss_info_1131_7133_5168_0502, @@ -54213,6 +62123,7 @@ static const pciSubsystemInfo *pci_ss_list_1131_7134[] = { &pci_ss_info_1131_7134_185b_c900, &pci_ss_info_1131_7134_1894_a006, &pci_ss_info_1131_7134_1894_fe01, + &pci_ss_info_1131_7134_5168_0138, NULL }; #define pci_ss_list_1131_7145 NULL @@ -54248,6 +62159,7 @@ static const pciSubsystemInfo *pci_ss_list_1131_7146[] = { &pci_ss_info_1131_7146_13c2_1019, &pci_ss_info_1131_7146_13c2_1102, &pci_ss_info_1131_7146_153b_1156, + &pci_ss_info_1131_7146_1894_0020, NULL }; static const pciSubsystemInfo *pci_ss_list_1131_9730[] = { @@ -54293,10 +62205,7 @@ static const pciSubsystemInfo *pci_ss_list_1133_e013[] = { NULL }; #define pci_ss_list_1133_e014 NULL -static const pciSubsystemInfo *pci_ss_list_1133_e015[] = { - &pci_ss_info_1133_e015_1133_e015, - NULL -}; +#define pci_ss_list_1133_e015 NULL #define pci_ss_list_1133_e016 NULL static const pciSubsystemInfo *pci_ss_list_1133_e017[] = { &pci_ss_info_1133_e017_1133_e017, @@ -54331,9 +62240,21 @@ static const pciSubsystemInfo *pci_ss_list_1133_e01c[] = { &pci_ss_info_1133_e01c_1133_1c0c, NULL }; -#define pci_ss_list_1133_e01e NULL -#define pci_ss_list_1133_e020 NULL -#define pci_ss_list_1133_e022 NULL +static const pciSubsystemInfo *pci_ss_list_1133_e01e[] = { + &pci_ss_info_1133_e01e_1133_1e01, + &pci_ss_info_1133_e01e_1133_e01e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1133_e020[] = { + &pci_ss_info_1133_e020_1133_2001, + &pci_ss_info_1133_e020_1133_e020, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1133_e022[] = { + &pci_ss_info_1133_e022_1133_2200, + &pci_ss_info_1133_e022_1133_e022, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1133_e024[] = { &pci_ss_info_1133_e024_1133_2400, &pci_ss_info_1133_e024_1133_e024, @@ -54346,6 +62267,17 @@ static const pciSubsystemInfo *pci_ss_list_1133_e028[] = { }; #define pci_ss_list_1133_e02a NULL #define pci_ss_list_1133_e02c NULL +static const pciSubsystemInfo *pci_ss_list_1133_e02e[] = { + &pci_ss_info_1133_e02e_1133_2e01, + &pci_ss_info_1133_e02e_1133_e02e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1133_e032[] = { + &pci_ss_info_1133_e032_1133_3201, + &pci_ss_info_1133_e032_1133_e032, + NULL +}; +#define pci_ss_list_1133_e034 NULL #endif #define pci_ss_list_1134_0001 NULL #define pci_ss_list_1134_0002 NULL @@ -54513,6 +62445,9 @@ static const pciSubsystemInfo *pci_ss_list_114f_0024[] = { #define pci_ss_list_114f_00c9 NULL #define pci_ss_list_114f_00ca NULL #define pci_ss_list_114f_00cb NULL +#define pci_ss_list_114f_00cc NULL +#define pci_ss_list_114f_00cd NULL +#define pci_ss_list_114f_00ce NULL #define pci_ss_list_114f_00d0 NULL #define pci_ss_list_114f_00d1 NULL #define pci_ss_list_114f_6001 NULL @@ -54593,6 +62528,7 @@ static const pciSubsystemInfo *pci_ss_list_1163_2000[] = { #define pci_ss_list_1166_0015 NULL #define pci_ss_list_1166_0016 NULL #define pci_ss_list_1166_0017 NULL +#define pci_ss_list_1166_0031 NULL #define pci_ss_list_1166_0036 NULL #define pci_ss_list_1166_0101 NULL #define pci_ss_list_1166_0103 NULL @@ -54620,6 +62556,7 @@ static const pciSubsystemInfo *pci_ss_list_1166_0203[] = { #define pci_ss_list_1166_0205 NULL #define pci_ss_list_1166_0211 NULL static const pciSubsystemInfo *pci_ss_list_1166_0212[] = { + &pci_ss_info_1166_0212_1028_810b, &pci_ss_info_1166_0212_4c53_1080, NULL }; @@ -54634,6 +62571,7 @@ static const pciSubsystemInfo *pci_ss_list_1166_0217[] = { &pci_ss_info_1166_0217_1028_4134, NULL }; +#define pci_ss_list_1166_021b NULL static const pciSubsystemInfo *pci_ss_list_1166_0220[] = { &pci_ss_info_1166_0220_4c53_1080, NULL @@ -54653,11 +62591,24 @@ static const pciSubsystemInfo *pci_ss_list_1166_0230[] = { NULL }; #define pci_ss_list_1166_0234 NULL +#define pci_ss_list_1166_0235 NULL +#define pci_ss_list_1166_0238 NULL #define pci_ss_list_1166_0240 NULL #define pci_ss_list_1166_0241 NULL #define pci_ss_list_1166_0242 NULL #define pci_ss_list_1166_024a NULL #define pci_ss_list_1166_024b NULL +#define pci_ss_list_1166_0406 NULL +#define pci_ss_list_1166_0408 NULL +#define pci_ss_list_1166_040a NULL +#define pci_ss_list_1166_0410 NULL +#define pci_ss_list_1166_0411 NULL +#define pci_ss_list_1166_0412 NULL +#define pci_ss_list_1166_0414 NULL +#define pci_ss_list_1166_0416 NULL +#define pci_ss_list_1166_0420 NULL +#define pci_ss_list_1166_0421 NULL +#define pci_ss_list_1166_0422 NULL #endif #define pci_ss_list_116a_6100 NULL #define pci_ss_list_116a_6800 NULL @@ -54706,6 +62657,7 @@ static const pciSubsystemInfo *pci_ss_list_1180_0475[] = { }; static const pciSubsystemInfo *pci_ss_list_1180_0476[] = { &pci_ss_info_1180_0476_1014_0185, + &pci_ss_info_1180_0476_1028_014f, &pci_ss_info_1180_0476_1028_0188, &pci_ss_info_1180_0476_1043_1967, &pci_ss_info_1180_0476_1043_1987, @@ -54713,6 +62665,7 @@ static const pciSubsystemInfo *pci_ss_list_1180_0476[] = { &pci_ss_info_1180_0476_104d_80e7, &pci_ss_info_1180_0476_104d_814e, &pci_ss_info_1180_0476_10f7_8338, + &pci_ss_info_1180_0476_144d_c005, &pci_ss_info_1180_0476_144d_c00c, &pci_ss_info_1180_0476_14ef_0220, &pci_ss_info_1180_0476_17aa_201c, @@ -54735,7 +62688,9 @@ static const pciSubsystemInfo *pci_ss_list_1180_0551[] = { }; static const pciSubsystemInfo *pci_ss_list_1180_0552[] = { &pci_ss_info_1180_0552_1014_0511, + &pci_ss_info_1180_0552_1028_014f, &pci_ss_info_1180_0552_1028_0188, + &pci_ss_info_1180_0552_144d_c005, &pci_ss_info_1180_0552_144d_c00c, &pci_ss_info_1180_0552_17aa_201e, NULL @@ -54744,6 +62699,7 @@ static const pciSubsystemInfo *pci_ss_list_1180_0552[] = { #define pci_ss_list_1180_0575 NULL #define pci_ss_list_1180_0576 NULL static const pciSubsystemInfo *pci_ss_list_1180_0592[] = { + &pci_ss_info_1180_0592_103c_30b7, &pci_ss_info_1180_0592_1043_1967, &pci_ss_info_1180_0592_144d_c018, NULL @@ -54754,15 +62710,24 @@ static const pciSubsystemInfo *pci_ss_list_1180_0822[] = { &pci_ss_info_1180_0822_1014_0598, &pci_ss_info_1180_0822_1028_0188, &pci_ss_info_1180_0822_1028_01a2, + &pci_ss_info_1180_0822_103c_30b7, &pci_ss_info_1180_0822_1043_1967, &pci_ss_info_1180_0822_10f7_8338, &pci_ss_info_1180_0822_144d_c018, &pci_ss_info_1180_0822_17aa_201d, NULL }; -#define pci_ss_list_1180_0832 NULL +static const pciSubsystemInfo *pci_ss_list_1180_0832[] = { + &pci_ss_info_1180_0832_103c_30b7, + NULL +}; #define pci_ss_list_1180_0841 NULL +static const pciSubsystemInfo *pci_ss_list_1180_0843[] = { + &pci_ss_info_1180_0843_103c_30b7, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1180_0852[] = { + &pci_ss_info_1180_0852_103c_30b7, &pci_ss_info_1180_0852_1043_1967, NULL }; @@ -54801,10 +62766,15 @@ static const pciSubsystemInfo *pci_ss_list_1186_1300[] = { #define pci_ss_list_1186_3a13 NULL #define pci_ss_list_1186_3a14 NULL #define pci_ss_list_1186_3a63 NULL +#define pci_ss_list_1186_3c00 NULL #define pci_ss_list_1186_4000 NULL +#define pci_ss_list_1186_4001 NULL #define pci_ss_list_1186_4300 NULL #define pci_ss_list_1186_4800 NULL +#define pci_ss_list_1186_4b00 NULL #define pci_ss_list_1186_4b01 NULL +#define pci_ss_list_1186_4b02 NULL +#define pci_ss_list_1186_4b03 NULL static const pciSubsystemInfo *pci_ss_list_1186_4c00[] = { &pci_ss_info_1186_4c00_1186_4c00, NULL @@ -54856,6 +62826,7 @@ static const pciSubsystemInfo *pci_ss_list_1186_4c00[] = { #define pci_ss_list_119e_0003 NULL #define pci_ss_list_11a9_4240 NULL #define pci_ss_list_11ab_0146 NULL +#define pci_ss_list_11ab_0f53 NULL #define pci_ss_list_11ab_11ab NULL #define pci_ss_list_11ab_138f NULL #define pci_ss_list_11ab_1fa6 NULL @@ -54863,6 +62834,7 @@ static const pciSubsystemInfo *pci_ss_list_1186_4c00[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_11ab_1faa[] = { &pci_ss_info_11ab_1faa_1385_4e00, + &pci_ss_info_11ab_1faa_1385_6b00, NULL }; #define pci_ss_list_11ab_2a01 NULL @@ -54939,6 +62911,10 @@ static const pciSubsystemInfo *pci_ss_list_11ab_4351[] = { NULL }; #define pci_ss_list_11ab_4352 NULL +#define pci_ss_list_11ab_4353 NULL +#define pci_ss_list_11ab_4354 NULL +#define pci_ss_list_11ab_4356 NULL +#define pci_ss_list_11ab_435a NULL static const pciSubsystemInfo *pci_ss_list_11ab_4360[] = { &pci_ss_info_11ab_4360_1043_8134, &pci_ss_info_11ab_4360_107b_4009, @@ -55001,6 +62977,13 @@ static const pciSubsystemInfo *pci_ss_list_11ab_4362[] = { }; #define pci_ss_list_11ab_4363 NULL #define pci_ss_list_11ab_4364 NULL +#define pci_ss_list_11ab_4365 NULL +#define pci_ss_list_11ab_4366 NULL +#define pci_ss_list_11ab_4367 NULL +#define pci_ss_list_11ab_4368 NULL +#define pci_ss_list_11ab_4369 NULL +#define pci_ss_list_11ab_436a NULL +#define pci_ss_list_11ab_436b NULL #define pci_ss_list_11ab_4611 NULL #define pci_ss_list_11ab_4620 NULL #define pci_ss_list_11ab_4801 NULL @@ -55010,9 +62993,12 @@ static const pciSubsystemInfo *pci_ss_list_11ab_4362[] = { #define pci_ss_list_11ab_5080 NULL #define pci_ss_list_11ab_5081 NULL #define pci_ss_list_11ab_6041 NULL +#define pci_ss_list_11ab_6042 NULL #define pci_ss_list_11ab_6081 NULL #define pci_ss_list_11ab_6101 NULL +#define pci_ss_list_11ab_6121 NULL #define pci_ss_list_11ab_6141 NULL +#define pci_ss_list_11ab_6145 NULL #define pci_ss_list_11ab_6450 NULL #define pci_ss_list_11ab_6460 NULL static const pciSubsystemInfo *pci_ss_list_11ab_6480[] = { @@ -55020,6 +63006,7 @@ static const pciSubsystemInfo *pci_ss_list_11ab_6480[] = { NULL }; #define pci_ss_list_11ab_6485 NULL +#define pci_ss_list_11ab_7042 NULL #define pci_ss_list_11ab_f003 NULL #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -55163,7 +63150,6 @@ static const pciSubsystemInfo *pci_ss_list_11c1_0450[] = { &pci_ss_info_11c1_0450_1033_80a8, &pci_ss_info_11c1_0450_144f_4005, &pci_ss_info_11c1_0450_1468_0450, - &pci_ss_info_11c1_0450_4005_144f, NULL }; #define pci_ss_list_11c1_0451 NULL @@ -55234,8 +63220,14 @@ static const pciSubsystemInfo *pci_ss_list_11cb_2000[] = { #define pci_ss_list_11d4_1889 NULL #define pci_ss_list_11d4_1981 NULL #define pci_ss_list_11d4_1983 NULL -#define pci_ss_list_11d4_1986 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_11d4_1986[] = { + &pci_ss_info_11d4_1986_11d4_1986, + NULL +}; +#define pci_ss_list_11d4_198b NULL #define pci_ss_list_11d4_5340 NULL +#endif #define pci_ss_list_11d5_0115 NULL #define pci_ss_list_11d5_0117 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -55277,7 +63269,10 @@ static const pciSubsystemInfo *pci_ss_list_11f6_2201[] = { }; #define pci_ss_list_11f6_9881 NULL #endif +#define pci_ss_list_11f8_7364 NULL #define pci_ss_list_11f8_7375 NULL +#define pci_ss_list_11f8_7384 NULL +#define pci_ss_list_11f8_8000 NULL #define pci_ss_list_11fe_0001 NULL #define pci_ss_list_11fe_0002 NULL #define pci_ss_list_11fe_0003 NULL @@ -55293,6 +63288,15 @@ static const pciSubsystemInfo *pci_ss_list_11f6_2201[] = { #define pci_ss_list_11fe_000d NULL #define pci_ss_list_11fe_000e NULL #define pci_ss_list_11fe_000f NULL +#define pci_ss_list_11fe_0040 NULL +#define pci_ss_list_11fe_0041 NULL +#define pci_ss_list_11fe_0042 NULL +#define pci_ss_list_11fe_0043 NULL +#define pci_ss_list_11fe_0044 NULL +#define pci_ss_list_11fe_0045 NULL +#define pci_ss_list_11fe_0047 NULL +#define pci_ss_list_11fe_004f NULL +#define pci_ss_list_11fe_0052 NULL #define pci_ss_list_11fe_0801 NULL #define pci_ss_list_11fe_0802 NULL #define pci_ss_list_11fe_0803 NULL @@ -55359,6 +63363,7 @@ static const pciSubsystemInfo *pci_ss_list_1217_7110[] = { #define pci_ss_list_1217_7130 NULL #define pci_ss_list_1217_7134 NULL #define pci_ss_list_1217_7135 NULL +#define pci_ss_list_1217_7136 NULL #define pci_ss_list_1217_71e2 NULL #define pci_ss_list_1217_7212 NULL #define pci_ss_list_1217_7213 NULL @@ -55421,6 +63426,11 @@ static const pciSubsystemInfo *pci_ss_list_121a_0009[] = { #define pci_ss_list_121a_0057 NULL #define pci_ss_list_121e_0201 NULL #define pci_ss_list_1220_1220 NULL +#define pci_ss_list_1221_9172 NULL +#define pci_ss_list_1221_91a2 NULL +#define pci_ss_list_1221_91c3 NULL +#define pci_ss_list_1221_b152 NULL +#define pci_ss_list_1221_c103 NULL #define pci_ss_list_1223_0003 NULL #define pci_ss_list_1223_0004 NULL #define pci_ss_list_1223_0005 NULL @@ -55588,6 +63598,7 @@ static const pciSubsystemInfo *pci_ss_list_1260_3873[] = { &pci_ss_info_1260_3873_1668_0414, &pci_ss_info_1260_3873_16a5_1601, &pci_ss_info_1260_3873_1737_3874, + &pci_ss_info_1260_3873_8086_2510, &pci_ss_info_1260_3873_8086_2513, NULL }; @@ -55601,6 +63612,7 @@ static const pciSubsystemInfo *pci_ss_list_1260_3890[] = { &pci_ss_info_1260_3890_10b8_a835, &pci_ss_info_1260_3890_1113_4203, &pci_ss_info_1260_3890_1113_8201, + &pci_ss_info_1260_3890_1113_b301, &pci_ss_info_1260_3890_1113_ee03, &pci_ss_info_1260_3890_1113_ee08, &pci_ss_info_1260_3890_1186_3202, @@ -55715,6 +63727,7 @@ static const pciSubsystemInfo *pci_ss_list_1274_5880[] = { }; #define pci_ss_list_1278_0701 NULL #define pci_ss_list_1278_0710 NULL +#define pci_ss_list_1278_1101 NULL #define pci_ss_list_1279_0060 NULL #define pci_ss_list_1279_0061 NULL #define pci_ss_list_1279_0295 NULL @@ -55876,6 +63889,7 @@ static const pciSubsystemInfo *pci_ss_list_127a_8234[] = { #define pci_ss_list_1282_9102 NULL #define pci_ss_list_1282_9132 NULL #define pci_ss_list_1283_673a NULL +#define pci_ss_list_1283_8152 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1283_8211[] = { &pci_ss_info_1283_8211_1043_8138, @@ -55947,6 +63961,7 @@ static const pciSubsystemInfo *pci_ss_list_12b9_1008[] = { &pci_ss_info_12b9_1008_12b9_00ab, &pci_ss_info_12b9_1008_12b9_00ac, &pci_ss_info_12b9_1008_12b9_00ad, + &pci_ss_info_12b9_1008_12b9_baba, NULL }; #endif @@ -55992,6 +64007,10 @@ static const pciSubsystemInfo *pci_ss_list_12be_3042[] = { #define pci_ss_list_12c5_0081 NULL #define pci_ss_list_12c5_0085 NULL #define pci_ss_list_12c5_0086 NULL +#define pci_ss_list_12c7_0546 NULL +#define pci_ss_list_12c7_0647 NULL +#define pci_ss_list_12c7_0676 NULL +#define pci_ss_list_12c7_0685 NULL #define pci_ss_list_12d2_0008 NULL #define pci_ss_list_12d2_0009 NULL static const pciSubsystemInfo *pci_ss_list_12d2_0018[] = { @@ -56032,6 +64051,7 @@ static const pciSubsystemInfo *pci_ss_list_12d2_0018[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_12d9_1078[] = { &pci_ss_info_12d9_1078_12d9_000d, + &pci_ss_info_12d9_1078_12d9_000e, NULL }; #endif @@ -56135,7 +64155,21 @@ static const pciSubsystemInfo *pci_ss_list_12eb_8803[] = { #define pci_ss_list_1307_004d NULL #define pci_ss_list_1307_0052 NULL #define pci_ss_list_1307_0054 NULL +#define pci_ss_list_1307_005d NULL #define pci_ss_list_1307_005e NULL +#define pci_ss_list_1307_005f NULL +#define pci_ss_list_1307_0060 NULL +#define pci_ss_list_1307_0061 NULL +#define pci_ss_list_1307_0062 NULL +#define pci_ss_list_1307_0063 NULL +#define pci_ss_list_1307_0064 NULL +#define pci_ss_list_1307_0065 NULL +#define pci_ss_list_1307_0066 NULL +#define pci_ss_list_1307_0067 NULL +#define pci_ss_list_1307_0068 NULL +#define pci_ss_list_1307_006f NULL +#define pci_ss_list_1307_0078 NULL +#define pci_ss_list_1307_0079 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1308_0001[] = { &pci_ss_info_1308_0001_1308_0001, @@ -56273,13 +64307,16 @@ static const pciSubsystemInfo *pci_ss_list_134d_7891[] = { #define pci_ss_list_1360_0102 NULL #define pci_ss_list_1360_0103 NULL #define pci_ss_list_1360_0104 NULL +#define pci_ss_list_1360_0105 NULL #define pci_ss_list_1360_0201 NULL #define pci_ss_list_1360_0202 NULL #define pci_ss_list_1360_0203 NULL #define pci_ss_list_1360_0204 NULL +#define pci_ss_list_1360_0205 NULL #define pci_ss_list_1360_0301 NULL #define pci_ss_list_1360_0302 NULL #define pci_ss_list_1360_0303 NULL +#define pci_ss_list_1360_0304 NULL #define pci_ss_list_136a_0004 NULL #define pci_ss_list_136a_0007 NULL #define pci_ss_list_136a_0008 NULL @@ -56356,10 +64393,29 @@ static const pciSubsystemInfo *pci_ss_list_1371_434e[] = { #define pci_ss_list_1385_7e00 NULL #define pci_ss_list_1385_f004 NULL #define pci_ss_list_1389_0001 NULL +#define pci_ss_list_1393_0001 NULL +#define pci_ss_list_1393_1020 NULL +#define pci_ss_list_1393_1021 NULL +#define pci_ss_list_1393_1022 NULL #define pci_ss_list_1393_1040 NULL +#define pci_ss_list_1393_1041 NULL +#define pci_ss_list_1393_1042 NULL +#define pci_ss_list_1393_1043 NULL +#define pci_ss_list_1393_1044 NULL +#define pci_ss_list_1393_1080 NULL +#define pci_ss_list_1393_1140 NULL #define pci_ss_list_1393_1141 NULL +#define pci_ss_list_1393_1142 NULL +#define pci_ss_list_1393_1180 NULL +#define pci_ss_list_1393_1181 NULL +#define pci_ss_list_1393_1320 NULL +#define pci_ss_list_1393_1321 NULL +#define pci_ss_list_1393_1340 NULL +#define pci_ss_list_1393_1341 NULL +#define pci_ss_list_1393_1380 NULL #define pci_ss_list_1393_1680 NULL #define pci_ss_list_1393_1681 NULL +#define pci_ss_list_1393_1682 NULL #define pci_ss_list_1393_2040 NULL #define pci_ss_list_1393_2180 NULL #define pci_ss_list_1393_3200 NULL @@ -56373,6 +64429,7 @@ static const pciSubsystemInfo *pci_ss_list_1394_0001[] = { static const pciSubsystemInfo *pci_ss_list_1397_08b4[] = { &pci_ss_info_1397_08b4_1397_b520, &pci_ss_info_1397_08b4_1397_b540, + &pci_ss_info_1397_08b4_1397_b556, NULL }; #define pci_ss_list_1397_16b8 NULL @@ -56384,6 +64441,7 @@ static const pciSubsystemInfo *pci_ss_list_1397_2bd0[] = { NULL }; #define pci_ss_list_1397_30b1 NULL +#define pci_ss_list_1397_b700 NULL #define pci_ss_list_1397_f001 NULL #endif #define pci_ss_list_139a_0001 NULL @@ -56400,6 +64458,7 @@ static const pciSubsystemInfo *pci_ss_list_1397_2bd0[] = { #define pci_ss_list_13a3_001d NULL #define pci_ss_list_13a3_0020 NULL #define pci_ss_list_13a3_0026 NULL +#define pci_ss_list_13a3_002e NULL #define pci_ss_list_13a8_0152 NULL #define pci_ss_list_13a8_0154 NULL #define pci_ss_list_13a8_0158 NULL @@ -56418,6 +64477,7 @@ static const pciSubsystemInfo *pci_ss_list_13c1_1001[] = { #define pci_ss_list_13c1_1004 NULL #endif #define pci_ss_list_13c2_000e NULL +#define pci_ss_list_13c2_1019 NULL #define pci_ss_list_13c6_0520 NULL #define pci_ss_list_13c6_0620 NULL #define pci_ss_list_13c6_0820 NULL @@ -56427,6 +64487,7 @@ static const pciSubsystemInfo *pci_ss_list_13c1_1001[] = { #define pci_ss_list_13d1_ab03 NULL #define pci_ss_list_13d1_ab06 NULL #define pci_ss_list_13d1_ab08 NULL +#define pci_ss_list_13d3_3219 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_13df_0001[] = { &pci_ss_info_13df_0001_13df_0001, @@ -56436,6 +64497,7 @@ static const pciSubsystemInfo *pci_ss_list_13df_0001[] = { #define pci_ss_list_13ec_000a NULL #define pci_ss_list_13f0_0200 NULL #define pci_ss_list_13f0_0201 NULL +#define pci_ss_list_13f0_1021 NULL #define pci_ss_list_13f0_1023 NULL #define pci_ss_list_13f4_1401 NULL #define pci_ss_list_13f6_0011 NULL @@ -56454,10 +64516,29 @@ static const pciSubsystemInfo *pci_ss_list_13f6_0111[] = { &pci_ss_info_13f6_0111_1043_8077, &pci_ss_info_13f6_0111_1043_80e2, &pci_ss_info_13f6_0111_13f6_0111, + &pci_ss_info_13f6_0111_13f6_9761, + &pci_ss_info_13f6_0111_153b_1144, + &pci_ss_info_13f6_0111_153b_1170, &pci_ss_info_13f6_0111_1681_a000, + &pci_ss_info_13f6_0111_270f_1103, + &pci_ss_info_13f6_0111_584d_3731, + &pci_ss_info_13f6_0111_584d_3741, + &pci_ss_info_13f6_0111_584d_3751, + &pci_ss_info_13f6_0111_584d_3761, + &pci_ss_info_13f6_0111_584d_3771, + &pci_ss_info_13f6_0111_7284_8384, NULL }; #define pci_ss_list_13f6_0211 NULL +static const pciSubsystemInfo *pci_ss_list_13f6_8788[] = { + &pci_ss_info_13f6_8788_1043_8269, + &pci_ss_info_13f6_8788_14c3_1710, + &pci_ss_info_13f6_8788_1a58_0910, + &pci_ss_info_13f6_8788_415a_5431, + &pci_ss_info_13f6_8788_584d_3781, + &pci_ss_info_13f6_8788_7284_9761, + NULL +}; #define pci_ss_list_13f6_9880 NULL #endif #define pci_ss_list_13fe_1240 NULL @@ -56468,6 +64549,8 @@ static const pciSubsystemInfo *pci_ss_list_13fe_1600[] = { &pci_ss_info_13fe_1600_1612_0004, NULL }; +#define pci_ss_list_13fe_1603 NULL +#define pci_ss_list_13fe_1604 NULL static const pciSubsystemInfo *pci_ss_list_13fe_16ff[] = { &pci_ss_info_13fe_16ff_1601_0000, &pci_ss_info_13fe_16ff_1602_0000, @@ -56535,10 +64618,20 @@ static const pciSubsystemInfo *pci_ss_list_1412_1724[] = { &pci_ss_info_1412_1724_153b_1153, &pci_ss_info_1412_1724_270f_f641, &pci_ss_info_1412_1724_270f_f645, - &pci_ss_info_1412_1724_3136_4154, NULL }; #endif +#define pci_ss_list_1414_5801 NULL +#define pci_ss_list_1414_5802 NULL +#define pci_ss_list_1414_5803 NULL +#define pci_ss_list_1414_5804 NULL +#define pci_ss_list_1414_5805 NULL +#define pci_ss_list_1414_5806 NULL +#define pci_ss_list_1414_5807 NULL +#define pci_ss_list_1414_580a NULL +#define pci_ss_list_1414_580b NULL +#define pci_ss_list_1414_580d NULL +#define pci_ss_list_1414_5811 NULL #define pci_ss_list_1415_8403 NULL #define pci_ss_list_1415_9500 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -56574,6 +64667,10 @@ static const pciSubsystemInfo *pci_ss_list_1415_9511[] = { #define pci_ss_list_1420_8003 NULL #define pci_ss_list_1425_000b NULL #define pci_ss_list_1425_000c NULL +#define pci_ss_list_1425_0030 NULL +#define pci_ss_list_1425_0031 NULL +#define pci_ss_list_1425_0032 NULL +#define pci_ss_list_1425_0033 NULL #define pci_ss_list_142e_4020 NULL #define pci_ss_list_142e_4337 NULL #define pci_ss_list_1432_9130 NULL @@ -56610,6 +64707,9 @@ static const pciSubsystemInfo *pci_ss_list_1415_9511[] = { #define pci_ss_list_1462_6834 NULL #define pci_ss_list_1462_7125 NULL #define pci_ss_list_1462_7235 NULL +#define pci_ss_list_1462_7242 NULL +#define pci_ss_list_1462_7250 NULL +#define pci_ss_list_1462_7327 NULL #define pci_ss_list_1462_8725 NULL #define pci_ss_list_1462_9000 NULL #define pci_ss_list_1462_9110 NULL @@ -56618,6 +64718,7 @@ static const pciSubsystemInfo *pci_ss_list_1415_9511[] = { #define pci_ss_list_1462_9510 NULL #define pci_ss_list_1462_9511 NULL #define pci_ss_list_1462_9591 NULL +#define pci_ss_list_1462_b834 NULL #define pci_ss_list_146c_1430 NULL #define pci_ss_list_148d_1003 NULL #define pci_ss_list_1497_1497 NULL @@ -56671,6 +64772,8 @@ static const pciSubsystemInfo *pci_ss_list_14c1_8043[] = { #define pci_ss_list_14d2_e001 NULL #define pci_ss_list_14d2_e010 NULL #define pci_ss_list_14d2_e020 NULL +#define pci_ss_list_14d6_6101 NULL +#define pci_ss_list_14d6_6201 NULL #define pci_ss_list_14d9_0010 NULL #define pci_ss_list_14d9_9000 NULL #define pci_ss_list_14db_2120 NULL @@ -56703,6 +64806,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1600[] = { }; #define pci_ss_list_14e4_1601 NULL #define pci_ss_list_14e4_1639 NULL +#define pci_ss_list_14e4_163a NULL static const pciSubsystemInfo *pci_ss_list_14e4_1644[] = { &pci_ss_info_14e4_1644_1014_0277, &pci_ss_info_14e4_1644_1028_00d1, @@ -56772,6 +64876,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1648[] = { &pci_ss_info_14e4_1648_0e11_00cf, &pci_ss_info_14e4_1648_0e11_00d0, &pci_ss_info_14e4_1648_0e11_00d1, + &pci_ss_info_14e4_1648_103c_310f, &pci_ss_info_14e4_1648_10a9_8013, &pci_ss_info_14e4_1648_10a9_8018, &pci_ss_info_14e4_1648_10a9_801a, @@ -56782,6 +64887,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1648[] = { &pci_ss_info_14e4_1648_1734_100b, NULL }; +#define pci_ss_list_14e4_1649 NULL static const pciSubsystemInfo *pci_ss_list_14e4_164a[] = { &pci_ss_info_14e4_164a_103c_3070, &pci_ss_info_14e4_164a_103c_3101, @@ -56793,6 +64899,9 @@ static const pciSubsystemInfo *pci_ss_list_14e4_164c[] = { NULL }; #define pci_ss_list_14e4_164d NULL +#define pci_ss_list_14e4_164e NULL +#define pci_ss_list_14e4_164f NULL +#define pci_ss_list_14e4_1650 NULL static const pciSubsystemInfo *pci_ss_list_14e4_1653[] = { &pci_ss_info_14e4_1653_0e11_00e3, NULL @@ -56803,6 +64912,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1654[] = { &pci_ss_info_14e4_1654_103c_3226, NULL }; +#define pci_ss_list_14e4_1658 NULL static const pciSubsystemInfo *pci_ss_list_14e4_1659[] = { &pci_ss_info_14e4_1659_1014_02c6, &pci_ss_info_14e4_1659_103c_7031, @@ -56815,6 +64925,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_165a[] = { &pci_ss_info_14e4_165a_103c_7052, NULL }; +#define pci_ss_list_14e4_165b NULL static const pciSubsystemInfo *pci_ss_list_14e4_165d[] = { &pci_ss_info_14e4_165d_1028_865d, NULL @@ -56837,13 +64948,16 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1668[] = { #define pci_ss_list_14e4_1672 NULL #define pci_ss_list_14e4_1673 NULL #define pci_ss_list_14e4_1674 NULL +#define pci_ss_list_14e4_1676 NULL static const pciSubsystemInfo *pci_ss_list_14e4_1677[] = { + &pci_ss_info_14e4_1677_1028_0177, &pci_ss_info_14e4_1677_1028_0179, &pci_ss_info_14e4_1677_1028_0182, &pci_ss_info_14e4_1677_1028_0187, &pci_ss_info_14e4_1677_1028_01ad, &pci_ss_info_14e4_1677_103c_3006, &pci_ss_info_14e4_1677_1734_105d, + &pci_ss_info_14e4_1677_3007_103c, NULL }; #define pci_ss_list_14e4_1678 NULL @@ -56855,18 +64969,24 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1679[] = { }; #define pci_ss_list_14e4_167a NULL #define pci_ss_list_14e4_167b NULL +#define pci_ss_list_14e4_167c NULL static const pciSubsystemInfo *pci_ss_list_14e4_167d[] = { + &pci_ss_info_14e4_167d_103c_0940, &pci_ss_info_14e4_167d_17aa_2081, NULL }; #define pci_ss_list_14e4_167e NULL #define pci_ss_list_14e4_167f NULL +#define pci_ss_list_14e4_1680 NULL +#define pci_ss_list_14e4_1681 NULL +#define pci_ss_list_14e4_1684 NULL #define pci_ss_list_14e4_1693 NULL static const pciSubsystemInfo *pci_ss_list_14e4_1696[] = { &pci_ss_info_14e4_1696_103c_12bc, &pci_ss_info_14e4_1696_14e4_000d, NULL }; +#define pci_ss_list_14e4_1698 NULL #define pci_ss_list_14e4_169a NULL #define pci_ss_list_14e4_169b NULL static const pciSubsystemInfo *pci_ss_list_14e4_169c[] = { @@ -56902,6 +65022,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_16aa[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_14e4_16ac[] = { + &pci_ss_info_14e4_16ac_1014_0304, &pci_ss_info_14e4_16ac_103c_1706, &pci_ss_info_14e4_16ac_103c_7038, &pci_ss_info_14e4_16ac_103c_703b, @@ -56929,6 +65050,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_16c7[] = { #define pci_ss_list_14e4_16fe NULL static const pciSubsystemInfo *pci_ss_list_14e4_170c[] = { &pci_ss_info_14e4_170c_1028_0188, + &pci_ss_info_14e4_170c_1028_018d, &pci_ss_info_14e4_170c_1028_0196, &pci_ss_info_14e4_170c_1028_01af, &pci_ss_info_14e4_170c_103c_099c, @@ -56946,6 +65068,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_170d[] = { #define pci_ss_list_14e4_4210 NULL #define pci_ss_list_14e4_4211 NULL #define pci_ss_list_14e4_4212 NULL +#define pci_ss_list_14e4_4220 NULL static const pciSubsystemInfo *pci_ss_list_14e4_4301[] = { &pci_ss_info_14e4_4301_1028_0407, &pci_ss_info_14e4_4301_1043_0120, @@ -56967,6 +65090,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_4318[] = { &pci_ss_info_14e4_4318_14e4_0449, &pci_ss_info_14e4_4318_14e4_4318, &pci_ss_info_14e4_4318_16ec_0119, + &pci_ss_info_14e4_4318_1737_0042, &pci_ss_info_14e4_4318_1737_0048, NULL }; @@ -57003,7 +65127,12 @@ static const pciSubsystemInfo *pci_ss_list_14e4_4325[] = { NULL }; #define pci_ss_list_14e4_4326 NULL +static const pciSubsystemInfo *pci_ss_list_14e4_4328[] = { + &pci_ss_info_14e4_4328_1028_000a, + NULL +}; #define pci_ss_list_14e4_4329 NULL +#define pci_ss_list_14e4_432b NULL #define pci_ss_list_14e4_4344 NULL static const pciSubsystemInfo *pci_ss_list_14e4_4401[] = { &pci_ss_info_14e4_4401_103c_08b0, @@ -57060,6 +65189,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_4401[] = { #define pci_ss_list_14e4_5840 NULL #define pci_ss_list_14e4_5841 NULL #define pci_ss_list_14e4_5850 NULL +#define pci_ss_list_14e4_b800 NULL #endif #define pci_ss_list_14ea_ab06 NULL #define pci_ss_list_14ea_ab07 NULL @@ -57239,6 +65369,7 @@ static const pciSubsystemInfo *pci_ss_list_14f1_2f00[] = { #define pci_ss_list_14f1_2f30 NULL #define pci_ss_list_14f1_5045 NULL #define pci_ss_list_14f1_5047 NULL +#define pci_ss_list_14f1_5b7a NULL #define pci_ss_list_14f1_8234 NULL static const pciSubsystemInfo *pci_ss_list_14f1_8800[] = { &pci_ss_info_14f1_8800_0070_2801, @@ -57281,10 +65412,12 @@ static const pciSubsystemInfo *pci_ss_list_14f1_8800[] = { &pci_ss_info_14f1_8800_18ac_db11, &pci_ss_info_14f1_8800_18ac_db50, &pci_ss_info_14f1_8800_7063_3000, + &pci_ss_info_14f1_8800_7063_5500, NULL }; static const pciSubsystemInfo *pci_ss_list_14f1_8801[] = { &pci_ss_info_14f1_8801_0070_2801, + &pci_ss_info_14f1_8801_7063_5500, NULL }; static const pciSubsystemInfo *pci_ss_list_14f1_8802[] = { @@ -57292,6 +65425,7 @@ static const pciSubsystemInfo *pci_ss_list_14f1_8802[] = { &pci_ss_info_14f1_8802_0070_9002, &pci_ss_info_14f1_8802_1043_4823, &pci_ss_info_14f1_8802_107d_663c, + &pci_ss_info_14f1_8802_107d_665f, &pci_ss_info_14f1_8802_14f1_0187, &pci_ss_info_14f1_8802_17de_08a1, &pci_ss_info_14f1_8802_17de_08a6, @@ -57301,10 +65435,12 @@ static const pciSubsystemInfo *pci_ss_list_14f1_8802[] = { &pci_ss_info_14f1_8802_18ac_db00, &pci_ss_info_14f1_8802_18ac_db10, &pci_ss_info_14f1_8802_7063_3000, + &pci_ss_info_14f1_8802_7063_5500, NULL }; static const pciSubsystemInfo *pci_ss_list_14f1_8804[] = { &pci_ss_info_14f1_8804_0070_9002, + &pci_ss_info_14f1_8804_7063_5500, NULL }; static const pciSubsystemInfo *pci_ss_list_14f1_8811[] = { @@ -57373,6 +65509,14 @@ static const pciSubsystemInfo *pci_ss_list_1522_0100[] = { &pci_ss_info_1522_0100_1522_2500, &pci_ss_info_1522_0100_1522_2600, &pci_ss_info_1522_0100_1522_2700, + &pci_ss_info_1522_0100_1522_3000, + &pci_ss_info_1522_0100_1522_3100, + &pci_ss_info_1522_0100_1522_3200, + &pci_ss_info_1522_0100_1522_3300, + &pci_ss_info_1522_0100_1522_3400, + &pci_ss_info_1522_0100_1522_3500, + &pci_ss_info_1522_0100_1522_3c00, + &pci_ss_info_1522_0100_1522_3d00, NULL }; #endif @@ -57386,6 +65530,9 @@ static const pciSubsystemInfo *pci_ss_list_1524_0510[] = { #define pci_ss_list_1524_0550 NULL #define pci_ss_list_1524_0551 NULL #define pci_ss_list_1524_0610 NULL +#define pci_ss_list_1524_0730 NULL +#define pci_ss_list_1524_0750 NULL +#define pci_ss_list_1524_0751 NULL #define pci_ss_list_1524_1211 NULL #define pci_ss_list_1524_1225 NULL static const pciSubsystemInfo *pci_ss_list_1524_1410[] = { @@ -57432,6 +65579,9 @@ static const pciSubsystemInfo *pci_ss_list_1524_1411[] = { #define pci_ss_list_1571_a206 NULL #define pci_ss_list_1578_5615 NULL #define pci_ss_list_157c_8001 NULL +#define pci_ss_list_1590_0001 NULL +#define pci_ss_list_1590_0002 NULL +#define pci_ss_list_1590_a01d NULL #define pci_ss_list_1592_0781 NULL #define pci_ss_list_1592_0782 NULL #define pci_ss_list_1592_0783 NULL @@ -57444,6 +65594,13 @@ static const pciSubsystemInfo *pci_ss_list_1524_1411[] = { #define pci_ss_list_15ad_0405 NULL #define pci_ss_list_15ad_0710 NULL #define pci_ss_list_15ad_0720 NULL +#define pci_ss_list_15ad_0740 NULL +#define pci_ss_list_15ad_0770 NULL +static const pciSubsystemInfo *pci_ss_list_15ad_0801[] = { + &pci_ss_info_15ad_0801_15ad_0800, + NULL +}; +#define pci_ss_list_15b3_0191 NULL #define pci_ss_list_15b3_5274 NULL #define pci_ss_list_15b3_5a44 NULL #define pci_ss_list_15b3_5a45 NULL @@ -57453,6 +65610,13 @@ static const pciSubsystemInfo *pci_ss_list_1524_1411[] = { #define pci_ss_list_15b3_6278 NULL #define pci_ss_list_15b3_6279 NULL #define pci_ss_list_15b3_6282 NULL +#define pci_ss_list_15b3_6340 NULL +#define pci_ss_list_15b3_634a NULL +#define pci_ss_list_15b3_6354 NULL +#define pci_ss_list_15b3_6368 NULL +#define pci_ss_list_15b3_6732 NULL +#define pci_ss_list_15b3_673c NULL +#define pci_ss_list_15b3_6750 NULL #define pci_ss_list_15b8_1003 NULL #define pci_ss_list_15b8_1005 NULL #define pci_ss_list_15b8_100a NULL @@ -57466,6 +65630,7 @@ static const pciSubsystemInfo *pci_ss_list_1524_1411[] = { #define pci_ss_list_15dc_0001 NULL #define pci_ss_list_15e2_0500 NULL #define pci_ss_list_15e8_0130 NULL +#define pci_ss_list_15e8_0131 NULL #define pci_ss_list_15e9_1841 NULL #define pci_ss_list_15ec_3101 NULL #define pci_ss_list_15ec_5102 NULL @@ -57485,6 +65650,7 @@ static const pciSubsystemInfo *pci_ss_list_1524_1411[] = { #define pci_ss_list_1638_1100 NULL #define pci_ss_list_163c_3052 NULL #define pci_ss_list_163c_5449 NULL +#define pci_ss_list_1657_0646 NULL #define pci_ss_list_165a_c100 NULL #define pci_ss_list_165a_d200 NULL #define pci_ss_list_165a_d300 NULL @@ -57523,12 +65689,14 @@ static const pciSubsystemInfo *pci_ss_list_168c_0013[] = { &pci_ss_info_168c_0013_1186_3ab0, &pci_ss_info_168c_0013_1385_4d00, &pci_ss_info_168c_0013_1458_e911, + &pci_ss_info_168c_0013_1468_0408, &pci_ss_info_168c_0013_14b7_0a60, &pci_ss_info_168c_0013_1668_1026, &pci_ss_info_168c_0013_168c_0013, &pci_ss_info_168c_0013_168c_1025, &pci_ss_info_168c_0013_168c_1027, &pci_ss_info_168c_0013_168c_1042, + &pci_ss_info_168c_0013_168c_1051, &pci_ss_info_168c_0013_168c_2026, &pci_ss_info_168c_0013_168c_2041, &pci_ss_info_168c_0013_168c_2042, @@ -57560,10 +65728,17 @@ static const pciSubsystemInfo *pci_ss_list_168c_001b[] = { &pci_ss_info_168c_001b_168c_001b, &pci_ss_info_168c_001b_168c_2062, &pci_ss_info_168c_001b_168c_2063, + &pci_ss_info_168c_001b_185f_1600, &pci_ss_info_168c_001b_a727_6804, NULL }; -#define pci_ss_list_168c_001c NULL +static const pciSubsystemInfo *pci_ss_list_168c_001c[] = { + &pci_ss_info_168c_001c_168c_3061, + &pci_ss_info_168c_001c_168c_3062, + &pci_ss_info_168c_001c_168c_3063, + &pci_ss_info_168c_001c_168c_3065, + NULL +}; #define pci_ss_list_168c_0020 NULL #define pci_ss_list_168c_0023 NULL #define pci_ss_list_168c_0024 NULL @@ -57579,12 +65754,51 @@ static const pciSubsystemInfo *pci_ss_list_168c_1014[] = { #define pci_ss_list_16ab_1101 NULL #define pci_ss_list_16ab_1102 NULL #define pci_ss_list_16ab_8501 NULL +#define pci_ss_list_16ae_0001 NULL +#define pci_ss_list_16ae_000a NULL #define pci_ss_list_16ae_1141 NULL +#define pci_ss_list_16ae_1841 NULL #define pci_ss_list_16c6_8695 NULL +#define pci_ss_list_16c6_8842 NULL #define pci_ss_list_16ca_0001 NULL +#define pci_ss_list_16d5_0504 NULL +#define pci_ss_list_16d5_0520 NULL +#define pci_ss_list_16d5_0521 NULL +#define pci_ss_list_16d5_1020 NULL +#define pci_ss_list_16d5_1065 NULL +#define pci_ss_list_16d5_2004 NULL +#define pci_ss_list_16d5_2020 NULL +#define pci_ss_list_16d5_2065 NULL +#define pci_ss_list_16d5_3020 NULL +#define pci_ss_list_16d5_3065 NULL +#define pci_ss_list_16d5_4243 NULL +#define pci_ss_list_16d5_4248 NULL +#define pci_ss_list_16d5_424b NULL +#define pci_ss_list_16d5_4253 NULL +#define pci_ss_list_16d5_4312 NULL +#define pci_ss_list_16d5_4313 NULL +#define pci_ss_list_16d5_4322 NULL +#define pci_ss_list_16d5_4323 NULL +#define pci_ss_list_16d5_4350 NULL +#define pci_ss_list_16d5_4353 NULL +#define pci_ss_list_16d5_4357 NULL +#define pci_ss_list_16d5_4457 NULL +#define pci_ss_list_16d5_464d NULL +#define pci_ss_list_16d5_4850 NULL +#define pci_ss_list_16d5_4a42 NULL +#define pci_ss_list_16d5_4a50 NULL +#define pci_ss_list_16d5_4a56 NULL +#define pci_ss_list_16d5_4b47 NULL +#define pci_ss_list_16d5_4c40 NULL +#define pci_ss_list_16d5_4c60 NULL +#define pci_ss_list_16d5_4d4d NULL #define pci_ss_list_16d5_4d4e NULL +#define pci_ss_list_16d5_524d NULL +#define pci_ss_list_16d5_5335 NULL +#define pci_ss_list_16d5_5456 NULL #define pci_ss_list_16e3_1e0f NULL #define pci_ss_list_16e5_6000 NULL +#define pci_ss_list_16e5_6300 NULL #define pci_ss_list_16ec_00ff NULL #define pci_ss_list_16ec_0116 NULL #define pci_ss_list_16ec_2f00 NULL @@ -57596,6 +65810,7 @@ static const pciSubsystemInfo *pci_ss_list_168c_1014[] = { #define pci_ss_list_172a_13c8 NULL #define pci_ss_list_1734_1078 NULL #define pci_ss_list_1734_1085 NULL +#define pci_ss_list_1734_1098 NULL #define pci_ss_list_1737_0013 NULL #define pci_ss_list_1737_0015 NULL #define pci_ss_list_1737_0029 NULL @@ -57622,12 +65837,14 @@ static const pciSubsystemInfo *pci_ss_list_173b_03ea[] = { #define pci_ss_list_173b_03eb NULL #endif #define pci_ss_list_1743_8139 NULL +#define pci_ss_list_177d_0001 NULL #define pci_ss_list_1796_0001 NULL #define pci_ss_list_1796_0002 NULL #define pci_ss_list_1796_0003 NULL #define pci_ss_list_1796_0004 NULL #define pci_ss_list_1796_0005 NULL #define pci_ss_list_1796_0006 NULL +#define pci_ss_list_1796_000d NULL #define pci_ss_list_1799_6001 NULL #define pci_ss_list_1799_6020 NULL #define pci_ss_list_1799_6060 NULL @@ -57655,6 +65872,7 @@ static const pciSubsystemInfo *pci_ss_list_173b_03ea[] = { #define pci_ss_list_17d3_1220 NULL #define pci_ss_list_17d3_1230 NULL #define pci_ss_list_17d3_1260 NULL +#define pci_ss_list_17d3_1280 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_17d5_5831[] = { &pci_ss_info_17d5_5831_103c_12d5, @@ -57663,13 +65881,12 @@ static const pciSubsystemInfo *pci_ss_list_17d5_5831[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_17d5_5832[] = { + &pci_ss_info_17d5_5832_103c_1337, &pci_ss_info_17d5_5832_10a9_8021, NULL }; #endif #define pci_ss_list_17db_0101 NULL -#define pci_ss_list_17db_0201 NULL -#define pci_ss_list_17db_0202 NULL #define pci_ss_list_17e4_0001 NULL #define pci_ss_list_17e4_0002 NULL #define pci_ss_list_17e6_0010 NULL @@ -57711,6 +65928,7 @@ static const pciSubsystemInfo *pci_ss_list_1814_0201[] = { &pci_ss_info_1814_0201_1371_0020, &pci_ss_info_1814_0201_1458_e381, &pci_ss_info_1814_0201_1458_e931, + &pci_ss_info_1814_0201_1462_6833, &pci_ss_info_1814_0201_1462_6835, &pci_ss_info_1814_0201_1737_0032, &pci_ss_info_1814_0201_1799_700a, @@ -57718,11 +65936,14 @@ static const pciSubsystemInfo *pci_ss_list_1814_0201[] = { &pci_ss_info_1814_0201_185f_22a0, NULL }; +#define pci_ss_list_1814_0300 NULL static const pciSubsystemInfo *pci_ss_list_1814_0301[] = { &pci_ss_info_1814_0301_1186_3c08, &pci_ss_info_1814_0301_1186_3c09, + &pci_ss_info_1814_0301_13d1_abe3, &pci_ss_info_1814_0301_1458_e934, &pci_ss_info_1814_0301_1737_0055, + &pci_ss_info_1814_0301_1814_2561, NULL }; static const pciSubsystemInfo *pci_ss_list_1814_0302[] = { @@ -57732,11 +65953,14 @@ static const pciSubsystemInfo *pci_ss_list_1814_0302[] = { NULL }; #define pci_ss_list_1814_0401 NULL +#define pci_ss_list_1814_e932 NULL #endif +#define pci_ss_list_1822_0001 NULL #define pci_ss_list_1822_4e35 NULL #define pci_ss_list_182d_3069 NULL #define pci_ss_list_182d_9790 NULL #define pci_ss_list_182e_0008 NULL +#define pci_ss_list_182f_000b NULL #define pci_ss_list_183b_08a7 NULL #define pci_ss_list_183b_08a8 NULL #define pci_ss_list_183b_08a9 NULL @@ -57747,6 +65971,14 @@ static const pciSubsystemInfo *pci_ss_list_1814_0302[] = { #define pci_ss_list_1867_5a46 NULL #define pci_ss_list_1867_6278 NULL #define pci_ss_list_1867_6282 NULL +#define pci_ss_list_186c_0612 NULL +#define pci_ss_list_186c_0614 NULL +#define pci_ss_list_186c_0622 NULL +#define pci_ss_list_186c_0624 NULL +#define pci_ss_list_186c_0625 NULL +#define pci_ss_list_1876_a101 NULL +#define pci_ss_list_1876_a102 NULL +#define pci_ss_list_1876_a103 NULL #define pci_ss_list_187e_3403 NULL #define pci_ss_list_187e_340e NULL #define pci_ss_list_1888_0301 NULL @@ -57757,6 +65989,7 @@ static const pciSubsystemInfo *pci_ss_list_1814_0302[] = { #define pci_ss_list_18ac_d800 NULL #define pci_ss_list_18ac_d810 NULL #define pci_ss_list_18ac_d820 NULL +#define pci_ss_list_18ac_db30 NULL #define pci_ss_list_18b8_b001 NULL #define pci_ss_list_18ca_0020 NULL #define pci_ss_list_18ca_0040 NULL @@ -57790,6 +66023,10 @@ static const pciSubsystemInfo *pci_ss_list_18ec_c058[] = { #define pci_ss_list_18f7_0004 NULL #define pci_ss_list_18f7_0005 NULL #define pci_ss_list_18f7_000a NULL +#define pci_ss_list_18f7_000f NULL +#define pci_ss_list_18f7_0010 NULL +#define pci_ss_list_18f7_0011 NULL +#define pci_ss_list_18f7_0014 NULL #define pci_ss_list_1904_8139 NULL #define pci_ss_list_1923_0040 NULL #define pci_ss_list_1923_0100 NULL @@ -57803,6 +66040,20 @@ static const pciSubsystemInfo *pci_ss_list_18ec_c058[] = { #define pci_ss_list_194a_1114 NULL #define pci_ss_list_194a_1115 NULL #define pci_ss_list_1957_0012 NULL +#define pci_ss_list_1957_0013 NULL +#define pci_ss_list_1957_0014 NULL +#define pci_ss_list_1957_0015 NULL +#define pci_ss_list_1957_0018 NULL +#define pci_ss_list_1957_0019 NULL +#define pci_ss_list_1957_001a NULL +#define pci_ss_list_1957_0020 NULL +#define pci_ss_list_1957_0021 NULL +#define pci_ss_list_1957_0022 NULL +#define pci_ss_list_1957_0023 NULL +#define pci_ss_list_1957_0030 NULL +#define pci_ss_list_1957_0031 NULL +#define pci_ss_list_1957_0032 NULL +#define pci_ss_list_1957_0033 NULL #define pci_ss_list_1957_0080 NULL #define pci_ss_list_1957_0081 NULL #define pci_ss_list_1957_0082 NULL @@ -57811,8 +66062,11 @@ static const pciSubsystemInfo *pci_ss_list_18ec_c058[] = { #define pci_ss_list_1957_0085 NULL #define pci_ss_list_1957_0086 NULL #define pci_ss_list_1957_0087 NULL +#define pci_ss_list_1957_7010 NULL +#define pci_ss_list_1957_7011 NULL #define pci_ss_list_1966_1975 NULL #define pci_ss_list_1969_1048 NULL +#define pci_ss_list_1969_2048 NULL #define pci_ss_list_196a_0101 NULL #define pci_ss_list_196a_0102 NULL #define pci_ss_list_196a_0105 NULL @@ -57851,6 +66105,8 @@ static const pciSubsystemInfo *pci_ss_list_197b_2361[] = { #define pci_ss_list_1a07_0007 NULL #define pci_ss_list_1a08_0000 NULL #define pci_ss_list_1a1d_1a17 NULL +#define pci_ss_list_1a73_0001 NULL +#define pci_ss_list_1a8c_1100 NULL #define pci_ss_list_1c1c_0001 NULL #define pci_ss_list_1d44_a400 NULL #define pci_ss_list_1de1_0391 NULL @@ -57860,6 +66116,9 @@ static const pciSubsystemInfo *pci_ss_list_197b_2361[] = { #define pci_ss_list_1fc0_0300 NULL #define pci_ss_list_1fc1_000d NULL #define pci_ss_list_1fc1_0010 NULL +#define pci_ss_list_1fc9_3009 NULL +#define pci_ss_list_1fc9_3010 NULL +#define pci_ss_list_1fc9_3014 NULL #define pci_ss_list_1fce_0001 NULL #define pci_ss_list_2348_2010 NULL #define pci_ss_list_3388_0013 NULL @@ -57971,6 +66230,19 @@ static const pciSubsystemInfo *pci_ss_list_4005_4000[] = { }; #define pci_ss_list_4005_4710 NULL #define pci_ss_list_4033_1360 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_4040_0001[] = { + &pci_ss_info_4040_0001_103c_7047, + &pci_ss_info_4040_0001_103c_7048, + NULL +}; +#define pci_ss_list_4040_0002 NULL +#define pci_ss_list_4040_0003 NULL +#define pci_ss_list_4040_0004 NULL +#define pci_ss_list_4040_0005 NULL +#define pci_ss_list_4040_0024 NULL +#define pci_ss_list_4040_0025 NULL +#endif #define pci_ss_list_4144_0044 NULL #define pci_ss_list_416c_0100 NULL #define pci_ss_list_416c_0200 NULL @@ -57991,6 +66263,7 @@ static const pciSubsystemInfo *pci_ss_list_4444_0016[] = { &pci_ss_info_4444_0016_0070_e817, &pci_ss_info_4444_0016_0070_ff92, &pci_ss_info_4444_0016_0270_0801, + &pci_ss_info_4444_0016_104d_013d, &pci_ss_info_4444_0016_10fc_d038, &pci_ss_info_4444_0016_10fc_d039, &pci_ss_info_4444_0016_12ab_fff3, @@ -58011,6 +66284,8 @@ static const pciSubsystemInfo *pci_ss_list_4444_0803[] = { }; #endif #define pci_ss_list_4916_1960 NULL +#define pci_ss_list_494f_0c60 NULL +#define pci_ss_list_494f_0e60 NULL #define pci_ss_list_494f_10e8 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_4a14_5000[] = { @@ -58205,7 +66480,10 @@ static const pciSubsystemInfo *pci_ss_list_5333_8c2e[] = { #define pci_ss_list_5333_8d02 NULL #define pci_ss_list_5333_8d03 NULL #define pci_ss_list_5333_8d04 NULL -#define pci_ss_list_5333_8e48 NULL +static const pciSubsystemInfo *pci_ss_list_5333_8e48[] = { + &pci_ss_info_5333_8e48_5333_0130, + NULL +}; static const pciSubsystemInfo *pci_ss_list_5333_9102[] = { &pci_ss_info_5333_9102_1092_5932, &pci_ss_info_5333_9102_1092_5934, @@ -58240,8 +66518,14 @@ static const pciSubsystemInfo *pci_ss_list_5333_9102[] = { #define pci_ss_list_8086_0122 NULL #define pci_ss_list_8086_0309 NULL #define pci_ss_list_8086_030d NULL -#define pci_ss_list_8086_0326 NULL -#define pci_ss_list_8086_0327 NULL +static const pciSubsystemInfo *pci_ss_list_8086_0326[] = { + &pci_ss_info_8086_0326_1775_1100, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_0327[] = { + &pci_ss_info_8086_0327_1775_1100, + NULL +}; #define pci_ss_list_8086_0329 NULL #define pci_ss_list_8086_032a NULL #define pci_ss_list_8086_032c NULL @@ -58285,6 +66569,7 @@ static const pciSubsystemInfo *pci_ss_list_5333_9102[] = { #define pci_ss_list_8086_0536 NULL #define pci_ss_list_8086_0537 NULL static const pciSubsystemInfo *pci_ss_list_8086_0600[] = { + &pci_ss_info_8086_0600_8086_0136, &pci_ss_info_8086_0600_8086_01af, &pci_ss_info_8086_0600_8086_01c1, &pci_ss_info_8086_0600_8086_01f7, @@ -58325,6 +66610,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1004[] = { }; static const pciSubsystemInfo *pci_ss_list_8086_1008[] = { &pci_ss_info_8086_1008_1014_0269, + &pci_ss_info_8086_1008_1028_011b, &pci_ss_info_8086_1008_1028_011c, &pci_ss_info_8086_1008_8086_1107, &pci_ss_info_8086_1008_8086_2107, @@ -58368,6 +66654,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_100e[] = { static const pciSubsystemInfo *pci_ss_list_8086_100f[] = { &pci_ss_info_8086_100f_1014_0269, &pci_ss_info_8086_100f_1014_028e, + &pci_ss_info_8086_100f_15ad_0750, &pci_ss_info_8086_100f_8086_1000, &pci_ss_info_8086_100f_8086_1001, NULL @@ -58375,6 +66662,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_100f[] = { static const pciSubsystemInfo *pci_ss_list_8086_1010[] = { &pci_ss_info_8086_1010_0e11_00db, &pci_ss_info_8086_1010_1014_027c, + &pci_ss_info_8086_1010_15ad_0760, &pci_ss_info_8086_1010_18fb_7872, &pci_ss_info_8086_1010_1fc1_0026, &pci_ss_info_8086_1010_4c53_1080, @@ -58495,6 +66783,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1038[] = { }; static const pciSubsystemInfo *pci_ss_list_8086_1039[] = { &pci_ss_info_8086_1039_1014_0267, + &pci_ss_info_8086_1039_114a_0582, NULL }; #define pci_ss_list_8086_103a NULL @@ -58502,6 +66791,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1039[] = { #define pci_ss_list_8086_103c NULL static const pciSubsystemInfo *pci_ss_list_8086_103d[] = { &pci_ss_info_8086_103d_1014_0522, + &pci_ss_info_8086_103d_8086_103d, NULL }; #define pci_ss_list_8086_103e NULL @@ -58511,8 +66801,10 @@ static const pciSubsystemInfo *pci_ss_list_8086_1040[] = { }; static const pciSubsystemInfo *pci_ss_list_8086_1043[] = { &pci_ss_info_8086_1043_103c_08b0, + &pci_ss_info_8086_1043_2527_8086, &pci_ss_info_8086_1043_8086_2522, &pci_ss_info_8086_1043_8086_2527, + &pci_ss_info_8086_1043_8086_2561, &pci_ss_info_8086_1043_8086_2581, NULL }; @@ -58521,12 +66813,17 @@ static const pciSubsystemInfo *pci_ss_list_8086_1048[] = { &pci_ss_info_8086_1048_8086_a11f, NULL }; -#define pci_ss_list_8086_1049 NULL +static const pciSubsystemInfo *pci_ss_list_8086_1049[] = { + &pci_ss_info_8086_1049_17aa_20b9, + &pci_ss_info_8086_1049_30c5_103c, + NULL +}; #define pci_ss_list_8086_104a NULL #define pci_ss_list_8086_104b NULL #define pci_ss_list_8086_104c NULL #define pci_ss_list_8086_104d NULL static const pciSubsystemInfo *pci_ss_list_8086_1050[] = { + &pci_ss_info_8086_1050_1028_019d, &pci_ss_info_8086_1050_1462_728c, &pci_ss_info_8086_1050_1462_758c, &pci_ss_info_8086_1050_8086_3020, @@ -58545,6 +66842,8 @@ static const pciSubsystemInfo *pci_ss_list_8086_1050[] = { #define pci_ss_list_8086_105b NULL static const pciSubsystemInfo *pci_ss_list_8086_105e[] = { &pci_ss_info_8086_105e_103c_7044, + &pci_ss_info_8086_105e_103c_704e, + &pci_ss_info_8086_105e_1775_1100, &pci_ss_info_8086_105e_1775_6003, &pci_ss_info_8086_105e_8086_005e, &pci_ss_info_8086_105e_8086_105e, @@ -58555,6 +66854,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_105e[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_105f[] = { + &pci_ss_info_8086_105f_103c_704f, &pci_ss_info_8086_105f_8086_115f, &pci_ss_info_8086_105f_8086_116f, &pci_ss_info_8086_105f_8086_125f, @@ -58585,7 +66885,9 @@ static const pciSubsystemInfo *pci_ss_list_8086_1075[] = { }; static const pciSubsystemInfo *pci_ss_list_8086_1076[] = { &pci_ss_info_8086_1076_1028_0165, + &pci_ss_info_8086_1076_1028_016d, &pci_ss_info_8086_1076_1028_019a, + &pci_ss_info_8086_1076_1028_106d, &pci_ss_info_8086_1076_8086_0076, &pci_ss_info_8086_1076_8086_1076, &pci_ss_info_8086_1076_8086_1176, @@ -58634,11 +66936,13 @@ static const pciSubsystemInfo *pci_ss_list_8086_107c[] = { }; static const pciSubsystemInfo *pci_ss_list_8086_107d[] = { &pci_ss_info_8086_107d_8086_1082, + &pci_ss_info_8086_107d_8086_1084, &pci_ss_info_8086_107d_8086_1092, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_107e[] = { &pci_ss_info_8086_107e_8086_1084, + &pci_ss_info_8086_107e_8086_1085, &pci_ss_info_8086_107e_8086_1094, NULL }; @@ -58678,6 +66982,8 @@ static const pciSubsystemInfo *pci_ss_list_8086_109a[] = { &pci_ss_info_8086_109a_17aa_2001, &pci_ss_info_8086_109a_17aa_207e, &pci_ss_info_8086_109a_8086_109a, + &pci_ss_info_8086_109a_8086_309c, + &pci_ss_info_8086_109a_8086_30a5, NULL }; #define pci_ss_list_8086_109b NULL @@ -58693,6 +66999,16 @@ static const pciSubsystemInfo *pci_ss_list_8086_10a4[] = { &pci_ss_info_8086_10a4_8086_11a4, NULL }; +static const pciSubsystemInfo *pci_ss_list_8086_10a5[] = { + &pci_ss_info_8086_10a5_8086_10a5, + &pci_ss_info_8086_10a5_8086_10a6, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_10a7[] = { + &pci_ss_info_8086_10a7_8086_10a8, + NULL +}; +#define pci_ss_list_8086_10a9 NULL #define pci_ss_list_8086_10b0 NULL #define pci_ss_list_8086_10b2 NULL #define pci_ss_list_8086_10b3 NULL @@ -58703,7 +67019,9 @@ static const pciSubsystemInfo *pci_ss_list_8086_10b5[] = { &pci_ss_info_8086_10b5_8086_1199, NULL }; +#define pci_ss_list_8086_10b6 NULL static const pciSubsystemInfo *pci_ss_list_8086_10b9[] = { + &pci_ss_info_8086_10b9_103c_704a, &pci_ss_info_8086_10b9_8086_1083, &pci_ss_info_8086_10b9_8086_1093, NULL @@ -58711,12 +67029,54 @@ static const pciSubsystemInfo *pci_ss_list_8086_10b9[] = { #define pci_ss_list_8086_10ba NULL #define pci_ss_list_8086_10bb NULL static const pciSubsystemInfo *pci_ss_list_8086_10bc[] = { + &pci_ss_info_8086_10bc_103c_704b, &pci_ss_info_8086_10bc_8086_10bc, &pci_ss_info_8086_10bc_8086_11bc, NULL }; +static const pciSubsystemInfo *pci_ss_list_8086_10bd[] = { + &pci_ss_info_8086_10bd_1028_0211, + &pci_ss_info_8086_10bd_3039_17aa, + NULL +}; +#define pci_ss_list_8086_10bf NULL +#define pci_ss_list_8086_10c0 NULL +#define pci_ss_list_8086_10c2 NULL +#define pci_ss_list_8086_10c3 NULL #define pci_ss_list_8086_10c4 NULL #define pci_ss_list_8086_10c5 NULL +static const pciSubsystemInfo *pci_ss_list_8086_10c6[] = { + &pci_ss_info_8086_10c6_8086_a05f, + &pci_ss_info_8086_10c6_8086_a15f, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_10c7[] = { + &pci_ss_info_8086_10c7_8086_a05f, + &pci_ss_info_8086_10c7_8086_a15f, + &pci_ss_info_8086_10c7_8086_a16f, + NULL +}; +#define pci_ss_list_8086_10cb NULL +#define pci_ss_list_8086_10d5 NULL +static const pciSubsystemInfo *pci_ss_list_8086_10d6[] = { + &pci_ss_info_8086_10d6_8086_10d6, + &pci_ss_info_8086_10d6_8086_145a, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_10d9[] = { + &pci_ss_info_8086_10d9_103c_1716, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_10da[] = { + &pci_ss_info_8086_10da_103c_1717, + NULL +}; +#define pci_ss_list_8086_10dd NULL +static const pciSubsystemInfo *pci_ss_list_8086_10e2[] = { + &pci_ss_info_8086_10e2_8086_10e2, + NULL +}; +#define pci_ss_list_8086_10f5 NULL #define pci_ss_list_8086_1107 NULL static const pciSubsystemInfo *pci_ss_list_8086_1130[] = { &pci_ss_info_8086_1130_1025_1016, @@ -58729,6 +67089,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1130[] = { #define pci_ss_list_8086_1131 NULL static const pciSubsystemInfo *pci_ss_list_8086_1132[] = { &pci_ss_info_8086_1132_1025_1016, + &pci_ss_info_8086_1132_103c_2001, &pci_ss_info_8086_1132_104d_80df, &pci_ss_info_8086_1132_8086_4532, &pci_ss_info_8086_1132_8086_4541, @@ -58816,6 +67177,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1229[] = { &pci_ss_info_8086_1229_10cf_1115, &pci_ss_info_8086_1229_10cf_1143, &pci_ss_info_8086_1229_110a_008b, + &pci_ss_info_8086_1229_114a_0582, &pci_ss_info_8086_1229_1179_0001, &pci_ss_info_8086_1229_1179_0002, &pci_ss_info_8086_1229_1179_0003, @@ -58826,6 +67188,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1229[] = { &pci_ss_info_8086_1229_144d_2501, &pci_ss_info_8086_1229_144d_2502, &pci_ss_info_8086_1229_1668_1100, + &pci_ss_info_8086_1229_1775_1100, &pci_ss_info_8086_1229_1775_ce90, &pci_ss_info_8086_1229_4c53_1080, &pci_ss_info_8086_1229_4c53_10e0, @@ -58982,11 +67345,16 @@ static const pciSubsystemInfo *pci_ss_list_8086_1962[] = { #define pci_ss_list_8086_1a24 NULL static const pciSubsystemInfo *pci_ss_list_8086_1a30[] = { &pci_ss_info_8086_1a30_1028_010e, + &pci_ss_info_8086_1a30_15d9_3280, NULL }; #define pci_ss_list_8086_1a31 NULL #define pci_ss_list_8086_1a38 NULL -#define pci_ss_list_8086_1a48 NULL +static const pciSubsystemInfo *pci_ss_list_8086_1a48[] = { + &pci_ss_info_8086_1a48_8086_a01f, + &pci_ss_info_8086_1a48_8086_a11f, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_1b48[] = { &pci_ss_info_8086_1b48_8086_a01f, &pci_ss_info_8086_1b48_8086_a11f, @@ -58998,6 +67366,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1b48[] = { #define pci_ss_list_8086_2413 NULL static const pciSubsystemInfo *pci_ss_list_8086_2415[] = { &pci_ss_info_8086_2415_1028_0095, + &pci_ss_info_8086_2415_1028_00b4, &pci_ss_info_8086_2415_110a_0051, &pci_ss_info_8086_2415_11d4_0040, &pci_ss_info_8086_2415_11d4_0048, @@ -59027,6 +67396,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_2442[] = { &pci_ss_info_8086_2442_1025_1016, &pci_ss_info_8086_2442_1028_00c7, &pci_ss_info_8086_2442_1028_010e, + &pci_ss_info_8086_2442_103c_126f, &pci_ss_info_8086_2442_1043_8027, &pci_ss_info_8086_2442_104d_80df, &pci_ss_info_8086_2442_147b_0507, @@ -59040,9 +67410,11 @@ static const pciSubsystemInfo *pci_ss_list_8086_2443[] = { &pci_ss_info_8086_2443_1025_1016, &pci_ss_info_8086_2443_1028_00c7, &pci_ss_info_8086_2443_1028_010e, + &pci_ss_info_8086_2443_103c_126f, &pci_ss_info_8086_2443_1043_8027, &pci_ss_info_8086_2443_104d_80df, &pci_ss_info_8086_2443_147b_0507, + &pci_ss_info_8086_2443_15d9_3280, &pci_ss_info_8086_2443_8086_4532, &pci_ss_info_8086_2443_8086_4557, &pci_ss_info_8086_2443_8086_5744, @@ -59052,6 +67424,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_2444[] = { &pci_ss_info_8086_2444_1025_1016, &pci_ss_info_8086_2444_1028_00c7, &pci_ss_info_8086_2444_1028_010e, + &pci_ss_info_8086_2444_103c_126f, &pci_ss_info_8086_2444_1043_8027, &pci_ss_info_8086_2444_104d_80df, &pci_ss_info_8086_2444_147b_0507, @@ -59064,6 +67437,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_2445[] = { &pci_ss_info_8086_2445_0e11_0088, &pci_ss_info_8086_2445_1014_01c6, &pci_ss_info_8086_2445_1025_1016, + &pci_ss_info_8086_2445_103c_126f, &pci_ss_info_8086_2445_104d_80df, &pci_ss_info_8086_2445_1462_3370, &pci_ss_info_8086_2445_147b_0507, @@ -59076,9 +67450,12 @@ static const pciSubsystemInfo *pci_ss_list_8086_2446[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2448[] = { + &pci_ss_info_8086_2448_103c_0934, &pci_ss_info_8086_2448_103c_099c, + &pci_ss_info_8086_2448_103c_30a3, &pci_ss_info_8086_2448_144d_c00c, &pci_ss_info_8086_2448_1734_1055, + &pci_ss_info_8086_2448_e4bf_cc47, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2449[] = { @@ -59123,8 +67500,10 @@ static const pciSubsystemInfo *pci_ss_list_8086_244b[] = { &pci_ss_info_8086_244b_1014_01c6, &pci_ss_info_8086_244b_1028_00c7, &pci_ss_info_8086_244b_1028_010e, + &pci_ss_info_8086_244b_103c_126f, &pci_ss_info_8086_244b_1043_8027, &pci_ss_info_8086_244b_147b_0507, + &pci_ss_info_8086_244b_15d9_3280, &pci_ss_info_8086_244b_8086_4532, &pci_ss_info_8086_244b_8086_4557, &pci_ss_info_8086_244b_8086_5744, @@ -59133,6 +67512,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_244b[] = { #define pci_ss_list_8086_244c NULL static const pciSubsystemInfo *pci_ss_list_8086_244e[] = { &pci_ss_info_8086_244e_1014_0267, + &pci_ss_info_8086_244e_1028_0211, NULL }; #define pci_ss_list_8086_2450 NULL @@ -59173,6 +67553,9 @@ static const pciSubsystemInfo *pci_ss_list_8086_2485[] = { &pci_ss_info_8086_2485_1014_0222, &pci_ss_info_8086_2485_1014_0508, &pci_ss_info_8086_2485_1014_051c, + &pci_ss_info_8086_2485_1043_1583, + &pci_ss_info_8086_2485_1043_1623, + &pci_ss_info_8086_2485_1043_1643, &pci_ss_info_8086_2485_104d_80e7, &pci_ss_info_8086_2485_144d_c006, NULL @@ -59221,17 +67604,22 @@ static const pciSubsystemInfo *pci_ss_list_8086_24c2[] = { &pci_ss_info_8086_24c2_1025_005a, &pci_ss_info_8086_24c2_1028_0126, &pci_ss_info_8086_24c2_1028_0163, + &pci_ss_info_8086_24c2_1028_018d, &pci_ss_info_8086_24c2_1028_0196, &pci_ss_info_8086_24c2_103c_088c, &pci_ss_info_8086_24c2_103c_0890, &pci_ss_info_8086_24c2_103c_08b0, + &pci_ss_info_8086_24c2_1043_8089, &pci_ss_info_8086_24c2_1071_8160, + &pci_ss_info_8086_24c2_114a_0582, + &pci_ss_info_8086_24c2_144d_c005, &pci_ss_info_8086_24c2_144d_c00c, &pci_ss_info_8086_24c2_1462_5800, &pci_ss_info_8086_24c2_1509_2990, &pci_ss_info_8086_24c2_1734_1004, &pci_ss_info_8086_24c2_1734_1055, &pci_ss_info_8086_24c2_4c53_1090, + &pci_ss_info_8086_24c2_8086_24c2, &pci_ss_info_8086_24c2_8086_4541, &pci_ss_info_8086_24c2_e4bf_0cc9, &pci_ss_info_8086_24c2_e4bf_0cd2, @@ -59242,10 +67630,14 @@ static const pciSubsystemInfo *pci_ss_list_8086_24c3[] = { &pci_ss_info_8086_24c3_1014_052d, &pci_ss_info_8086_24c3_1025_005a, &pci_ss_info_8086_24c3_1028_0126, + &pci_ss_info_8086_24c3_1028_014f, + &pci_ss_info_8086_24c3_1028_018d, &pci_ss_info_8086_24c3_103c_088c, &pci_ss_info_8086_24c3_103c_0890, &pci_ss_info_8086_24c3_103c_08b0, &pci_ss_info_8086_24c3_1071_8160, + &pci_ss_info_8086_24c3_114a_0582, + &pci_ss_info_8086_24c3_144d_c005, &pci_ss_info_8086_24c3_144d_c00c, &pci_ss_info_8086_24c3_1458_24c2, &pci_ss_info_8086_24c3_1462_5800, @@ -59262,16 +67654,19 @@ static const pciSubsystemInfo *pci_ss_list_8086_24c4[] = { &pci_ss_info_8086_24c4_1025_005a, &pci_ss_info_8086_24c4_1028_0126, &pci_ss_info_8086_24c4_1028_0163, + &pci_ss_info_8086_24c4_1028_018d, &pci_ss_info_8086_24c4_1028_0196, &pci_ss_info_8086_24c4_103c_088c, &pci_ss_info_8086_24c4_103c_0890, &pci_ss_info_8086_24c4_103c_08b0, + &pci_ss_info_8086_24c4_1043_8089, &pci_ss_info_8086_24c4_1071_8160, &pci_ss_info_8086_24c4_144d_c00c, &pci_ss_info_8086_24c4_1462_5800, &pci_ss_info_8086_24c4_1509_2990, &pci_ss_info_8086_24c4_1734_1004, &pci_ss_info_8086_24c4_4c53_1090, + &pci_ss_info_8086_24c4_8086_24c2, &pci_ss_info_8086_24c4_8086_4541, &pci_ss_info_8086_24c4_e4bf_0cc9, &pci_ss_info_8086_24c4_e4bf_0cd2, @@ -59284,21 +67679,29 @@ static const pciSubsystemInfo *pci_ss_list_8086_24c5[] = { &pci_ss_info_8086_24c5_1014_055f, &pci_ss_info_8086_24c5_1025_005a, &pci_ss_info_8086_24c5_1028_0139, + &pci_ss_info_8086_24c5_1028_014f, &pci_ss_info_8086_24c5_1028_0163, + &pci_ss_info_8086_24c5_1028_018d, &pci_ss_info_8086_24c5_1028_0196, &pci_ss_info_8086_24c5_103c_088c, &pci_ss_info_8086_24c5_103c_0890, &pci_ss_info_8086_24c5_103c_08b0, + &pci_ss_info_8086_24c5_1043_80b0, &pci_ss_info_8086_24c5_1071_8160, + &pci_ss_info_8086_24c5_144d_c005, &pci_ss_info_8086_24c5_144d_c00c, &pci_ss_info_8086_24c5_1458_a002, &pci_ss_info_8086_24c5_1462_5800, + &pci_ss_info_8086_24c5_1713_1043, &pci_ss_info_8086_24c5_1734_1005, &pci_ss_info_8086_24c5_1734_1055, + &pci_ss_info_8086_24c5_8086_24c5, + &pci_ss_info_8086_24c5_a002_1458, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24c6[] = { &pci_ss_info_8086_24c6_1014_0524, + &pci_ss_info_8086_24c6_1014_0525, &pci_ss_info_8086_24c6_1014_0559, &pci_ss_info_8086_24c6_1025_003c, &pci_ss_info_8086_24c6_1025_005a, @@ -59307,7 +67710,10 @@ static const pciSubsystemInfo *pci_ss_list_8086_24c6[] = { &pci_ss_info_8086_24c6_103c_0890, &pci_ss_info_8086_24c6_103c_08b0, &pci_ss_info_8086_24c6_1071_8160, + &pci_ss_info_8086_24c6_144d_2115, &pci_ss_info_8086_24c6_144d_c00c, + &pci_ss_info_8086_24c6_14f1_5422, + &pci_ss_info_8086_24c6_1826_1043, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24c7[] = { @@ -59316,16 +67722,19 @@ static const pciSubsystemInfo *pci_ss_list_8086_24c7[] = { &pci_ss_info_8086_24c7_1025_005a, &pci_ss_info_8086_24c7_1028_0126, &pci_ss_info_8086_24c7_1028_0163, + &pci_ss_info_8086_24c7_1028_018d, &pci_ss_info_8086_24c7_1028_0196, &pci_ss_info_8086_24c7_103c_088c, &pci_ss_info_8086_24c7_103c_0890, &pci_ss_info_8086_24c7_103c_08b0, + &pci_ss_info_8086_24c7_1043_8089, &pci_ss_info_8086_24c7_1071_8160, &pci_ss_info_8086_24c7_144d_c00c, &pci_ss_info_8086_24c7_1462_5800, &pci_ss_info_8086_24c7_1509_2990, &pci_ss_info_8086_24c7_1734_1004, &pci_ss_info_8086_24c7_4c53_1090, + &pci_ss_info_8086_24c7_8086_24c2, &pci_ss_info_8086_24c7_8086_4541, &pci_ss_info_8086_24c7_e4bf_0cc9, &pci_ss_info_8086_24c7_e4bf_0cd2, @@ -59334,12 +67743,15 @@ static const pciSubsystemInfo *pci_ss_list_8086_24c7[] = { static const pciSubsystemInfo *pci_ss_list_8086_24ca[] = { &pci_ss_info_8086_24ca_1014_052d, &pci_ss_info_8086_24ca_1025_005a, + &pci_ss_info_8086_24ca_1028_014f, &pci_ss_info_8086_24ca_1028_0163, + &pci_ss_info_8086_24ca_1028_018d, &pci_ss_info_8086_24ca_1028_0196, &pci_ss_info_8086_24ca_103c_088c, &pci_ss_info_8086_24ca_103c_0890, &pci_ss_info_8086_24ca_103c_08b0, &pci_ss_info_8086_24ca_1071_8160, + &pci_ss_info_8086_24ca_144d_c005, &pci_ss_info_8086_24ca_144d_c00c, &pci_ss_info_8086_24ca_1734_1055, &pci_ss_info_8086_24ca_8086_4541, @@ -59348,6 +67760,8 @@ static const pciSubsystemInfo *pci_ss_list_8086_24ca[] = { static const pciSubsystemInfo *pci_ss_list_8086_24cb[] = { &pci_ss_info_8086_24cb_1014_0267, &pci_ss_info_8086_24cb_1028_0126, + &pci_ss_info_8086_24cb_1043_8089, + &pci_ss_info_8086_24cb_114a_0582, &pci_ss_info_8086_24cb_1458_24c2, &pci_ss_info_8086_24cb_1462_5800, &pci_ss_info_8086_24cb_1734_1004, @@ -59369,18 +67783,23 @@ static const pciSubsystemInfo *pci_ss_list_8086_24cd[] = { &pci_ss_info_8086_24cd_1028_0126, &pci_ss_info_8086_24cd_1028_0139, &pci_ss_info_8086_24cd_1028_0163, + &pci_ss_info_8086_24cd_1028_018d, &pci_ss_info_8086_24cd_1028_0196, &pci_ss_info_8086_24cd_103c_088c, &pci_ss_info_8086_24cd_103c_0890, &pci_ss_info_8086_24cd_103c_08b0, + &pci_ss_info_8086_24cd_1043_8089, &pci_ss_info_8086_24cd_1071_8160, + &pci_ss_info_8086_24cd_114a_0582, &pci_ss_info_8086_24cd_1179_ff00, + &pci_ss_info_8086_24cd_144d_c005, &pci_ss_info_8086_24cd_144d_c00c, &pci_ss_info_8086_24cd_1462_3981, &pci_ss_info_8086_24cd_1509_1968, &pci_ss_info_8086_24cd_1734_1004, &pci_ss_info_8086_24cd_1734_1055, &pci_ss_info_8086_24cd_4c53_1090, + &pci_ss_info_8086_24cd_8086_24c2, &pci_ss_info_8086_24cd_e4bf_0cc9, &pci_ss_info_8086_24cd_e4bf_0cd2, NULL @@ -59393,6 +67812,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d1[] = { &pci_ss_info_8086_24d1_1043_80a6, &pci_ss_info_8086_24d1_1458_24d1, &pci_ss_info_8086_24d1_1462_7280, + &pci_ss_info_8086_24d1_1565_5200, &pci_ss_info_8086_24d1_15d9_4580, &pci_ss_info_8086_24d1_8086_3427, &pci_ss_info_8086_24d1_8086_4246, @@ -59401,8 +67821,11 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d1[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24d2[] = { + &pci_ss_info_8086_24d2_1014_02dd, &pci_ss_info_8086_24d2_1014_02ed, &pci_ss_info_8086_24d2_1028_0169, + &pci_ss_info_8086_24d2_1028_016c, + &pci_ss_info_8086_24d2_1028_016d, &pci_ss_info_8086_24d2_1028_0183, &pci_ss_info_8086_24d2_1028_019a, &pci_ss_info_8086_24d2_103c_006a, @@ -59410,6 +67833,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d2[] = { &pci_ss_info_8086_24d2_1043_80a6, &pci_ss_info_8086_24d2_1458_24d2, &pci_ss_info_8086_24d2_1462_7280, + &pci_ss_info_8086_24d2_1565_3101, &pci_ss_info_8086_24d2_15d9_4580, &pci_ss_info_8086_24d2_1734_101c, &pci_ss_info_8086_24d2_8086_3427, @@ -59419,6 +67843,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d2[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24d3[] = { + &pci_ss_info_8086_24d3_1014_02dd, &pci_ss_info_8086_24d3_1014_02ed, &pci_ss_info_8086_24d3_1028_0156, &pci_ss_info_8086_24d3_1028_0169, @@ -59426,6 +67851,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d3[] = { &pci_ss_info_8086_24d3_1043_80a6, &pci_ss_info_8086_24d3_1458_24d2, &pci_ss_info_8086_24d3_1462_7280, + &pci_ss_info_8086_24d3_1565_3101, &pci_ss_info_8086_24d3_15d9_4580, &pci_ss_info_8086_24d3_1734_101c, &pci_ss_info_8086_24d3_8086_3427, @@ -59435,8 +67861,11 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d3[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24d4[] = { + &pci_ss_info_8086_24d4_1014_02dd, &pci_ss_info_8086_24d4_1014_02ed, &pci_ss_info_8086_24d4_1028_0169, + &pci_ss_info_8086_24d4_1028_016c, + &pci_ss_info_8086_24d4_1028_016d, &pci_ss_info_8086_24d4_1028_0183, &pci_ss_info_8086_24d4_1028_019a, &pci_ss_info_8086_24d4_103c_006a, @@ -59444,6 +67873,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d4[] = { &pci_ss_info_8086_24d4_1043_80a6, &pci_ss_info_8086_24d4_1458_24d2, &pci_ss_info_8086_24d4_1462_7280, + &pci_ss_info_8086_24d4_1565_3101, &pci_ss_info_8086_24d4_15d9_4580, &pci_ss_info_8086_24d4_1734_101c, &pci_ss_info_8086_24d4_8086_3427, @@ -59475,12 +67905,15 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d6[] = { static const pciSubsystemInfo *pci_ss_list_8086_24d7[] = { &pci_ss_info_8086_24d7_1014_02ed, &pci_ss_info_8086_24d7_1028_0169, + &pci_ss_info_8086_24d7_1028_016c, + &pci_ss_info_8086_24d7_1028_016d, &pci_ss_info_8086_24d7_1028_0183, &pci_ss_info_8086_24d7_103c_006a, &pci_ss_info_8086_24d7_103c_12bc, &pci_ss_info_8086_24d7_1043_80a6, &pci_ss_info_8086_24d7_1458_24d2, &pci_ss_info_8086_24d7_1462_7280, + &pci_ss_info_8086_24d7_1565_3101, &pci_ss_info_8086_24d7_15d9_4580, &pci_ss_info_8086_24d7_1734_101c, &pci_ss_info_8086_24d7_8086_3427, @@ -59490,8 +67923,11 @@ static const pciSubsystemInfo *pci_ss_list_8086_24d7[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24db[] = { + &pci_ss_info_8086_24db_1014_02dd, &pci_ss_info_8086_24db_1014_02ed, &pci_ss_info_8086_24db_1028_0169, + &pci_ss_info_8086_24db_1028_016c, + &pci_ss_info_8086_24db_1028_016d, &pci_ss_info_8086_24db_1028_019a, &pci_ss_info_8086_24db_103c_006a, &pci_ss_info_8086_24db_103c_12bc, @@ -59499,6 +67935,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_24db[] = { &pci_ss_info_8086_24db_1458_24d2, &pci_ss_info_8086_24db_1462_7280, &pci_ss_info_8086_24db_1462_7580, + &pci_ss_info_8086_24db_1565_3101, &pci_ss_info_8086_24db_15d9_4580, &pci_ss_info_8086_24db_1734_101c, &pci_ss_info_8086_24db_8086_24db, @@ -59510,8 +67947,11 @@ static const pciSubsystemInfo *pci_ss_list_8086_24db[] = { }; #define pci_ss_list_8086_24dc NULL static const pciSubsystemInfo *pci_ss_list_8086_24dd[] = { + &pci_ss_info_8086_24dd_1014_02dd, &pci_ss_info_8086_24dd_1014_02ed, &pci_ss_info_8086_24dd_1028_0169, + &pci_ss_info_8086_24dd_1028_016c, + &pci_ss_info_8086_24dd_1028_016d, &pci_ss_info_8086_24dd_1028_0183, &pci_ss_info_8086_24dd_1028_019a, &pci_ss_info_8086_24dd_103c_006a, @@ -59531,6 +67971,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_24de[] = { &pci_ss_info_8086_24de_1043_80a6, &pci_ss_info_8086_24de_1458_24d2, &pci_ss_info_8086_24de_1462_7280, + &pci_ss_info_8086_24de_1565_3101, &pci_ss_info_8086_24de_15d9_4580, &pci_ss_info_8086_24de_1734_101c, &pci_ss_info_8086_24de_8086_3427, @@ -59602,6 +68043,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_2560[] = { static const pciSubsystemInfo *pci_ss_list_8086_2562[] = { &pci_ss_info_8086_2562_0e11_00b9, &pci_ss_info_8086_2562_1014_0267, + &pci_ss_info_8086_2562_1734_1003, &pci_ss_info_8086_2562_1734_1004, NULL }; @@ -59645,37 +68087,53 @@ static const pciSubsystemInfo *pci_ss_list_8086_2582[] = { &pci_ss_info_8086_2582_1043_2582, &pci_ss_info_8086_2582_1458_2582, &pci_ss_info_8086_2582_1734_105b, + &pci_ss_info_8086_2582_1849_2582, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2584[] = { + &pci_ss_info_8086_2584_1028_0177, NULL }; -#define pci_ss_list_8086_2584 NULL #define pci_ss_list_8086_2585 NULL #define pci_ss_list_8086_2588 NULL #define pci_ss_list_8086_2589 NULL #define pci_ss_list_8086_258a NULL static const pciSubsystemInfo *pci_ss_list_8086_2590[] = { + &pci_ss_info_8086_2590_1014_0575, &pci_ss_info_8086_2590_1028_0182, + &pci_ss_info_8086_2590_103c_0934, &pci_ss_info_8086_2590_103c_099c, + &pci_ss_info_8086_2590_104d_81b7, &pci_ss_info_8086_2590_a304_81b7, &pci_ss_info_8086_2590_e4bf_0ccd, + &pci_ss_info_8086_2590_e4bf_0cd3, + &pci_ss_info_8086_2590_e4bf_58b1, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2591[] = { + &pci_ss_info_8086_2591_103c_0934, NULL }; -#define pci_ss_list_8086_2591 NULL static const pciSubsystemInfo *pci_ss_list_8086_2592[] = { &pci_ss_info_8086_2592_103c_099c, &pci_ss_info_8086_2592_103c_308a, &pci_ss_info_8086_2592_1043_1881, &pci_ss_info_8086_2592_e4bf_0ccd, + &pci_ss_info_8086_2592_e4bf_0cd3, + &pci_ss_info_8086_2592_e4bf_58b1, NULL }; #define pci_ss_list_8086_25a1 NULL static const pciSubsystemInfo *pci_ss_list_8086_25a2[] = { &pci_ss_info_8086_25a2_1775_10d0, + &pci_ss_info_8086_25a2_1775_1100, &pci_ss_info_8086_25a2_1775_ce90, &pci_ss_info_8086_25a2_4c53_10b0, &pci_ss_info_8086_25a2_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25a3[] = { + &pci_ss_info_8086_25a3_1775_1100, &pci_ss_info_8086_25a3_1775_ce90, &pci_ss_info_8086_25a3_4c53_10b0, &pci_ss_info_8086_25a3_4c53_10d0, @@ -59684,6 +68142,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_25a3[] = { }; static const pciSubsystemInfo *pci_ss_list_8086_25a4[] = { &pci_ss_info_8086_25a4_1775_10d0, + &pci_ss_info_8086_25a4_1775_1100, &pci_ss_info_8086_25a4_1775_ce90, &pci_ss_info_8086_25a4_4c53_10b0, &pci_ss_info_8086_25a4_4c53_10d0, @@ -59691,6 +68150,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_25a4[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25a6[] = { + &pci_ss_info_8086_25a6_1775_1100, &pci_ss_info_8086_25a6_1775_ce90, &pci_ss_info_8086_25a6_4c53_10b0, NULL @@ -59698,6 +68158,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_25a6[] = { #define pci_ss_list_8086_25a7 NULL static const pciSubsystemInfo *pci_ss_list_8086_25a9[] = { &pci_ss_info_8086_25a9_1775_10d0, + &pci_ss_info_8086_25a9_1775_1100, &pci_ss_info_8086_25a9_1775_ce90, &pci_ss_info_8086_25a9_4c53_10b0, &pci_ss_info_8086_25a9_4c53_10d0, @@ -59705,13 +68166,16 @@ static const pciSubsystemInfo *pci_ss_list_8086_25a9[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25aa[] = { + &pci_ss_info_8086_25aa_1775_1100, &pci_ss_info_8086_25aa_1775_ce90, &pci_ss_info_8086_25aa_4c53_10b0, + &pci_ss_info_8086_25aa_4c53_10d0, &pci_ss_info_8086_25aa_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25ab[] = { &pci_ss_info_8086_25ab_1775_10d0, + &pci_ss_info_8086_25ab_1775_1100, &pci_ss_info_8086_25ab_1775_ce90, &pci_ss_info_8086_25ab_4c53_10b0, &pci_ss_info_8086_25ab_4c53_10d0, @@ -59720,6 +68184,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_25ab[] = { }; static const pciSubsystemInfo *pci_ss_list_8086_25ac[] = { &pci_ss_info_8086_25ac_1775_10d0, + &pci_ss_info_8086_25ac_1775_1100, &pci_ss_info_8086_25ac_1775_ce90, &pci_ss_info_8086_25ac_4c53_10b0, &pci_ss_info_8086_25ac_4c53_10d0, @@ -59728,6 +68193,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_25ac[] = { }; static const pciSubsystemInfo *pci_ss_list_8086_25ad[] = { &pci_ss_info_8086_25ad_1775_10d0, + &pci_ss_info_8086_25ad_1775_1100, &pci_ss_info_8086_25ad_1775_ce90, &pci_ss_info_8086_25ad_4c53_10b0, &pci_ss_info_8086_25ad_4c53_10d0, @@ -59736,6 +68202,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_25ad[] = { }; #define pci_ss_list_8086_25ae NULL static const pciSubsystemInfo *pci_ss_list_8086_25b0[] = { + &pci_ss_info_8086_25b0_1775_1100, &pci_ss_info_8086_25b0_4c53_10d0, &pci_ss_info_8086_25b0_4c53_10e0, NULL @@ -59797,9 +68264,12 @@ static const pciSubsystemInfo *pci_ss_list_8086_2640[] = { &pci_ss_info_8086_2640_1462_7028, &pci_ss_info_8086_2640_1734_105c, &pci_ss_info_8086_2640_e4bf_0ccd, + &pci_ss_info_8086_2640_e4bf_0cd3, + &pci_ss_info_8086_2640_e4bf_58b1, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2641[] = { + &pci_ss_info_8086_2641_103c_0934, &pci_ss_info_8086_2641_103c_099c, NULL }; @@ -59810,44 +68280,60 @@ static const pciSubsystemInfo *pci_ss_list_8086_2651[] = { &pci_ss_info_8086_2651_1734_105c, &pci_ss_info_8086_2651_8086_4147, &pci_ss_info_8086_2651_e4bf_0ccd, + &pci_ss_info_8086_2651_e4bf_0cd3, + &pci_ss_info_8086_2651_e4bf_58b1, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2652[] = { + &pci_ss_info_8086_2652_1028_0177, &pci_ss_info_8086_2652_1462_7028, NULL }; #define pci_ss_list_8086_2653 NULL static const pciSubsystemInfo *pci_ss_list_8086_2658[] = { + &pci_ss_info_8086_2658_1028_0177, &pci_ss_info_8086_2658_1028_0179, + &pci_ss_info_8086_2658_103c_0934, &pci_ss_info_8086_2658_103c_099c, &pci_ss_info_8086_2658_1043_80a6, &pci_ss_info_8086_2658_1458_2558, &pci_ss_info_8086_2658_1462_7028, &pci_ss_info_8086_2658_1734_105c, &pci_ss_info_8086_2658_e4bf_0ccd, + &pci_ss_info_8086_2658_e4bf_0cd3, + &pci_ss_info_8086_2658_e4bf_58b1, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2659[] = { + &pci_ss_info_8086_2659_1028_0177, &pci_ss_info_8086_2659_1028_0179, + &pci_ss_info_8086_2659_103c_0934, &pci_ss_info_8086_2659_103c_099c, &pci_ss_info_8086_2659_1043_80a6, &pci_ss_info_8086_2659_1458_2659, &pci_ss_info_8086_2659_1462_7028, &pci_ss_info_8086_2659_1734_105c, &pci_ss_info_8086_2659_e4bf_0ccd, + &pci_ss_info_8086_2659_e4bf_0cd3, + &pci_ss_info_8086_2659_e4bf_58b1, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_265a[] = { + &pci_ss_info_8086_265a_1028_0177, &pci_ss_info_8086_265a_1028_0179, + &pci_ss_info_8086_265a_103c_0934, &pci_ss_info_8086_265a_103c_099c, &pci_ss_info_8086_265a_1043_80a6, &pci_ss_info_8086_265a_1458_265a, &pci_ss_info_8086_265a_1462_7028, &pci_ss_info_8086_265a_1734_105c, &pci_ss_info_8086_265a_e4bf_0ccd, + &pci_ss_info_8086_265a_e4bf_0cd3, + &pci_ss_info_8086_265a_e4bf_58b1, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_265b[] = { + &pci_ss_info_8086_265b_1028_0177, &pci_ss_info_8086_265b_1028_0179, &pci_ss_info_8086_265b_103c_099c, &pci_ss_info_8086_265b_1043_80a6, @@ -59855,10 +68341,14 @@ static const pciSubsystemInfo *pci_ss_list_8086_265b[] = { &pci_ss_info_8086_265b_1462_7028, &pci_ss_info_8086_265b_1734_105c, &pci_ss_info_8086_265b_e4bf_0ccd, + &pci_ss_info_8086_265b_e4bf_0cd3, + &pci_ss_info_8086_265b_e4bf_58b1, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_265c[] = { + &pci_ss_info_8086_265c_1028_0177, &pci_ss_info_8086_265c_1028_0179, + &pci_ss_info_8086_265c_103c_0934, &pci_ss_info_8086_265c_103c_099c, &pci_ss_info_8086_265c_1043_80a6, &pci_ss_info_8086_265c_1458_5006, @@ -59866,40 +68356,69 @@ static const pciSubsystemInfo *pci_ss_list_8086_265c[] = { &pci_ss_info_8086_265c_1734_105c, &pci_ss_info_8086_265c_8086_265c, &pci_ss_info_8086_265c_e4bf_0ccd, + &pci_ss_info_8086_265c_e4bf_0cd3, + &pci_ss_info_8086_265c_e4bf_58b1, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2660[] = { + &pci_ss_info_8086_2660_103c_0934, &pci_ss_info_8086_2660_103c_099c, + &pci_ss_info_8086_2660_e4bf_0ccd, + &pci_ss_info_8086_2660_e4bf_0cd3, + &pci_ss_info_8086_2660_e4bf_58b1, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2662[] = { + &pci_ss_info_8086_2662_103c_0934, + &pci_ss_info_8086_2662_e4bf_0ccd, + &pci_ss_info_8086_2662_e4bf_0cd3, + &pci_ss_info_8086_2662_e4bf_58b1, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2664[] = { + &pci_ss_info_8086_2664_e4bf_0ccd, + &pci_ss_info_8086_2664_e4bf_0cd3, + &pci_ss_info_8086_2664_e4bf_58b1, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2666[] = { + &pci_ss_info_8086_2666_e4bf_0ccd, + &pci_ss_info_8086_2666_e4bf_0cd3, + &pci_ss_info_8086_2666_e4bf_58b1, NULL }; -#define pci_ss_list_8086_2662 NULL -#define pci_ss_list_8086_2664 NULL -#define pci_ss_list_8086_2666 NULL static const pciSubsystemInfo *pci_ss_list_8086_2668[] = { + &pci_ss_info_8086_2668_1014_05b7, &pci_ss_info_8086_2668_103c_2a09, &pci_ss_info_8086_2668_1043_814e, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_266a[] = { + &pci_ss_info_8086_266a_1028_0177, &pci_ss_info_8086_266a_1028_0179, &pci_ss_info_8086_266a_1043_80a6, &pci_ss_info_8086_266a_1458_266a, &pci_ss_info_8086_266a_1462_7028, &pci_ss_info_8086_266a_1734_105c, &pci_ss_info_8086_266a_e4bf_0ccd, + &pci_ss_info_8086_266a_e4bf_0cd3, + &pci_ss_info_8086_266a_e4bf_58b1, NULL }; #define pci_ss_list_8086_266c NULL static const pciSubsystemInfo *pci_ss_list_8086_266d[] = { &pci_ss_info_8086_266d_1025_006a, + &pci_ss_info_8086_266d_103c_0934, &pci_ss_info_8086_266d_103c_099c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_266e[] = { &pci_ss_info_8086_266e_1025_006a, + &pci_ss_info_8086_266e_1028_0177, &pci_ss_info_8086_266e_1028_0179, &pci_ss_info_8086_266e_1028_0182, &pci_ss_info_8086_266e_1028_0188, + &pci_ss_info_8086_266e_103c_0934, &pci_ss_info_8086_266e_103c_0944, &pci_ss_info_8086_266e_103c_099c, &pci_ss_info_8086_266e_103c_3006, @@ -59909,11 +68428,16 @@ static const pciSubsystemInfo *pci_ss_list_8086_266e[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_266f[] = { + &pci_ss_info_8086_266f_1028_0177, + &pci_ss_info_8086_266f_103c_0934, &pci_ss_info_8086_266f_103c_099c, &pci_ss_info_8086_266f_1043_80a6, &pci_ss_info_8086_266f_1458_266f, &pci_ss_info_8086_266f_1462_7028, &pci_ss_info_8086_266f_1734_105c, + &pci_ss_info_8086_266f_e4bf_0ccd, + &pci_ss_info_8086_266f_e4bf_0cd3, + &pci_ss_info_8086_266f_e4bf_58b1, NULL }; #define pci_ss_list_8086_2670 NULL @@ -59948,10 +68472,17 @@ static const pciSubsystemInfo *pci_ss_list_8086_2772[] = { #define pci_ss_list_8086_2774 NULL #define pci_ss_list_8086_2775 NULL #define pci_ss_list_8086_2776 NULL -#define pci_ss_list_8086_2778 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2778[] = { + &pci_ss_info_8086_2778_1028_01df, + &pci_ss_info_8086_2778_1028_01e6, + NULL +}; #define pci_ss_list_8086_2779 NULL #define pci_ss_list_8086_277a NULL -#define pci_ss_list_8086_277c NULL +static const pciSubsystemInfo *pci_ss_list_8086_277c[] = { + &pci_ss_info_8086_277c_1043_8178, + NULL +}; #define pci_ss_list_8086_277d NULL static const pciSubsystemInfo *pci_ss_list_8086_2782[] = { &pci_ss_info_8086_2782_1043_2582, @@ -59961,14 +68492,22 @@ static const pciSubsystemInfo *pci_ss_list_8086_2782[] = { static const pciSubsystemInfo *pci_ss_list_8086_2792[] = { &pci_ss_info_8086_2792_103c_099c, &pci_ss_info_8086_2792_1043_1881, + &pci_ss_info_8086_2792_e4bf_0ccd, + &pci_ss_info_8086_2792_e4bf_0cd3, + &pci_ss_info_8086_2792_e4bf_58b1, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_27a0[] = { + &pci_ss_info_8086_27a0_1025_006c, &pci_ss_info_8086_27a0_103c_30a1, + &pci_ss_info_8086_27a0_103c_30a3, &pci_ss_info_8086_27a0_17aa_2017, NULL }; -#define pci_ss_list_8086_27a1 NULL +static const pciSubsystemInfo *pci_ss_list_8086_27a1[] = { + &pci_ss_info_8086_27a1_103c_30a3, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_27a2[] = { &pci_ss_info_8086_27a2_103c_30a1, &pci_ss_info_8086_27a2_17aa_201a, @@ -59979,84 +68518,149 @@ static const pciSubsystemInfo *pci_ss_list_8086_27a6[] = { &pci_ss_info_8086_27a6_17aa_201a, NULL }; -#define pci_ss_list_8086_27b0 NULL +#define pci_ss_list_8086_27ac NULL +#define pci_ss_list_8086_27ad NULL +#define pci_ss_list_8086_27ae NULL +static const pciSubsystemInfo *pci_ss_list_8086_27b0[] = { + &pci_ss_info_8086_27b0_8086_544e, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_27b8[] = { + &pci_ss_info_8086_27b8_1028_01e6, &pci_ss_info_8086_27b8_107b_5048, &pci_ss_info_8086_27b8_8086_544e, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_27b9[] = { &pci_ss_info_8086_27b9_103c_30a1, + &pci_ss_info_8086_27b9_103c_30a3, &pci_ss_info_8086_27b9_10f7_8338, &pci_ss_info_8086_27b9_17aa_2009, NULL }; -#define pci_ss_list_8086_27bd NULL +static const pciSubsystemInfo *pci_ss_list_8086_27bd[] = { + &pci_ss_info_8086_27bd_1025_006c, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_27c0[] = { + &pci_ss_info_8086_27c0_1028_01df, + &pci_ss_info_8086_27c0_1028_01e6, &pci_ss_info_8086_27c0_107b_5048, + &pci_ss_info_8086_27c0_1462_7236, &pci_ss_info_8086_27c0_8086_544e, NULL }; -#define pci_ss_list_8086_27c1 NULL -#define pci_ss_list_8086_27c3 NULL -#define pci_ss_list_8086_27c4 NULL +static const pciSubsystemInfo *pci_ss_list_8086_27c1[] = { + &pci_ss_info_8086_27c1_1028_01df, + &pci_ss_info_8086_27c1_8086_5842, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_27c3[] = { + &pci_ss_info_8086_27c3_8086_544e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_27c4[] = { + &pci_ss_info_8086_27c4_1025_006c, + &pci_ss_info_8086_27c4_17aa_200e, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_27c5[] = { + &pci_ss_info_8086_27c5_103c_30a3, &pci_ss_info_8086_27c5_17aa_200d, NULL }; #define pci_ss_list_8086_27c6 NULL static const pciSubsystemInfo *pci_ss_list_8086_27c8[] = { + &pci_ss_info_8086_27c8_1025_006c, + &pci_ss_info_8086_27c8_1028_01df, + &pci_ss_info_8086_27c8_1028_01e6, &pci_ss_info_8086_27c8_103c_30a1, + &pci_ss_info_8086_27c8_103c_30a3, &pci_ss_info_8086_27c8_107b_5048, &pci_ss_info_8086_27c8_17aa_200a, &pci_ss_info_8086_27c8_8086_544e, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_27c9[] = { + &pci_ss_info_8086_27c9_1025_006c, + &pci_ss_info_8086_27c9_1028_01df, + &pci_ss_info_8086_27c9_1028_01e6, &pci_ss_info_8086_27c9_103c_30a1, + &pci_ss_info_8086_27c9_103c_30a3, &pci_ss_info_8086_27c9_107b_5048, &pci_ss_info_8086_27c9_17aa_200a, &pci_ss_info_8086_27c9_8086_544e, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_27ca[] = { + &pci_ss_info_8086_27ca_1025_006c, + &pci_ss_info_8086_27ca_1028_01df, + &pci_ss_info_8086_27ca_1028_01e6, &pci_ss_info_8086_27ca_103c_30a1, + &pci_ss_info_8086_27ca_103c_30a3, &pci_ss_info_8086_27ca_107b_5048, &pci_ss_info_8086_27ca_17aa_200a, &pci_ss_info_8086_27ca_8086_544e, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_27cb[] = { + &pci_ss_info_8086_27cb_1025_006c, + &pci_ss_info_8086_27cb_1028_01df, &pci_ss_info_8086_27cb_103c_30a1, + &pci_ss_info_8086_27cb_103c_30a3, &pci_ss_info_8086_27cb_107b_5048, &pci_ss_info_8086_27cb_17aa_200a, &pci_ss_info_8086_27cb_8086_544e, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_27cc[] = { + &pci_ss_info_8086_27cc_1025_006c, + &pci_ss_info_8086_27cc_1028_01df, + &pci_ss_info_8086_27cc_1028_01e6, &pci_ss_info_8086_27cc_103c_30a1, + &pci_ss_info_8086_27cc_103c_30a3, &pci_ss_info_8086_27cc_17aa_200b, &pci_ss_info_8086_27cc_8086_544e, NULL }; -#define pci_ss_list_8086_27d0 NULL -#define pci_ss_list_8086_27d2 NULL +static const pciSubsystemInfo *pci_ss_list_8086_27d0[] = { + &pci_ss_info_8086_27d0_103c_30a3, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_27d2[] = { + &pci_ss_info_8086_27d2_103c_30a3, + NULL +}; #define pci_ss_list_8086_27d4 NULL -#define pci_ss_list_8086_27d6 NULL +static const pciSubsystemInfo *pci_ss_list_8086_27d6[] = { + &pci_ss_info_8086_27d6_103c_30a3, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_27d8[] = { + &pci_ss_info_8086_27d8_1025_006c, &pci_ss_info_8086_27d8_103c_30a1, + &pci_ss_info_8086_27d8_103c_30a3, + &pci_ss_info_8086_27d8_1043_13c4, &pci_ss_info_8086_27d8_107b_5048, &pci_ss_info_8086_27d8_10f7_8338, + &pci_ss_info_8086_27d8_1179_ff10, &pci_ss_info_8086_27d8_1179_ff31, &pci_ss_info_8086_27d8_152d_0753, &pci_ss_info_8086_27d8_1734_10ad, &pci_ss_info_8086_27d8_17aa_2010, + &pci_ss_info_8086_27d8_17aa_3802, + &pci_ss_info_8086_27d8_8086_1112, + &pci_ss_info_8086_27d8_8086_27d8, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_27da[] = { + &pci_ss_info_8086_27da_1025_006c, + &pci_ss_info_8086_27da_1028_01df, + &pci_ss_info_8086_27da_1028_01e6, &pci_ss_info_8086_27da_10f7_8338, &pci_ss_info_8086_27da_17aa_200f, &pci_ss_info_8086_27da_8086_544e, + &pci_ss_info_8086_27da_8086_5842, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_27dc[] = { @@ -60064,9 +68668,15 @@ static const pciSubsystemInfo *pci_ss_list_8086_27dc[] = { NULL }; #define pci_ss_list_8086_27dd NULL -#define pci_ss_list_8086_27de NULL +static const pciSubsystemInfo *pci_ss_list_8086_27de[] = { + &pci_ss_info_8086_27de_1462_7267, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_27df[] = { + &pci_ss_info_8086_27df_1028_01df, + &pci_ss_info_8086_27df_1028_01e6, &pci_ss_info_8086_27df_103c_30a1, + &pci_ss_info_8086_27df_103c_30a3, &pci_ss_info_8086_27df_107b_5048, &pci_ss_info_8086_27df_10f7_8338, &pci_ss_info_8086_27df_17aa_200c, @@ -60075,90 +68685,264 @@ static const pciSubsystemInfo *pci_ss_list_8086_27df[] = { }; #define pci_ss_list_8086_27e0 NULL #define pci_ss_list_8086_27e2 NULL -#define pci_ss_list_8086_2810 NULL -#define pci_ss_list_8086_2811 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2810[] = { + &pci_ss_info_8086_2810_1043_81ec, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2811[] = { + &pci_ss_info_8086_2811_e4bf_cc47, + NULL +}; #define pci_ss_list_8086_2812 NULL #define pci_ss_list_8086_2814 NULL -#define pci_ss_list_8086_2815 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2815[] = { + &pci_ss_info_8086_2815_1028_01f3, + &pci_ss_info_8086_2815_103c_30c0, + &pci_ss_info_8086_2815_104d_9005, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_2820[] = { + &pci_ss_info_8086_2820_1028_01da, &pci_ss_info_8086_2820_1462_7235, NULL }; #define pci_ss_list_8086_2821 NULL #define pci_ss_list_8086_2822 NULL -#define pci_ss_list_8086_2824 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2824[] = { + &pci_ss_info_8086_2824_1043_81ec, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_2825[] = { + &pci_ss_info_8086_2825_1028_01da, &pci_ss_info_8086_2825_1462_7235, NULL }; -#define pci_ss_list_8086_2828 NULL -#define pci_ss_list_8086_2829 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2828[] = { + &pci_ss_info_8086_2828_1028_01f3, + &pci_ss_info_8086_2828_e4bf_cc47, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2829[] = { + &pci_ss_info_8086_2829_103c_30c0, + &pci_ss_info_8086_2829_104d_9005, + &pci_ss_info_8086_2829_17aa_20a7, + NULL +}; #define pci_ss_list_8086_282a NULL static const pciSubsystemInfo *pci_ss_list_8086_2830[] = { + &pci_ss_info_8086_2830_1028_01da, + &pci_ss_info_8086_2830_1028_01f3, + &pci_ss_info_8086_2830_103c_30c0, + &pci_ss_info_8086_2830_1043_81ec, + &pci_ss_info_8086_2830_104d_9005, &pci_ss_info_8086_2830_1462_7235, + &pci_ss_info_8086_2830_17aa_20aa, + &pci_ss_info_8086_2830_e4bf_cc47, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2831[] = { + &pci_ss_info_8086_2831_1028_01da, + &pci_ss_info_8086_2831_1028_01f3, + &pci_ss_info_8086_2831_103c_30c0, + &pci_ss_info_8086_2831_1043_81ec, + &pci_ss_info_8086_2831_104d_9005, &pci_ss_info_8086_2831_1462_7235, + &pci_ss_info_8086_2831_17aa_20aa, + &pci_ss_info_8086_2831_e4bf_cc47, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2832[] = { + &pci_ss_info_8086_2832_1028_01da, + &pci_ss_info_8086_2832_1028_01f3, + &pci_ss_info_8086_2832_103c_30c0, + &pci_ss_info_8086_2832_1043_81ec, + &pci_ss_info_8086_2832_104d_9005, + &pci_ss_info_8086_2832_17aa_20aa, + &pci_ss_info_8086_2832_e4bf_cc47, NULL }; -#define pci_ss_list_8086_2832 NULL static const pciSubsystemInfo *pci_ss_list_8086_2834[] = { + &pci_ss_info_8086_2834_1028_01da, + &pci_ss_info_8086_2834_1028_01f3, + &pci_ss_info_8086_2834_103c_30c0, + &pci_ss_info_8086_2834_103c_30c1, + &pci_ss_info_8086_2834_1043_81ec, + &pci_ss_info_8086_2834_104d_9005, &pci_ss_info_8086_2834_1462_7235, + &pci_ss_info_8086_2834_17aa_20aa, + &pci_ss_info_8086_2834_e4bf_cc47, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2835[] = { + &pci_ss_info_8086_2835_1028_01da, + &pci_ss_info_8086_2835_1028_01f3, + &pci_ss_info_8086_2835_103c_30c0, + &pci_ss_info_8086_2835_1043_81ec, + &pci_ss_info_8086_2835_104d_9005, + &pci_ss_info_8086_2835_17aa_20aa, + &pci_ss_info_8086_2835_e4bf_cc47, NULL }; -#define pci_ss_list_8086_2835 NULL static const pciSubsystemInfo *pci_ss_list_8086_2836[] = { + &pci_ss_info_8086_2836_1028_01da, + &pci_ss_info_8086_2836_1028_01f3, + &pci_ss_info_8086_2836_103c_30c0, + &pci_ss_info_8086_2836_1043_81ec, + &pci_ss_info_8086_2836_104d_9005, &pci_ss_info_8086_2836_1462_7235, + &pci_ss_info_8086_2836_17aa_20ab, + &pci_ss_info_8086_2836_e4bf_cc47, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_283a[] = { + &pci_ss_info_8086_283a_1028_01da, + &pci_ss_info_8086_283a_1028_01f3, + &pci_ss_info_8086_283a_103c_30c0, + &pci_ss_info_8086_283a_1043_81ec, + &pci_ss_info_8086_283a_104d_9005, + &pci_ss_info_8086_283a_17aa_20ab, + &pci_ss_info_8086_283a_e4bf_cc47, NULL }; -#define pci_ss_list_8086_283a NULL static const pciSubsystemInfo *pci_ss_list_8086_283e[] = { + &pci_ss_info_8086_283e_1028_01da, + &pci_ss_info_8086_283e_1028_01f3, + &pci_ss_info_8086_283e_1043_81ec, + &pci_ss_info_8086_283e_104d_9005, &pci_ss_info_8086_283e_1462_7235, + &pci_ss_info_8086_283e_17aa_20a9, + &pci_ss_info_8086_283e_e4bf_cc47, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_283f[] = { + &pci_ss_info_8086_283f_1028_01da, NULL }; -#define pci_ss_list_8086_283f NULL #define pci_ss_list_8086_2841 NULL #define pci_ss_list_8086_2843 NULL #define pci_ss_list_8086_2845 NULL -#define pci_ss_list_8086_2847 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2847[] = { + &pci_ss_info_8086_2847_1028_01da, + NULL +}; #define pci_ss_list_8086_2849 NULL -#define pci_ss_list_8086_284b NULL +static const pciSubsystemInfo *pci_ss_list_8086_284b[] = { + &pci_ss_info_8086_284b_0690_107b, + &pci_ss_info_8086_284b_1028_01da, + &pci_ss_info_8086_284b_1028_01f3, + &pci_ss_info_8086_284b_1028_01f9, + &pci_ss_info_8086_284b_103c_30c0, + &pci_ss_info_8086_284b_1043_81ec, + &pci_ss_info_8086_284b_104d_9005, + &pci_ss_info_8086_284b_17aa_20ac, + NULL +}; #define pci_ss_list_8086_284f NULL -#define pci_ss_list_8086_2850 NULL -#define pci_ss_list_8086_2910 NULL -#define pci_ss_list_8086_2911 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2850[] = { + &pci_ss_info_8086_2850_1028_01f3, + &pci_ss_info_8086_2850_103c_30c0, + &pci_ss_info_8086_2850_104d_9005, + &pci_ss_info_8086_2850_17aa_20a6, + &pci_ss_info_8086_2850_e4bf_cc47, + NULL +}; #define pci_ss_list_8086_2912 NULL -#define pci_ss_list_8086_2914 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2914[] = { + &pci_ss_info_8086_2914_1028_0211, + NULL +}; #define pci_ss_list_8086_2916 NULL +#define pci_ss_list_8086_2917 NULL #define pci_ss_list_8086_2918 NULL -#define pci_ss_list_8086_2920 NULL +#define pci_ss_list_8086_2919 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2920[] = { + &pci_ss_info_8086_2920_1028_020f, + &pci_ss_info_8086_2920_1028_0210, + &pci_ss_info_8086_2920_1028_0211, + NULL +}; #define pci_ss_list_8086_2921 NULL #define pci_ss_list_8086_2922 NULL #define pci_ss_list_8086_2923 NULL #define pci_ss_list_8086_2925 NULL -#define pci_ss_list_8086_2926 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2926[] = { + &pci_ss_info_8086_2926_1028_0211, + NULL +}; #define pci_ss_list_8086_2928 NULL +#define pci_ss_list_8086_2929 NULL +#define pci_ss_list_8086_292c NULL #define pci_ss_list_8086_292d NULL -#define pci_ss_list_8086_292e NULL -#define pci_ss_list_8086_2930 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2930[] = { + &pci_ss_info_8086_2930_1028_0211, + NULL +}; #define pci_ss_list_8086_2932 NULL -#define pci_ss_list_8086_2934 NULL -#define pci_ss_list_8086_2935 NULL -#define pci_ss_list_8086_2936 NULL -#define pci_ss_list_8086_2937 NULL -#define pci_ss_list_8086_2938 NULL -#define pci_ss_list_8086_2939 NULL -#define pci_ss_list_8086_293a NULL -#define pci_ss_list_8086_293c NULL -#define pci_ss_list_8086_293e NULL -#define pci_ss_list_8086_2940 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2934[] = { + &pci_ss_info_8086_2934_1028_020f, + &pci_ss_info_8086_2934_1028_0210, + &pci_ss_info_8086_2934_1028_0211, + &pci_ss_info_8086_2934_1028_2011, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2935[] = { + &pci_ss_info_8086_2935_1028_020f, + &pci_ss_info_8086_2935_1028_0210, + &pci_ss_info_8086_2935_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2936[] = { + &pci_ss_info_8086_2936_1028_020f, + &pci_ss_info_8086_2936_1028_0210, + &pci_ss_info_8086_2936_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2937[] = { + &pci_ss_info_8086_2937_1028_0211, + &pci_ss_info_8086_2937_1028_2011, + &pci_ss_info_8086_2937_8086_2937, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2938[] = { + &pci_ss_info_8086_2938_1028_0211, + &pci_ss_info_8086_2938_8086_2938, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2939[] = { + &pci_ss_info_8086_2939_1028_0210, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_293a[] = { + &pci_ss_info_8086_293a_1028_020f, + &pci_ss_info_8086_293a_1028_0210, + &pci_ss_info_8086_293a_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_293c[] = { + &pci_ss_info_8086_293c_1028_0211, + &pci_ss_info_8086_293c_8086_293c, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_293e[] = { + &pci_ss_info_8086_293e_1028_0211, + &pci_ss_info_8086_293e_8086_293e, + &pci_ss_info_8086_293e_8086_2940, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2940[] = { + &pci_ss_info_8086_2940_1028_0211, + &pci_ss_info_8086_2940_8086_2940, + NULL +}; #define pci_ss_list_8086_2942 NULL #define pci_ss_list_8086_2944 NULL #define pci_ss_list_8086_2946 NULL #define pci_ss_list_8086_2948 NULL #define pci_ss_list_8086_294a NULL -#define pci_ss_list_8086_294c NULL +static const pciSubsystemInfo *pci_ss_list_8086_294c[] = { + &pci_ss_info_8086_294c_17aa_302e, + NULL +}; #define pci_ss_list_8086_2970 NULL #define pci_ss_list_8086_2971 NULL #define pci_ss_list_8086_2972 NULL @@ -60170,7 +68954,12 @@ static const pciSubsystemInfo *pci_ss_list_8086_283e[] = { #define pci_ss_list_8086_2980 NULL #define pci_ss_list_8086_2981 NULL #define pci_ss_list_8086_2982 NULL -#define pci_ss_list_8086_2990 NULL +#define pci_ss_list_8086_2983 NULL +#define pci_ss_list_8086_2984 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2990[] = { + &pci_ss_info_8086_2990_1028_01da, + NULL +}; #define pci_ss_list_8086_2991 NULL #define pci_ss_list_8086_2992 NULL #define pci_ss_list_8086_2993 NULL @@ -60178,22 +68967,50 @@ static const pciSubsystemInfo *pci_ss_list_8086_283e[] = { #define pci_ss_list_8086_2995 NULL #define pci_ss_list_8086_2996 NULL #define pci_ss_list_8086_2997 NULL -#define pci_ss_list_8086_29a0 NULL +static const pciSubsystemInfo *pci_ss_list_8086_29a0[] = { + &pci_ss_info_8086_29a0_1043_81ea, + &pci_ss_info_8086_29a0_1462_7276, + NULL +}; #define pci_ss_list_8086_29a1 NULL -#define pci_ss_list_8086_29a2 NULL +static const pciSubsystemInfo *pci_ss_list_8086_29a2[] = { + &pci_ss_info_8086_29a2_1462_7276, + NULL +}; #define pci_ss_list_8086_29a3 NULL #define pci_ss_list_8086_29a4 NULL #define pci_ss_list_8086_29a5 NULL #define pci_ss_list_8086_29a6 NULL #define pci_ss_list_8086_29a7 NULL -#define pci_ss_list_8086_29b0 NULL -#define pci_ss_list_8086_29b1 NULL -#define pci_ss_list_8086_29b2 NULL -#define pci_ss_list_8086_29b3 NULL -#define pci_ss_list_8086_29b4 NULL +static const pciSubsystemInfo *pci_ss_list_8086_29b0[] = { + &pci_ss_info_8086_29b0_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_29b1[] = { + &pci_ss_info_8086_29b1_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_29b2[] = { + &pci_ss_info_8086_29b2_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_29b3[] = { + &pci_ss_info_8086_29b3_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_29b4[] = { + &pci_ss_info_8086_29b4_1028_0211, + NULL +}; #define pci_ss_list_8086_29b5 NULL -#define pci_ss_list_8086_29b6 NULL -#define pci_ss_list_8086_29b7 NULL +static const pciSubsystemInfo *pci_ss_list_8086_29b6[] = { + &pci_ss_info_8086_29b6_1028_0211, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_29b7[] = { + &pci_ss_info_8086_29b7_1028_0211, + NULL +}; #define pci_ss_list_8086_29c0 NULL #define pci_ss_list_8086_29c1 NULL #define pci_ss_list_8086_29c2 NULL @@ -60225,25 +69042,138 @@ static const pciSubsystemInfo *pci_ss_list_8086_283e[] = { #define pci_ss_list_8086_29f6 NULL #define pci_ss_list_8086_29f7 NULL #define pci_ss_list_8086_29f9 NULL -#define pci_ss_list_8086_2a00 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2a00[] = { + &pci_ss_info_8086_2a00_1028_01f3, + &pci_ss_info_8086_2a00_103c_30c0, + &pci_ss_info_8086_2a00_104d_9005, + &pci_ss_info_8086_2a00_17aa_20b1, + &pci_ss_info_8086_2a00_e4bf_cc47, + NULL +}; #define pci_ss_list_8086_2a01 NULL -#define pci_ss_list_8086_2a02 NULL -#define pci_ss_list_8086_2a03 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2a02[] = { + &pci_ss_info_8086_2a02_1028_01f3, + &pci_ss_info_8086_2a02_1028_01f9, + &pci_ss_info_8086_2a02_103c_30c0, + &pci_ss_info_8086_2a02_e4bf_cc47, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2a03[] = { + &pci_ss_info_8086_2a03_1028_01f3, + &pci_ss_info_8086_2a03_103c_30c0, + &pci_ss_info_8086_2a03_e4bf_cc47, + NULL +}; #define pci_ss_list_8086_2a04 NULL #define pci_ss_list_8086_2a05 NULL #define pci_ss_list_8086_2a06 NULL #define pci_ss_list_8086_2a07 NULL -#define pci_ss_list_8086_3092 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2a10[] = { + &pci_ss_info_8086_2a10_e4bf_cc47, + NULL +}; +#define pci_ss_list_8086_2a11 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2a12[] = { + &pci_ss_info_8086_2a12_e4bf_cc47, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2a13[] = { + &pci_ss_info_8086_2a13_e4bf_cc47, + NULL +}; +#define pci_ss_list_8086_2a14 NULL +#define pci_ss_list_8086_2a15 NULL +#define pci_ss_list_8086_2a16 NULL +#define pci_ss_list_8086_2a17 NULL +#define pci_ss_list_8086_2a40 NULL +#define pci_ss_list_8086_2a41 NULL +#define pci_ss_list_8086_2a42 NULL +#define pci_ss_list_8086_2a43 NULL +#define pci_ss_list_8086_2a44 NULL +#define pci_ss_list_8086_2a45 NULL +#define pci_ss_list_8086_2a46 NULL +#define pci_ss_list_8086_2a47 NULL +#define pci_ss_list_8086_2a50 NULL +#define pci_ss_list_8086_2a51 NULL +#define pci_ss_list_8086_2a52 NULL +#define pci_ss_list_8086_2a53 NULL +#define pci_ss_list_8086_2c01 NULL +#define pci_ss_list_8086_2c10 NULL +#define pci_ss_list_8086_2c11 NULL +#define pci_ss_list_8086_2c14 NULL +#define pci_ss_list_8086_2c15 NULL +#define pci_ss_list_8086_2c18 NULL +#define pci_ss_list_8086_2c19 NULL +#define pci_ss_list_8086_2c1a NULL +#define pci_ss_list_8086_2c1c NULL +#define pci_ss_list_8086_2c20 NULL +#define pci_ss_list_8086_2c21 NULL +#define pci_ss_list_8086_2c22 NULL +#define pci_ss_list_8086_2c23 NULL +#define pci_ss_list_8086_2c28 NULL +#define pci_ss_list_8086_2c29 NULL +#define pci_ss_list_8086_2c2a NULL +#define pci_ss_list_8086_2c2b NULL +#define pci_ss_list_8086_2c30 NULL +#define pci_ss_list_8086_2c31 NULL +#define pci_ss_list_8086_2c32 NULL +#define pci_ss_list_8086_2c33 NULL +#define pci_ss_list_8086_2c40 NULL +#define pci_ss_list_8086_2e00 NULL +#define pci_ss_list_8086_2e01 NULL +#define pci_ss_list_8086_2e02 NULL +#define pci_ss_list_8086_2e03 NULL +#define pci_ss_list_8086_2e04 NULL +#define pci_ss_list_8086_2e05 NULL +#define pci_ss_list_8086_2e06 NULL +#define pci_ss_list_8086_2e07 NULL +#define pci_ss_list_8086_2e10 NULL +#define pci_ss_list_8086_2e11 NULL +#define pci_ss_list_8086_2e12 NULL +#define pci_ss_list_8086_2e13 NULL +#define pci_ss_list_8086_2e14 NULL +#define pci_ss_list_8086_2e15 NULL +#define pci_ss_list_8086_2e16 NULL +#define pci_ss_list_8086_2e17 NULL +#define pci_ss_list_8086_2e20 NULL +#define pci_ss_list_8086_2e21 NULL +#define pci_ss_list_8086_2e22 NULL +#define pci_ss_list_8086_2e23 NULL +#define pci_ss_list_8086_2e24 NULL +#define pci_ss_list_8086_2e25 NULL +#define pci_ss_list_8086_2e26 NULL +#define pci_ss_list_8086_2e27 NULL +#define pci_ss_list_8086_2e30 NULL +#define pci_ss_list_8086_2e31 NULL +#define pci_ss_list_8086_2e32 NULL +#define pci_ss_list_8086_2e33 NULL +#define pci_ss_list_8086_2e34 NULL +#define pci_ss_list_8086_2e35 NULL +#define pci_ss_list_8086_2e36 NULL +#define pci_ss_list_8086_2e37 NULL +#define pci_ss_list_8086_2e40 NULL +#define pci_ss_list_8086_2e41 NULL +#define pci_ss_list_8086_2e42 NULL +#define pci_ss_list_8086_2e43 NULL +#define pci_ss_list_8086_2e44 NULL +#define pci_ss_list_8086_2e45 NULL +#define pci_ss_list_8086_2e46 NULL +#define pci_ss_list_8086_2e47 NULL static const pciSubsystemInfo *pci_ss_list_8086_3200[] = { &pci_ss_info_8086_3200_1775_c200, NULL }; +#define pci_ss_list_8086_3313 NULL +#define pci_ss_list_8086_331b NULL +#define pci_ss_list_8086_3331 NULL +#define pci_ss_list_8086_3339 NULL static const pciSubsystemInfo *pci_ss_list_8086_3340[] = { &pci_ss_info_8086_3340_1014_0529, &pci_ss_info_8086_3340_1025_005a, &pci_ss_info_8086_3340_103c_088c, &pci_ss_info_8086_3340_103c_0890, &pci_ss_info_8086_3340_103c_08b0, + &pci_ss_info_8086_3340_144d_c005, &pci_ss_info_8086_3340_144d_c00c, NULL }; @@ -60251,6 +69181,49 @@ static const pciSubsystemInfo *pci_ss_list_8086_3341[] = { &pci_ss_info_8086_3341_144d_c00c, NULL }; +#define pci_ss_list_8086_3363 NULL +#define pci_ss_list_8086_33c3 NULL +#define pci_ss_list_8086_33cb NULL +#define pci_ss_list_8086_3400 NULL +#define pci_ss_list_8086_3401 NULL +#define pci_ss_list_8086_3402 NULL +#define pci_ss_list_8086_3403 NULL +#define pci_ss_list_8086_3404 NULL +#define pci_ss_list_8086_3405 NULL +#define pci_ss_list_8086_3406 NULL +#define pci_ss_list_8086_3407 NULL +#define pci_ss_list_8086_3408 NULL +#define pci_ss_list_8086_3409 NULL +#define pci_ss_list_8086_340a NULL +#define pci_ss_list_8086_340b NULL +#define pci_ss_list_8086_340c NULL +#define pci_ss_list_8086_340d NULL +#define pci_ss_list_8086_340e NULL +#define pci_ss_list_8086_340f NULL +#define pci_ss_list_8086_3410 NULL +#define pci_ss_list_8086_3411 NULL +#define pci_ss_list_8086_3418 NULL +#define pci_ss_list_8086_3419 NULL +#define pci_ss_list_8086_3420 NULL +#define pci_ss_list_8086_3421 NULL +#define pci_ss_list_8086_3422 NULL +#define pci_ss_list_8086_3423 NULL +#define pci_ss_list_8086_3425 NULL +#define pci_ss_list_8086_3426 NULL +#define pci_ss_list_8086_3427 NULL +#define pci_ss_list_8086_3428 NULL +#define pci_ss_list_8086_3429 NULL +#define pci_ss_list_8086_342a NULL +#define pci_ss_list_8086_342b NULL +#define pci_ss_list_8086_342c NULL +#define pci_ss_list_8086_342d NULL +#define pci_ss_list_8086_342e NULL +#define pci_ss_list_8086_342f NULL +#define pci_ss_list_8086_3430 NULL +#define pci_ss_list_8086_3431 NULL +#define pci_ss_list_8086_3432 NULL +#define pci_ss_list_8086_3433 NULL +#define pci_ss_list_8086_3438 NULL #define pci_ss_list_8086_3500 NULL #define pci_ss_list_8086_3501 NULL #define pci_ss_list_8086_3504 NULL @@ -60278,8 +69251,11 @@ static const pciSubsystemInfo *pci_ss_list_8086_3577[] = { static const pciSubsystemInfo *pci_ss_list_8086_3580[] = { &pci_ss_info_8086_3580_1014_055c, &pci_ss_info_8086_3580_1028_0139, + &pci_ss_info_8086_3580_1028_014f, &pci_ss_info_8086_3580_1028_0163, + &pci_ss_info_8086_3580_1028_018d, &pci_ss_info_8086_3580_1028_0196, + &pci_ss_info_8086_3580_114a_0582, &pci_ss_info_8086_3580_1734_1055, &pci_ss_info_8086_3580_1775_10d0, &pci_ss_info_8086_3580_1775_ce90, @@ -60296,7 +69272,10 @@ static const pciSubsystemInfo *pci_ss_list_8086_3581[] = { static const pciSubsystemInfo *pci_ss_list_8086_3582[] = { &pci_ss_info_8086_3582_1014_0562, &pci_ss_info_8086_3582_1028_0139, + &pci_ss_info_8086_3582_1028_014f, &pci_ss_info_8086_3582_1028_0163, + &pci_ss_info_8086_3582_1028_018d, + &pci_ss_info_8086_3582_114a_0582, &pci_ss_info_8086_3582_1775_10d0, &pci_ss_info_8086_3582_1775_ce90, &pci_ss_info_8086_3582_4c53_10b0, @@ -60308,8 +69287,11 @@ static const pciSubsystemInfo *pci_ss_list_8086_3582[] = { static const pciSubsystemInfo *pci_ss_list_8086_3584[] = { &pci_ss_info_8086_3584_1014_055d, &pci_ss_info_8086_3584_1028_0139, + &pci_ss_info_8086_3584_1028_014f, &pci_ss_info_8086_3584_1028_0163, + &pci_ss_info_8086_3584_1028_018d, &pci_ss_info_8086_3584_1028_0196, + &pci_ss_info_8086_3584_114a_0582, &pci_ss_info_8086_3584_1734_1055, &pci_ss_info_8086_3584_1775_10d0, &pci_ss_info_8086_3584_1775_ce90, @@ -60320,8 +69302,11 @@ static const pciSubsystemInfo *pci_ss_list_8086_3584[] = { static const pciSubsystemInfo *pci_ss_list_8086_3585[] = { &pci_ss_info_8086_3585_1014_055e, &pci_ss_info_8086_3585_1028_0139, + &pci_ss_info_8086_3585_1028_014f, &pci_ss_info_8086_3585_1028_0163, + &pci_ss_info_8086_3585_1028_018d, &pci_ss_info_8086_3585_1028_0196, + &pci_ss_info_8086_3585_114a_0582, &pci_ss_info_8086_3585_1734_1055, &pci_ss_info_8086_3585_1775_10d0, &pci_ss_info_8086_3585_1775_ce90, @@ -60330,12 +69315,17 @@ static const pciSubsystemInfo *pci_ss_list_8086_3585[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_8086_3590[] = { + &pci_ss_info_8086_3590_1014_02dd, + &pci_ss_info_8086_3590_1028_016c, + &pci_ss_info_8086_3590_1028_016d, &pci_ss_info_8086_3590_1028_019a, &pci_ss_info_8086_3590_1734_103e, + &pci_ss_info_8086_3590_1775_1100, &pci_ss_info_8086_3590_4c53_10d0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_3591[] = { + &pci_ss_info_8086_3591_1014_02dd, &pci_ss_info_8086_3591_1028_0169, &pci_ss_info_8086_3591_4c53_10d0, NULL @@ -60343,16 +69333,32 @@ static const pciSubsystemInfo *pci_ss_list_8086_3591[] = { #define pci_ss_list_8086_3592 NULL #define pci_ss_list_8086_3593 NULL static const pciSubsystemInfo *pci_ss_list_8086_3594[] = { + &pci_ss_info_8086_3594_1775_1100, &pci_ss_info_8086_3594_4c53_10d0, NULL }; -#define pci_ss_list_8086_3595 NULL +static const pciSubsystemInfo *pci_ss_list_8086_3595[] = { + &pci_ss_info_8086_3595_1775_1100, + NULL +}; #define pci_ss_list_8086_3596 NULL -#define pci_ss_list_8086_3597 NULL -#define pci_ss_list_8086_3598 NULL -#define pci_ss_list_8086_3599 NULL +static const pciSubsystemInfo *pci_ss_list_8086_3597[] = { + &pci_ss_info_8086_3597_1775_1100, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_3598[] = { + &pci_ss_info_8086_3598_1775_1100, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_3599[] = { + &pci_ss_info_8086_3599_1775_1100, + NULL +}; #define pci_ss_list_8086_359a NULL -#define pci_ss_list_8086_359b NULL +static const pciSubsystemInfo *pci_ss_list_8086_359b[] = { + &pci_ss_info_8086_359b_1014_02dd, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_359e[] = { &pci_ss_info_8086_359e_1028_0169, NULL @@ -60377,9 +69383,59 @@ static const pciSubsystemInfo *pci_ss_list_8086_359e[] = { #define pci_ss_list_8086_360e NULL #define pci_ss_list_8086_360f NULL #define pci_ss_list_8086_3610 NULL +#define pci_ss_list_8086_3a00 NULL +#define pci_ss_list_8086_3a02 NULL +#define pci_ss_list_8086_3a05 NULL +#define pci_ss_list_8086_3a06 NULL +#define pci_ss_list_8086_3a14 NULL +#define pci_ss_list_8086_3a16 NULL +#define pci_ss_list_8086_3a18 NULL +#define pci_ss_list_8086_3a1a NULL +#define pci_ss_list_8086_3a20 NULL +#define pci_ss_list_8086_3a22 NULL +#define pci_ss_list_8086_3a25 NULL +#define pci_ss_list_8086_3a26 NULL +#define pci_ss_list_8086_3a30 NULL +#define pci_ss_list_8086_3a32 NULL +#define pci_ss_list_8086_3a34 NULL +#define pci_ss_list_8086_3a35 NULL +#define pci_ss_list_8086_3a36 NULL +#define pci_ss_list_8086_3a37 NULL +#define pci_ss_list_8086_3a38 NULL +#define pci_ss_list_8086_3a39 NULL +#define pci_ss_list_8086_3a3a NULL +#define pci_ss_list_8086_3a3c NULL +#define pci_ss_list_8086_3a3e NULL +#define pci_ss_list_8086_3a40 NULL +#define pci_ss_list_8086_3a42 NULL +#define pci_ss_list_8086_3a44 NULL +#define pci_ss_list_8086_3a46 NULL +#define pci_ss_list_8086_3a48 NULL +#define pci_ss_list_8086_3a4a NULL +#define pci_ss_list_8086_3a4c NULL +#define pci_ss_list_8086_3a51 NULL +#define pci_ss_list_8086_3a55 NULL +#define pci_ss_list_8086_3a60 NULL +#define pci_ss_list_8086_3a62 NULL +#define pci_ss_list_8086_3a64 NULL +#define pci_ss_list_8086_3a65 NULL +#define pci_ss_list_8086_3a66 NULL +#define pci_ss_list_8086_3a67 NULL +#define pci_ss_list_8086_3a68 NULL +#define pci_ss_list_8086_3a69 NULL +#define pci_ss_list_8086_3a6a NULL +#define pci_ss_list_8086_3a6c NULL +#define pci_ss_list_8086_3a6e NULL +#define pci_ss_list_8086_3a70 NULL +#define pci_ss_list_8086_3a72 NULL +#define pci_ss_list_8086_3a74 NULL +#define pci_ss_list_8086_3a76 NULL +#define pci_ss_list_8086_3a78 NULL +#define pci_ss_list_8086_3a7a NULL +#define pci_ss_list_8086_3a7c NULL #define pci_ss_list_8086_4000 NULL -#define pci_ss_list_8086_4008 NULL -#define pci_ss_list_8086_4010 NULL +#define pci_ss_list_8086_4001 NULL +#define pci_ss_list_8086_4003 NULL #define pci_ss_list_8086_4021 NULL #define pci_ss_list_8086_4022 NULL #define pci_ss_list_8086_4023 NULL @@ -60393,21 +69449,30 @@ static const pciSubsystemInfo *pci_ss_list_8086_359e[] = { #define pci_ss_list_8086_402e NULL #define pci_ss_list_8086_402f NULL #define pci_ss_list_8086_4030 NULL +#define pci_ss_list_8086_4031 NULL #define pci_ss_list_8086_4032 NULL #define pci_ss_list_8086_4035 NULL #define pci_ss_list_8086_4036 NULL static const pciSubsystemInfo *pci_ss_list_8086_4220[] = { - &pci_ss_info_8086_4220_2731_8086, + &pci_ss_info_8086_4220_103c_0934, + &pci_ss_info_8086_4220_103c_12f6, + &pci_ss_info_8086_4220_8086_2721, &pci_ss_info_8086_4220_8086_2731, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_4222[] = { + &pci_ss_info_8086_4222_103c_135c, + &pci_ss_info_8086_4222_103c_30c0, &pci_ss_info_8086_4222_8086_1005, &pci_ss_info_8086_4222_8086_1034, &pci_ss_info_8086_4222_8086_1044, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_4223[] = { + &pci_ss_info_8086_4223_1000_8086, + &pci_ss_info_8086_4223_1001_8086, + &pci_ss_info_8086_4223_1002_8086, + &pci_ss_info_8086_4223_1003_8086, &pci_ss_info_8086_4223_1351_103c, NULL }; @@ -60417,7 +69482,57 @@ static const pciSubsystemInfo *pci_ss_list_8086_4227[] = { &pci_ss_info_8086_4227_8086_1014, NULL }; +#define pci_ss_list_8086_4229 NULL +static const pciSubsystemInfo *pci_ss_list_8086_4230[] = { + &pci_ss_info_8086_4230_8086_1110, + &pci_ss_info_8086_4230_8086_1111, + NULL +}; +#define pci_ss_list_8086_444e NULL #define pci_ss_list_8086_5001 NULL +#define pci_ss_list_8086_5002 NULL +#define pci_ss_list_8086_5009 NULL +#define pci_ss_list_8086_500d NULL +#define pci_ss_list_8086_500e NULL +#define pci_ss_list_8086_500f NULL +#define pci_ss_list_8086_5010 NULL +#define pci_ss_list_8086_5012 NULL +#define pci_ss_list_8086_5020 NULL +#define pci_ss_list_8086_5021 NULL +#define pci_ss_list_8086_5023 NULL +#define pci_ss_list_8086_5024 NULL +#define pci_ss_list_8086_5025 NULL +#define pci_ss_list_8086_5028 NULL +#define pci_ss_list_8086_5029 NULL +#define pci_ss_list_8086_502a NULL +#define pci_ss_list_8086_502b NULL +#define pci_ss_list_8086_502c NULL +#define pci_ss_list_8086_5030 NULL +#define pci_ss_list_8086_5031 NULL +#define pci_ss_list_8086_5032 NULL +#define pci_ss_list_8086_5033 NULL +#define pci_ss_list_8086_5035 NULL +#define pci_ss_list_8086_5037 NULL +#define pci_ss_list_8086_5039 NULL +#define pci_ss_list_8086_503a NULL +#define pci_ss_list_8086_503b NULL +#define pci_ss_list_8086_503c NULL +#define pci_ss_list_8086_503d NULL +#define pci_ss_list_8086_503e NULL +#define pci_ss_list_8086_503f NULL +#define pci_ss_list_8086_5040 NULL +#define pci_ss_list_8086_5041 NULL +#define pci_ss_list_8086_5042 NULL +#define pci_ss_list_8086_5043 NULL +#define pci_ss_list_8086_5044 NULL +#define pci_ss_list_8086_5045 NULL +#define pci_ss_list_8086_5046 NULL +#define pci_ss_list_8086_5047 NULL +#define pci_ss_list_8086_5048 NULL +#define pci_ss_list_8086_5049 NULL +#define pci_ss_list_8086_504a NULL +#define pci_ss_list_8086_504b NULL +#define pci_ss_list_8086_504c NULL #define pci_ss_list_8086_5200 NULL static const pciSubsystemInfo *pci_ss_list_8086_5201[] = { &pci_ss_info_8086_5201_8086_0001, @@ -60431,8 +69546,15 @@ static const pciSubsystemInfo *pci_ss_list_8086_5201[] = { #define pci_ss_list_8086_65e5 NULL #define pci_ss_list_8086_65e6 NULL #define pci_ss_list_8086_65e7 NULL -#define pci_ss_list_8086_65f0 NULL -#define pci_ss_list_8086_65f1 NULL +static const pciSubsystemInfo *pci_ss_list_8086_65f0[] = { + &pci_ss_info_8086_65f0_1028_020f, + &pci_ss_info_8086_65f0_1028_0210, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_65f1[] = { + &pci_ss_info_8086_65f1_1028_0210, + NULL +}; #define pci_ss_list_8086_65f3 NULL #define pci_ss_list_8086_65f5 NULL #define pci_ss_list_8086_65f6 NULL @@ -60477,8 +69599,14 @@ static const pciSubsystemInfo *pci_ss_list_8086_7121[] = { }; #define pci_ss_list_8086_7122 NULL #define pci_ss_list_8086_7123 NULL -#define pci_ss_list_8086_7124 NULL -#define pci_ss_list_8086_7125 NULL +static const pciSubsystemInfo *pci_ss_list_8086_7124[] = { + &pci_ss_info_8086_7124_1028_00b4, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_7125[] = { + &pci_ss_info_8086_7125_1028_00b4, + NULL +}; #define pci_ss_list_8086_7126 NULL #define pci_ss_list_8086_7128 NULL #define pci_ss_list_8086_712a NULL @@ -60488,6 +69616,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_7190[] = { &pci_ss_info_8086_7190_0e11_0500, &pci_ss_info_8086_7190_0e11_b110, &pci_ss_info_8086_7190_1028_008e, + &pci_ss_info_8086_7190_1043_803b, &pci_ss_info_8086_7190_1179_0001, &pci_ss_info_8086_7190_15ad_1976, &pci_ss_info_8086_7190_4c53_1050, @@ -60501,6 +69630,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_7191[] = { static const pciSubsystemInfo *pci_ss_list_8086_7192[] = { &pci_ss_info_8086_7192_0e11_0460, &pci_ss_info_8086_7192_4c53_1000, + &pci_ss_info_8086_7192_8086_7190, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_7194[] = { @@ -60545,6 +69675,22 @@ static const pciSubsystemInfo *pci_ss_list_8086_7800[] = { NULL }; #define pci_ss_list_8086_8002 NULL +#define pci_ss_list_8086_8003 NULL +#define pci_ss_list_8086_8100 NULL +#define pci_ss_list_8086_8108 NULL +#define pci_ss_list_8086_8110 NULL +#define pci_ss_list_8086_8112 NULL +#define pci_ss_list_8086_8114 NULL +#define pci_ss_list_8086_8115 NULL +#define pci_ss_list_8086_8116 NULL +#define pci_ss_list_8086_8117 NULL +#define pci_ss_list_8086_8118 NULL +#define pci_ss_list_8086_8119 NULL +#define pci_ss_list_8086_811a NULL +#define pci_ss_list_8086_811b NULL +#define pci_ss_list_8086_811c NULL +#define pci_ss_list_8086_811d NULL +#define pci_ss_list_8086_811e NULL #define pci_ss_list_8086_84c4 NULL #define pci_ss_list_8086_84c5 NULL #define pci_ss_list_8086_84ca NULL @@ -60803,6 +69949,8 @@ static const pciSubsystemInfo *pci_ss_list_9005_00cf[] = { NULL }; #define pci_ss_list_9005_0241 NULL +#define pci_ss_list_9005_0242 NULL +#define pci_ss_list_9005_0243 NULL static const pciSubsystemInfo *pci_ss_list_9005_0250[] = { &pci_ss_info_9005_0250_1014_0279, &pci_ss_info_9005_0250_1014_028c, @@ -60823,6 +69971,14 @@ static const pciSubsystemInfo *pci_ss_list_9005_0285[] = { &pci_ss_info_9005_0285_1028_0287, &pci_ss_info_9005_0285_1028_0291, &pci_ss_info_9005_0285_103c_3227, + &pci_ss_info_9005_0285_108e_0286, + &pci_ss_info_9005_0285_108e_0287, + &pci_ss_info_9005_0285_108e_7aac, + &pci_ss_info_9005_0285_108e_7aae, + &pci_ss_info_9005_0285_15d9_02b5, + &pci_ss_info_9005_0285_15d9_02b6, + &pci_ss_info_9005_0285_15d9_02c9, + &pci_ss_info_9005_0285_15d9_02ca, &pci_ss_info_9005_0285_17aa_0286, &pci_ss_info_9005_0285_17aa_0287, &pci_ss_info_9005_0285_9005_0285, @@ -60865,6 +70021,10 @@ static const pciSubsystemInfo *pci_ss_list_9005_0285[] = { &pci_ss_info_9005_0285_9005_02c6, &pci_ss_info_9005_0285_9005_02c7, &pci_ss_info_9005_0285_9005_02c8, + &pci_ss_info_9005_0285_9005_02ce, + &pci_ss_info_9005_0285_9005_02cf, + &pci_ss_info_9005_0285_9005_02d0, + &pci_ss_info_9005_0285_9005_02d1, NULL }; static const pciSubsystemInfo *pci_ss_list_9005_0286[] = { @@ -60905,6 +70065,8 @@ static const pciSubsystemInfo *pci_ss_list_9005_0412[] = { &pci_ss_info_9005_0412_9005_0413, NULL }; +#define pci_ss_list_9005_0415 NULL +#define pci_ss_list_9005_0416 NULL #define pci_ss_list_9005_041e NULL static const pciSubsystemInfo *pci_ss_list_9005_041f[] = { &pci_ss_info_9005_041f_9005_041f, @@ -60927,6 +70089,7 @@ static const pciSubsystemInfo *pci_ss_list_9005_0500[] = { }; static const pciSubsystemInfo *pci_ss_list_9005_0503[] = { &pci_ss_info_9005_0503_1014_02bf, + &pci_ss_info_9005_0503_1014_02c3, &pci_ss_info_9005_0503_1014_02d5, NULL }; @@ -60951,7 +70114,10 @@ static const pciSubsystemInfo *pci_ss_list_9005_8017[] = { NULL }; #define pci_ss_list_9005_801c NULL -#define pci_ss_list_9005_801d NULL +static const pciSubsystemInfo *pci_ss_list_9005_801d[] = { + &pci_ss_info_9005_801d_1014_02cc, + NULL +}; #define pci_ss_list_9005_801e NULL static const pciSubsystemInfo *pci_ss_list_9005_801f[] = { &pci_ss_info_9005_801f_1734_1011, @@ -60968,7 +70134,10 @@ static const pciSubsystemInfo *pci_ss_list_9005_801f[] = { #define pci_ss_list_9005_8096 NULL #define pci_ss_list_9005_8097 NULL #define pci_ss_list_9005_809c NULL -#define pci_ss_list_9005_809d NULL +static const pciSubsystemInfo *pci_ss_list_9005_809d[] = { + &pci_ss_info_9005_809d_1014_02cc, + NULL +}; #define pci_ss_list_9005_809e NULL #define pci_ss_list_9005_809f NULL #endif @@ -61007,13 +70176,15 @@ static const pciSubsystemInfo *pci_ss_list_9710_9855[] = { #define pci_ss_list_cafe_0003 NULL #define pci_ss_list_cddd_0101 NULL #define pci_ss_list_cddd_0200 NULL +#define pci_ss_list_d161_0120 NULL #define pci_ss_list_d161_0205 NULL #define pci_ss_list_d161_0210 NULL #define pci_ss_list_d161_0405 NULL -#define pci_ss_list_d161_0406 NULL #define pci_ss_list_d161_0410 NULL -#define pci_ss_list_d161_0411 NULL +#define pci_ss_list_d161_0800 NULL #define pci_ss_list_d161_2400 NULL +#define pci_ss_list_d161_3400 NULL +#define pci_ss_list_d161_b410 NULL #define pci_ss_list_d4d4_0601 NULL #define pci_ss_list_deaf_9050 NULL #define pci_ss_list_deaf_9051 NULL @@ -61151,6 +70322,12 @@ static const pciSubsystemInfo *pci_ss_list_0270[] = { #endif #define pci_ss_list_0291 NULL #define pci_ss_list_02ac NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_02e0[] = { + &pci_ss_info_02e0_2249, + NULL +}; +#endif #define pci_ss_list_0315 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_0357[] = { @@ -61164,6 +70341,7 @@ static const pciSubsystemInfo *pci_ss_list_0357[] = { #define pci_ss_list_0482 NULL #define pci_ss_list_04cf NULL #define pci_ss_list_050d NULL +#define pci_ss_list_058f NULL #define pci_ss_list_05a9 NULL #define pci_ss_list_05e3 NULL #define pci_ss_list_066f NULL @@ -61255,6 +70433,7 @@ static const pciSubsystemInfo *pci_ss_list_0e11[] = { &pci_ss_info_0e11_4080, &pci_ss_info_0e11_4082, &pci_ss_info_0e11_4083, + &pci_ss_info_0e11_4091, &pci_ss_info_0e11_409a, &pci_ss_info_0e11_409b, &pci_ss_info_0e11_409c, @@ -61353,17 +70532,24 @@ static const pciSubsystemInfo *pci_ss_list_1000[] = { &pci_ss_info_1000_1010, &pci_ss_info_1000_1011, &pci_ss_info_1000_1012, + &pci_ss_info_1000_1016, &pci_ss_info_1000_1020, &pci_ss_info_1000_2004, &pci_ss_info_1000_2005, &pci_ss_info_1000_3004, &pci_ss_info_1000_3008, &pci_ss_info_1000_4523, + &pci_ss_info_1000_8086, &pci_ss_info_1000_a520, NULL }; #endif -#define pci_ss_list_1001 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1001[] = { + &pci_ss_info_1001_8086, + NULL +}; +#endif static const pciSubsystemInfo *pci_ss_list_1002[] = { &pci_ss_info_1002_0001, &pci_ss_info_1002_0002, @@ -61402,6 +70588,7 @@ static const pciSubsystemInfo *pci_ss_list_1002[] = { &pci_ss_info_1002_0139, &pci_ss_info_1002_013a, &pci_ss_info_1002_0152, + &pci_ss_info_1002_0155, &pci_ss_info_1002_0162, &pci_ss_info_1002_0172, &pci_ss_info_1002_028a, @@ -61419,9 +70606,11 @@ static const pciSubsystemInfo *pci_ss_list_1002[] = { &pci_ss_info_1002_2000, &pci_ss_info_1002_2001, &pci_ss_info_1002_2f72, + &pci_ss_info_1002_3000, &pci_ss_info_1002_4336, &pci_ss_info_1002_4379, &pci_ss_info_1002_437a, + &pci_ss_info_1002_437b, &pci_ss_info_1002_4722, &pci_ss_info_1002_4723, &pci_ss_info_1002_4742, @@ -61440,6 +70629,8 @@ static const pciSubsystemInfo *pci_ss_list_1002[] = { &pci_ss_info_1002_4c42, &pci_ss_info_1002_4c49, &pci_ss_info_1002_4c50, + &pci_ss_info_1002_4e4a, + &pci_ss_info_1002_4e6a, &pci_ss_info_1002_4e71, &pci_ss_info_1002_515e, &pci_ss_info_1002_5654, @@ -61450,10 +70641,18 @@ static const pciSubsystemInfo *pci_ss_list_1002[] = { &pci_ss_info_1002_5c63, &pci_ss_info_1002_8001, &pci_ss_info_1002_8008, + &pci_ss_info_1002_8086, + &pci_ss_info_1002_94c3, + &pci_ss_info_1002_94c9, &pci_ss_info_1002_a101, NULL }; -#define pci_ss_list_1003 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1003[] = { + &pci_ss_info_1003_8086, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1004[] = { &pci_ss_info_1004_0304, @@ -61475,7 +70674,14 @@ static const pciSubsystemInfo *pci_ss_list_100a[] = { NULL }; #endif -#define pci_ss_list_100b NULL +static const pciSubsystemInfo *pci_ss_list_100b[] = { + &pci_ss_info_100b_0500, + &pci_ss_info_100b_0501, + &pci_ss_info_100b_0502, + &pci_ss_info_100b_0503, + &pci_ss_info_100b_0505, + NULL +}; #define pci_ss_list_100c NULL #define pci_ss_list_100d NULL #define pci_ss_list_100e NULL @@ -61534,6 +70740,7 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = { &pci_ss_info_1014_0148, &pci_ss_info_1014_0153, &pci_ss_info_1014_0154, + &pci_ss_info_1014_0155, &pci_ss_info_1014_0166, &pci_ss_info_1014_016d, &pci_ss_info_1014_017f, @@ -61606,18 +70813,29 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = { &pci_ss_info_1014_02c0, &pci_ss_info_1014_02c1, &pci_ss_info_1014_02c2, + &pci_ss_info_1014_02c3, &pci_ss_info_1014_02c6, &pci_ss_info_1014_02c8, + &pci_ss_info_1014_02cc, &pci_ss_info_1014_02d3, &pci_ss_info_1014_02d4, &pci_ss_info_1014_02d5, + &pci_ss_info_1014_02dd, &pci_ss_info_1014_02ed, &pci_ss_info_1014_02f2, + &pci_ss_info_1014_0304, + &pci_ss_info_1014_030a, &pci_ss_info_1014_030d, + &pci_ss_info_1014_0338, + &pci_ss_info_1014_033a, &pci_ss_info_1014_034d, + &pci_ss_info_1014_0360, &pci_ss_info_1014_0363, &pci_ss_info_1014_0364, &pci_ss_info_1014_0365, + &pci_ss_info_1014_0379, + &pci_ss_info_1014_0395, + &pci_ss_info_1014_03a1, &pci_ss_info_1014_0502, &pci_ss_info_1014_0503, &pci_ss_info_1014_0506, @@ -61632,6 +70850,7 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = { &pci_ss_info_1014_051c, &pci_ss_info_1014_0522, &pci_ss_info_1014_0524, + &pci_ss_info_1014_0525, &pci_ss_info_1014_0528, &pci_ss_info_1014_0529, &pci_ss_info_1014_052c, @@ -61648,6 +70867,7 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = { &pci_ss_info_1014_0545, &pci_ss_info_1014_0549, &pci_ss_info_1014_054d, + &pci_ss_info_1014_0552, &pci_ss_info_1014_0556, &pci_ss_info_1014_0559, &pci_ss_info_1014_055c, @@ -61655,8 +70875,10 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = { &pci_ss_info_1014_055e, &pci_ss_info_1014_055f, &pci_ss_info_1014_0562, + &pci_ss_info_1014_0575, &pci_ss_info_1014_058a, &pci_ss_info_1014_0598, + &pci_ss_info_1014_05b7, &pci_ss_info_1014_1010, &pci_ss_info_1014_1025, &pci_ss_info_1014_105c, @@ -61759,12 +70981,15 @@ static const pciSubsystemInfo *pci_ss_list_1025[] = { &pci_ss_info_1025_0009, &pci_ss_info_1025_000e, &pci_ss_info_1025_0018, + &pci_ss_info_1025_0035, &pci_ss_info_1025_003c, &pci_ss_info_1025_004d, &pci_ss_info_1025_005a, &pci_ss_info_1025_006a, + &pci_ss_info_1025_006c, &pci_ss_info_1025_0079, &pci_ss_info_1025_0080, + &pci_ss_info_1025_0091, &pci_ss_info_1025_0310, &pci_ss_info_1025_0315, &pci_ss_info_1025_1003, @@ -61781,6 +71006,7 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = { &pci_ss_info_1028_0002, &pci_ss_info_1028_0003, &pci_ss_info_1028_0004, + &pci_ss_info_1028_000a, &pci_ss_info_1028_0012, &pci_ss_info_1028_0015, &pci_ss_info_1028_002e, @@ -61813,6 +71039,7 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = { &pci_ss_info_1028_009b, &pci_ss_info_1028_00aa, &pci_ss_info_1028_00b1, + &pci_ss_info_1028_00b4, &pci_ss_info_1028_00bb, &pci_ss_info_1028_00c5, &pci_ss_info_1028_00c7, @@ -61838,6 +71065,7 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = { &pci_ss_info_1028_0149, &pci_ss_info_1028_014a, &pci_ss_info_1028_014e, + &pci_ss_info_1028_014f, &pci_ss_info_1028_0151, &pci_ss_info_1028_0156, &pci_ss_info_1028_0163, @@ -61848,11 +71076,13 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = { &pci_ss_info_1028_016e, &pci_ss_info_1028_016f, &pci_ss_info_1028_0170, + &pci_ss_info_1028_0177, &pci_ss_info_1028_0179, &pci_ss_info_1028_0182, &pci_ss_info_1028_0183, &pci_ss_info_1028_0187, &pci_ss_info_1028_0188, + &pci_ss_info_1028_018a, &pci_ss_info_1028_018d, &pci_ss_info_1028_0196, &pci_ss_info_1028_019a, @@ -61860,6 +71090,15 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = { &pci_ss_info_1028_01a2, &pci_ss_info_1028_01ad, &pci_ss_info_1028_01af, + &pci_ss_info_1028_01da, + &pci_ss_info_1028_01df, + &pci_ss_info_1028_01e6, + &pci_ss_info_1028_01f3, + &pci_ss_info_1028_01f9, + &pci_ss_info_1028_020f, + &pci_ss_info_1028_0210, + &pci_ss_info_1028_0211, + &pci_ss_info_1028_021d, &pci_ss_info_1028_0287, &pci_ss_info_1028_0291, &pci_ss_info_1028_0407, @@ -61873,19 +71112,31 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = { &pci_ss_info_1028_0531, &pci_ss_info_1028_0533, &pci_ss_info_1028_1010, + &pci_ss_info_1028_106d, &pci_ss_info_1028_1079, &pci_ss_info_1028_1111, &pci_ss_info_1028_1f01, &pci_ss_info_1028_1f02, &pci_ss_info_1028_1f03, + &pci_ss_info_1028_1f04, + &pci_ss_info_1028_1f05, + &pci_ss_info_1028_1f06, + &pci_ss_info_1028_1f07, + &pci_ss_info_1028_1f08, + &pci_ss_info_1028_1f09, &pci_ss_info_1028_1f0a, &pci_ss_info_1028_1f0b, &pci_ss_info_1028_1f0c, &pci_ss_info_1028_1f0d, + &pci_ss_info_1028_1f0e, + &pci_ss_info_1028_1f0f, + &pci_ss_info_1028_1f10, &pci_ss_info_1028_1f11, + &pci_ss_info_1028_2011, &pci_ss_info_1028_4082, &pci_ss_info_1028_4134, &pci_ss_info_1028_8082, + &pci_ss_info_1028_810b, &pci_ss_info_1028_865d, &pci_ss_info_1028_c082, &pci_ss_info_1028_c134, @@ -61911,6 +71162,7 @@ static const pciSubsystemInfo *pci_ss_list_102b[] = { &pci_ss_info_102b_0850, &pci_ss_info_102b_08c7, &pci_ss_info_102b_0907, + &pci_ss_info_102b_0947, &pci_ss_info_102b_0d41, &pci_ss_info_102b_0d42, &pci_ss_info_102b_0d43, @@ -61941,6 +71193,7 @@ static const pciSubsystemInfo *pci_ss_list_102b[] = { &pci_ss_info_102b_2159, &pci_ss_info_102b_2179, &pci_ss_info_102b_217d, + &pci_ss_info_102b_2300, &pci_ss_info_102b_23c0, &pci_ss_info_102b_23c1, &pci_ss_info_102b_23c2, @@ -62054,6 +71307,7 @@ static const pciSubsystemInfo *pci_ss_list_1033[] = { &pci_ss_info_1033_8112, &pci_ss_info_1033_8287, &pci_ss_info_1033_8336, + &pci_ss_info_1033_835a, NULL }; #define pci_ss_list_1034 NULL @@ -62066,6 +71320,7 @@ static const pciSubsystemInfo *pci_ss_list_1039[] = { &pci_ss_info_1039_0900, &pci_ss_info_1039_5513, &pci_ss_info_1039_6306, + &pci_ss_info_1039_6325, &pci_ss_info_1039_6326, &pci_ss_info_1039_6330, &pci_ss_info_1039_7000, @@ -62087,6 +71342,8 @@ static const pciSubsystemInfo *pci_ss_list_103c[] = { &pci_ss_info_103c_088c, &pci_ss_info_103c_0890, &pci_ss_info_103c_08b0, + &pci_ss_info_103c_0934, + &pci_ss_info_103c_0940, &pci_ss_info_103c_0944, &pci_ss_info_103c_099c, &pci_ss_info_103c_1040, @@ -62122,10 +71379,12 @@ static const pciSubsystemInfo *pci_ss_list_103c[] = { &pci_ss_info_103c_1227, &pci_ss_info_103c_1240, &pci_ss_info_103c_125a, + &pci_ss_info_103c_126f, &pci_ss_info_103c_1279, &pci_ss_info_103c_1282, &pci_ss_info_103c_128a, &pci_ss_info_103c_128b, + &pci_ss_info_103c_1291, &pci_ss_info_103c_1292, &pci_ss_info_103c_12a4, &pci_ss_info_103c_12a6, @@ -62141,15 +71400,23 @@ static const pciSubsystemInfo *pci_ss_list_103c[] = { &pci_ss_info_103c_12d7, &pci_ss_info_103c_12dd, &pci_ss_info_103c_12f4, + &pci_ss_info_103c_12f6, &pci_ss_info_103c_12fa, &pci_ss_info_103c_1300, &pci_ss_info_103c_1301, &pci_ss_info_103c_1330, + &pci_ss_info_103c_1337, &pci_ss_info_103c_1340, &pci_ss_info_103c_1356, + &pci_ss_info_103c_135c, &pci_ss_info_103c_1706, &pci_ss_info_103c_1707, &pci_ss_info_103c_170c, + &pci_ss_info_103c_1716, + &pci_ss_info_103c_1717, + &pci_ss_info_103c_2001, + &pci_ss_info_103c_280a, + &pci_ss_info_103c_2813, &pci_ss_info_103c_2a09, &pci_ss_info_103c_2a0d, &pci_ss_info_103c_3006, @@ -62159,14 +71426,25 @@ static const pciSubsystemInfo *pci_ss_list_103c[] = { &pci_ss_info_103c_308b, &pci_ss_info_103c_309f, &pci_ss_info_103c_30a1, + &pci_ss_info_103c_30a3, + &pci_ss_info_103c_30b5, + &pci_ss_info_103c_30b7, + &pci_ss_info_103c_30c0, + &pci_ss_info_103c_30c1, &pci_ss_info_103c_3100, &pci_ss_info_103c_3101, &pci_ss_info_103c_3102, &pci_ss_info_103c_3103, &pci_ss_info_103c_3109, + &pci_ss_info_103c_310f, + &pci_ss_info_103c_3223, &pci_ss_info_103c_3225, &pci_ss_info_103c_3226, &pci_ss_info_103c_3227, + &pci_ss_info_103c_3234, + &pci_ss_info_103c_3235, + &pci_ss_info_103c_3237, + &pci_ss_info_103c_323d, &pci_ss_info_103c_60e7, &pci_ss_info_103c_7031, &pci_ss_info_103c_7032, @@ -62177,6 +71455,12 @@ static const pciSubsystemInfo *pci_ss_list_103c[] = { &pci_ss_info_103c_703c, &pci_ss_info_103c_703d, &pci_ss_info_103c_7044, + &pci_ss_info_103c_7047, + &pci_ss_info_103c_7048, + &pci_ss_info_103c_704a, + &pci_ss_info_103c_704b, + &pci_ss_info_103c_704e, + &pci_ss_info_103c_704f, &pci_ss_info_103c_7051, &pci_ss_info_103c_7052, &pci_ss_info_103c_def1, @@ -62220,6 +71504,12 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = { &pci_ss_info_1043_120f, &pci_ss_info_1043_130f, &pci_ss_info_1043_1382, + &pci_ss_info_1043_13c4, + &pci_ss_info_1043_1453, + &pci_ss_info_1043_1583, + &pci_ss_info_1043_1622, + &pci_ss_info_1043_1623, + &pci_ss_info_1043_1643, &pci_ss_info_1043_1702, &pci_ss_info_1043_1703, &pci_ss_info_1043_1707, @@ -62255,12 +71545,14 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = { &pci_ss_info_1043_802c, &pci_ss_info_1043_8033, &pci_ss_info_1043_8035, + &pci_ss_info_1043_803b, &pci_ss_info_1043_803e, &pci_ss_info_1043_8040, &pci_ss_info_1043_8042, &pci_ss_info_1043_8044, &pci_ss_info_1043_8052, &pci_ss_info_1043_8053, + &pci_ss_info_1043_8056, &pci_ss_info_1043_8063, &pci_ss_info_1043_8064, &pci_ss_info_1043_806f, @@ -62268,6 +71560,7 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = { &pci_ss_info_1043_807e, &pci_ss_info_1043_807f, &pci_ss_info_1043_8080, + &pci_ss_info_1043_8089, &pci_ss_info_1043_808a, &pci_ss_info_1043_808b, &pci_ss_info_1043_808c, @@ -62297,7 +71590,9 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = { &pci_ss_info_1043_811a, &pci_ss_info_1043_812a, &pci_ss_info_1043_8134, + &pci_ss_info_1043_8137, &pci_ss_info_1043_8138, + &pci_ss_info_1043_813f, &pci_ss_info_1043_8141, &pci_ss_info_1043_8142, &pci_ss_info_1043_8145, @@ -62305,13 +71600,20 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = { &pci_ss_info_1043_814e, &pci_ss_info_1043_815a, &pci_ss_info_1043_815b, + &pci_ss_info_1043_8178, &pci_ss_info_1043_817b, + &pci_ss_info_1043_818f, + &pci_ss_info_1043_819d, &pci_ss_info_1043_81a6, &pci_ss_info_1043_81b0, &pci_ss_info_1043_81bc, &pci_ss_info_1043_81cd, &pci_ss_info_1043_81ce, + &pci_ss_info_1043_81ea, + &pci_ss_info_1043_81ec, + &pci_ss_info_1043_8225, &pci_ss_info_1043_824d, + &pci_ss_info_1043_8269, &pci_ss_info_1043_c002, &pci_ss_info_1043_c003, &pci_ss_info_1043_c004, @@ -62433,6 +71735,7 @@ static const pciSubsystemInfo *pci_ss_list_104c[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_104d[] = { + &pci_ss_info_104d_013d, &pci_ss_info_104d_801b, &pci_ss_info_104d_802f, &pci_ss_info_104d_8032, @@ -62457,7 +71760,9 @@ static const pciSubsystemInfo *pci_ss_list_104d[] = { &pci_ss_info_104d_813c, &pci_ss_info_104d_8140, &pci_ss_info_104d_814e, + &pci_ss_info_104d_81b7, &pci_ss_info_104d_830b, + &pci_ss_info_104d_9005, NULL }; #define pci_ss_list_104e NULL @@ -62513,6 +71818,7 @@ static const pciSubsystemInfo *pci_ss_list_105a[] = { &pci_ss_info_105a_1275, &pci_ss_info_105a_2168, &pci_ss_info_105a_4600, + &pci_ss_info_105a_4601, &pci_ss_info_105a_4610, &pci_ss_info_105a_4d30, &pci_ss_info_105a_4d33, @@ -62520,8 +71826,13 @@ static const pciSubsystemInfo *pci_ss_list_105a[] = { &pci_ss_info_105a_4d68, &pci_ss_info_105a_5168, &pci_ss_info_105a_6269, + &pci_ss_info_105a_8600, &pci_ss_info_105a_8601, &pci_ss_info_105a_8602, + &pci_ss_info_105a_8603, + &pci_ss_info_105a_8604, + &pci_ss_info_105a_8610, + &pci_ss_info_105a_b600, NULL }; #endif @@ -62708,7 +72019,13 @@ static const pciSubsystemInfo *pci_ss_list_108d[] = { }; #endif static const pciSubsystemInfo *pci_ss_list_108e[] = { + &pci_ss_info_108e_0286, + &pci_ss_info_108e_0287, &pci_ss_info_108e_10cf, + &pci_ss_info_108e_5000, + &pci_ss_info_108e_7aac, + &pci_ss_info_108e_7aae, + &pci_ss_info_108e_a001, NULL }; #define pci_ss_list_108f NULL @@ -62718,6 +72035,7 @@ static const pciSubsystemInfo *pci_ss_list_1092[] = { &pci_ss_info_1092_0003, &pci_ss_info_1092_00b8, &pci_ss_info_1092_0100, + &pci_ss_info_1092_0126, &pci_ss_info_1092_0127, &pci_ss_info_1092_0136, &pci_ss_info_1092_0141, @@ -62800,7 +72118,6 @@ static const pciSubsystemInfo *pci_ss_list_1092[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1095[] = { &pci_ss_info_1095_0670, - &pci_ss_info_1095_10cf, &pci_ss_info_1095_3112, &pci_ss_info_1095_3114, &pci_ss_info_1095_3124, @@ -63017,7 +72334,11 @@ static const pciSubsystemInfo *pci_ss_list_10b9[] = { &pci_ss_info_10b9_1523, &pci_ss_info_10b9_1533, &pci_ss_info_10b9_1541, + &pci_ss_info_10b9_1563, + &pci_ss_info_10b9_5237, + &pci_ss_info_10b9_5239, &pci_ss_info_10b9_5451, + &pci_ss_info_10b9_5455, &pci_ss_info_10b9_7101, NULL }; @@ -63085,7 +72406,6 @@ static const pciSubsystemInfo *pci_ss_list_10cf[] = { &pci_ss_info_10cf_1064, &pci_ss_info_10cf_106a, &pci_ss_info_10cf_1072, - &pci_ss_info_10cf_1094, &pci_ss_info_10cf_1095, &pci_ss_info_10cf_1098, &pci_ss_info_10cf_1099, @@ -63100,6 +72420,7 @@ static const pciSubsystemInfo *pci_ss_list_10cf[] = { &pci_ss_info_10cf_1143, &pci_ss_info_10cf_11c4, &pci_ss_info_10cf_1279, + &pci_ss_info_10cf_1326, NULL }; #endif @@ -63115,22 +72436,35 @@ static const pciSubsystemInfo *pci_ss_list_10cf[] = { #define pci_ss_list_10da NULL #define pci_ss_list_10db NULL #define pci_ss_list_10dc NULL -#define pci_ss_list_10dd NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_10dd[] = { + &pci_ss_info_10dd_0023, + &pci_ss_info_10dd_0024, + NULL +}; +#endif static const pciSubsystemInfo *pci_ss_list_10de[] = { &pci_ss_info_10de_0005, &pci_ss_info_10de_0008, &pci_ss_info_10de_000f, + &pci_ss_info_10de_0010, &pci_ss_info_10de_001e, &pci_ss_info_10de_0020, &pci_ss_info_10de_002e, &pci_ss_info_10de_006b, &pci_ss_info_10de_0091, &pci_ss_info_10de_00a1, + &pci_ss_info_10de_00f9, &pci_ss_info_10de_0179, &pci_ss_info_10de_01dc, + &pci_ss_info_10de_01ee, &pci_ss_info_10de_0244, + &pci_ss_info_10de_0251, &pci_ss_info_10de_029b, + &pci_ss_info_10de_039c, + &pci_ss_info_10de_0412, &pci_ss_info_10de_042b, + &pci_ss_info_10de_07fc, &pci_ss_info_10de_0c11, &pci_ss_info_10de_cb84, NULL @@ -63140,7 +72474,6 @@ static const pciSubsystemInfo *pci_ss_list_10de[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_10e1[] = { &pci_ss_info_10e1_0391, - &pci_ss_info_10e1_10cf, NULL }; #endif @@ -63160,6 +72493,7 @@ static const pciSubsystemInfo *pci_ss_list_10ec[] = { &pci_ss_info_10ec_8129, &pci_ss_info_10ec_8138, &pci_ss_info_10ec_8139, + &pci_ss_info_10ec_8168, NULL }; #endif @@ -63177,6 +72511,7 @@ static const pciSubsystemInfo *pci_ss_list_10f1[] = { &pci_ss_info_10f1_0002, &pci_ss_info_10f1_2462, &pci_ss_info_10f1_2466, + &pci_ss_info_10f1_2865, &pci_ss_info_10f1_2891, NULL }; @@ -63243,6 +72578,7 @@ static const pciSubsystemInfo *pci_ss_list_1102[] = { &pci_ss_info_1102_1007, &pci_ss_info_1102_100a, &pci_ss_info_1102_100f, + &pci_ss_info_1102_1012, &pci_ss_info_1102_1015, &pci_ss_info_1102_1016, &pci_ss_info_1102_1018, @@ -63281,7 +72617,6 @@ static const pciSubsystemInfo *pci_ss_list_1102[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1103[] = { &pci_ss_info_1103_0001, - &pci_ss_info_1103_0003, &pci_ss_info_1103_0004, &pci_ss_info_1103_0005, &pci_ss_info_1103_0006, @@ -63369,6 +72704,7 @@ static const pciSubsystemInfo *pci_ss_list_1113[] = { &pci_ss_info_1113_4203, &pci_ss_info_1113_8201, &pci_ss_info_1113_9211, + &pci_ss_info_1113_b301, &pci_ss_info_1113_d301, &pci_ss_info_1113_ec01, &pci_ss_info_1113_ee03, @@ -63464,16 +72800,25 @@ static const pciSubsystemInfo *pci_ss_list_1133[] = { &pci_ss_info_1133_1c0a, &pci_ss_info_1133_1c0b, &pci_ss_info_1133_1c0c, + &pci_ss_info_1133_1e01, + &pci_ss_info_1133_2001, + &pci_ss_info_1133_2200, &pci_ss_info_1133_2400, &pci_ss_info_1133_2800, + &pci_ss_info_1133_2e01, + &pci_ss_info_1133_3201, &pci_ss_info_1133_e013, - &pci_ss_info_1133_e015, &pci_ss_info_1133_e017, &pci_ss_info_1133_e018, &pci_ss_info_1133_e019, &pci_ss_info_1133_e01b, + &pci_ss_info_1133_e01e, + &pci_ss_info_1133_e020, + &pci_ss_info_1133_e022, &pci_ss_info_1133_e024, &pci_ss_info_1133_e028, + &pci_ss_info_1133_e02e, + &pci_ss_info_1133_e032, NULL }; #endif @@ -63553,7 +72898,12 @@ static const pciSubsystemInfo *pci_ss_list_1148[] = { }; #endif #define pci_ss_list_1149 NULL -#define pci_ss_list_114a NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_114a[] = { + &pci_ss_info_114a_0582, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_114b[] = { &pci_ss_info_114b_2003, @@ -63631,6 +72981,7 @@ static const pciSubsystemInfo *pci_ss_list_1166[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1170[] = { &pci_ss_info_1170_002f, + &pci_ss_info_1170_0036, &pci_ss_info_1170_3209, NULL }; @@ -63695,6 +73046,7 @@ static const pciSubsystemInfo *pci_ss_list_1186[] = { &pci_ss_info_1186_1400, &pci_ss_info_1186_1401, &pci_ss_info_1186_1403, + &pci_ss_info_1186_1407, &pci_ss_info_1186_3202, &pci_ss_info_1186_3203, &pci_ss_info_1186_3501, @@ -63875,6 +73227,7 @@ static const pciSubsystemInfo *pci_ss_list_11cb[] = { static const pciSubsystemInfo *pci_ss_list_11d4[] = { &pci_ss_info_11d4_0040, &pci_ss_info_11d4_0048, + &pci_ss_info_11d4_1986, &pci_ss_info_11d4_5340, NULL }; @@ -63902,7 +73255,12 @@ static const pciSubsystemInfo *pci_ss_list_11d4[] = { #define pci_ss_list_11e9 NULL #define pci_ss_list_11ea NULL #define pci_ss_list_11eb NULL -#define pci_ss_list_11ec NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_11ec[] = { + &pci_ss_info_11ec_8129, + NULL +}; +#endif #define pci_ss_list_11ed NULL #define pci_ss_list_11ee NULL #define pci_ss_list_11ef NULL @@ -64376,6 +73734,7 @@ static const pciSubsystemInfo *pci_ss_list_12b9[] = { &pci_ss_info_12b9_00ac, &pci_ss_info_12b9_00ad, &pci_ss_info_12b9_00c4, + &pci_ss_info_12b9_baba, NULL }; #endif @@ -64438,6 +73797,7 @@ static const pciSubsystemInfo *pci_ss_list_12d9[] = { &pci_ss_info_12d9_000a, &pci_ss_info_12d9_000c, &pci_ss_info_12d9_000d, + &pci_ss_info_12d9_000e, NULL }; #endif @@ -64700,6 +74060,7 @@ static const pciSubsystemInfo *pci_ss_list_1385[] = { &pci_ss_info_1385_4800, &pci_ss_info_1385_4d00, &pci_ss_info_1385_4e00, + &pci_ss_info_1385_6b00, &pci_ss_info_1385_f004, &pci_ss_info_1385_f311, NULL @@ -64739,6 +74100,7 @@ static const pciSubsystemInfo *pci_ss_list_1397[] = { &pci_ss_info_1397_3137, &pci_ss_info_1397_b520, &pci_ss_info_1397_b540, + &pci_ss_info_1397_b556, NULL }; #endif @@ -64888,6 +74250,7 @@ static const pciSubsystemInfo *pci_ss_list_13cf[] = { static const pciSubsystemInfo *pci_ss_list_13d1[] = { &pci_ss_info_13d1_ab01, &pci_ss_info_13d1_aba0, + &pci_ss_info_13d1_abe3, &pci_ss_info_13d1_ac11, &pci_ss_info_13d1_ac12, NULL @@ -65004,6 +74367,8 @@ static const pciSubsystemInfo *pci_ss_list_13e9[] = { static const pciSubsystemInfo *pci_ss_list_13f6[] = { &pci_ss_info_13f6_0101, &pci_ss_info_13f6_0111, + &pci_ss_info_13f6_0300, + &pci_ss_info_13f6_9761, &pci_ss_info_13f6_ffff, NULL }; @@ -65199,6 +74564,7 @@ static const pciSubsystemInfo *pci_ss_list_144d[] = { &pci_ss_info_144d_c000, &pci_ss_info_144d_c001, &pci_ss_info_144d_c003, + &pci_ss_info_144d_c005, &pci_ss_info_144d_c006, &pci_ss_info_144d_c00c, &pci_ss_info_144d_c018, @@ -65246,6 +74612,8 @@ static const pciSubsystemInfo *pci_ss_list_1458[] = { &pci_ss_info_1458_0c11, &pci_ss_info_1458_1000, &pci_ss_info_1458_1019, + &pci_ss_info_1458_2102, + &pci_ss_info_1458_216c, &pci_ss_info_1458_24c2, &pci_ss_info_1458_24d1, &pci_ss_info_1458_24d2, @@ -65259,6 +74627,7 @@ static const pciSubsystemInfo *pci_ss_list_1458[] = { &pci_ss_info_1458_265a, &pci_ss_info_1458_266a, &pci_ss_info_1458_266f, + &pci_ss_info_1458_310d, &pci_ss_info_1458_3124, &pci_ss_info_1458_3150, &pci_ss_info_1458_3427, @@ -65314,6 +74683,7 @@ static const pciSubsystemInfo *pci_ss_list_1461[] = { &pci_ss_info_1461_2c00, &pci_ss_info_1461_8011, &pci_ss_info_1461_9715, + &pci_ss_info_1461_a14b, &pci_ss_info_1461_a3ce, &pci_ss_info_1461_a3cf, &pci_ss_info_1461_a70a, @@ -65333,13 +74703,17 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = { &pci_ss_info_1462_0400, &pci_ss_info_1462_0402, &pci_ss_info_1462_0403, + &pci_ss_info_1462_0412, &pci_ss_info_1462_052c, &pci_ss_info_1462_058c, &pci_ss_info_1462_0622, + &pci_ss_info_1462_0663, &pci_ss_info_1462_0900, &pci_ss_info_1462_1009, &pci_ss_info_1462_207d, + &pci_ss_info_1462_217c, &pci_ss_info_1462_235c, + &pci_ss_info_1462_236c, &pci_ss_info_1462_3091, &pci_ss_info_1462_309e, &pci_ss_info_1462_3300, @@ -65350,6 +74724,7 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = { &pci_ss_info_1462_5470, &pci_ss_info_1462_5506, &pci_ss_info_1462_5800, + &pci_ss_info_1462_5850, &pci_ss_info_1462_6231, &pci_ss_info_1462_6470, &pci_ss_info_1462_6560, @@ -65362,6 +74737,7 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = { &pci_ss_info_1462_6822, &pci_ss_info_1462_6828, &pci_ss_info_1462_6830, + &pci_ss_info_1462_6833, &pci_ss_info_1462_6835, &pci_ss_info_1462_6880, &pci_ss_info_1462_6900, @@ -65377,9 +74753,17 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = { &pci_ss_info_1462_702d, &pci_ss_info_1462_702e, &pci_ss_info_1462_7030, + &pci_ss_info_1462_7061, + &pci_ss_info_1462_7094, &pci_ss_info_1462_7100, + &pci_ss_info_1462_7141, + &pci_ss_info_1462_7181, &pci_ss_info_1462_7207, + &pci_ss_info_1462_7217, &pci_ss_info_1462_7235, + &pci_ss_info_1462_7236, + &pci_ss_info_1462_7267, + &pci_ss_info_1462_7276, &pci_ss_info_1462_7280, &pci_ss_info_1462_728c, &pci_ss_info_1462_7580, @@ -65387,6 +74771,7 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = { &pci_ss_info_1462_788c, &pci_ss_info_1462_8606, &pci_ss_info_1462_8661, + &pci_ss_info_1462_8710, &pci_ss_info_1462_8730, &pci_ss_info_1462_8808, &pci_ss_info_1462_8817, @@ -65394,10 +74779,12 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = { &pci_ss_info_1462_8852, &pci_ss_info_1462_8880, &pci_ss_info_1462_8900, + &pci_ss_info_1462_9110, &pci_ss_info_1462_9171, &pci_ss_info_1462_932c, &pci_ss_info_1462_9350, &pci_ss_info_1462_9360, + &pci_ss_info_1462_9380, &pci_ss_info_1462_971d, &pci_ss_info_1462_b010, &pci_ss_info_1462_b834, @@ -65414,6 +74801,7 @@ static const pciSubsystemInfo *pci_ss_list_1468[] = { &pci_ss_info_1468_0202, &pci_ss_info_1468_0311, &pci_ss_info_1468_0312, + &pci_ss_info_1468_0408, &pci_ss_info_1468_0410, &pci_ss_info_1468_0440, &pci_ss_info_1468_0441, @@ -65459,12 +74847,14 @@ static const pciSubsystemInfo *pci_ss_list_147a[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_147b[] = { &pci_ss_info_147b_0507, + &pci_ss_info_147b_12c4, &pci_ss_info_147b_1406, &pci_ss_info_147b_1407, &pci_ss_info_147b_1408, &pci_ss_info_147b_1c09, &pci_ss_info_147b_1c0b, &pci_ss_info_147b_1c1a, + &pci_ss_info_147b_6190, &pci_ss_info_147b_6191, &pci_ss_info_147b_8f00, &pci_ss_info_147b_8f09, @@ -65657,7 +75047,12 @@ static const pciSubsystemInfo *pci_ss_list_14c2[] = { NULL }; #endif -#define pci_ss_list_14c3 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_14c3[] = { + &pci_ss_info_14c3_1710, + NULL +}; +#endif #define pci_ss_list_14c4 NULL #define pci_ss_list_14c5 NULL #define pci_ss_list_14c6 NULL @@ -65779,6 +75174,7 @@ static const pciSubsystemInfo *pci_ss_list_14f1[] = { &pci_ss_info_14f1_2004, &pci_ss_info_14f1_2045, &pci_ss_info_14f1_5421, + &pci_ss_info_14f1_5422, &pci_ss_info_14f1_8800, NULL }; @@ -65908,6 +75304,14 @@ static const pciSubsystemInfo *pci_ss_list_1522[] = { &pci_ss_info_1522_2500, &pci_ss_info_1522_2600, &pci_ss_info_1522_2700, + &pci_ss_info_1522_3000, + &pci_ss_info_1522_3100, + &pci_ss_info_1522_3200, + &pci_ss_info_1522_3300, + &pci_ss_info_1522_3400, + &pci_ss_info_1522_3500, + &pci_ss_info_1522_3c00, + &pci_ss_info_1522_3d00, NULL }; #endif @@ -65942,6 +75346,7 @@ static const pciSubsystemInfo *pci_ss_list_152d[] = { #define pci_ss_list_1533 NULL #define pci_ss_list_1534 NULL #define pci_ss_list_1535 NULL +#define pci_ss_list_1536 NULL #define pci_ss_list_1537 NULL #define pci_ss_list_1538 NULL #define pci_ss_list_1539 NULL @@ -65959,6 +75364,7 @@ static const pciSubsystemInfo *pci_ss_list_153b[] = { &pci_ss_info_153b_1138, &pci_ss_info_153b_1142, &pci_ss_info_153b_1143, + &pci_ss_info_153b_1144, &pci_ss_info_153b_1145, &pci_ss_info_153b_1147, &pci_ss_info_153b_1151, @@ -65969,6 +75375,7 @@ static const pciSubsystemInfo *pci_ss_list_153b[] = { &pci_ss_info_153b_1160, &pci_ss_info_153b_1162, &pci_ss_info_153b_1166, + &pci_ss_info_153b_1170, NULL }; #endif @@ -65989,7 +75396,10 @@ static const pciSubsystemInfo *pci_ss_list_1540[] = { #define pci_ss_list_1544 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1545[] = { + &pci_ss_info_1545_0023, &pci_ss_info_1545_002f, + &pci_ss_info_1545_1996, + &pci_ss_info_1545_1997, NULL }; #endif @@ -66050,7 +75460,18 @@ static const pciSubsystemInfo *pci_ss_list_1563[] = { }; #endif #define pci_ss_list_1564 NULL -#define pci_ss_list_1565 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1565[] = { + &pci_ss_info_1565_2300, + &pci_ss_info_1565_2501, + &pci_ss_info_1565_3101, + &pci_ss_info_1565_3402, + &pci_ss_info_1565_5200, + &pci_ss_info_1565_5401, + &pci_ss_info_1565_8211, + NULL +}; +#endif #define pci_ss_list_1566 NULL #define pci_ss_list_1567 NULL #define pci_ss_list_1568 NULL @@ -66137,6 +75558,9 @@ static const pciSubsystemInfo *pci_ss_list_156d[] = { #define pci_ss_list_15ab NULL #define pci_ss_list_15ac NULL static const pciSubsystemInfo *pci_ss_list_15ad[] = { + &pci_ss_info_15ad_0750, + &pci_ss_info_15ad_0760, + &pci_ss_info_15ad_0800, &pci_ss_info_15ad_1976, NULL }; @@ -66199,9 +75623,15 @@ static const pciSubsystemInfo *pci_ss_list_15d4[] = { #define pci_ss_list_15d8 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_15d9[] = { + &pci_ss_info_15d9_02b5, + &pci_ss_info_15d9_02b6, + &pci_ss_info_15d9_02c9, + &pci_ss_info_15d9_02ca, + &pci_ss_info_15d9_3280, &pci_ss_info_15d9_3480, &pci_ss_info_15d9_4580, &pci_ss_info_15d9_9005, + &pci_ss_info_15d9_c080, NULL }; #endif @@ -66322,6 +75752,8 @@ static const pciSubsystemInfo *pci_ss_list_1668[] = { #endif #define pci_ss_list_166d NULL #define pci_ss_list_1677 NULL +#define pci_ss_list_1678 NULL +#define pci_ss_list_1679 NULL #define pci_ss_list_167b NULL #define pci_ss_list_167d NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -66338,11 +75770,14 @@ static const pciSubsystemInfo *pci_ss_list_1681[] = { #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1682[] = { + &pci_ss_info_1682_2034, &pci_ss_info_1682_2109, &pci_ss_info_1682_2119, &pci_ss_info_1682_211c, &pci_ss_info_1682_2120, &pci_ss_info_1682_217e, + &pci_ss_info_1682_222b, + &pci_ss_info_1682_2271, NULL }; #endif @@ -66355,6 +75790,7 @@ static const pciSubsystemInfo *pci_ss_list_168c[] = { &pci_ss_info_168c_1025, &pci_ss_info_168c_1027, &pci_ss_info_168c_1042, + &pci_ss_info_168c_1051, &pci_ss_info_168c_1052, &pci_ss_info_168c_2026, &pci_ss_info_168c_2041, @@ -66363,6 +75799,10 @@ static const pciSubsystemInfo *pci_ss_list_168c[] = { &pci_ss_info_168c_2052, &pci_ss_info_168c_2062, &pci_ss_info_168c_2063, + &pci_ss_info_168c_3061, + &pci_ss_info_168c_3062, + &pci_ss_info_168c_3063, + &pci_ss_info_168c_3065, NULL }; #endif @@ -66417,6 +75857,7 @@ static const pciSubsystemInfo *pci_ss_list_16ce[] = { }; #endif #define pci_ss_list_16d5 NULL +#define pci_ss_list_16da NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_16df[] = { &pci_ss_info_16df_0011, @@ -66432,6 +75873,7 @@ static const pciSubsystemInfo *pci_ss_list_16df[] = { #define pci_ss_list_16e5 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_16ec[] = { + &pci_ss_info_16ec_010d, &pci_ss_info_16ec_0119, NULL }; @@ -66452,6 +75894,7 @@ static const pciSubsystemInfo *pci_ss_list_1705[] = { #endif #define pci_ss_list_170b NULL #define pci_ss_list_170c NULL +#define pci_ss_list_1719 NULL #define pci_ss_list_1725 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_172a[] = { @@ -66462,6 +75905,7 @@ static const pciSubsystemInfo *pci_ss_list_172a[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1734[] = { &pci_ss_info_1734_007a, + &pci_ss_info_1734_1003, &pci_ss_info_1734_1004, &pci_ss_info_1734_1005, &pci_ss_info_1734_100b, @@ -66470,6 +75914,7 @@ static const pciSubsystemInfo *pci_ss_list_1734[] = { &pci_ss_info_1734_1012, &pci_ss_info_1734_101c, &pci_ss_info_1734_1025, + &pci_ss_info_1734_102b, &pci_ss_info_1734_103e, &pci_ss_info_1734_1052, &pci_ss_info_1734_1055, @@ -66481,9 +75926,14 @@ static const pciSubsystemInfo *pci_ss_list_1734[] = { &pci_ss_info_1734_1065, &pci_ss_info_1734_106c, &pci_ss_info_1734_1081, + &pci_ss_info_1734_1091, + &pci_ss_info_1734_1095, + &pci_ss_info_1734_1099, + &pci_ss_info_1734_109f, &pci_ss_info_1734_10a3, &pci_ss_info_1734_10ad, &pci_ss_info_1734_10b8, + &pci_ss_info_1734_10f8, NULL }; #endif @@ -66494,6 +75944,7 @@ static const pciSubsystemInfo *pci_ss_list_1737[] = { &pci_ss_info_1737_0024, &pci_ss_info_1737_0032, &pci_ss_info_1737_0033, + &pci_ss_info_1737_0042, &pci_ss_info_1737_0048, &pci_ss_info_1737_0055, &pci_ss_info_1737_3874, @@ -66508,9 +75959,12 @@ static const pciSubsystemInfo *pci_ss_list_173b[] = { }; #endif #define pci_ss_list_1743 NULL +#define pci_ss_list_1745 NULL #define pci_ss_list_1749 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_174b[] = { + &pci_ss_info_174b_0500, + &pci_ss_info_174b_0501, &pci_ss_info_174b_7112, &pci_ss_info_174b_7146, &pci_ss_info_174b_7147, @@ -66523,6 +75977,8 @@ static const pciSubsystemInfo *pci_ss_list_174b[] = { &pci_ss_info_174b_7c19, &pci_ss_info_174b_7c28, &pci_ss_info_174b_7c29, + &pci_ss_info_174b_aa10, + &pci_ss_info_174b_e400, NULL }; #endif @@ -66543,16 +75999,19 @@ static const pciSubsystemInfo *pci_ss_list_175c[] = { }; #endif #define pci_ss_list_175e NULL +#define pci_ss_list_1760 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1775[] = { &pci_ss_info_1775_10d0, &pci_ss_info_1775_10d1, + &pci_ss_info_1775_1100, &pci_ss_info_1775_6003, &pci_ss_info_1775_c200, &pci_ss_info_1775_ce90, NULL }; #endif +#define pci_ss_list_177d NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1787[] = { &pci_ss_info_1787_0202, @@ -66585,12 +76044,14 @@ static const pciSubsystemInfo *pci_ss_list_17aa[] = { &pci_ss_info_17aa_0286, &pci_ss_info_17aa_0287, &pci_ss_info_17aa_2001, + &pci_ss_info_17aa_2006, &pci_ss_info_17aa_2007, &pci_ss_info_17aa_2009, &pci_ss_info_17aa_200a, &pci_ss_info_17aa_200b, &pci_ss_info_17aa_200c, &pci_ss_info_17aa_200d, + &pci_ss_info_17aa_200e, &pci_ss_info_17aa_200f, &pci_ss_info_17aa_2010, &pci_ss_info_17aa_2012, @@ -66601,9 +76062,22 @@ static const pciSubsystemInfo *pci_ss_list_17aa[] = { &pci_ss_info_17aa_201e, &pci_ss_info_17aa_207e, &pci_ss_info_17aa_2081, + &pci_ss_info_17aa_20a6, + &pci_ss_info_17aa_20a7, + &pci_ss_info_17aa_20a9, + &pci_ss_info_17aa_20aa, + &pci_ss_info_17aa_20ab, + &pci_ss_info_17aa_20ac, + &pci_ss_info_17aa_20b1, + &pci_ss_info_17aa_20b9, + &pci_ss_info_17aa_20d8, + &pci_ss_info_17aa_302e, + &pci_ss_info_17aa_3802, + &pci_ss_info_17aa_6b7c, NULL }; #endif +#define pci_ss_list_17ab NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_17af[] = { &pci_ss_info_17af_0202, @@ -66613,6 +76087,8 @@ static const pciSubsystemInfo *pci_ss_list_17af[] = { &pci_ss_info_17af_200d, &pci_ss_info_17af_2012, &pci_ss_info_17af_2013, + &pci_ss_info_17af_2020, + &pci_ss_info_17af_2021, NULL }; #endif @@ -66626,6 +76102,7 @@ static const pciSubsystemInfo *pci_ss_list_17af[] = { static const pciSubsystemInfo *pci_ss_list_17cf[] = { &pci_ss_info_17cf_0014, &pci_ss_info_17cf_0020, + &pci_ss_info_17cf_0033, &pci_ss_info_17cf_0037, &pci_ss_info_17cf_0042, NULL @@ -66658,6 +76135,8 @@ static const pciSubsystemInfo *pci_ss_list_17ee[] = { static const pciSubsystemInfo *pci_ss_list_17f2[] = { &pci_ss_info_17f2_1c03, &pci_ss_info_17f2_2c08, + &pci_ss_info_17f2_5000, + &pci_ss_info_17f2_5999, NULL }; #endif @@ -66681,7 +76160,12 @@ static const pciSubsystemInfo *pci_ss_list_1809[] = { }; #endif #define pci_ss_list_1813 NULL -#define pci_ss_list_1814 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1814[] = { + &pci_ss_info_1814_2561, + NULL +}; +#endif #define pci_ss_list_1820 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1822[] = { @@ -66697,12 +76181,29 @@ static const pciSubsystemInfo *pci_ss_list_182d[] = { }; #endif #define pci_ss_list_182e NULL +#define pci_ss_list_182f NULL #define pci_ss_list_1830 NULL #define pci_ss_list_183b NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1849[] = { + &pci_ss_info_1849_03e0, + &pci_ss_info_1849_03e8, + &pci_ss_info_1849_03e9, + &pci_ss_info_1849_03ea, + &pci_ss_info_1849_03eb, + &pci_ss_info_1849_03ec, + &pci_ss_info_1849_03ef, + &pci_ss_info_1849_03f1, + &pci_ss_info_1849_03f2, + &pci_ss_info_1849_03f6, + &pci_ss_info_1849_0547, + &pci_ss_info_1849_054c, + &pci_ss_info_1849_0562, &pci_ss_info_1849_0571, &pci_ss_info_1849_0850, + &pci_ss_info_1849_0888, + &pci_ss_info_1849_1563, + &pci_ss_info_1849_2582, &pci_ss_info_1849_3038, &pci_ss_info_1849_3065, &pci_ss_info_1849_3099, @@ -66712,6 +76213,9 @@ static const pciSubsystemInfo *pci_ss_list_1849[] = { &pci_ss_info_1849_3189, &pci_ss_info_1849_3227, &pci_ss_info_1849_5229, + &pci_ss_info_1849_5237, + &pci_ss_info_1849_5239, + &pci_ss_info_1849_7101, &pci_ss_info_1849_8052, &pci_ss_info_1849_8053, &pci_ss_info_1849_9761, @@ -66775,6 +76279,7 @@ static const pciSubsystemInfo *pci_ss_list_185b[] = { static const pciSubsystemInfo *pci_ss_list_185f[] = { &pci_ss_info_185f_1012, &pci_ss_info_185f_1220, + &pci_ss_info_185f_1600, &pci_ss_info_185f_2012, &pci_ss_info_185f_22a0, NULL @@ -66782,6 +76287,8 @@ static const pciSubsystemInfo *pci_ss_list_185f[] = { #endif #define pci_ss_list_1864 NULL #define pci_ss_list_1867 NULL +#define pci_ss_list_186c NULL +#define pci_ss_list_1876 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_187e[] = { &pci_ss_info_187e_3406, @@ -66800,6 +76307,7 @@ static const pciSubsystemInfo *pci_ss_list_1885[] = { #define pci_ss_list_1890 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1894[] = { + &pci_ss_info_1894_0020, &pci_ss_info_1894_a006, &pci_ss_info_1894_fe01, NULL @@ -66864,6 +76372,8 @@ static const pciSubsystemInfo *pci_ss_list_1904[] = { NULL }; #endif +#define pci_ss_list_1905 NULL +#define pci_ss_list_1912 NULL #define pci_ss_list_1923 NULL #define pci_ss_list_1924 NULL #define pci_ss_list_192e NULL @@ -66876,6 +76386,7 @@ static const pciSubsystemInfo *pci_ss_list_1931[] = { #endif #define pci_ss_list_1942 NULL #define pci_ss_list_194a NULL +#define pci_ss_list_1954 NULL #define pci_ss_list_1957 NULL #define pci_ss_list_1958 NULL #define pci_ss_list_1959 NULL @@ -66907,20 +76418,37 @@ static const pciSubsystemInfo *pci_ss_list_1993[] = { #define pci_ss_list_19ac NULL #define pci_ss_list_19ae NULL #define pci_ss_list_19d4 NULL +#define pci_ss_list_19de NULL #define pci_ss_list_19e2 NULL #define pci_ss_list_19e7 NULL #define pci_ss_list_1a03 NULL #define pci_ss_list_1a07 NULL #define pci_ss_list_1a08 NULL +#define pci_ss_list_1a0e NULL #define pci_ss_list_1a1d NULL +#define pci_ss_list_1a22 NULL #define pci_ss_list_1a29 NULL +#define pci_ss_list_1a2b NULL #define pci_ss_list_1a51 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1a58[] = { + &pci_ss_info_1a58_0910, + NULL +}; +#endif #define pci_ss_list_1a5d NULL +#define pci_ss_list_1a68 NULL #define pci_ss_list_1a71 NULL #define pci_ss_list_1a73 NULL #define pci_ss_list_1a77 NULL #define pci_ss_list_1a78 NULL #define pci_ss_list_1a8c NULL +#define pci_ss_list_1aae NULL +#define pci_ss_list_1ab9 NULL +#define pci_ss_list_1ae0 NULL +#define pci_ss_list_1ae8 NULL +#define pci_ss_list_1af4 NULL +#define pci_ss_list_1af5 NULL #define pci_ss_list_1b13 NULL #define pci_ss_list_1c1c NULL #define pci_ss_list_1d44 NULL @@ -66942,6 +76470,7 @@ static const pciSubsystemInfo *pci_ss_list_1fc1[] = { NULL }; #endif +#define pci_ss_list_1fc9 NULL #define pci_ss_list_1fce NULL #define pci_ss_list_2000 NULL #define pci_ss_list_2001 NULL @@ -66959,6 +76488,7 @@ static const pciSubsystemInfo *pci_ss_list_2646[] = { #define pci_ss_list_270b NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_270f[] = { + &pci_ss_info_270f_1103, &pci_ss_info_270f_2001, &pci_ss_info_270f_2200, &pci_ss_info_270f_2801, @@ -66994,7 +76524,12 @@ static const pciSubsystemInfo *pci_ss_list_3388[] = { #endif #define pci_ss_list_3411 NULL #define pci_ss_list_3513 NULL -#define pci_ss_list_3842 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_3842[] = { + &pci_ss_info_3842_a341, + NULL +}; +#endif #define pci_ss_list_38ef NULL static const pciSubsystemInfo *pci_ss_list_3d3d[] = { &pci_ss_info_3d3d_0100, @@ -67010,12 +76545,12 @@ static const pciSubsystemInfo *pci_ss_list_3d3d[] = { NULL }; static const pciSubsystemInfo *pci_ss_list_4005[] = { - &pci_ss_info_4005_144f, &pci_ss_info_4005_4000, &pci_ss_info_4005_4710, NULL }; #define pci_ss_list_4033 NULL +#define pci_ss_list_4040 NULL #define pci_ss_list_4143 NULL #define pci_ss_list_4144 NULL #define pci_ss_list_416c NULL @@ -67104,6 +76639,7 @@ static const pciSubsystemInfo *pci_ss_list_5168[] = { #endif #define pci_ss_list_5301 NULL static const pciSubsystemInfo *pci_ss_list_5333[] = { + &pci_ss_info_5333_0130, &pci_ss_info_5333_8100, &pci_ss_info_5333_8110, &pci_ss_info_5333_8125, @@ -67145,6 +76681,7 @@ static const pciSubsystemInfo *pci_ss_list_5654[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_7063[] = { &pci_ss_info_7063_3000, + &pci_ss_info_7063_5500, NULL }; #endif @@ -67199,6 +76736,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_0079, &pci_ss_info_8086_007b, &pci_ss_info_8086_0100, + &pci_ss_info_8086_0136, &pci_ss_info_8086_01af, &pci_ss_info_8086_01c1, &pci_ss_info_8086_01f7, @@ -67212,8 +76750,11 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_1003, &pci_ss_info_8086_1004, &pci_ss_info_8086_1005, + &pci_ss_info_8086_1006, &pci_ss_info_8086_1009, + &pci_ss_info_8086_100a, &pci_ss_info_8086_100c, + &pci_ss_info_8086_1010, &pci_ss_info_8086_1011, &pci_ss_info_8086_1012, &pci_ss_info_8086_1013, @@ -67230,6 +76771,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_1028, &pci_ss_info_8086_1030, &pci_ss_info_8086_1034, + &pci_ss_info_8086_103d, &pci_ss_info_8086_1040, &pci_ss_info_8086_1041, &pci_ss_info_8086_1042, @@ -67249,6 +76791,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_1082, &pci_ss_info_8086_1083, &pci_ss_info_8086_1084, + &pci_ss_info_8086_1085, &pci_ss_info_8086_108a, &pci_ss_info_8086_1092, &pci_ss_info_8086_1093, @@ -67256,11 +76799,18 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_1099, &pci_ss_info_8086_109a, &pci_ss_info_8086_10a4, + &pci_ss_info_8086_10a5, + &pci_ss_info_8086_10a6, + &pci_ss_info_8086_10a8, &pci_ss_info_8086_10bc, + &pci_ss_info_8086_10d6, + &pci_ss_info_8086_10e2, &pci_ss_info_8086_10f0, &pci_ss_info_8086_1107, &pci_ss_info_8086_1109, &pci_ss_info_8086_110d, + &pci_ss_info_8086_1110, + &pci_ss_info_8086_1111, &pci_ss_info_8086_1112, &pci_ss_info_8086_1113, &pci_ss_info_8086_115e, @@ -67283,6 +76833,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_135f, &pci_ss_info_8086_1361, &pci_ss_info_8086_1376, + &pci_ss_info_8086_145a, &pci_ss_info_8086_1476, &pci_ss_info_8086_1958, &pci_ss_info_8086_2004, @@ -67325,13 +76876,24 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_2411, &pci_ss_info_8086_2412, &pci_ss_info_8086_2413, + &pci_ss_info_8086_24c2, + &pci_ss_info_8086_24c5, &pci_ss_info_8086_24db, + &pci_ss_info_8086_2510, &pci_ss_info_8086_2513, &pci_ss_info_8086_2522, &pci_ss_info_8086_2527, + &pci_ss_info_8086_2561, &pci_ss_info_8086_2581, &pci_ss_info_8086_265c, + &pci_ss_info_8086_2721, &pci_ss_info_8086_2731, + &pci_ss_info_8086_27d8, + &pci_ss_info_8086_2937, + &pci_ss_info_8086_2938, + &pci_ss_info_8086_293c, + &pci_ss_info_8086_293e, + &pci_ss_info_8086_2940, &pci_ss_info_8086_3000, &pci_ss_info_8086_3001, &pci_ss_info_8086_3002, @@ -67354,6 +76916,8 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_302f, &pci_ss_info_8086_3063, &pci_ss_info_8086_308d, + &pci_ss_info_8086_309c, + &pci_ss_info_8086_30a5, &pci_ss_info_8086_3108, &pci_ss_info_8086_3411, &pci_ss_info_8086_3424, @@ -67389,12 +76953,17 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = { &pci_ss_info_8086_5643, &pci_ss_info_8086_5744, &pci_ss_info_8086_5753, + &pci_ss_info_8086_5842, + &pci_ss_info_8086_7190, &pci_ss_info_8086_8000, &pci_ss_info_8086_8181, &pci_ss_info_8086_9181, &pci_ss_info_8086_a000, &pci_ss_info_8086_a01f, + &pci_ss_info_8086_a05f, &pci_ss_info_8086_a11f, + &pci_ss_info_8086_a15f, + &pci_ss_info_8086_a16f, &pci_ss_info_8086_e000, &pci_ss_info_8086_e001, &pci_ss_info_8086_e002, @@ -67530,6 +77099,10 @@ static const pciSubsystemInfo *pci_ss_list_9005[] = { &pci_ss_info_9005_02c6, &pci_ss_info_9005_02c7, &pci_ss_info_9005_02c8, + &pci_ss_info_9005_02ce, + &pci_ss_info_9005_02cf, + &pci_ss_info_9005_02d0, + &pci_ss_info_9005_02d1, &pci_ss_info_9005_0364, &pci_ss_info_9005_0365, &pci_ss_info_9005_0410, @@ -67572,12 +77145,16 @@ static const pciSubsystemInfo *pci_ss_list_a0a0[] = { &pci_ss_info_a0a0_01b6, &pci_ss_info_a0a0_0304, &pci_ss_info_a0a0_0306, + &pci_ss_info_a0a0_0342, &pci_ss_info_a0a0_03b2, + &pci_ss_info_a0a0_03b3, &pci_ss_info_a0a0_03b4, &pci_ss_info_a0a0_03b5, &pci_ss_info_a0a0_03b9, &pci_ss_info_a0a0_03ba, &pci_ss_info_a0a0_03bb, + &pci_ss_info_a0a0_0449, + &pci_ss_info_a0a0_04ad, &pci_ss_info_a0a0_0506, &pci_ss_info_a0a0_0509, NULL @@ -67665,11 +77242,14 @@ static const pciSubsystemInfo *pci_ss_list_e4bf[] = { &pci_ss_info_e4bf_0cc9, &pci_ss_info_e4bf_0ccd, &pci_ss_info_e4bf_0cd2, + &pci_ss_info_e4bf_0cd3, &pci_ss_info_e4bf_1000, &pci_ss_info_e4bf_1010, &pci_ss_info_e4bf_1020, &pci_ss_info_e4bf_1040, &pci_ss_info_e4bf_3100, + &pci_ss_info_e4bf_58b1, + &pci_ss_info_e4bf_cc47, NULL }; #endif @@ -67816,6 +77396,15 @@ static const pciDeviceInfo pci_dev_info_0070_4803 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_0070_7801 = { + 0x7801, pci_device_0070_7801, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_0070_7801, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_0070_8003 = { 0x8003, pci_device_0070_8003, #ifdef INIT_SUBSYS_INFO @@ -68089,26 +77678,26 @@ static const pciDeviceInfo pci_dev_info_0675_1704 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_067b_2303 = { - 0x2303, pci_device_067b_2303, +static const pciDeviceInfo pci_dev_info_067b_3507 = { + 0x3507, pci_device_067b_3507, #ifdef INIT_SUBSYS_INFO - pci_ss_list_067b_2303, + pci_ss_list_067b_3507, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_067b_3507 = { - 0x3507, pci_device_067b_3507, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_07ca_a301 = { + 0xa301, pci_device_07ca_a301, #ifdef INIT_SUBSYS_INFO - pci_ss_list_067b_3507, + pci_ss_list_07ca_a301, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_07ca_b808 = { 0xb808, pci_device_07ca_b808, #ifdef INIT_SUBSYS_INFO @@ -68131,6 +77720,17 @@ static const pciDeviceInfo pci_dev_info_08ff_afe4 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_0925_1234 = { + 0x1234, pci_device_0925_1234, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_0925_1234, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_093a_010e = { 0x010e, pci_device_093a_010e, #ifdef INIT_SUBSYS_INFO @@ -68158,6 +77758,15 @@ static const pciDeviceInfo pci_dev_info_093a_2468 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_093a_2600 = { + 0x2600, pci_device_093a_2600, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_093a_2600, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_093a_2603 = { 0x2603, pci_device_093a_2603, #ifdef INIT_SUBSYS_INFO @@ -69430,6 +79039,15 @@ static const pciDeviceInfo pci_dev_info_1000_0056 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1000_0057 = { + 0x0057, pci_device_1000_0057, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0057, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1000_0058 = { 0x0058, pci_device_1000_0058, #ifdef INIT_SUBSYS_INFO @@ -69439,6 +79057,15 @@ static const pciDeviceInfo pci_dev_info_1000_0058 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1000_0059 = { + 0x0059, pci_device_1000_0059, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0059, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1000_005a = { 0x005a, pci_device_1000_005a, #ifdef INIT_SUBSYS_INFO @@ -69484,6 +79111,15 @@ static const pciDeviceInfo pci_dev_info_1000_0062 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1000_007c = { + 0x007c, pci_device_1000_007c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_007c, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1000_008f = { 0x008f, pci_device_1000_008f, #ifdef INIT_SUBSYS_INFO @@ -69820,6 +79456,15 @@ static const pciDeviceInfo pci_dev_info_1002_3150 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_3151 = { + 0x3151, pci_device_1002_3151, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_3151, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_3152 = { 0x3152, pci_device_1002_3152, #ifdef INIT_SUBSYS_INFO @@ -69838,6 +79483,15 @@ static const pciDeviceInfo pci_dev_info_1002_3154 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_3171 = { + 0x3171, pci_device_1002_3171, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_3171, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_3e50 = { 0x3e50, pci_device_1002_3e50, #ifdef INIT_SUBSYS_INFO @@ -70162,6 +79816,15 @@ static const pciDeviceInfo pci_dev_info_1002_4341 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_4342 = { + 0x4342, pci_device_1002_4342, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4342, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_4345 = { 0x4345, pci_device_1002_4345, #ifdef INIT_SUBSYS_INFO @@ -70495,6 +80158,114 @@ static const pciDeviceInfo pci_dev_info_1002_438e = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_4390 = { + 0x4390, pci_device_1002_4390, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4390, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4391 = { + 0x4391, pci_device_1002_4391, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4391, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4392 = { + 0x4392, pci_device_1002_4392, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4392, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4393 = { + 0x4393, pci_device_1002_4393, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4393, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4394 = { + 0x4394, pci_device_1002_4394, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4394, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4395 = { + 0x4395, pci_device_1002_4395, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4395, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4396 = { + 0x4396, pci_device_1002_4396, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4396, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4397 = { + 0x4397, pci_device_1002_4397, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4397, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4398 = { + 0x4398, pci_device_1002_4398, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4398, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4399 = { + 0x4399, pci_device_1002_4399, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4399, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_439c = { + 0x439c, pci_device_1002_439c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_439c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_439d = { + 0x439d, pci_device_1002_439d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_439d, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_4437 = { 0x4437, pci_device_1002_4437, #ifdef INIT_SUBSYS_INFO @@ -71134,6 +80905,15 @@ static const pciDeviceInfo pci_dev_info_1002_4d4c = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_4d52 = { + 0x4d52, pci_device_1002_4d52, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4d52, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_4e44 = { 0x4e44, pci_device_1002_4e44, #ifdef INIT_SUBSYS_INFO @@ -72340,6 +82120,33 @@ static const pciDeviceInfo pci_dev_info_1002_5955 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_5956 = { + 0x5956, pci_device_1002_5956, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5956, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5957 = { + 0x5957, pci_device_1002_5957, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5957, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5958 = { + 0x5958, pci_device_1002_5958, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5958, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5960 = { 0x5960, pci_device_1002_5960, #ifdef INIT_SUBSYS_INFO @@ -72376,6 +82183,15 @@ static const pciDeviceInfo pci_dev_info_1002_5964 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_5965 = { + 0x5965, pci_device_1002_5965, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5965, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5969 = { 0x5969, pci_device_1002_5969, #ifdef INIT_SUBSYS_INFO @@ -72403,6 +82219,249 @@ static const pciDeviceInfo pci_dev_info_1002_5975 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_5978 = { + 0x5978, pci_device_1002_5978, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5978, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5979 = { + 0x5979, pci_device_1002_5979, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5979, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_597a = { + 0x597a, pci_device_1002_597a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_597a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_597b = { + 0x597b, pci_device_1002_597b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_597b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_597c = { + 0x597c, pci_device_1002_597c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_597c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_597d = { + 0x597d, pci_device_1002_597d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_597d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_597e = { + 0x597e, pci_device_1002_597e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_597e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_597f = { + 0x597f, pci_device_1002_597f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_597f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5980 = { + 0x5980, pci_device_1002_5980, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5980, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5981 = { + 0x5981, pci_device_1002_5981, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5981, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5982 = { + 0x5982, pci_device_1002_5982, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5982, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a10 = { + 0x5a10, pci_device_1002_5a10, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a10, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a11 = { + 0x5a11, pci_device_1002_5a11, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a11, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a12 = { + 0x5a12, pci_device_1002_5a12, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a12, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a13 = { + 0x5a13, pci_device_1002_5a13, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a13, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a14 = { + 0x5a14, pci_device_1002_5a14, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a14, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a15 = { + 0x5a15, pci_device_1002_5a15, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a15, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a16 = { + 0x5a16, pci_device_1002_5a16, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a16, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a17 = { + 0x5a17, pci_device_1002_5a17, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a17, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a18 = { + 0x5a18, pci_device_1002_5a18, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a18, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a19 = { + 0x5a19, pci_device_1002_5a19, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a19, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a1a = { + 0x5a1a, pci_device_1002_5a1a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a1a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a1b = { + 0x5a1b, pci_device_1002_5a1b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a1b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a1c = { + 0x5a1c, pci_device_1002_5a1c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a1c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a1d = { + 0x5a1d, pci_device_1002_5a1d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a1d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a1e = { + 0x5a1e, pci_device_1002_5a1e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a1e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5a1f = { + 0x5a1f, pci_device_1002_5a1f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5a1f, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5a33 = { 0x5a33, pci_device_1002_5a33, #ifdef INIT_SUBSYS_INFO @@ -72610,6 +82669,15 @@ static const pciDeviceInfo pci_dev_info_1002_5d44 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_5d45 = { + 0x5d45, pci_device_1002_5d45, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5d45, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5d48 = { 0x5d48, pci_device_1002_5d48, #ifdef INIT_SUBSYS_INFO @@ -73096,6 +83164,15 @@ static const pciDeviceInfo pci_dev_info_1002_7162 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_7163 = { + 0x7163, pci_device_1002_7163, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7163, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_7166 = { 0x7166, pci_device_1002_7166, #ifdef INIT_SUBSYS_INFO @@ -73105,6 +83182,15 @@ static const pciDeviceInfo pci_dev_info_1002_7166 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_716e = { + 0x716e, pci_device_1002_716e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_716e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_7172 = { 0x7172, pci_device_1002_7172, #ifdef INIT_SUBSYS_INFO @@ -73150,6 +83236,15 @@ static const pciDeviceInfo pci_dev_info_1002_7183 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_7186 = { + 0x7186, pci_device_1002_7186, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7186, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_7187 = { 0x7187, pci_device_1002_7187, #ifdef INIT_SUBSYS_INFO @@ -73276,6 +83371,15 @@ static const pciDeviceInfo pci_dev_info_1002_71c0 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_71c1 = { + 0x71c1, pci_device_1002_71c1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_71c1, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_71c2 = { 0x71c2, pci_device_1002_71c2, #ifdef INIT_SUBSYS_INFO @@ -73375,6 +83479,15 @@ static const pciDeviceInfo pci_dev_info_1002_71e0 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_71e1 = { + 0x71e1, pci_device_1002_71e1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_71e1, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_71e2 = { 0x71e2, pci_device_1002_71e2, #ifdef INIT_SUBSYS_INFO @@ -73690,6 +83803,60 @@ static const pciDeviceInfo pci_dev_info_1002_7838 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_7910 = { + 0x7910, pci_device_1002_7910, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7910, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7912 = { + 0x7912, pci_device_1002_7912, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7912, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7913 = { + 0x7913, pci_device_1002_7913, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7913, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7915 = { + 0x7915, pci_device_1002_7915, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7915, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7916 = { + 0x7916, pci_device_1002_7916, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7916, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7917 = { + 0x7917, pci_device_1002_7917, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7917, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_7919 = { 0x7919, pci_device_1002_7919, #ifdef INIT_SUBSYS_INFO @@ -73717,6 +83884,15 @@ static const pciDeviceInfo pci_dev_info_1002_791f = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_793b = { + 0x793b, pci_device_1002_793b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_793b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_793f = { 0x793f, pci_device_1002_793f, #ifdef INIT_SUBSYS_INFO @@ -73726,6 +83902,33 @@ static const pciDeviceInfo pci_dev_info_1002_793f = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_7941 = { + 0x7941, pci_device_1002_7941, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7941, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7942 = { + 0x7942, pci_device_1002_7942, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7942, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_796e = { + 0x796e, pci_device_1002_796e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_796e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_7c37 = { 0x7c37, pci_device_1002_7c37, #ifdef INIT_SUBSYS_INFO @@ -73735,6 +83938,384 @@ static const pciDeviceInfo pci_dev_info_1002_7c37 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_9400 = { + 0x9400, pci_device_1002_9400, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9400, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_940a = { + 0x940a, pci_device_1002_940a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_940a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_940b = { + 0x940b, pci_device_1002_940b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_940b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_94c1 = { + 0x94c1, pci_device_1002_94c1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_94c1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_94c3 = { + 0x94c3, pci_device_1002_94c3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_94c3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_94c4 = { + 0x94c4, pci_device_1002_94c4, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_94c4, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_94c8 = { + 0x94c8, pci_device_1002_94c8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_94c8, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_94c9 = { + 0x94c9, pci_device_1002_94c9, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_94c9, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_94cb = { + 0x94cb, pci_device_1002_94cb, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_94cb, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_94cc = { + 0x94cc, pci_device_1002_94cc, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_94cc, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9501 = { + 0x9501, pci_device_1002_9501, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9501, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9504 = { + 0x9504, pci_device_1002_9504, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9504, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9505 = { + 0x9505, pci_device_1002_9505, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9505, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9507 = { + 0x9507, pci_device_1002_9507, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9507, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9508 = { + 0x9508, pci_device_1002_9508, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9508, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_950f = { + 0x950f, pci_device_1002_950f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_950f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9515 = { + 0x9515, pci_device_1002_9515, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9515, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9559 = { + 0x9559, pci_device_1002_9559, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9559, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9581 = { + 0x9581, pci_device_1002_9581, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9581, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9586 = { + 0x9586, pci_device_1002_9586, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9586, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9587 = { + 0x9587, pci_device_1002_9587, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9587, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9588 = { + 0x9588, pci_device_1002_9588, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9588, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9589 = { + 0x9589, pci_device_1002_9589, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9589, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9591 = { + 0x9591, pci_device_1002_9591, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9591, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9593 = { + 0x9593, pci_device_1002_9593, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9593, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9596 = { + 0x9596, pci_device_1002_9596, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9596, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9598 = { + 0x9598, pci_device_1002_9598, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9598, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_95c0 = { + 0x95c0, pci_device_1002_95c0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_95c0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_95c4 = { + 0x95c4, pci_device_1002_95c4, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_95c4, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_95c5 = { + 0x95c5, pci_device_1002_95c5, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_95c5, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_960f = { + 0x960f, pci_device_1002_960f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_960f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9610 = { + 0x9610, pci_device_1002_9610, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9610, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9611 = { + 0x9611, pci_device_1002_9611, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9611, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9612 = { + 0x9612, pci_device_1002_9612, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9612, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9613 = { + 0x9613, pci_device_1002_9613, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9613, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_9614 = { + 0x9614, pci_device_1002_9614, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_9614, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_aa00 = { + 0xaa00, pci_device_1002_aa00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_aa00, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_aa08 = { + 0xaa08, pci_device_1002_aa08, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_aa08, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_aa10 = { + 0xaa10, pci_device_1002_aa10, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_aa10, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_aa18 = { + 0xaa18, pci_device_1002_aa18, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_aa18, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_aa20 = { + 0xaa20, pci_device_1002_aa20, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_aa20, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_aa28 = { + 0xaa28, pci_device_1002_aa28, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_aa28, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_cab0 = { 0xcab0, pci_device_1002_cab0, #ifdef INIT_SUBSYS_INFO @@ -74477,6 +85058,15 @@ static const pciDeviceInfo pci_dev_info_1011_0017 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1011_0018 = { + 0x0018, pci_device_1011_0018, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1011_0018, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1011_0019 = { 0x0019, pci_device_1011_0019, #ifdef INIT_SUBSYS_INFO @@ -75450,6 +86040,15 @@ static const pciDeviceInfo pci_dev_info_1014_01e6 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1014_01ef = { + 0x01ef, pci_device_1014_01ef, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1014_01ef, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1014_01ff = { 0x01ff, pci_device_1014_01ff, #ifdef INIT_SUBSYS_INFO @@ -75576,6 +86175,24 @@ static const pciDeviceInfo pci_dev_info_1014_0314 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1014_032d = { + 0x032d, pci_device_1014_032d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1014_032d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1014_0339 = { + 0x0339, pci_device_1014_0339, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1014_0339, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1014_3022 = { 0x3022, pci_device_1014_3022, #ifdef INIT_SUBSYS_INFO @@ -75864,6 +86481,96 @@ static const pciDeviceInfo pci_dev_info_1022_1103 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1022_1200 = { + 0x1200, pci_device_1022_1200, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1200, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1201 = { + 0x1201, pci_device_1022_1201, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1201, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1202 = { + 0x1202, pci_device_1022_1202, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1202, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1203 = { + 0x1203, pci_device_1022_1203, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1203, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1204 = { + 0x1204, pci_device_1022_1204, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1204, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1300 = { + 0x1300, pci_device_1022_1300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1300, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1301 = { + 0x1301, pci_device_1022_1301, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1301, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1302 = { + 0x1302, pci_device_1022_1302, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1302, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1303 = { + 0x1303, pci_device_1022_1303, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1303, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_1304 = { + 0x1304, pci_device_1022_1304, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_1304, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1022_2000 = { 0x2000, pci_device_1022_2000, #ifdef INIT_SUBSYS_INFO @@ -76422,6 +87129,114 @@ static const pciDeviceInfo pci_dev_info_1022_756b = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1022_9600 = { + 0x9600, pci_device_1022_9600, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9600, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9601 = { + 0x9601, pci_device_1022_9601, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9601, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9602 = { + 0x9602, pci_device_1022_9602, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9602, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9603 = { + 0x9603, pci_device_1022_9603, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9603, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9604 = { + 0x9604, pci_device_1022_9604, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9604, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9605 = { + 0x9605, pci_device_1022_9605, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9605, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9606 = { + 0x9606, pci_device_1022_9606, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9606, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9607 = { + 0x9607, pci_device_1022_9607, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9607, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9608 = { + 0x9608, pci_device_1022_9608, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9608, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_9609 = { + 0x9609, pci_device_1022_9609, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_9609, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_960a = { + 0x960a, pci_device_1022_960a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_960a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_960b = { + 0x960b, pci_device_1022_960b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_960b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1023_0194 = { 0x0194, pci_device_1023_0194, #ifdef INIT_SUBSYS_INFO @@ -76818,6 +87633,15 @@ static const pciDeviceInfo pci_dev_info_1023_9930 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1023_9960 = { + 0x9960, pci_device_1023_9960, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1023_9960, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1025_0090 = { 0x0090, pci_device_1025_0090, #ifdef INIT_SUBSYS_INFO @@ -77466,15 +88290,6 @@ static const pciDeviceInfo pci_dev_info_1028_0015 = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_1028_1f03 = { - 0x1f03, pci_device_1028_1f03, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1028_1f03, -#else - NULL, -#endif - 0 -}; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_102a_0000 = { 0x0000, pci_device_102a_0000, @@ -77711,6 +88526,15 @@ static const pciDeviceInfo pci_dev_info_102b_2538 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_102b_2539 = { + 0x2539, pci_device_102b_2539, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_102b_2539, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_102b_4536 = { 0x4536, pci_device_102b_4536, #ifdef INIT_SUBSYS_INFO @@ -78734,6 +89558,15 @@ static const pciDeviceInfo pci_dev_info_1039_0648 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1039_0649 = { + 0x0649, pci_device_1039_0649, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_0649, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1039_0650 = { 0x0650, pci_device_1039_0650, #ifdef INIT_SUBSYS_INFO @@ -78788,6 +89621,15 @@ static const pciDeviceInfo pci_dev_info_1039_0662 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1039_0671 = { + 0x0671, pci_device_1039_0671, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_0671, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1039_0730 = { 0x0730, pci_device_1039_0730, #ifdef INIT_SUBSYS_INFO @@ -79310,6 +90152,15 @@ static const pciDeviceInfo pci_dev_info_103c_002a = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_103c_08bc = { + 0x08bc, pci_device_103c_08bc, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_08bc, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_103c_1005 = { 0x1005, pci_device_103c_1005, #ifdef INIT_SUBSYS_INFO @@ -79652,6 +90503,24 @@ static const pciDeviceInfo pci_dev_info_103c_1303 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_103c_1361 = { + 0x1361, pci_device_103c_1361, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_1361, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_103c_1371 = { + 0x1371, pci_device_103c_1371, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_1371, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_103c_2910 = { 0x2910, pci_device_103c_2910, #ifdef INIT_SUBSYS_INFO @@ -79697,6 +90566,15 @@ static const pciDeviceInfo pci_dev_info_103c_30b5 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_103c_31fb = { + 0x31fb, pci_device_103c_31fb, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_31fb, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_103c_3220 = { 0x3220, pci_device_103c_3220, #ifdef INIT_SUBSYS_INFO @@ -79724,6 +90602,33 @@ static const pciDeviceInfo pci_dev_info_103c_3238 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_103c_3300 = { + 0x3300, pci_device_103c_3300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_3300, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_103c_3302 = { + 0x3302, pci_device_103c_3302, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_3302, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_103c_3305 = { + 0x3305, pci_device_103c_3305, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_3305, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_103c_4030 = { 0x4030, pci_device_103c_4030, #ifdef INIT_SUBSYS_INFO @@ -79970,6 +90875,15 @@ static const pciDeviceInfo pci_dev_info_1043_8188 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1043_81e7 = { + 0x81e7, pci_device_1043_81e7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1043_81e7, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1043_81f4 = { 0x81f4, pci_device_1043_81f4, #ifdef INIT_SUBSYS_INFO @@ -80735,6 +91649,15 @@ static const pciDeviceInfo pci_dev_info_104c_803d = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_104c_8101 = { + 0x8101, pci_device_104c_8101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8101, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_104c_8201 = { 0x8201, pci_device_104c_8201, #ifdef INIT_SUBSYS_INFO @@ -81422,6 +92345,89 @@ static const pciDeviceInfo pci_dev_info_1050_9970 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1054_3009 = { + 0x3009, pci_device_1054_3009, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_3009, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1054_300a = { + 0x300a, pci_device_1054_300a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_300a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1054_300b = { + 0x300b, pci_device_1054_300b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_300b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1054_300f = { + 0x300f, pci_device_1054_300f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_300f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1054_3010 = { + 0x3010, pci_device_1054_3010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_3010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1054_3011 = { + 0x3011, pci_device_1054_3011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_3011, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1054_3012 = { + 0x3012, pci_device_1054_3012, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_3012, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1054_3017 = { + 0x3017, pci_device_1054_3017, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_3017, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1054_301d = { + 0x301d, pci_device_1054_301d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1054_301d, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1055_9130 = { 0x9130, pci_device_1055_9130, #ifdef INIT_SUBSYS_INFO @@ -81549,6 +92555,24 @@ static const pciDeviceInfo pci_dev_info_1057_0431 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1057_1073 = { + 0x1073, pci_device_1057_1073, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1057_1073, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1057_1219 = { + 0x1219, pci_device_1057_1219, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1057_1219, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1057_1801 = { 0x1801, pci_device_1057_1801, #ifdef INIT_SUBSYS_INFO @@ -81982,6 +93006,15 @@ static const pciDeviceInfo pci_dev_info_105a_6269 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_105a_6300 = { + 0x6300, pci_device_105a_6300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_6300, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_105a_6621 = { 0x6621, pci_device_105a_6621, #ifdef INIT_SUBSYS_INFO @@ -83013,6 +94046,15 @@ static const pciDeviceInfo pci_dev_info_106b_0055 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_106b_0057 = { + 0x0057, pci_device_106b_0057, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_0057, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_106b_0058 = { 0x0058, pci_device_106b_0058, #ifdef INIT_SUBSYS_INFO @@ -83085,6 +94127,15 @@ static const pciDeviceInfo pci_dev_info_106b_006b = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_106b_0074 = { + 0x0074, pci_device_106b_0074, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_0074, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_106b_1645 = { 0x1645, pci_device_106b_1645, #ifdef INIT_SUBSYS_INFO @@ -83437,6 +94488,15 @@ static const pciDeviceInfo pci_dev_info_1077_2432 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1077_2532 = { + 0x2532, pci_device_1077_2532, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_2532, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1077_3022 = { 0x3022, pci_device_1077_3022, #ifdef INIT_SUBSYS_INFO @@ -83509,6 +94569,24 @@ static const pciDeviceInfo pci_dev_info_1077_6322 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1077_7220 = { + 0x7220, pci_device_1077_7220, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_7220, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_8432 = { + 0x8432, pci_device_1077_8432, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_8432, +#else + NULL, +#endif + 0 +}; #endif static const pciDeviceInfo pci_dev_info_1078_0000 = { 0x0000, pci_device_1078_0000, @@ -83655,6 +94733,15 @@ static const pciDeviceInfo pci_dev_info_107d_2971 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_107d_6654 = { + 0x6654, pci_device_107d_6654, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_107d_6654, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_107e_0001 = { @@ -84093,6 +95180,15 @@ static const pciDeviceInfo pci_dev_info_108e_1103 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_108e_1647 = { + 0x1647, pci_device_108e_1647, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_1647, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_108e_1648 = { 0x1648, pci_device_108e_1648, #ifdef INIT_SUBSYS_INFO @@ -84102,6 +95198,24 @@ static const pciDeviceInfo pci_dev_info_108e_1648 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_108e_16a7 = { + 0x16a7, pci_device_108e_16a7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_16a7, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_16a8 = { + 0x16a8, pci_device_108e_16a8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_16a8, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_108e_2bad = { 0x2bad, pci_device_108e_2bad, #ifdef INIT_SUBSYS_INFO @@ -84129,6 +95243,195 @@ static const pciDeviceInfo pci_dev_info_108e_5043 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_108e_6300 = { + 0x6300, pci_device_108e_6300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6300, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6301 = { + 0x6301, pci_device_108e_6301, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6301, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6302 = { + 0x6302, pci_device_108e_6302, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6302, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6303 = { + 0x6303, pci_device_108e_6303, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6303, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6310 = { + 0x6310, pci_device_108e_6310, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6310, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6311 = { + 0x6311, pci_device_108e_6311, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6311, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6312 = { + 0x6312, pci_device_108e_6312, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6312, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6313 = { + 0x6313, pci_device_108e_6313, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6313, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6320 = { + 0x6320, pci_device_108e_6320, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6320, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6323 = { + 0x6323, pci_device_108e_6323, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6323, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6330 = { + 0x6330, pci_device_108e_6330, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6330, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6331 = { + 0x6331, pci_device_108e_6331, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6331, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6332 = { + 0x6332, pci_device_108e_6332, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6332, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6333 = { + 0x6333, pci_device_108e_6333, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6333, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6340 = { + 0x6340, pci_device_108e_6340, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6340, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6343 = { + 0x6343, pci_device_108e_6343, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6343, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6350 = { + 0x6350, pci_device_108e_6350, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6350, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6353 = { + 0x6353, pci_device_108e_6353, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6353, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_6722 = { + 0x6722, pci_device_108e_6722, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_6722, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_676e = { + 0x676e, pci_device_108e_676e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_676e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_7063 = { + 0x7063, pci_device_108e_7063, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_7063, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_108e_8000 = { 0x8000, pci_device_108e_8000, #ifdef INIT_SUBSYS_INFO @@ -84156,6 +95459,51 @@ static const pciDeviceInfo pci_dev_info_108e_8002 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_108e_80f0 = { + 0x80f0, pci_device_108e_80f0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_80f0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_80f8 = { + 0x80f8, pci_device_108e_80f8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_80f8, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_9010 = { + 0x9010, pci_device_108e_9010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_9010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_9020 = { + 0x9020, pci_device_108e_9020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_9020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_9102 = { + 0x9102, pci_device_108e_9102, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_9102, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_108e_a000 = { 0xa000, pci_device_108e_a000, #ifdef INIT_SUBSYS_INFO @@ -84192,6 +95540,15 @@ static const pciDeviceInfo pci_dev_info_108e_abba = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_108e_c416 = { + 0xc416, pci_device_108e_c416, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_c416, +#else + NULL, +#endif + 0 +}; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1091_0020 = { 0x0020, pci_device_1091_0020, @@ -84275,6 +95632,15 @@ static const pciDeviceInfo pci_dev_info_1091_1091 = { 0 }; #endif +static const pciDeviceInfo pci_dev_info_1092_0028 = { + 0x0028, pci_device_1092_0028, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1092_0028, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1092_00a0 = { 0x00a0, pci_device_1092_00a0, #ifdef INIT_SUBSYS_INFO @@ -84672,6 +96038,15 @@ static const pciDeviceInfo pci_dev_info_1093_70b8 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1093_7144 = { + 0x7144, pci_device_1093_7144, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1093_7144, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1093_b001 = { 0xb001, pci_device_1093_b001, #ifdef INIT_SUBSYS_INFO @@ -84926,6 +96301,15 @@ static const pciDeviceInfo pci_dev_info_1095_3512 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1095_3531 = { + 0x3531, pci_device_1095_3531, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1095_3531, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1098_0001 = { @@ -85511,6 +96895,15 @@ static const pciDeviceInfo pci_dev_info_10b5_0001 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_1024 = { + 0x1024, pci_device_10b5_1024, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_1024, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_1042 = { 0x1042, pci_device_10b5_1042, #ifdef INIT_SUBSYS_INFO @@ -85520,6 +96913,15 @@ static const pciDeviceInfo pci_dev_info_10b5_1042 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_106a = { + 0x106a, pci_device_10b5_106a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_106a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_1076 = { 0x1076, pci_device_10b5_1076, #ifdef INIT_SUBSYS_INFO @@ -85592,6 +96994,69 @@ static const pciDeviceInfo pci_dev_info_10b5_2724 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_6140 = { + 0x6140, pci_device_10b5_6140, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6140, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_6150 = { + 0x6150, pci_device_10b5_6150, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6150, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_6152 = { + 0x6152, pci_device_10b5_6152, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6152, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_6154 = { + 0x6154, pci_device_10b5_6154, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6154, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_6254 = { + 0x6254, pci_device_10b5_6254, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6254, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_6466 = { + 0x6466, pci_device_10b5_6466, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6466, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_6520 = { + 0x6520, pci_device_10b5_6520, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6520, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_6540 = { 0x6540, pci_device_10b5_6540, #ifdef INIT_SUBSYS_INFO @@ -85628,6 +97093,15 @@ static const pciDeviceInfo pci_dev_info_10b5_8111 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_8112 = { + 0x8112, pci_device_10b5_8112, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8112, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_8114 = { 0x8114, pci_device_10b5_8114, #ifdef INIT_SUBSYS_INFO @@ -85637,6 +97111,51 @@ static const pciDeviceInfo pci_dev_info_10b5_8114 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_8311 = { + 0x8311, pci_device_10b5_8311, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8311, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8505 = { + 0x8505, pci_device_10b5_8505, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8505, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8508 = { + 0x8508, pci_device_10b5_8508, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8508, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8509 = { + 0x8509, pci_device_10b5_8509, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8509, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8512 = { + 0x8512, pci_device_10b5_8512, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8512, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_8516 = { 0x8516, pci_device_10b5_8516, #ifdef INIT_SUBSYS_INFO @@ -85646,6 +97165,42 @@ static const pciDeviceInfo pci_dev_info_10b5_8516 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_8517 = { + 0x8517, pci_device_10b5_8517, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8517, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8518 = { + 0x8518, pci_device_10b5_8518, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8518, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8524 = { + 0x8524, pci_device_10b5_8524, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8524, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8525 = { + 0x8525, pci_device_10b5_8525, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8525, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_8532 = { 0x8532, pci_device_10b5_8532, #ifdef INIT_SUBSYS_INFO @@ -85655,6 +97210,33 @@ static const pciDeviceInfo pci_dev_info_10b5_8532 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_8533 = { + 0x8533, pci_device_10b5_8533, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8533, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8547 = { + 0x8547, pci_device_10b5_8547, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8547, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8548 = { + 0x8548, pci_device_10b5_8548, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8548, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_9030 = { 0x9030, pci_device_10b5_9030, #ifdef INIT_SUBSYS_INFO @@ -85682,6 +97264,15 @@ static const pciDeviceInfo pci_dev_info_10b5_9050 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_9052 = { + 0x9052, pci_device_10b5_9052, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_9052, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_9054 = { 0x9054, pci_device_10b5_9054, #ifdef INIT_SUBSYS_INFO @@ -87518,6 +99109,15 @@ static const pciDeviceInfo pci_dev_info_10cd_2500 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10cd_2700 = { + 0x2700, pci_device_10cd_2700, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10cd_2700, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_10cf_2001 = { @@ -88339,6 +99939,15 @@ static const pciDeviceInfo pci_dev_info_10de_0093 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0095 = { + 0x0095, pci_device_10de_0095, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0095, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0098 = { 0x0098, pci_device_10de_0098, #ifdef INIT_SUBSYS_INFO @@ -89401,6 +101010,33 @@ static const pciDeviceInfo pci_dev_info_10de_0193 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0194 = { + 0x0194, pci_device_10de_0194, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0194, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_019d = { + 0x019d, pci_device_10de_019d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_019d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_019e = { + 0x019e, pci_device_10de_019e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_019e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_01a0 = { 0x01a0, pci_device_10de_01a0, #ifdef INIT_SUBSYS_INFO @@ -89536,6 +101172,15 @@ static const pciDeviceInfo pci_dev_info_10de_01c3 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_01d0 = { + 0x01d0, pci_device_10de_01d0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_01d0, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_01d1 = { 0x01d1, pci_device_10de_01d1, #ifdef INIT_SUBSYS_INFO @@ -89590,6 +101235,15 @@ static const pciDeviceInfo pci_dev_info_10de_01da = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_01db = { + 0x01db, pci_device_10de_01db, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_01db, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_01dc = { 0x01dc, pci_device_10de_01dc, #ifdef INIT_SUBSYS_INFO @@ -90427,6 +102081,24 @@ static const pciDeviceInfo pci_dev_info_10de_02e2 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_02e3 = { + 0x02e3, pci_device_10de_02e3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_02e3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_02e4 = { + 0x02e4, pci_device_10de_02e4, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_02e4, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_02f0 = { 0x02f0, pci_device_10de_02f0, #ifdef INIT_SUBSYS_INFO @@ -91255,6 +102927,15 @@ static const pciDeviceInfo pci_dev_info_10de_037a = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_037c = { + 0x037c, pci_device_10de_037c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_037c, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_037e = { 0x037e, pci_device_10de_037e, #ifdef INIT_SUBSYS_INFO @@ -91345,6 +103026,15 @@ static const pciDeviceInfo pci_dev_info_10de_0398 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0399 = { + 0x0399, pci_device_10de_0399, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0399, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_039b = { 0x039b, pci_device_10de_039b, #ifdef INIT_SUBSYS_INFO @@ -91624,6 +103314,15 @@ static const pciDeviceInfo pci_dev_info_10de_03bb = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_03bc = { + 0x03bc, pci_device_10de_03bc, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_03bc, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_03d0 = { 0x03d0, pci_device_10de_03d0, #ifdef INIT_SUBSYS_INFO @@ -91867,6 +103566,231 @@ static const pciDeviceInfo pci_dev_info_10de_03f7 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0400 = { + 0x0400, pci_device_10de_0400, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0400, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0402 = { + 0x0402, pci_device_10de_0402, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0402, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0403 = { + 0x0403, pci_device_10de_0403, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0403, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0404 = { + 0x0404, pci_device_10de_0404, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0404, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0407 = { + 0x0407, pci_device_10de_0407, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0407, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0409 = { + 0x0409, pci_device_10de_0409, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0409, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_040a = { + 0x040a, pci_device_10de_040a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_040a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_040b = { + 0x040b, pci_device_10de_040b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_040b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_040c = { + 0x040c, pci_device_10de_040c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_040c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_040d = { + 0x040d, pci_device_10de_040d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_040d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_040e = { + 0x040e, pci_device_10de_040e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_040e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_040f = { + 0x040f, pci_device_10de_040f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_040f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0420 = { + 0x0420, pci_device_10de_0420, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0420, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0421 = { + 0x0421, pci_device_10de_0421, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0421, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0422 = { + 0x0422, pci_device_10de_0422, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0422, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0423 = { + 0x0423, pci_device_10de_0423, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0423, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0425 = { + 0x0425, pci_device_10de_0425, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0425, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0426 = { + 0x0426, pci_device_10de_0426, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0426, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0427 = { + 0x0427, pci_device_10de_0427, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0427, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0428 = { + 0x0428, pci_device_10de_0428, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0428, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0429 = { + 0x0429, pci_device_10de_0429, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0429, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_042a = { + 0x042a, pci_device_10de_042a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_042a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_042b = { + 0x042b, pci_device_10de_042b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_042b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_042d = { + 0x042d, pci_device_10de_042d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_042d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_042f = { + 0x042f, pci_device_10de_042f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_042f, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0440 = { 0x0440, pci_device_10de_0440, #ifdef INIT_SUBSYS_INFO @@ -92146,6 +104070,429 @@ static const pciDeviceInfo pci_dev_info_10de_045f = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0531 = { + 0x0531, pci_device_10de_0531, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0531, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0533 = { + 0x0533, pci_device_10de_0533, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0533, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_053a = { + 0x053a, pci_device_10de_053a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_053a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_053b = { + 0x053b, pci_device_10de_053b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_053b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_053e = { + 0x053e, pci_device_10de_053e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_053e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0541 = { + 0x0541, pci_device_10de_0541, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0541, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0542 = { + 0x0542, pci_device_10de_0542, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0542, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0543 = { + 0x0543, pci_device_10de_0543, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0543, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0547 = { + 0x0547, pci_device_10de_0547, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0547, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0548 = { + 0x0548, pci_device_10de_0548, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0548, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_054c = { + 0x054c, pci_device_10de_054c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_054c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0550 = { + 0x0550, pci_device_10de_0550, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0550, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0554 = { + 0x0554, pci_device_10de_0554, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0554, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0555 = { + 0x0555, pci_device_10de_0555, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0555, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_055c = { + 0x055c, pci_device_10de_055c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_055c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_055d = { + 0x055d, pci_device_10de_055d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_055d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_055e = { + 0x055e, pci_device_10de_055e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_055e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_055f = { + 0x055f, pci_device_10de_055f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_055f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0560 = { + 0x0560, pci_device_10de_0560, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0560, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0561 = { + 0x0561, pci_device_10de_0561, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0561, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0562 = { + 0x0562, pci_device_10de_0562, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0562, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0563 = { + 0x0563, pci_device_10de_0563, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0563, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_056a = { + 0x056a, pci_device_10de_056a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_056a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0600 = { + 0x0600, pci_device_10de_0600, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0600, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0606 = { + 0x0606, pci_device_10de_0606, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0606, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0609 = { + 0x0609, pci_device_10de_0609, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0609, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_060c = { + 0x060c, pci_device_10de_060c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_060c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0611 = { + 0x0611, pci_device_10de_0611, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0611, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_061a = { + 0x061a, pci_device_10de_061a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_061a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0622 = { + 0x0622, pci_device_10de_0622, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0622, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07cb = { + 0x07cb, pci_device_10de_07cb, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07cb, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07cd = { + 0x07cd, pci_device_10de_07cd, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07cd, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07ce = { + 0x07ce, pci_device_10de_07ce, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07ce, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07cf = { + 0x07cf, pci_device_10de_07cf, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07cf, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07d0 = { + 0x07d0, pci_device_10de_07d0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07d0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07d1 = { + 0x07d1, pci_device_10de_07d1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07d1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07d2 = { + 0x07d2, pci_device_10de_07d2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07d2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07d3 = { + 0x07d3, pci_device_10de_07d3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07d3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07d6 = { + 0x07d6, pci_device_10de_07d6, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07d6, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07dc = { + 0x07dc, pci_device_10de_07dc, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07dc, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07e1 = { + 0x07e1, pci_device_10de_07e1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07e1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07e3 = { + 0x07e3, pci_device_10de_07e3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07e3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07f4 = { + 0x07f4, pci_device_10de_07f4, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07f4, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07fc = { + 0x07fc, pci_device_10de_07fc, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07fc, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_07fe = { + 0x07fe, pci_device_10de_07fe, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_07fe, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0849 = { + 0x0849, pci_device_10de_0849, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0849, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_c615 = { + 0xc615, pci_device_10de_c615, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_c615, +#else + NULL, +#endif + 0 +}; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_10df_1ae5 = { 0x1ae5, pci_device_10df_1ae5, @@ -92156,6 +104503,24 @@ static const pciDeviceInfo pci_dev_info_10df_1ae5 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10df_f011 = { + 0xf011, pci_device_10df_f011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10df_f011, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10df_f015 = { + 0xf015, pci_device_10df_f015, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10df_f015, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10df_f085 = { 0xf085, pci_device_10df_f085, #ifdef INIT_SUBSYS_INFO @@ -92255,6 +104620,15 @@ static const pciDeviceInfo pci_dev_info_10df_f0f5 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10df_f100 = { + 0xf100, pci_device_10df_f100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10df_f100, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10df_f700 = { 0xf700, pci_device_10df_f700, #ifdef INIT_SUBSYS_INFO @@ -92381,6 +104755,15 @@ static const pciDeviceInfo pci_dev_info_10df_fc20 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10df_fc40 = { + 0xfc40, pci_device_10df_fc40, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10df_fc40, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10df_fd00 = { 0xfd00, pci_device_10df_fd00, #ifdef INIT_SUBSYS_INFO @@ -92399,6 +104782,15 @@ static const pciDeviceInfo pci_dev_info_10df_fe00 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10df_fe05 = { + 0xfe05, pci_device_10df_fe05, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10df_fe05, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10df_ff00 = { 0xff00, pci_device_10df_ff00, #ifdef INIT_SUBSYS_INFO @@ -92978,6 +105370,15 @@ static const pciDeviceInfo pci_dev_info_10ec_0261 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10ec_0262 = { + 0x0262, pci_device_10ec_0262, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10ec_0262, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10ec_0280 = { 0x0280, pci_device_10ec_0280, #ifdef INIT_SUBSYS_INFO @@ -93252,6 +105653,15 @@ static const pciDeviceInfo pci_dev_info_10ee_3fc6 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10ee_8380 = { + 0x8380, pci_device_10ee_8380, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10ee_8380, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10ee_8381 = { 0x8381, pci_device_10ee_8381, #ifdef INIT_SUBSYS_INFO @@ -93270,6 +105680,33 @@ static const pciDeviceInfo pci_dev_info_10ee_d154 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_10ee_ebf0 = { + 0xebf0, pci_device_10ee_ebf0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10ee_ebf0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10ee_ebf1 = { + 0xebf1, pci_device_10ee_ebf1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10ee_ebf1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10ee_ebf2 = { + 0xebf2, pci_device_10ee_ebf2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10ee_ebf2, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_10ef_8154 = { @@ -93347,6 +105784,15 @@ static const pciDeviceInfo pci_dev_info_10fc_0005 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1101_0002 = { + 0x0002, pci_device_1101_0002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1101_0002, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1101_1060 = { 0x1060, pci_device_1101_1060, #ifdef INIT_SUBSYS_INFO @@ -93465,6 +105911,15 @@ static const pciDeviceInfo pci_dev_info_1102_0008 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1102_0009 = { + 0x0009, pci_device_1102_0009, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1102_0009, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1102_4001 = { 0x4001, pci_device_1102_4001, #ifdef INIT_SUBSYS_INFO @@ -93592,6 +106047,87 @@ static const pciDeviceInfo pci_dev_info_1103_0009 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1103_1740 = { + 0x1740, pci_device_1103_1740, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_1740, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1103_1742 = { + 0x1742, pci_device_1103_1742, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_1742, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1103_2300 = { + 0x2300, pci_device_1103_2300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_2300, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1103_2310 = { + 0x2310, pci_device_1103_2310, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_2310, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1103_2320 = { + 0x2320, pci_device_1103_2320, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_2320, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1103_2322 = { + 0x2322, pci_device_1103_2322, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_2322, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1103_2340 = { + 0x2340, pci_device_1103_2340, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_2340, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1103_3220 = { + 0x3220, pci_device_1103_3220, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_3220, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1103_3320 = { + 0x3320, pci_device_1103_3320, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1103_3320, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1105_1105 = { @@ -93684,6 +106220,15 @@ static const pciDeviceInfo pci_dev_info_1105_8486 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1105_c622 = { + 0xc622, pci_device_1105_c622, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1105_c622, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1106_0102 = { @@ -94271,6 +106816,15 @@ static const pciDeviceInfo pci_dev_info_1106_1595 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1106_2106 = { + 0x2106, pci_device_1106_2106, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1106_2106, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1106_2204 = { 0x2204, pci_device_1106_2204, #ifdef INIT_SUBSYS_INFO @@ -94991,6 +107545,15 @@ static const pciDeviceInfo pci_dev_info_1106_3259 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1106_3260 = { + 0x3260, pci_device_1106_3260, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1106_3260, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1106_3269 = { 0x3269, pci_device_1106_3269, #ifdef INIT_SUBSYS_INFO @@ -95090,6 +107653,15 @@ static const pciDeviceInfo pci_dev_info_1106_3340 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1106_3343 = { + 0x3343, pci_device_1106_3343, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1106_3343, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1106_3344 = { 0x3344, pci_device_1106_3344, #ifdef INIT_SUBSYS_INFO @@ -95441,6 +108013,15 @@ static const pciDeviceInfo pci_dev_info_1106_6100 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1106_6287 = { + 0x6287, pci_device_1106_6287, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1106_6287, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1106_6327 = { 0x6327, pci_device_1106_6327, #ifdef INIT_SUBSYS_INFO @@ -96662,42 +109243,6 @@ static const pciDeviceInfo pci_dev_info_1119_000d = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0010 = { - 0x0010, pci_device_1119_0010, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0010, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_1119_0011 = { - 0x0011, pci_device_1119_0011, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0011, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_1119_0012 = { - 0x0012, pci_device_1119_0012, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0012, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_1119_0013 = { - 0x0013, pci_device_1119_0013, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0013, -#else - NULL, -#endif - 0 -}; static const pciDeviceInfo pci_dev_info_1119_0100 = { 0x0100, pci_device_1119_0100, #ifdef INIT_SUBSYS_INFO @@ -97202,6 +109747,15 @@ static const pciDeviceInfo pci_dev_info_1119_0300 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1119_0301 = { + 0x0301, pci_device_1119_0301, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1119_0301, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_111a_0000 = { @@ -97949,6 +110503,33 @@ static const pciDeviceInfo pci_dev_info_1133_e02c = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1133_e02e = { + 0xe02e, pci_device_1133_e02e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1133_e02e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1133_e032 = { + 0xe032, pci_device_1133_e032, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1133_e032, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1133_e034 = { + 0xe034, pci_device_1133_e034, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1133_e034, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1134_0001 = { @@ -98754,6 +111335,33 @@ static const pciDeviceInfo pci_dev_info_114f_00cb = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_114f_00cc = { + 0x00cc, pci_device_114f_00cc, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_114f_00cc, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_114f_00cd = { + 0x00cd, pci_device_114f_00cd, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_114f_00cd, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_114f_00ce = { + 0x00ce, pci_device_114f_00ce, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_114f_00ce, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_114f_00d0 = { 0x00d0, pci_device_114f_00d0, #ifdef INIT_SUBSYS_INFO @@ -99061,6 +111669,15 @@ static const pciDeviceInfo pci_dev_info_1166_0017 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1166_0031 = { + 0x0031, pci_device_1166_0031, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0031, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1166_0036 = { 0x0036, pci_device_1166_0036, #ifdef INIT_SUBSYS_INFO @@ -99241,6 +111858,15 @@ static const pciDeviceInfo pci_dev_info_1166_0217 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1166_021b = { + 0x021b, pci_device_1166_021b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_021b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1166_0220 = { 0x0220, pci_device_1166_0220, #ifdef INIT_SUBSYS_INFO @@ -99304,6 +111930,24 @@ static const pciDeviceInfo pci_dev_info_1166_0234 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1166_0235 = { + 0x0235, pci_device_1166_0235, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0235, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0238 = { + 0x0238, pci_device_1166_0238, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0238, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1166_0240 = { 0x0240, pci_device_1166_0240, #ifdef INIT_SUBSYS_INFO @@ -99349,6 +111993,105 @@ static const pciDeviceInfo pci_dev_info_1166_024b = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1166_0406 = { + 0x0406, pci_device_1166_0406, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0406, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0408 = { + 0x0408, pci_device_1166_0408, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0408, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_040a = { + 0x040a, pci_device_1166_040a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_040a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0410 = { + 0x0410, pci_device_1166_0410, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0410, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0411 = { + 0x0411, pci_device_1166_0411, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0411, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0412 = { + 0x0412, pci_device_1166_0412, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0412, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0414 = { + 0x0414, pci_device_1166_0414, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0414, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0416 = { + 0x0416, pci_device_1166_0416, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0416, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0420 = { + 0x0420, pci_device_1166_0420, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0420, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0421 = { + 0x0421, pci_device_1166_0421, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0421, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1166_0422 = { + 0x0422, pci_device_1166_0422, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1166_0422, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_116a_6100 = { @@ -99710,6 +112453,15 @@ static const pciDeviceInfo pci_dev_info_1180_0841 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1180_0843 = { + 0x0843, pci_device_1180_0843, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1180_0843, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1180_0852 = { 0x0852, pci_device_1180_0852, #ifdef INIT_SUBSYS_INFO @@ -99937,6 +112689,15 @@ static const pciDeviceInfo pci_dev_info_1186_3a63 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1186_3c00 = { + 0x3c00, pci_device_1186_3c00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1186_3c00, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1186_4000 = { 0x4000, pci_device_1186_4000, #ifdef INIT_SUBSYS_INFO @@ -99946,6 +112707,15 @@ static const pciDeviceInfo pci_dev_info_1186_4000 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1186_4001 = { + 0x4001, pci_device_1186_4001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1186_4001, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1186_4300 = { 0x4300, pci_device_1186_4300, #ifdef INIT_SUBSYS_INFO @@ -99964,6 +112734,15 @@ static const pciDeviceInfo pci_dev_info_1186_4800 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1186_4b00 = { + 0x4b00, pci_device_1186_4b00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1186_4b00, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1186_4b01 = { 0x4b01, pci_device_1186_4b01, #ifdef INIT_SUBSYS_INFO @@ -99973,6 +112752,24 @@ static const pciDeviceInfo pci_dev_info_1186_4b01 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1186_4b02 = { + 0x4b02, pci_device_1186_4b02, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1186_4b02, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1186_4b03 = { + 0x4b03, pci_device_1186_4b03, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1186_4b03, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1186_4c00 = { 0x4c00, pci_device_1186_4c00, #ifdef INIT_SUBSYS_INFO @@ -100416,6 +113213,15 @@ static const pciDeviceInfo pci_dev_info_11ab_0146 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11ab_0f53 = { + 0x0f53, pci_device_11ab_0f53, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_0f53, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11ab_11ab = { 0x11ab, pci_device_11ab_11ab, #ifdef INIT_SUBSYS_INFO @@ -100578,6 +113384,42 @@ static const pciDeviceInfo pci_dev_info_11ab_4352 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11ab_4353 = { + 0x4353, pci_device_11ab_4353, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_4353, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_4354 = { + 0x4354, pci_device_11ab_4354, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_4354, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_4356 = { + 0x4356, pci_device_11ab_4356, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_4356, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_435a = { + 0x435a, pci_device_11ab_435a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_435a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11ab_4360 = { 0x4360, pci_device_11ab_4360, #ifdef INIT_SUBSYS_INFO @@ -100623,6 +113465,69 @@ static const pciDeviceInfo pci_dev_info_11ab_4364 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11ab_4365 = { + 0x4365, pci_device_11ab_4365, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_4365, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_4366 = { + 0x4366, pci_device_11ab_4366, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_4366, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_4367 = { + 0x4367, pci_device_11ab_4367, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_4367, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_4368 = { + 0x4368, pci_device_11ab_4368, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_4368, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_4369 = { + 0x4369, pci_device_11ab_4369, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_4369, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_436a = { + 0x436a, pci_device_11ab_436a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_436a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11ab_436b = { + 0x436b, pci_device_11ab_436b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_436b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11ab_4611 = { 0x4611, pci_device_11ab_4611, #ifdef INIT_SUBSYS_INFO @@ -100704,6 +113609,15 @@ static const pciDeviceInfo pci_dev_info_11ab_6041 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11ab_6042 = { + 0x6042, pci_device_11ab_6042, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_6042, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11ab_6081 = { 0x6081, pci_device_11ab_6081, #ifdef INIT_SUBSYS_INFO @@ -100722,6 +113636,15 @@ static const pciDeviceInfo pci_dev_info_11ab_6101 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11ab_6121 = { + 0x6121, pci_device_11ab_6121, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_6121, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11ab_6141 = { 0x6141, pci_device_11ab_6141, #ifdef INIT_SUBSYS_INFO @@ -100731,6 +113654,15 @@ static const pciDeviceInfo pci_dev_info_11ab_6141 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11ab_6145 = { + 0x6145, pci_device_11ab_6145, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_6145, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11ab_6450 = { 0x6450, pci_device_11ab_6450, #ifdef INIT_SUBSYS_INFO @@ -100767,6 +113699,15 @@ static const pciDeviceInfo pci_dev_info_11ab_6485 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11ab_7042 = { + 0x7042, pci_device_11ab_7042, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11ab_7042, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11ab_f003 = { 0xf003, pci_device_11ab_f003, #ifdef INIT_SUBSYS_INFO @@ -101513,6 +114454,15 @@ static const pciDeviceInfo pci_dev_info_11d4_1986 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11d4_198b = { + 0x198b, pci_device_11d4_198b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11d4_198b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11d4_5340 = { 0x5340, pci_device_11d4_5340, #ifdef INIT_SUBSYS_INFO @@ -101716,6 +114666,15 @@ static const pciDeviceInfo pci_dev_info_11f6_9881 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11f8_7364 = { + 0x7364, pci_device_11f8_7364, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11f8_7364, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11f8_7375 = { 0x7375, pci_device_11f8_7375, #ifdef INIT_SUBSYS_INFO @@ -101725,6 +114684,24 @@ static const pciDeviceInfo pci_dev_info_11f8_7375 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11f8_7384 = { + 0x7384, pci_device_11f8_7384, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11f8_7384, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11f8_8000 = { + 0x8000, pci_device_11f8_8000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11f8_8000, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_11fe_0001 = { @@ -101862,6 +114839,87 @@ static const pciDeviceInfo pci_dev_info_11fe_000f = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_11fe_0040 = { + 0x0040, pci_device_11fe_0040, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_0040, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11fe_0041 = { + 0x0041, pci_device_11fe_0041, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_0041, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11fe_0042 = { + 0x0042, pci_device_11fe_0042, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_0042, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11fe_0043 = { + 0x0043, pci_device_11fe_0043, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_0043, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11fe_0044 = { + 0x0044, pci_device_11fe_0044, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_0044, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11fe_0045 = { + 0x0045, pci_device_11fe_0045, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_0045, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11fe_0047 = { + 0x0047, pci_device_11fe_0047, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_0047, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11fe_004f = { + 0x004f, pci_device_11fe_004f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_004f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_11fe_0052 = { + 0x0052, pci_device_11fe_0052, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_11fe_0052, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_11fe_0801 = { 0x0801, pci_device_11fe_0801, #ifdef INIT_SUBSYS_INFO @@ -102279,6 +115337,15 @@ static const pciDeviceInfo pci_dev_info_1217_7135 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1217_7136 = { + 0x7136, pci_device_1217_7136, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1217_7136, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1217_71e2 = { 0x71e2, pci_device_1217_71e2, #ifdef INIT_SUBSYS_INFO @@ -102411,6 +115478,53 @@ static const pciDeviceInfo pci_dev_info_1220_1220 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1221_9172 = { + 0x9172, pci_device_1221_9172, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1221_9172, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1221_91a2 = { + 0x91a2, pci_device_1221_91a2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1221_91a2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1221_91c3 = { + 0x91c3, pci_device_1221_91c3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1221_91c3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1221_b152 = { + 0xb152, pci_device_1221_b152, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1221_b152, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1221_c103 = { + 0xc103, pci_device_1221_c103, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1221_c103, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1223_0003 = { 0x0003, pci_device_1223_0003, #ifdef INIT_SUBSYS_INFO @@ -103364,6 +116478,15 @@ static const pciDeviceInfo pci_dev_info_1278_0710 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1278_1101 = { + 0x1101, pci_device_1278_1101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1278_1101, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1279_0060 = { @@ -103696,6 +116819,15 @@ static const pciDeviceInfo pci_dev_info_1283_673a = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1283_8152 = { + 0x8152, pci_device_1283_8152, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1283_8152, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1283_8211 = { 0x8211, pci_device_1283_8211, #ifdef INIT_SUBSYS_INFO @@ -104335,6 +117467,44 @@ static const pciDeviceInfo pci_dev_info_12c5_0086 = { 0 }; #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12c7_0546 = { + 0x0546, pci_device_12c7_0546, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_12c7_0546, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_12c7_0647 = { + 0x0647, pci_device_12c7_0647, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_12c7_0647, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_12c7_0676 = { + 0x0676, pci_device_12c7_0676, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_12c7_0676, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_12c7_0685 = { + 0x0685, pci_device_12c7_0685, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_12c7_0685, +#else + NULL, +#endif + 0 +}; +#endif static const pciDeviceInfo pci_dev_info_12d2_0008 = { 0x0008, pci_device_12d2_0008, #ifdef INIT_SUBSYS_INFO @@ -105065,6 +118235,15 @@ static const pciDeviceInfo pci_dev_info_1307_0054 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1307_005d = { + 0x005d, pci_device_1307_005d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_005d, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1307_005e = { 0x005e, pci_device_1307_005e, #ifdef INIT_SUBSYS_INFO @@ -105074,6 +118253,123 @@ static const pciDeviceInfo pci_dev_info_1307_005e = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1307_005f = { + 0x005f, pci_device_1307_005f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_005f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0060 = { + 0x0060, pci_device_1307_0060, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0060, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0061 = { + 0x0061, pci_device_1307_0061, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0061, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0062 = { + 0x0062, pci_device_1307_0062, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0062, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0063 = { + 0x0063, pci_device_1307_0063, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0063, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0064 = { + 0x0064, pci_device_1307_0064, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0064, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0065 = { + 0x0065, pci_device_1307_0065, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0065, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0066 = { + 0x0066, pci_device_1307_0066, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0066, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0067 = { + 0x0067, pci_device_1307_0067, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0067, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0068 = { + 0x0068, pci_device_1307_0068, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0068, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_006f = { + 0x006f, pci_device_1307_006f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_006f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0078 = { + 0x0078, pci_device_1307_0078, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0078, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1307_0079 = { + 0x0079, pci_device_1307_0079, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1307_0079, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1308_0001 = { @@ -106018,6 +119314,15 @@ static const pciDeviceInfo pci_dev_info_1360_0104 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1360_0105 = { + 0x0105, pci_device_1360_0105, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1360_0105, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1360_0201 = { 0x0201, pci_device_1360_0201, #ifdef INIT_SUBSYS_INFO @@ -106054,6 +119359,15 @@ static const pciDeviceInfo pci_dev_info_1360_0204 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1360_0205 = { + 0x0205, pci_device_1360_0205, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1360_0205, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1360_0301 = { 0x0301, pci_device_1360_0301, #ifdef INIT_SUBSYS_INFO @@ -106081,6 +119395,15 @@ static const pciDeviceInfo pci_dev_info_1360_0303 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1360_0304 = { + 0x0304, pci_device_1360_0304, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1360_0304, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_136a_0004 = { @@ -106738,6 +120061,42 @@ static const pciDeviceInfo pci_dev_info_1389_0001 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1393_0001 = { + 0x0001, pci_device_1393_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1020 = { + 0x1020, pci_device_1393_1020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1021 = { + 0x1021, pci_device_1393_1021, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1021, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1022 = { + 0x1022, pci_device_1393_1022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1022, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1393_1040 = { 0x1040, pci_device_1393_1040, #ifdef INIT_SUBSYS_INFO @@ -106747,6 +120106,60 @@ static const pciDeviceInfo pci_dev_info_1393_1040 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1393_1041 = { + 0x1041, pci_device_1393_1041, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1041, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1042 = { + 0x1042, pci_device_1393_1042, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1042, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1043 = { + 0x1043, pci_device_1393_1043, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1043, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1044 = { + 0x1044, pci_device_1393_1044, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1044, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1080 = { + 0x1080, pci_device_1393_1080, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1080, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1140 = { + 0x1140, pci_device_1393_1140, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1140, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1393_1141 = { 0x1141, pci_device_1393_1141, #ifdef INIT_SUBSYS_INFO @@ -106756,6 +120169,78 @@ static const pciDeviceInfo pci_dev_info_1393_1141 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1393_1142 = { + 0x1142, pci_device_1393_1142, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1142, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1180 = { + 0x1180, pci_device_1393_1180, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1180, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1181 = { + 0x1181, pci_device_1393_1181, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1181, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1320 = { + 0x1320, pci_device_1393_1320, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1320, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1321 = { + 0x1321, pci_device_1393_1321, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1321, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1340 = { + 0x1340, pci_device_1393_1340, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1340, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1341 = { + 0x1341, pci_device_1393_1341, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1341, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1393_1380 = { + 0x1380, pci_device_1393_1380, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1380, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1393_1680 = { 0x1680, pci_device_1393_1680, #ifdef INIT_SUBSYS_INFO @@ -106774,6 +120259,15 @@ static const pciDeviceInfo pci_dev_info_1393_1681 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1393_1682 = { + 0x1682, pci_device_1393_1682, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1393_1682, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1393_2040 = { 0x2040, pci_device_1393_2040, #ifdef INIT_SUBSYS_INFO @@ -106850,6 +120344,15 @@ static const pciDeviceInfo pci_dev_info_1397_30b1 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1397_b700 = { + 0xb700, pci_device_1397_b700, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1397_b700, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1397_f001 = { 0xf001, pci_device_1397_f001, #ifdef INIT_SUBSYS_INFO @@ -106989,6 +120492,15 @@ static const pciDeviceInfo pci_dev_info_13a3_0026 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_13a3_002e = { + 0x002e, pci_device_13a3_002e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_13a3_002e, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_13a8_0152 = { @@ -107114,6 +120626,15 @@ static const pciDeviceInfo pci_dev_info_13c2_000e = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_13c2_1019 = { + 0x1019, pci_device_13c2_1019, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_13c2_1019, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_13c6_0520 = { @@ -107203,6 +120724,17 @@ static const pciDeviceInfo pci_dev_info_13d1_ab08 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_13d3_3219 = { + 0x3219, pci_device_13d3_3219, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_13d3_3219, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_13df_0001 = { 0x0001, pci_device_13df_0001, #ifdef INIT_SUBSYS_INFO @@ -107243,6 +120775,15 @@ static const pciDeviceInfo pci_dev_info_13f0_0201 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_13f0_1021 = { + 0x1021, pci_device_13f0_1021, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_13f0_1021, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_13f0_1023 = { 0x1023, pci_device_13f0_1023, #ifdef INIT_SUBSYS_INFO @@ -107310,6 +120851,15 @@ static const pciDeviceInfo pci_dev_info_13f6_0211 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_13f6_8788 = { + 0x8788, pci_device_13f6_8788, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_13f6_8788, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_13f6_9880 = { 0x9880, pci_device_13f6_9880, #ifdef INIT_SUBSYS_INFO @@ -107339,6 +120889,24 @@ static const pciDeviceInfo pci_dev_info_13fe_1600 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_13fe_1603 = { + 0x1603, pci_device_13fe_1603, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_13fe_1603, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_13fe_1604 = { + 0x1604, pci_device_13fe_1604, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_13fe_1604, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_13fe_16ff = { 0x16ff, pci_device_13fe_16ff, #ifdef INIT_SUBSYS_INFO @@ -107619,6 +121187,107 @@ static const pciDeviceInfo pci_dev_info_1412_1724 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1414_5801 = { + 0x5801, pci_device_1414_5801, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_5801, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_5802 = { + 0x5802, pci_device_1414_5802, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_5802, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_5803 = { + 0x5803, pci_device_1414_5803, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_5803, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_5804 = { + 0x5804, pci_device_1414_5804, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_5804, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_5805 = { + 0x5805, pci_device_1414_5805, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_5805, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_5806 = { + 0x5806, pci_device_1414_5806, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_5806, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_5807 = { + 0x5807, pci_device_1414_5807, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_5807, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_580a = { + 0x580a, pci_device_1414_580a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_580a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_580b = { + 0x580b, pci_device_1414_580b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_580b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_580d = { + 0x580d, pci_device_1414_580d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_580d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1414_5811 = { + 0x5811, pci_device_1414_5811, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1414_5811, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1415_8403 = { 0x8403, pci_device_1415_8403, #ifdef INIT_SUBSYS_INFO @@ -107758,6 +121427,42 @@ static const pciDeviceInfo pci_dev_info_1425_000c = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1425_0030 = { + 0x0030, pci_device_1425_0030, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1425_0030, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1425_0031 = { + 0x0031, pci_device_1425_0031, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1425_0031, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1425_0032 = { + 0x0032, pci_device_1425_0032, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1425_0032, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1425_0033 = { + 0x0033, pci_device_1425_0033, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1425_0033, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_142e_4020 = { @@ -108100,6 +121805,33 @@ static const pciDeviceInfo pci_dev_info_1462_7235 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1462_7242 = { + 0x7242, pci_device_1462_7242, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1462_7242, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1462_7250 = { + 0x7250, pci_device_1462_7250, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1462_7250, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1462_7327 = { + 0x7327, pci_device_1462_7327, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1462_7327, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1462_8725 = { 0x8725, pci_device_1462_8725, #ifdef INIT_SUBSYS_INFO @@ -108172,6 +121904,15 @@ static const pciDeviceInfo pci_dev_info_1462_9591 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1462_b834 = { + 0xb834, pci_device_1462_b834, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1462_b834, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_146c_1430 = { @@ -108632,6 +122373,26 @@ static const pciDeviceInfo pci_dev_info_14d2_e020 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14d6_6101 = { + 0x6101, pci_device_14d6_6101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d6_6101, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d6_6201 = { + 0x6201, pci_device_14d6_6201, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d6_6201, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_14d9_0010 = { 0x0010, pci_device_14d9_0010, #ifdef INIT_SUBSYS_INFO @@ -108881,6 +122642,15 @@ static const pciDeviceInfo pci_dev_info_14e4_1639 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_163a = { + 0x163a, pci_device_14e4_163a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_163a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_1644 = { 0x1644, pci_device_14e4_1644, #ifdef INIT_SUBSYS_INFO @@ -108926,6 +122696,15 @@ static const pciDeviceInfo pci_dev_info_14e4_1648 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_1649 = { + 0x1649, pci_device_14e4_1649, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1649, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_164a = { 0x164a, pci_device_14e4_164a, #ifdef INIT_SUBSYS_INFO @@ -108953,6 +122732,33 @@ static const pciDeviceInfo pci_dev_info_14e4_164d = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_164e = { + 0x164e, pci_device_14e4_164e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_164e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_164f = { + 0x164f, pci_device_14e4_164f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_164f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1650 = { + 0x1650, pci_device_14e4_1650, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1650, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_1653 = { 0x1653, pci_device_14e4_1653, #ifdef INIT_SUBSYS_INFO @@ -108971,6 +122777,15 @@ static const pciDeviceInfo pci_dev_info_14e4_1654 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_1658 = { + 0x1658, pci_device_14e4_1658, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1658, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_1659 = { 0x1659, pci_device_14e4_1659, #ifdef INIT_SUBSYS_INFO @@ -108989,6 +122804,15 @@ static const pciDeviceInfo pci_dev_info_14e4_165a = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_165b = { + 0x165b, pci_device_14e4_165b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_165b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_165d = { 0x165d, pci_device_14e4_165d, #ifdef INIT_SUBSYS_INFO @@ -109079,6 +122903,15 @@ static const pciDeviceInfo pci_dev_info_14e4_1674 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_1676 = { + 0x1676, pci_device_14e4_1676, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1676, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_1677 = { 0x1677, pci_device_14e4_1677, #ifdef INIT_SUBSYS_INFO @@ -109124,6 +122957,15 @@ static const pciDeviceInfo pci_dev_info_14e4_167b = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_167c = { + 0x167c, pci_device_14e4_167c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_167c, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_167d = { 0x167d, pci_device_14e4_167d, #ifdef INIT_SUBSYS_INFO @@ -109151,6 +122993,33 @@ static const pciDeviceInfo pci_dev_info_14e4_167f = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_1680 = { + 0x1680, pci_device_14e4_1680, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1680, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1681 = { + 0x1681, pci_device_14e4_1681, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1681, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1684 = { + 0x1684, pci_device_14e4_1684, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1684, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_1693 = { 0x1693, pci_device_14e4_1693, #ifdef INIT_SUBSYS_INFO @@ -109169,6 +123038,15 @@ static const pciDeviceInfo pci_dev_info_14e4_1696 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_1698 = { + 0x1698, pci_device_14e4_1698, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1698, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_169a = { 0x169a, pci_device_14e4_169a, #ifdef INIT_SUBSYS_INFO @@ -109394,6 +123272,15 @@ static const pciDeviceInfo pci_dev_info_14e4_4212 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_4220 = { + 0x4220, pci_device_14e4_4220, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4220, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_4301 = { 0x4301, pci_device_14e4_4301, #ifdef INIT_SUBSYS_INFO @@ -109547,6 +123434,15 @@ static const pciDeviceInfo pci_dev_info_14e4_4326 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_4328 = { + 0x4328, pci_device_14e4_4328, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4328, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_4329 = { 0x4329, pci_device_14e4_4329, #ifdef INIT_SUBSYS_INFO @@ -109556,6 +123452,15 @@ static const pciDeviceInfo pci_dev_info_14e4_4329 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_432b = { + 0x432b, pci_device_14e4_432b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_432b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14e4_4344 = { 0x4344, pci_device_14e4_4344, #ifdef INIT_SUBSYS_INFO @@ -110024,6 +123929,15 @@ static const pciDeviceInfo pci_dev_info_14e4_5850 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_b800 = { + 0xb800, pci_device_14e4_b800, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_b800, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_14ea_ab06 = { @@ -110892,6 +124806,15 @@ static const pciDeviceInfo pci_dev_info_14f1_5047 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_14f1_5b7a = { + 0x5b7a, pci_device_14f1_5b7a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_5b7a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_14f1_8234 = { 0x8234, pci_device_14f1_8234, #ifdef INIT_SUBSYS_INFO @@ -111312,6 +125235,33 @@ static const pciDeviceInfo pci_dev_info_1524_0610 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1524_0730 = { + 0x0730, pci_device_1524_0730, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_0730, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_0750 = { + 0x0750, pci_device_1524_0750, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_0750, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_0751 = { + 0x0751, pci_device_1524_0751, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_0751, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1524_1211 = { 0x1211, pci_device_1524_1211, #ifdef INIT_SUBSYS_INFO @@ -111674,6 +125624,35 @@ static const pciDeviceInfo pci_dev_info_157c_8001 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1590_0001 = { + 0x0001, pci_device_1590_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1590_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1590_0002 = { + 0x0002, pci_device_1590_0002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1590_0002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1590_a01d = { + 0xa01d, pci_device_1590_a01d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1590_a01d, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1592_0781 = { 0x0781, pci_device_1592_0781, #ifdef INIT_SUBSYS_INFO @@ -111785,7 +125764,43 @@ static const pciDeviceInfo pci_dev_info_15ad_0720 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_15ad_0740 = { + 0x0740, pci_device_15ad_0740, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15ad_0740, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15ad_0770 = { + 0x0770, pci_device_15ad_0770, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15ad_0770, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15ad_0801 = { + 0x0801, pci_device_15ad_0801, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15ad_0801, +#else + NULL, +#endif + 0 +}; #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15b3_0191 = { + 0x0191, pci_device_15b3_0191, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_0191, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_15b3_5274 = { 0x5274, pci_device_15b3_5274, #ifdef INIT_SUBSYS_INFO @@ -111867,6 +125882,69 @@ static const pciDeviceInfo pci_dev_info_15b3_6282 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_15b3_6340 = { + 0x6340, pci_device_15b3_6340, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6340, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_634a = { + 0x634a, pci_device_15b3_634a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_634a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_6354 = { + 0x6354, pci_device_15b3_6354, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6354, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_6368 = { + 0x6368, pci_device_15b3_6368, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6368, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_6732 = { + 0x6732, pci_device_15b3_6732, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6732, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_673c = { + 0x673c, pci_device_15b3_673c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_673c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_6750 = { + 0x6750, pci_device_15b3_6750, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6750, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_15b8_1003 = { @@ -111998,6 +126076,15 @@ static const pciDeviceInfo pci_dev_info_15e8_0130 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_15e8_0131 = { + 0x0131, pci_device_15e8_0131, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15e8_0131, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_15e9_1841 = { @@ -112187,6 +126274,17 @@ static const pciDeviceInfo pci_dev_info_163c_5449 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1657_0646 = { + 0x0646, pci_device_1657_0646, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1657_0646, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_165a_c100 = { 0xc100, pci_device_165a_c100, #ifdef INIT_SUBSYS_INFO @@ -112501,6 +126599,24 @@ static const pciDeviceInfo pci_dev_info_16ab_8501 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16ae_0001 = { + 0x0001, pci_device_16ae_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ae_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16ae_000a = { + 0x000a, pci_device_16ae_000a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ae_000a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_16ae_1141 = { 0x1141, pci_device_16ae_1141, #ifdef INIT_SUBSYS_INFO @@ -112510,6 +126626,15 @@ static const pciDeviceInfo pci_dev_info_16ae_1141 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_16ae_1841 = { + 0x1841, pci_device_16ae_1841, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ae_1841, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_16c6_8695 = { @@ -112521,6 +126646,15 @@ static const pciDeviceInfo pci_dev_info_16c6_8695 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_16c6_8842 = { + 0x8842, pci_device_16c6_8842, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16c6_8842, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_16ca_0001 = { @@ -112534,6 +126668,285 @@ static const pciDeviceInfo pci_dev_info_16ca_0001 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16d5_0504 = { + 0x0504, pci_device_16d5_0504, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_0504, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_0520 = { + 0x0520, pci_device_16d5_0520, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_0520, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_0521 = { + 0x0521, pci_device_16d5_0521, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_0521, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_1020 = { + 0x1020, pci_device_16d5_1020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_1020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_1065 = { + 0x1065, pci_device_16d5_1065, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_1065, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_2004 = { + 0x2004, pci_device_16d5_2004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_2004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_2020 = { + 0x2020, pci_device_16d5_2020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_2020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_2065 = { + 0x2065, pci_device_16d5_2065, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_2065, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_3020 = { + 0x3020, pci_device_16d5_3020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_3020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_3065 = { + 0x3065, pci_device_16d5_3065, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_3065, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4243 = { + 0x4243, pci_device_16d5_4243, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4243, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4248 = { + 0x4248, pci_device_16d5_4248, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4248, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_424b = { + 0x424b, pci_device_16d5_424b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_424b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4253 = { + 0x4253, pci_device_16d5_4253, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4253, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4312 = { + 0x4312, pci_device_16d5_4312, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4312, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4313 = { + 0x4313, pci_device_16d5_4313, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4313, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4322 = { + 0x4322, pci_device_16d5_4322, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4322, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4323 = { + 0x4323, pci_device_16d5_4323, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4323, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4350 = { + 0x4350, pci_device_16d5_4350, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4350, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4353 = { + 0x4353, pci_device_16d5_4353, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4353, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4357 = { + 0x4357, pci_device_16d5_4357, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4357, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4457 = { + 0x4457, pci_device_16d5_4457, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4457, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_464d = { + 0x464d, pci_device_16d5_464d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_464d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4850 = { + 0x4850, pci_device_16d5_4850, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4850, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4a42 = { + 0x4a42, pci_device_16d5_4a42, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4a42, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4a50 = { + 0x4a50, pci_device_16d5_4a50, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4a50, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4a56 = { + 0x4a56, pci_device_16d5_4a56, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4a56, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4b47 = { + 0x4b47, pci_device_16d5_4b47, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4b47, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4c40 = { + 0x4c40, pci_device_16d5_4c40, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4c40, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4c60 = { + 0x4c60, pci_device_16d5_4c60, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4c60, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_4d4d = { + 0x4d4d, pci_device_16d5_4d4d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_4d4d, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_16d5_4d4e = { 0x4d4e, pci_device_16d5_4d4e, #ifdef INIT_SUBSYS_INFO @@ -112543,6 +126956,33 @@ static const pciDeviceInfo pci_dev_info_16d5_4d4e = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_16d5_524d = { + 0x524d, pci_device_16d5_524d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_524d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_5335 = { + 0x5335, pci_device_16d5_5335, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_5335, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16d5_5456 = { + 0x5456, pci_device_16d5_5456, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16d5_5456, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_16e3_1e0f = { @@ -112565,6 +127005,15 @@ static const pciDeviceInfo pci_dev_info_16e5_6000 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_16e5_6300 = { + 0x6300, pci_device_16e5_6300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16e5_6300, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_16ec_00ff = { @@ -112678,6 +127127,15 @@ static const pciDeviceInfo pci_dev_info_1734_1085 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1734_1098 = { + 0x1098, pci_device_1734_1098, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1734_1098, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1737_0013 = { @@ -112794,6 +127252,17 @@ static const pciDeviceInfo pci_dev_info_1743_8139 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_177d_0001 = { + 0x0001, pci_device_177d_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_177d_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1796_0001 = { 0x0001, pci_device_1796_0001, #ifdef INIT_SUBSYS_INFO @@ -112848,6 +127317,15 @@ static const pciDeviceInfo pci_dev_info_1796_0006 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1796_000d = { + 0x000d, pci_device_1796_000d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1796_000d, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1799_6001 = { @@ -113107,6 +127585,15 @@ static const pciDeviceInfo pci_dev_info_17d3_1260 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_17d3_1280 = { + 0x1280, pci_device_17d3_1280, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1280, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_17d5_5831 = { @@ -113138,24 +127625,6 @@ static const pciDeviceInfo pci_dev_info_17db_0101 = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_17db_0201 = { - 0x0201, pci_device_17db_0201, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_17db_0201, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_17db_0202 = { - 0x0202, pci_device_17db_0202, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_17db_0202, -#else - NULL, -#endif - 0 -}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_17e4_0001 = { @@ -113321,6 +127790,15 @@ static const pciDeviceInfo pci_dev_info_1814_0201 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1814_0300 = { + 0x0300, pci_device_1814_0300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1814_0300, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1814_0301 = { 0x0301, pci_device_1814_0301, #ifdef INIT_SUBSYS_INFO @@ -113348,8 +127826,26 @@ static const pciDeviceInfo pci_dev_info_1814_0401 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1814_e932 = { + 0xe932, pci_device_1814_e932, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1814_e932, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1822_0001 = { + 0x0001, pci_device_1822_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1822_0001, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1822_4e35 = { 0x4e35, pci_device_1822_4e35, #ifdef INIT_SUBSYS_INFO @@ -113392,6 +127888,17 @@ static const pciDeviceInfo pci_dev_info_182e_0008 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_182f_000b = { + 0x000b, pci_device_182f_000b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_182f_000b, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_183b_08a7 = { 0x08a7, pci_device_183b_08a7, #ifdef INIT_SUBSYS_INFO @@ -113488,6 +127995,82 @@ static const pciDeviceInfo pci_dev_info_1867_6282 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_186c_0612 = { + 0x0612, pci_device_186c_0612, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_186c_0612, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_186c_0614 = { + 0x0614, pci_device_186c_0614, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_186c_0614, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_186c_0622 = { + 0x0622, pci_device_186c_0622, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_186c_0622, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_186c_0624 = { + 0x0624, pci_device_186c_0624, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_186c_0624, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_186c_0625 = { + 0x0625, pci_device_186c_0625, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_186c_0625, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1876_a101 = { + 0xa101, pci_device_1876_a101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1876_a101, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1876_a102 = { + 0xa102, pci_device_1876_a102, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1876_a102, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1876_a103 = { + 0xa103, pci_device_1876_a103, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1876_a103, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_187e_3403 = { 0x3403, pci_device_187e_3403, #ifdef INIT_SUBSYS_INFO @@ -113582,6 +128165,15 @@ static const pciDeviceInfo pci_dev_info_18ac_d820 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_18ac_db30 = { + 0xdb30, pci_device_18ac_db30, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ac_db30, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_18b8_b001 = { @@ -113767,6 +128359,42 @@ static const pciDeviceInfo pci_dev_info_18f7_000a = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_18f7_000f = { + 0x000f, pci_device_18f7_000f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_000f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18f7_0010 = { + 0x0010, pci_device_18f7_0010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_0010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18f7_0011 = { + 0x0011, pci_device_18f7_0011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_0011, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18f7_0014 = { + 0x0014, pci_device_18f7_0014, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_0014, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1904_8139 = { @@ -113896,6 +128524,132 @@ static const pciDeviceInfo pci_dev_info_1957_0012 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1957_0013 = { + 0x0013, pci_device_1957_0013, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0013, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0014 = { + 0x0014, pci_device_1957_0014, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0014, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0015 = { + 0x0015, pci_device_1957_0015, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0015, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0018 = { + 0x0018, pci_device_1957_0018, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0018, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0019 = { + 0x0019, pci_device_1957_0019, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0019, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_001a = { + 0x001a, pci_device_1957_001a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_001a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0020 = { + 0x0020, pci_device_1957_0020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0021 = { + 0x0021, pci_device_1957_0021, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0021, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0022 = { + 0x0022, pci_device_1957_0022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0022, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0023 = { + 0x0023, pci_device_1957_0023, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0023, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0030 = { + 0x0030, pci_device_1957_0030, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0030, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0031 = { + 0x0031, pci_device_1957_0031, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0031, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0032 = { + 0x0032, pci_device_1957_0032, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0032, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0033 = { + 0x0033, pci_device_1957_0033, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0033, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1957_0080 = { 0x0080, pci_device_1957_0080, #ifdef INIT_SUBSYS_INFO @@ -113968,6 +128722,24 @@ static const pciDeviceInfo pci_dev_info_1957_0087 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1957_7010 = { + 0x7010, pci_device_1957_7010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_7010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_7011 = { + 0x7011, pci_device_1957_7011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_7011, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1966_1975 = { @@ -113990,6 +128762,15 @@ static const pciDeviceInfo pci_dev_info_1969_1048 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_1969_2048 = { + 0x2048, pci_device_1969_2048, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1969_2048, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_196a_0101 = { @@ -114268,6 +129049,28 @@ static const pciDeviceInfo pci_dev_info_1a1d_1a17 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1a73_0001 = { + 0x0001, pci_device_1a73_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1a73_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1a8c_1100 = { + 0x1100, pci_device_1a8c_1100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1a8c_1100, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1c1c_0001 = { 0x0001, pci_device_1c1c_0001, #ifdef INIT_SUBSYS_INFO @@ -114359,6 +129162,35 @@ static const pciDeviceInfo pci_dev_info_1fc1_0010 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1fc9_3009 = { + 0x3009, pci_device_1fc9_3009, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1fc9_3009, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1fc9_3010 = { + 0x3010, pci_device_1fc9_3010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1fc9_3010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1fc9_3014 = { + 0x3014, pci_device_1fc9_3014, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1fc9_3014, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1fce_0001 = { 0x0001, pci_device_1fce_0001, #ifdef INIT_SUBSYS_INFO @@ -114855,6 +129687,71 @@ static const pciDeviceInfo pci_dev_info_4033_1360 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4040_0001 = { + 0x0001, pci_device_4040_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4040_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4040_0002 = { + 0x0002, pci_device_4040_0002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4040_0002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4040_0003 = { + 0x0003, pci_device_4040_0003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4040_0003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4040_0004 = { + 0x0004, pci_device_4040_0004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4040_0004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4040_0005 = { + 0x0005, pci_device_4040_0005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4040_0005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4040_0024 = { + 0x0024, pci_device_4040_0024, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4040_0024, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4040_0025 = { + 0x0025, pci_device_4040_0025, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4040_0025, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_4144_0044 = { 0x0044, pci_device_4144_0044, #ifdef INIT_SUBSYS_INFO @@ -114917,6 +129814,24 @@ static const pciDeviceInfo pci_dev_info_4916_1960 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_494f_0c60 = { + 0x0c60, pci_device_494f_0c60, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_494f_0c60, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_494f_0e60 = { + 0x0e60, pci_device_494f_0e60, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_494f_0e60, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_494f_10e8 = { 0x10e8, pci_device_494f_10e8, #ifdef INIT_SUBSYS_INFO @@ -117595,6 +132510,33 @@ static const pciDeviceInfo pci_dev_info_8086_10a4 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_10a5 = { + 0x10a5, pci_device_8086_10a5, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10a5, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10a7 = { + 0x10a7, pci_device_8086_10a7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10a7, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10a9 = { + 0x10a9, pci_device_8086_10a9, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10a9, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_10b0 = { 0x10b0, pci_device_8086_10b0, #ifdef INIT_SUBSYS_INFO @@ -117640,6 +132582,15 @@ static const pciDeviceInfo pci_dev_info_8086_10b5 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_10b6 = { + 0x10b6, pci_device_8086_10b6, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10b6, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_10b9 = { 0x10b9, pci_device_8086_10b9, #ifdef INIT_SUBSYS_INFO @@ -117676,6 +132627,51 @@ static const pciDeviceInfo pci_dev_info_8086_10bc = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_10bd = { + 0x10bd, pci_device_8086_10bd, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10bd, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10bf = { + 0x10bf, pci_device_8086_10bf, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10bf, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10c0 = { + 0x10c0, pci_device_8086_10c0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10c0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10c2 = { + 0x10c2, pci_device_8086_10c2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10c2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10c3 = { + 0x10c3, pci_device_8086_10c3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10c3, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_10c4 = { 0x10c4, pci_device_8086_10c4, #ifdef INIT_SUBSYS_INFO @@ -117694,6 +132690,96 @@ static const pciDeviceInfo pci_dev_info_8086_10c5 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_10c6 = { + 0x10c6, pci_device_8086_10c6, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10c6, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10c7 = { + 0x10c7, pci_device_8086_10c7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10c7, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10cb = { + 0x10cb, pci_device_8086_10cb, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10cb, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10d5 = { + 0x10d5, pci_device_8086_10d5, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10d5, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10d6 = { + 0x10d6, pci_device_8086_10d6, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10d6, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10d9 = { + 0x10d9, pci_device_8086_10d9, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10d9, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10da = { + 0x10da, pci_device_8086_10da, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10da, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10dd = { + 0x10dd, pci_device_8086_10dd, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10dd, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10e2 = { + 0x10e2, pci_device_8086_10e2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10e2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_10f5 = { + 0x10f5, pci_device_8086_10f5, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_10f5, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_1107 = { 0x1107, pci_device_8086_1107, #ifdef INIT_SUBSYS_INFO @@ -120277,6 +135363,33 @@ static const pciDeviceInfo pci_dev_info_8086_27a6 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_27ac = { + 0x27ac, pci_device_8086_27ac, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_27ac, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_27ad = { + 0x27ad, pci_device_8086_27ad, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_27ad, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_27ae = { + 0x27ae, pci_device_8086_27ae, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_27ae, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_27b0 = { 0x27b0, pci_device_8086_27b0, #ifdef INIT_SUBSYS_INFO @@ -120790,24 +135903,6 @@ static const pciDeviceInfo pci_dev_info_8086_2850 = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2910 = { - 0x2910, pci_device_8086_2910, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2910, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_8086_2911 = { - 0x2911, pci_device_8086_2911, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2911, -#else - NULL, -#endif - 0 -}; static const pciDeviceInfo pci_dev_info_8086_2912 = { 0x2912, pci_device_8086_2912, #ifdef INIT_SUBSYS_INFO @@ -120835,6 +135930,15 @@ static const pciDeviceInfo pci_dev_info_8086_2916 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_2917 = { + 0x2917, pci_device_8086_2917, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2917, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_2918 = { 0x2918, pci_device_8086_2918, #ifdef INIT_SUBSYS_INFO @@ -120844,6 +135948,15 @@ static const pciDeviceInfo pci_dev_info_8086_2918 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_2919 = { + 0x2919, pci_device_8086_2919, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2919, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_2920 = { 0x2920, pci_device_8086_2920, #ifdef INIT_SUBSYS_INFO @@ -120907,19 +136020,28 @@ static const pciDeviceInfo pci_dev_info_8086_2928 = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_292d = { - 0x292d, pci_device_8086_292d, +static const pciDeviceInfo pci_dev_info_8086_2929 = { + 0x2929, pci_device_8086_2929, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_292d, + pci_ss_list_8086_2929, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_292c = { + 0x292c, pci_device_8086_292c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_292c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_292e = { - 0x292e, pci_device_8086_292e, +static const pciDeviceInfo pci_dev_info_8086_292d = { + 0x292d, pci_device_8086_292d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_292e, + pci_ss_list_8086_292d, #else NULL, #endif @@ -121186,6 +136308,24 @@ static const pciDeviceInfo pci_dev_info_8086_2982 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_2983 = { + 0x2983, pci_device_8086_2983, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2983, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2984 = { + 0x2984, pci_device_8086_2984, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2984, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_2990 = { 0x2990, pci_device_8086_2990, #ifdef INIT_SUBSYS_INFO @@ -121753,10 +136893,739 @@ static const pciDeviceInfo pci_dev_info_8086_2a07 = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_3092 = { - 0x3092, pci_device_8086_3092, +static const pciDeviceInfo pci_dev_info_8086_2a10 = { + 0x2a10, pci_device_8086_2a10, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a10, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a11 = { + 0x2a11, pci_device_8086_2a11, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a11, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a12 = { + 0x2a12, pci_device_8086_2a12, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a12, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a13 = { + 0x2a13, pci_device_8086_2a13, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a13, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a14 = { + 0x2a14, pci_device_8086_2a14, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a14, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a15 = { + 0x2a15, pci_device_8086_2a15, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a15, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a16 = { + 0x2a16, pci_device_8086_2a16, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a16, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a17 = { + 0x2a17, pci_device_8086_2a17, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a17, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a40 = { + 0x2a40, pci_device_8086_2a40, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a40, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a41 = { + 0x2a41, pci_device_8086_2a41, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a41, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a42 = { + 0x2a42, pci_device_8086_2a42, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a42, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a43 = { + 0x2a43, pci_device_8086_2a43, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a43, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a44 = { + 0x2a44, pci_device_8086_2a44, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a44, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a45 = { + 0x2a45, pci_device_8086_2a45, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a45, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a46 = { + 0x2a46, pci_device_8086_2a46, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a46, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a47 = { + 0x2a47, pci_device_8086_2a47, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a47, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a50 = { + 0x2a50, pci_device_8086_2a50, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a50, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a51 = { + 0x2a51, pci_device_8086_2a51, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a51, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a52 = { + 0x2a52, pci_device_8086_2a52, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a52, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2a53 = { + 0x2a53, pci_device_8086_2a53, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2a53, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c01 = { + 0x2c01, pci_device_8086_2c01, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c01, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c10 = { + 0x2c10, pci_device_8086_2c10, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c10, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c11 = { + 0x2c11, pci_device_8086_2c11, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c11, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c14 = { + 0x2c14, pci_device_8086_2c14, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c14, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c15 = { + 0x2c15, pci_device_8086_2c15, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c15, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c18 = { + 0x2c18, pci_device_8086_2c18, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c18, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c19 = { + 0x2c19, pci_device_8086_2c19, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c19, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c1a = { + 0x2c1a, pci_device_8086_2c1a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c1a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c1c = { + 0x2c1c, pci_device_8086_2c1c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c1c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c20 = { + 0x2c20, pci_device_8086_2c20, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c20, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c21 = { + 0x2c21, pci_device_8086_2c21, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c21, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c22 = { + 0x2c22, pci_device_8086_2c22, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c22, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c23 = { + 0x2c23, pci_device_8086_2c23, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c23, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c28 = { + 0x2c28, pci_device_8086_2c28, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_3092, + pci_ss_list_8086_2c28, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c29 = { + 0x2c29, pci_device_8086_2c29, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c29, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c2a = { + 0x2c2a, pci_device_8086_2c2a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c2a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c2b = { + 0x2c2b, pci_device_8086_2c2b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c2b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c30 = { + 0x2c30, pci_device_8086_2c30, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c30, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c31 = { + 0x2c31, pci_device_8086_2c31, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c31, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c32 = { + 0x2c32, pci_device_8086_2c32, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c32, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c33 = { + 0x2c33, pci_device_8086_2c33, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c33, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2c40 = { + 0x2c40, pci_device_8086_2c40, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2c40, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e00 = { + 0x2e00, pci_device_8086_2e00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e00, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e01 = { + 0x2e01, pci_device_8086_2e01, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e01, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e02 = { + 0x2e02, pci_device_8086_2e02, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e02, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e03 = { + 0x2e03, pci_device_8086_2e03, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e03, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e04 = { + 0x2e04, pci_device_8086_2e04, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e04, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e05 = { + 0x2e05, pci_device_8086_2e05, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e05, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e06 = { + 0x2e06, pci_device_8086_2e06, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e06, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e07 = { + 0x2e07, pci_device_8086_2e07, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e07, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e10 = { + 0x2e10, pci_device_8086_2e10, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e10, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e11 = { + 0x2e11, pci_device_8086_2e11, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e11, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e12 = { + 0x2e12, pci_device_8086_2e12, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e12, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e13 = { + 0x2e13, pci_device_8086_2e13, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e13, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e14 = { + 0x2e14, pci_device_8086_2e14, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e14, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e15 = { + 0x2e15, pci_device_8086_2e15, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e15, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e16 = { + 0x2e16, pci_device_8086_2e16, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e16, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e17 = { + 0x2e17, pci_device_8086_2e17, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e17, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e20 = { + 0x2e20, pci_device_8086_2e20, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e20, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e21 = { + 0x2e21, pci_device_8086_2e21, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e21, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e22 = { + 0x2e22, pci_device_8086_2e22, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e22, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e23 = { + 0x2e23, pci_device_8086_2e23, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e23, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e24 = { + 0x2e24, pci_device_8086_2e24, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e24, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e25 = { + 0x2e25, pci_device_8086_2e25, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e25, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e26 = { + 0x2e26, pci_device_8086_2e26, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e26, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e27 = { + 0x2e27, pci_device_8086_2e27, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e27, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e30 = { + 0x2e30, pci_device_8086_2e30, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e30, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e31 = { + 0x2e31, pci_device_8086_2e31, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e31, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e32 = { + 0x2e32, pci_device_8086_2e32, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e32, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e33 = { + 0x2e33, pci_device_8086_2e33, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e33, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e34 = { + 0x2e34, pci_device_8086_2e34, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e34, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e35 = { + 0x2e35, pci_device_8086_2e35, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e35, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e36 = { + 0x2e36, pci_device_8086_2e36, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e36, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e37 = { + 0x2e37, pci_device_8086_2e37, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e37, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e40 = { + 0x2e40, pci_device_8086_2e40, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e40, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e41 = { + 0x2e41, pci_device_8086_2e41, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e41, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e42 = { + 0x2e42, pci_device_8086_2e42, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e42, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e43 = { + 0x2e43, pci_device_8086_2e43, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e43, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e44 = { + 0x2e44, pci_device_8086_2e44, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e44, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e45 = { + 0x2e45, pci_device_8086_2e45, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e45, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e46 = { + 0x2e46, pci_device_8086_2e46, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e46, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_2e47 = { + 0x2e47, pci_device_8086_2e47, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_2e47, #else NULL, #endif @@ -121771,6 +137640,42 @@ static const pciDeviceInfo pci_dev_info_8086_3200 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_3313 = { + 0x3313, pci_device_8086_3313, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3313, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_331b = { + 0x331b, pci_device_8086_331b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_331b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3331 = { + 0x3331, pci_device_8086_3331, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3331, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3339 = { + 0x3339, pci_device_8086_3339, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3339, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_3340 = { 0x3340, pci_device_8086_3340, #ifdef INIT_SUBSYS_INFO @@ -121789,6 +137694,393 @@ static const pciDeviceInfo pci_dev_info_8086_3341 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_3363 = { + 0x3363, pci_device_8086_3363, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3363, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_33c3 = { + 0x33c3, pci_device_8086_33c3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_33c3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_33cb = { + 0x33cb, pci_device_8086_33cb, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_33cb, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3400 = { + 0x3400, pci_device_8086_3400, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3400, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3401 = { + 0x3401, pci_device_8086_3401, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3401, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3402 = { + 0x3402, pci_device_8086_3402, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3402, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3403 = { + 0x3403, pci_device_8086_3403, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3403, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3404 = { + 0x3404, pci_device_8086_3404, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3404, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3405 = { + 0x3405, pci_device_8086_3405, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3405, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3406 = { + 0x3406, pci_device_8086_3406, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3406, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3407 = { + 0x3407, pci_device_8086_3407, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3407, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3408 = { + 0x3408, pci_device_8086_3408, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3408, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3409 = { + 0x3409, pci_device_8086_3409, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3409, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_340a = { + 0x340a, pci_device_8086_340a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_340a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_340b = { + 0x340b, pci_device_8086_340b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_340b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_340c = { + 0x340c, pci_device_8086_340c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_340c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_340d = { + 0x340d, pci_device_8086_340d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_340d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_340e = { + 0x340e, pci_device_8086_340e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_340e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_340f = { + 0x340f, pci_device_8086_340f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_340f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3410 = { + 0x3410, pci_device_8086_3410, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3410, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3411 = { + 0x3411, pci_device_8086_3411, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3411, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3418 = { + 0x3418, pci_device_8086_3418, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3418, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3419 = { + 0x3419, pci_device_8086_3419, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3419, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3420 = { + 0x3420, pci_device_8086_3420, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3420, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3421 = { + 0x3421, pci_device_8086_3421, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3421, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3422 = { + 0x3422, pci_device_8086_3422, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3422, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3423 = { + 0x3423, pci_device_8086_3423, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3423, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3425 = { + 0x3425, pci_device_8086_3425, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3425, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3426 = { + 0x3426, pci_device_8086_3426, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3426, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3427 = { + 0x3427, pci_device_8086_3427, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3427, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3428 = { + 0x3428, pci_device_8086_3428, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3428, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3429 = { + 0x3429, pci_device_8086_3429, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3429, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_342a = { + 0x342a, pci_device_8086_342a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_342a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_342b = { + 0x342b, pci_device_8086_342b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_342b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_342c = { + 0x342c, pci_device_8086_342c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_342c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_342d = { + 0x342d, pci_device_8086_342d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_342d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_342e = { + 0x342e, pci_device_8086_342e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_342e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_342f = { + 0x342f, pci_device_8086_342f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_342f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3430 = { + 0x3430, pci_device_8086_3430, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3430, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3431 = { + 0x3431, pci_device_8086_3431, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3431, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3432 = { + 0x3432, pci_device_8086_3432, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3432, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3433 = { + 0x3433, pci_device_8086_3433, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3433, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3438 = { + 0x3438, pci_device_8086_3438, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3438, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_3500 = { 0x3500, pci_device_8086_3500, #ifdef INIT_SUBSYS_INFO @@ -122275,6 +138567,456 @@ static const pciDeviceInfo pci_dev_info_8086_3610 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_3a00 = { + 0x3a00, pci_device_8086_3a00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a00, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a02 = { + 0x3a02, pci_device_8086_3a02, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a02, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a05 = { + 0x3a05, pci_device_8086_3a05, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a05, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a06 = { + 0x3a06, pci_device_8086_3a06, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a06, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a14 = { + 0x3a14, pci_device_8086_3a14, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a14, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a16 = { + 0x3a16, pci_device_8086_3a16, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a16, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a18 = { + 0x3a18, pci_device_8086_3a18, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a18, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a1a = { + 0x3a1a, pci_device_8086_3a1a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a1a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a20 = { + 0x3a20, pci_device_8086_3a20, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a20, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a22 = { + 0x3a22, pci_device_8086_3a22, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a22, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a25 = { + 0x3a25, pci_device_8086_3a25, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a25, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a26 = { + 0x3a26, pci_device_8086_3a26, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a26, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a30 = { + 0x3a30, pci_device_8086_3a30, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a30, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a32 = { + 0x3a32, pci_device_8086_3a32, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a32, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a34 = { + 0x3a34, pci_device_8086_3a34, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a34, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a35 = { + 0x3a35, pci_device_8086_3a35, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a35, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a36 = { + 0x3a36, pci_device_8086_3a36, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a36, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a37 = { + 0x3a37, pci_device_8086_3a37, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a37, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a38 = { + 0x3a38, pci_device_8086_3a38, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a38, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a39 = { + 0x3a39, pci_device_8086_3a39, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a39, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a3a = { + 0x3a3a, pci_device_8086_3a3a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a3a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a3c = { + 0x3a3c, pci_device_8086_3a3c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a3c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a3e = { + 0x3a3e, pci_device_8086_3a3e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a3e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a40 = { + 0x3a40, pci_device_8086_3a40, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a40, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a42 = { + 0x3a42, pci_device_8086_3a42, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a42, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a44 = { + 0x3a44, pci_device_8086_3a44, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a44, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a46 = { + 0x3a46, pci_device_8086_3a46, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a46, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a48 = { + 0x3a48, pci_device_8086_3a48, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a48, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a4a = { + 0x3a4a, pci_device_8086_3a4a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a4a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a4c = { + 0x3a4c, pci_device_8086_3a4c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a4c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a51 = { + 0x3a51, pci_device_8086_3a51, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a51, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a55 = { + 0x3a55, pci_device_8086_3a55, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a55, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a60 = { + 0x3a60, pci_device_8086_3a60, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a60, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a62 = { + 0x3a62, pci_device_8086_3a62, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a62, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a64 = { + 0x3a64, pci_device_8086_3a64, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a64, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a65 = { + 0x3a65, pci_device_8086_3a65, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a65, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a66 = { + 0x3a66, pci_device_8086_3a66, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a66, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a67 = { + 0x3a67, pci_device_8086_3a67, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a67, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a68 = { + 0x3a68, pci_device_8086_3a68, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a68, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a69 = { + 0x3a69, pci_device_8086_3a69, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a69, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a6a = { + 0x3a6a, pci_device_8086_3a6a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a6a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a6c = { + 0x3a6c, pci_device_8086_3a6c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a6c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a6e = { + 0x3a6e, pci_device_8086_3a6e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a6e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a70 = { + 0x3a70, pci_device_8086_3a70, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a70, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a72 = { + 0x3a72, pci_device_8086_3a72, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a72, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a74 = { + 0x3a74, pci_device_8086_3a74, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a74, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a76 = { + 0x3a76, pci_device_8086_3a76, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a76, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a78 = { + 0x3a78, pci_device_8086_3a78, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a78, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a7a = { + 0x3a7a, pci_device_8086_3a7a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a7a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_3a7c = { + 0x3a7c, pci_device_8086_3a7c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_3a7c, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_4000 = { 0x4000, pci_device_8086_4000, #ifdef INIT_SUBSYS_INFO @@ -122284,19 +139026,19 @@ static const pciDeviceInfo pci_dev_info_8086_4000 = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_4008 = { - 0x4008, pci_device_8086_4008, +static const pciDeviceInfo pci_dev_info_8086_4001 = { + 0x4001, pci_device_8086_4001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_4008, + pci_ss_list_8086_4001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_4010 = { - 0x4010, pci_device_8086_4010, +static const pciDeviceInfo pci_dev_info_8086_4003 = { + 0x4003, pci_device_8086_4003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_4010, + pci_ss_list_8086_4003, #else NULL, #endif @@ -122419,6 +139161,15 @@ static const pciDeviceInfo pci_dev_info_8086_4030 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_4031 = { + 0x4031, pci_device_8086_4031, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_4031, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_4032 = { 0x4032, pci_device_8086_4032, #ifdef INIT_SUBSYS_INFO @@ -122491,6 +139242,33 @@ static const pciDeviceInfo pci_dev_info_8086_4227 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_4229 = { + 0x4229, pci_device_8086_4229, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_4229, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_4230 = { + 0x4230, pci_device_8086_4230, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_4230, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_444e = { + 0x444e, pci_device_8086_444e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_444e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_5001 = { 0x5001, pci_device_8086_5001, #ifdef INIT_SUBSYS_INFO @@ -122500,6 +139278,393 @@ static const pciDeviceInfo pci_dev_info_8086_5001 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_5002 = { + 0x5002, pci_device_8086_5002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5009 = { + 0x5009, pci_device_8086_5009, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5009, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_500d = { + 0x500d, pci_device_8086_500d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_500d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_500e = { + 0x500e, pci_device_8086_500e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_500e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_500f = { + 0x500f, pci_device_8086_500f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_500f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5010 = { + 0x5010, pci_device_8086_5010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5012 = { + 0x5012, pci_device_8086_5012, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5012, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5020 = { + 0x5020, pci_device_8086_5020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5021 = { + 0x5021, pci_device_8086_5021, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5021, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5023 = { + 0x5023, pci_device_8086_5023, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5023, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5024 = { + 0x5024, pci_device_8086_5024, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5024, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5025 = { + 0x5025, pci_device_8086_5025, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5025, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5028 = { + 0x5028, pci_device_8086_5028, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5028, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5029 = { + 0x5029, pci_device_8086_5029, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5029, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_502a = { + 0x502a, pci_device_8086_502a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_502a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_502b = { + 0x502b, pci_device_8086_502b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_502b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_502c = { + 0x502c, pci_device_8086_502c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_502c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5030 = { + 0x5030, pci_device_8086_5030, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5030, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5031 = { + 0x5031, pci_device_8086_5031, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5031, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5032 = { + 0x5032, pci_device_8086_5032, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5032, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5033 = { + 0x5033, pci_device_8086_5033, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5033, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5035 = { + 0x5035, pci_device_8086_5035, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5035, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5037 = { + 0x5037, pci_device_8086_5037, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5037, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5039 = { + 0x5039, pci_device_8086_5039, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5039, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_503a = { + 0x503a, pci_device_8086_503a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_503a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_503b = { + 0x503b, pci_device_8086_503b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_503b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_503c = { + 0x503c, pci_device_8086_503c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_503c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_503d = { + 0x503d, pci_device_8086_503d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_503d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_503e = { + 0x503e, pci_device_8086_503e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_503e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_503f = { + 0x503f, pci_device_8086_503f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_503f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5040 = { + 0x5040, pci_device_8086_5040, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5040, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5041 = { + 0x5041, pci_device_8086_5041, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5041, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5042 = { + 0x5042, pci_device_8086_5042, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5042, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5043 = { + 0x5043, pci_device_8086_5043, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5043, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5044 = { + 0x5044, pci_device_8086_5044, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5044, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5045 = { + 0x5045, pci_device_8086_5045, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5045, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5046 = { + 0x5046, pci_device_8086_5046, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5046, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5047 = { + 0x5047, pci_device_8086_5047, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5047, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5048 = { + 0x5048, pci_device_8086_5048, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5048, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_5049 = { + 0x5049, pci_device_8086_5049, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_5049, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_504a = { + 0x504a, pci_device_8086_504a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_504a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_504b = { + 0x504b, pci_device_8086_504b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_504b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_504c = { + 0x504c, pci_device_8086_504c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_504c, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_5200 = { 0x5200, pci_device_8086_5200, #ifdef INIT_SUBSYS_INFO @@ -123049,6 +140214,150 @@ static const pciDeviceInfo pci_dev_info_8086_8002 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_8003 = { + 0x8003, pci_device_8086_8003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8100 = { + 0x8100, pci_device_8086_8100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8108 = { + 0x8108, pci_device_8086_8108, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8108, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8110 = { + 0x8110, pci_device_8086_8110, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8110, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8112 = { + 0x8112, pci_device_8086_8112, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8112, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8114 = { + 0x8114, pci_device_8086_8114, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8114, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8115 = { + 0x8115, pci_device_8086_8115, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8115, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8116 = { + 0x8116, pci_device_8086_8116, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8116, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8117 = { + 0x8117, pci_device_8086_8117, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8117, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8118 = { + 0x8118, pci_device_8086_8118, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8118, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_8119 = { + 0x8119, pci_device_8086_8119, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_8119, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_811a = { + 0x811a, pci_device_8086_811a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_811a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_811b = { + 0x811b, pci_device_8086_811b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_811b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_811c = { + 0x811c, pci_device_8086_811c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_811c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_811d = { + 0x811d, pci_device_8086_811d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_811d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_811e = { + 0x811e, pci_device_8086_811e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_811e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_84c4 = { 0x84c4, pci_device_8086_84c4, #ifdef INIT_SUBSYS_INFO @@ -124270,6 +141579,24 @@ static const pciDeviceInfo pci_dev_info_9005_0241 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_9005_0242 = { + 0x0242, pci_device_9005_0242, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_0242, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_9005_0243 = { + 0x0243, pci_device_9005_0243, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_0243, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_9005_0250 = { 0x0250, pci_device_9005_0250, #ifdef INIT_SUBSYS_INFO @@ -124342,6 +141669,24 @@ static const pciDeviceInfo pci_dev_info_9005_0412 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_9005_0415 = { + 0x0415, pci_device_9005_0415, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_0415, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_9005_0416 = { + 0x0416, pci_device_9005_0416, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_0416, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_9005_041e = { 0x041e, pci_device_9005_041e, #ifdef INIT_SUBSYS_INFO @@ -124877,6 +142222,15 @@ static const pciDeviceInfo pci_dev_info_cddd_0200 = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_d161_0120 = { + 0x0120, pci_device_d161_0120, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_d161_0120, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_d161_0205 = { 0x0205, pci_device_d161_0205, #ifdef INIT_SUBSYS_INFO @@ -124904,15 +142258,6 @@ static const pciDeviceInfo pci_dev_info_d161_0405 = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_d161_0406 = { - 0x0406, pci_device_d161_0406, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_d161_0406, -#else - NULL, -#endif - 0 -}; static const pciDeviceInfo pci_dev_info_d161_0410 = { 0x0410, pci_device_d161_0410, #ifdef INIT_SUBSYS_INFO @@ -124922,10 +142267,10 @@ static const pciDeviceInfo pci_dev_info_d161_0410 = { #endif 0 }; -static const pciDeviceInfo pci_dev_info_d161_0411 = { - 0x0411, pci_device_d161_0411, +static const pciDeviceInfo pci_dev_info_d161_0800 = { + 0x0800, pci_device_d161_0800, #ifdef INIT_SUBSYS_INFO - pci_ss_list_d161_0411, + pci_ss_list_d161_0800, #else NULL, #endif @@ -124940,6 +142285,24 @@ static const pciDeviceInfo pci_dev_info_d161_2400 = { #endif 0 }; +static const pciDeviceInfo pci_dev_info_d161_3400 = { + 0x3400, pci_device_d161_3400, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_d161_3400, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_d161_b410 = { + 0xb410, pci_device_d161_b410, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_d161_b410, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_d4d4_0601 = { @@ -125433,6 +142796,7 @@ static const pciDeviceInfo *pci_dev_list_0070[] = { &pci_dev_info_0070_4800, &pci_dev_info_0070_4801, &pci_dev_info_0070_4803, + &pci_dev_info_0070_7801, &pci_dev_info_0070_8003, &pci_dev_info_0070_8801, &pci_dev_info_0070_c801, @@ -125477,6 +142841,7 @@ static const pciDeviceInfo *pci_dev_list_02ac[] = { NULL }; #endif +#define pci_dev_list_02e0 NULL #define pci_dev_list_0315 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_0357[] = { @@ -125514,6 +142879,7 @@ static const pciDeviceInfo *pci_dev_list_050d[] = { NULL }; #endif +#define pci_dev_list_058f NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_05a9[] = { &pci_dev_info_05a9_8519, @@ -125544,7 +142910,6 @@ static const pciDeviceInfo *pci_dev_list_0675[] = { #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_067b[] = { - &pci_dev_info_067b_2303, &pci_dev_info_067b_3507, NULL }; @@ -125553,6 +142918,7 @@ static const pciDeviceInfo *pci_dev_list_067b[] = { #define pci_dev_list_0721 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_07ca[] = { + &pci_dev_info_07ca_a301, &pci_dev_info_07ca_b808, NULL }; @@ -125565,12 +142931,18 @@ static const pciDeviceInfo *pci_dev_list_08ff[] = { NULL }; #endif -#define pci_dev_list_0925 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_0925[] = { + &pci_dev_info_0925_1234, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_093a[] = { &pci_dev_info_093a_010e, &pci_dev_info_093a_010f, &pci_dev_info_093a_2468, + &pci_dev_info_093a_2600, &pci_dev_info_093a_2603, &pci_dev_info_093a_2608, NULL @@ -125748,12 +143120,15 @@ static const pciDeviceInfo *pci_dev_list_1000[] = { &pci_dev_info_1000_0054, &pci_dev_info_1000_0055, &pci_dev_info_1000_0056, + &pci_dev_info_1000_0057, &pci_dev_info_1000_0058, + &pci_dev_info_1000_0059, &pci_dev_info_1000_005a, &pci_dev_info_1000_005c, &pci_dev_info_1000_005e, &pci_dev_info_1000_0060, &pci_dev_info_1000_0062, + &pci_dev_info_1000_007c, &pci_dev_info_1000_008f, &pci_dev_info_1000_0407, &pci_dev_info_1000_0408, @@ -125800,8 +143175,10 @@ static const pciDeviceInfo *pci_dev_list_1001[] = { #endif static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_3150, + &pci_dev_info_1002_3151, &pci_dev_info_1002_3152, &pci_dev_info_1002_3154, + &pci_dev_info_1002_3171, &pci_dev_info_1002_3e50, &pci_dev_info_1002_3e54, &pci_dev_info_1002_3e70, @@ -125838,6 +143215,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_4336, &pci_dev_info_1002_4337, &pci_dev_info_1002_4341, + &pci_dev_info_1002_4342, &pci_dev_info_1002_4345, &pci_dev_info_1002_4347, &pci_dev_info_1002_4348, @@ -125875,6 +143253,18 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_438c, &pci_dev_info_1002_438d, &pci_dev_info_1002_438e, + &pci_dev_info_1002_4390, + &pci_dev_info_1002_4391, + &pci_dev_info_1002_4392, + &pci_dev_info_1002_4393, + &pci_dev_info_1002_4394, + &pci_dev_info_1002_4395, + &pci_dev_info_1002_4396, + &pci_dev_info_1002_4397, + &pci_dev_info_1002_4398, + &pci_dev_info_1002_4399, + &pci_dev_info_1002_439c, + &pci_dev_info_1002_439d, &pci_dev_info_1002_4437, &pci_dev_info_1002_4554, &pci_dev_info_1002_4654, @@ -125946,6 +143336,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_4c6e, &pci_dev_info_1002_4d46, &pci_dev_info_1002_4d4c, + &pci_dev_info_1002_4d52, &pci_dev_info_1002_4e44, &pci_dev_info_1002_4e45, &pci_dev_info_1002_4e46, @@ -126080,13 +143471,44 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_5952, &pci_dev_info_1002_5954, &pci_dev_info_1002_5955, + &pci_dev_info_1002_5956, + &pci_dev_info_1002_5957, + &pci_dev_info_1002_5958, &pci_dev_info_1002_5960, &pci_dev_info_1002_5961, &pci_dev_info_1002_5962, &pci_dev_info_1002_5964, + &pci_dev_info_1002_5965, &pci_dev_info_1002_5969, &pci_dev_info_1002_5974, &pci_dev_info_1002_5975, + &pci_dev_info_1002_5978, + &pci_dev_info_1002_5979, + &pci_dev_info_1002_597a, + &pci_dev_info_1002_597b, + &pci_dev_info_1002_597c, + &pci_dev_info_1002_597d, + &pci_dev_info_1002_597e, + &pci_dev_info_1002_597f, + &pci_dev_info_1002_5980, + &pci_dev_info_1002_5981, + &pci_dev_info_1002_5982, + &pci_dev_info_1002_5a10, + &pci_dev_info_1002_5a11, + &pci_dev_info_1002_5a12, + &pci_dev_info_1002_5a13, + &pci_dev_info_1002_5a14, + &pci_dev_info_1002_5a15, + &pci_dev_info_1002_5a16, + &pci_dev_info_1002_5a17, + &pci_dev_info_1002_5a18, + &pci_dev_info_1002_5a19, + &pci_dev_info_1002_5a1a, + &pci_dev_info_1002_5a1b, + &pci_dev_info_1002_5a1c, + &pci_dev_info_1002_5a1d, + &pci_dev_info_1002_5a1e, + &pci_dev_info_1002_5a1f, &pci_dev_info_1002_5a33, &pci_dev_info_1002_5a34, &pci_dev_info_1002_5a36, @@ -126110,6 +143532,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_5c61, &pci_dev_info_1002_5c63, &pci_dev_info_1002_5d44, + &pci_dev_info_1002_5d45, &pci_dev_info_1002_5d48, &pci_dev_info_1002_5d49, &pci_dev_info_1002_5d4a, @@ -126164,12 +143587,15 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_715e, &pci_dev_info_1002_715f, &pci_dev_info_1002_7162, + &pci_dev_info_1002_7163, &pci_dev_info_1002_7166, + &pci_dev_info_1002_716e, &pci_dev_info_1002_7172, &pci_dev_info_1002_7173, &pci_dev_info_1002_7180, &pci_dev_info_1002_7181, &pci_dev_info_1002_7183, + &pci_dev_info_1002_7186, &pci_dev_info_1002_7187, &pci_dev_info_1002_7188, &pci_dev_info_1002_718a, @@ -126184,6 +143610,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_71a7, &pci_dev_info_1002_71bb, &pci_dev_info_1002_71c0, + &pci_dev_info_1002_71c1, &pci_dev_info_1002_71c2, &pci_dev_info_1002_71c4, &pci_dev_info_1002_71c5, @@ -126195,6 +143622,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_71d6, &pci_dev_info_1002_71de, &pci_dev_info_1002_71e0, + &pci_dev_info_1002_71e1, &pci_dev_info_1002_71e2, &pci_dev_info_1002_71e6, &pci_dev_info_1002_71e7, @@ -126230,11 +143658,63 @@ static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_7834, &pci_dev_info_1002_7835, &pci_dev_info_1002_7838, + &pci_dev_info_1002_7910, + &pci_dev_info_1002_7912, + &pci_dev_info_1002_7913, + &pci_dev_info_1002_7915, + &pci_dev_info_1002_7916, + &pci_dev_info_1002_7917, &pci_dev_info_1002_7919, &pci_dev_info_1002_791e, &pci_dev_info_1002_791f, + &pci_dev_info_1002_793b, &pci_dev_info_1002_793f, + &pci_dev_info_1002_7941, + &pci_dev_info_1002_7942, + &pci_dev_info_1002_796e, &pci_dev_info_1002_7c37, + &pci_dev_info_1002_9400, + &pci_dev_info_1002_940a, + &pci_dev_info_1002_940b, + &pci_dev_info_1002_94c1, + &pci_dev_info_1002_94c3, + &pci_dev_info_1002_94c4, + &pci_dev_info_1002_94c8, + &pci_dev_info_1002_94c9, + &pci_dev_info_1002_94cb, + &pci_dev_info_1002_94cc, + &pci_dev_info_1002_9501, + &pci_dev_info_1002_9504, + &pci_dev_info_1002_9505, + &pci_dev_info_1002_9507, + &pci_dev_info_1002_9508, + &pci_dev_info_1002_950f, + &pci_dev_info_1002_9515, + &pci_dev_info_1002_9559, + &pci_dev_info_1002_9581, + &pci_dev_info_1002_9586, + &pci_dev_info_1002_9587, + &pci_dev_info_1002_9588, + &pci_dev_info_1002_9589, + &pci_dev_info_1002_9591, + &pci_dev_info_1002_9593, + &pci_dev_info_1002_9596, + &pci_dev_info_1002_9598, + &pci_dev_info_1002_95c0, + &pci_dev_info_1002_95c4, + &pci_dev_info_1002_95c5, + &pci_dev_info_1002_960f, + &pci_dev_info_1002_9610, + &pci_dev_info_1002_9611, + &pci_dev_info_1002_9612, + &pci_dev_info_1002_9613, + &pci_dev_info_1002_9614, + &pci_dev_info_1002_aa00, + &pci_dev_info_1002_aa08, + &pci_dev_info_1002_aa10, + &pci_dev_info_1002_aa18, + &pci_dev_info_1002_aa20, + &pci_dev_info_1002_aa28, &pci_dev_info_1002_cab0, &pci_dev_info_1002_cab2, &pci_dev_info_1002_cab3, @@ -126348,6 +143828,7 @@ static const pciDeviceInfo *pci_dev_list_1011[] = { &pci_dev_info_1011_0014, &pci_dev_info_1011_0016, &pci_dev_info_1011_0017, + &pci_dev_info_1011_0018, &pci_dev_info_1011_0019, &pci_dev_info_1011_001a, &pci_dev_info_1011_0021, @@ -126464,6 +143945,7 @@ static const pciDeviceInfo *pci_dev_list_1014[] = { &pci_dev_info_1014_01bd, &pci_dev_info_1014_01c1, &pci_dev_info_1014_01e6, + &pci_dev_info_1014_01ef, &pci_dev_info_1014_01ff, &pci_dev_info_1014_0219, &pci_dev_info_1014_021b, @@ -126478,6 +143960,8 @@ static const pciDeviceInfo *pci_dev_list_1014[] = { &pci_dev_info_1014_0302, &pci_dev_info_1014_0308, &pci_dev_info_1014_0314, + &pci_dev_info_1014_032d, + &pci_dev_info_1014_0339, &pci_dev_info_1014_3022, &pci_dev_info_1014_4022, &pci_dev_info_1014_ffff, @@ -126541,6 +144025,16 @@ static const pciDeviceInfo *pci_dev_list_1022[] = { &pci_dev_info_1022_1101, &pci_dev_info_1022_1102, &pci_dev_info_1022_1103, + &pci_dev_info_1022_1200, + &pci_dev_info_1022_1201, + &pci_dev_info_1022_1202, + &pci_dev_info_1022_1203, + &pci_dev_info_1022_1204, + &pci_dev_info_1022_1300, + &pci_dev_info_1022_1301, + &pci_dev_info_1022_1302, + &pci_dev_info_1022_1303, + &pci_dev_info_1022_1304, &pci_dev_info_1022_2000, &pci_dev_info_1022_2001, &pci_dev_info_1022_2003, @@ -126603,6 +144097,18 @@ static const pciDeviceInfo *pci_dev_list_1022[] = { &pci_dev_info_1022_746d, &pci_dev_info_1022_746e, &pci_dev_info_1022_756b, + &pci_dev_info_1022_9600, + &pci_dev_info_1022_9601, + &pci_dev_info_1022_9602, + &pci_dev_info_1022_9603, + &pci_dev_info_1022_9604, + &pci_dev_info_1022_9605, + &pci_dev_info_1022_9606, + &pci_dev_info_1022_9607, + &pci_dev_info_1022_9608, + &pci_dev_info_1022_9609, + &pci_dev_info_1022_960a, + &pci_dev_info_1022_960b, NULL }; static const pciDeviceInfo *pci_dev_list_1023[] = { @@ -126650,6 +144156,7 @@ static const pciDeviceInfo *pci_dev_list_1023[] = { &pci_dev_info_1023_9880, &pci_dev_info_1023_9910, &pci_dev_info_1023_9930, + &pci_dev_info_1023_9960, NULL }; #define pci_dev_list_1024 NULL @@ -126729,7 +144236,6 @@ static const pciDeviceInfo *pci_dev_list_1028[] = { &pci_dev_info_1028_0013, &pci_dev_info_1028_0014, &pci_dev_info_1028_0015, - &pci_dev_info_1028_1f03, NULL }; #define pci_dev_list_1029 NULL @@ -126765,6 +144271,7 @@ static const pciDeviceInfo *pci_dev_list_102b[] = { &pci_dev_info_102b_2527, &pci_dev_info_102b_2537, &pci_dev_info_102b_2538, + &pci_dev_info_102b_2539, &pci_dev_info_102b_4536, &pci_dev_info_102b_4cdc, &pci_dev_info_102b_4fc5, @@ -126912,12 +144419,14 @@ static const pciDeviceInfo *pci_dev_list_1039[] = { &pci_dev_info_1039_0645, &pci_dev_info_1039_0646, &pci_dev_info_1039_0648, + &pci_dev_info_1039_0649, &pci_dev_info_1039_0650, &pci_dev_info_1039_0651, &pci_dev_info_1039_0655, &pci_dev_info_1039_0660, &pci_dev_info_1039_0661, &pci_dev_info_1039_0662, + &pci_dev_info_1039_0671, &pci_dev_info_1039_0730, &pci_dev_info_1039_0733, &pci_dev_info_1039_0735, @@ -126981,6 +144490,7 @@ static const pciDeviceInfo *pci_dev_list_1039[] = { #define pci_dev_list_103b NULL static const pciDeviceInfo *pci_dev_list_103c[] = { &pci_dev_info_103c_002a, + &pci_dev_info_103c_08bc, &pci_dev_info_103c_1005, &pci_dev_info_103c_1008, &pci_dev_info_103c_1028, @@ -127019,14 +144529,20 @@ static const pciDeviceInfo *pci_dev_list_103c[] = { &pci_dev_info_103c_12fa, &pci_dev_info_103c_1302, &pci_dev_info_103c_1303, + &pci_dev_info_103c_1361, + &pci_dev_info_103c_1371, &pci_dev_info_103c_2910, &pci_dev_info_103c_2925, &pci_dev_info_103c_3080, &pci_dev_info_103c_3085, &pci_dev_info_103c_30b5, + &pci_dev_info_103c_31fb, &pci_dev_info_103c_3220, &pci_dev_info_103c_3230, &pci_dev_info_103c_3238, + &pci_dev_info_103c_3300, + &pci_dev_info_103c_3302, + &pci_dev_info_103c_3305, &pci_dev_info_103c_4030, &pci_dev_info_103c_4031, &pci_dev_info_103c_4037, @@ -127067,6 +144583,7 @@ static const pciDeviceInfo *pci_dev_list_1043[] = { &pci_dev_info_1043_8168, &pci_dev_info_1043_8187, &pci_dev_info_1043_8188, + &pci_dev_info_1043_81e7, &pci_dev_info_1043_81f4, NULL }; @@ -127181,6 +144698,7 @@ static const pciDeviceInfo *pci_dev_list_104c[] = { &pci_dev_info_104c_803b, &pci_dev_info_104c_803c, &pci_dev_info_104c_803d, + &pci_dev_info_104c_8101, &pci_dev_info_104c_8201, &pci_dev_info_104c_8204, &pci_dev_info_104c_8231, @@ -127274,7 +144792,20 @@ static const pciDeviceInfo *pci_dev_list_1050[] = { #define pci_dev_list_1051 NULL #define pci_dev_list_1052 NULL #define pci_dev_list_1053 NULL -#define pci_dev_list_1054 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1054[] = { + &pci_dev_info_1054_3009, + &pci_dev_info_1054_300a, + &pci_dev_info_1054_300b, + &pci_dev_info_1054_300f, + &pci_dev_info_1054_3010, + &pci_dev_info_1054_3011, + &pci_dev_info_1054_3012, + &pci_dev_info_1054_3017, + &pci_dev_info_1054_301d, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1055[] = { &pci_dev_info_1055_9130, @@ -127296,6 +144827,8 @@ static const pciDeviceInfo *pci_dev_list_1057[] = { &pci_dev_info_1057_0012, &pci_dev_info_1057_0100, &pci_dev_info_1057_0431, + &pci_dev_info_1057_1073, + &pci_dev_info_1057_1219, &pci_dev_info_1057_1801, &pci_dev_info_1057_18c0, &pci_dev_info_1057_18c1, @@ -127350,6 +144883,7 @@ static const pciDeviceInfo *pci_dev_list_105a[] = { &pci_dev_info_105a_5300, &pci_dev_info_105a_6268, &pci_dev_info_105a_6269, + &pci_dev_info_105a_6300, &pci_dev_info_105a_6621, &pci_dev_info_105a_6622, &pci_dev_info_105a_6624, @@ -127510,6 +145044,7 @@ static const pciDeviceInfo *pci_dev_list_106b[] = { &pci_dev_info_106b_0053, &pci_dev_info_106b_0054, &pci_dev_info_106b_0055, + &pci_dev_info_106b_0057, &pci_dev_info_106b_0058, &pci_dev_info_106b_0059, &pci_dev_info_106b_0066, @@ -127518,6 +145053,7 @@ static const pciDeviceInfo *pci_dev_list_106b[] = { &pci_dev_info_106b_0069, &pci_dev_info_106b_006a, &pci_dev_info_106b_006b, + &pci_dev_info_106b_0074, &pci_dev_info_106b_1645, NULL }; @@ -127588,6 +145124,7 @@ static const pciDeviceInfo *pci_dev_list_1077[] = { &pci_dev_info_1077_2322, &pci_dev_info_1077_2422, &pci_dev_info_1077_2432, + &pci_dev_info_1077_2532, &pci_dev_info_1077_3022, &pci_dev_info_1077_3032, &pci_dev_info_1077_4010, @@ -127596,6 +145133,8 @@ static const pciDeviceInfo *pci_dev_list_1077[] = { &pci_dev_info_1077_5432, &pci_dev_info_1077_6312, &pci_dev_info_1077_6322, + &pci_dev_info_1077_7220, + &pci_dev_info_1077_8432, NULL }; #endif @@ -127624,6 +145163,7 @@ static const pciDeviceInfo *pci_dev_list_107d[] = { &pci_dev_info_107d_204d, &pci_dev_info_107d_2134, &pci_dev_info_107d_2971, + &pci_dev_info_107d_6654, NULL }; #endif @@ -127718,17 +145258,47 @@ static const pciDeviceInfo *pci_dev_list_108e[] = { &pci_dev_info_108e_1101, &pci_dev_info_108e_1102, &pci_dev_info_108e_1103, + &pci_dev_info_108e_1647, &pci_dev_info_108e_1648, + &pci_dev_info_108e_16a7, + &pci_dev_info_108e_16a8, &pci_dev_info_108e_2bad, &pci_dev_info_108e_5000, &pci_dev_info_108e_5043, + &pci_dev_info_108e_6300, + &pci_dev_info_108e_6301, + &pci_dev_info_108e_6302, + &pci_dev_info_108e_6303, + &pci_dev_info_108e_6310, + &pci_dev_info_108e_6311, + &pci_dev_info_108e_6312, + &pci_dev_info_108e_6313, + &pci_dev_info_108e_6320, + &pci_dev_info_108e_6323, + &pci_dev_info_108e_6330, + &pci_dev_info_108e_6331, + &pci_dev_info_108e_6332, + &pci_dev_info_108e_6333, + &pci_dev_info_108e_6340, + &pci_dev_info_108e_6343, + &pci_dev_info_108e_6350, + &pci_dev_info_108e_6353, + &pci_dev_info_108e_6722, + &pci_dev_info_108e_676e, + &pci_dev_info_108e_7063, &pci_dev_info_108e_8000, &pci_dev_info_108e_8001, &pci_dev_info_108e_8002, + &pci_dev_info_108e_80f0, + &pci_dev_info_108e_80f8, + &pci_dev_info_108e_9010, + &pci_dev_info_108e_9020, + &pci_dev_info_108e_9102, &pci_dev_info_108e_a000, &pci_dev_info_108e_a001, &pci_dev_info_108e_a801, &pci_dev_info_108e_abba, + &pci_dev_info_108e_c416, NULL }; #define pci_dev_list_108f NULL @@ -127748,6 +145318,7 @@ static const pciDeviceInfo *pci_dev_list_1091[] = { }; #endif static const pciDeviceInfo *pci_dev_list_1092[] = { + &pci_dev_info_1092_0028, &pci_dev_info_1092_00a0, &pci_dev_info_1092_00a8, &pci_dev_info_1092_0550, @@ -127796,6 +145367,7 @@ static const pciDeviceInfo *pci_dev_list_1093[] = { &pci_dev_info_1093_2ca0, &pci_dev_info_1093_70a9, &pci_dev_info_1093_70b8, + &pci_dev_info_1093_7144, &pci_dev_info_1093_b001, &pci_dev_info_1093_b011, &pci_dev_info_1093_b021, @@ -127830,6 +145402,7 @@ static const pciDeviceInfo *pci_dev_list_1095[] = { &pci_dev_info_1095_3124, &pci_dev_info_1095_3132, &pci_dev_info_1095_3512, + &pci_dev_info_1095_3531, NULL }; #endif @@ -127963,7 +145536,9 @@ static const pciDeviceInfo *pci_dev_list_10b4[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_10b5[] = { &pci_dev_info_10b5_0001, + &pci_dev_info_10b5_1024, &pci_dev_info_10b5_1042, + &pci_dev_info_10b5_106a, &pci_dev_info_10b5_1076, &pci_dev_info_10b5_1077, &pci_dev_info_10b5_1078, @@ -127972,16 +145547,37 @@ static const pciDeviceInfo *pci_dev_list_10b5[] = { &pci_dev_info_10b5_1147, &pci_dev_info_10b5_2540, &pci_dev_info_10b5_2724, + &pci_dev_info_10b5_6140, + &pci_dev_info_10b5_6150, + &pci_dev_info_10b5_6152, + &pci_dev_info_10b5_6154, + &pci_dev_info_10b5_6254, + &pci_dev_info_10b5_6466, + &pci_dev_info_10b5_6520, &pci_dev_info_10b5_6540, &pci_dev_info_10b5_6541, &pci_dev_info_10b5_6542, &pci_dev_info_10b5_8111, + &pci_dev_info_10b5_8112, &pci_dev_info_10b5_8114, + &pci_dev_info_10b5_8311, + &pci_dev_info_10b5_8505, + &pci_dev_info_10b5_8508, + &pci_dev_info_10b5_8509, + &pci_dev_info_10b5_8512, &pci_dev_info_10b5_8516, + &pci_dev_info_10b5_8517, + &pci_dev_info_10b5_8518, + &pci_dev_info_10b5_8524, + &pci_dev_info_10b5_8525, &pci_dev_info_10b5_8532, + &pci_dev_info_10b5_8533, + &pci_dev_info_10b5_8547, + &pci_dev_info_10b5_8548, &pci_dev_info_10b5_9030, &pci_dev_info_10b5_9036, &pci_dev_info_10b5_9050, + &pci_dev_info_10b5_9052, &pci_dev_info_10b5_9054, &pci_dev_info_10b5_9056, &pci_dev_info_10b5_9060, @@ -128246,6 +145842,7 @@ static const pciDeviceInfo *pci_dev_list_10cd[] = { &pci_dev_info_10cd_1300, &pci_dev_info_10cd_2300, &pci_dev_info_10cd_2500, + &pci_dev_info_10cd_2700, NULL }; #endif @@ -128375,6 +145972,7 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_0091, &pci_dev_info_10de_0092, &pci_dev_info_10de_0093, + &pci_dev_info_10de_0095, &pci_dev_info_10de_0098, &pci_dev_info_10de_0099, &pci_dev_info_10de_009d, @@ -128493,6 +146091,9 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_018d, &pci_dev_info_10de_0191, &pci_dev_info_10de_0193, + &pci_dev_info_10de_0194, + &pci_dev_info_10de_019d, + &pci_dev_info_10de_019e, &pci_dev_info_10de_01a0, &pci_dev_info_10de_01a4, &pci_dev_info_10de_01ab, @@ -128508,12 +146109,14 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_01c1, &pci_dev_info_10de_01c2, &pci_dev_info_10de_01c3, + &pci_dev_info_10de_01d0, &pci_dev_info_10de_01d1, &pci_dev_info_10de_01d3, &pci_dev_info_10de_01d6, &pci_dev_info_10de_01d7, &pci_dev_info_10de_01d8, &pci_dev_info_10de_01da, + &pci_dev_info_10de_01db, &pci_dev_info_10de_01dc, &pci_dev_info_10de_01dd, &pci_dev_info_10de_01de, @@ -128607,6 +146210,8 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_02e0, &pci_dev_info_10de_02e1, &pci_dev_info_10de_02e2, + &pci_dev_info_10de_02e3, + &pci_dev_info_10de_02e4, &pci_dev_info_10de_02f0, &pci_dev_info_10de_02f1, &pci_dev_info_10de_02f2, @@ -128699,6 +146304,7 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_0377, &pci_dev_info_10de_0378, &pci_dev_info_10de_037a, + &pci_dev_info_10de_037c, &pci_dev_info_10de_037e, &pci_dev_info_10de_037f, &pci_dev_info_10de_0390, @@ -128709,6 +146315,7 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_0395, &pci_dev_info_10de_0397, &pci_dev_info_10de_0398, + &pci_dev_info_10de_0399, &pci_dev_info_10de_039b, &pci_dev_info_10de_039c, &pci_dev_info_10de_039e, @@ -128740,6 +146347,7 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_03b9, &pci_dev_info_10de_03ba, &pci_dev_info_10de_03bb, + &pci_dev_info_10de_03bc, &pci_dev_info_10de_03d0, &pci_dev_info_10de_03d1, &pci_dev_info_10de_03d2, @@ -128767,6 +146375,31 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_03f5, &pci_dev_info_10de_03f6, &pci_dev_info_10de_03f7, + &pci_dev_info_10de_0400, + &pci_dev_info_10de_0402, + &pci_dev_info_10de_0403, + &pci_dev_info_10de_0404, + &pci_dev_info_10de_0407, + &pci_dev_info_10de_0409, + &pci_dev_info_10de_040a, + &pci_dev_info_10de_040b, + &pci_dev_info_10de_040c, + &pci_dev_info_10de_040d, + &pci_dev_info_10de_040e, + &pci_dev_info_10de_040f, + &pci_dev_info_10de_0420, + &pci_dev_info_10de_0421, + &pci_dev_info_10de_0422, + &pci_dev_info_10de_0423, + &pci_dev_info_10de_0425, + &pci_dev_info_10de_0426, + &pci_dev_info_10de_0427, + &pci_dev_info_10de_0428, + &pci_dev_info_10de_0429, + &pci_dev_info_10de_042a, + &pci_dev_info_10de_042b, + &pci_dev_info_10de_042d, + &pci_dev_info_10de_042f, &pci_dev_info_10de_0440, &pci_dev_info_10de_0441, &pci_dev_info_10de_0442, @@ -128798,11 +146431,60 @@ static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_045d, &pci_dev_info_10de_045e, &pci_dev_info_10de_045f, + &pci_dev_info_10de_0531, + &pci_dev_info_10de_0533, + &pci_dev_info_10de_053a, + &pci_dev_info_10de_053b, + &pci_dev_info_10de_053e, + &pci_dev_info_10de_0541, + &pci_dev_info_10de_0542, + &pci_dev_info_10de_0543, + &pci_dev_info_10de_0547, + &pci_dev_info_10de_0548, + &pci_dev_info_10de_054c, + &pci_dev_info_10de_0550, + &pci_dev_info_10de_0554, + &pci_dev_info_10de_0555, + &pci_dev_info_10de_055c, + &pci_dev_info_10de_055d, + &pci_dev_info_10de_055e, + &pci_dev_info_10de_055f, + &pci_dev_info_10de_0560, + &pci_dev_info_10de_0561, + &pci_dev_info_10de_0562, + &pci_dev_info_10de_0563, + &pci_dev_info_10de_056a, + &pci_dev_info_10de_0600, + &pci_dev_info_10de_0606, + &pci_dev_info_10de_0609, + &pci_dev_info_10de_060c, + &pci_dev_info_10de_0611, + &pci_dev_info_10de_061a, + &pci_dev_info_10de_0622, + &pci_dev_info_10de_07cb, + &pci_dev_info_10de_07cd, + &pci_dev_info_10de_07ce, + &pci_dev_info_10de_07cf, + &pci_dev_info_10de_07d0, + &pci_dev_info_10de_07d1, + &pci_dev_info_10de_07d2, + &pci_dev_info_10de_07d3, + &pci_dev_info_10de_07d6, + &pci_dev_info_10de_07dc, + &pci_dev_info_10de_07e1, + &pci_dev_info_10de_07e3, + &pci_dev_info_10de_07f4, + &pci_dev_info_10de_07fc, + &pci_dev_info_10de_07fe, + &pci_dev_info_10de_0849, + &pci_dev_info_10de_c615, NULL }; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_10df[] = { &pci_dev_info_10df_1ae5, + &pci_dev_info_10df_f011, + &pci_dev_info_10df_f015, &pci_dev_info_10df_f085, &pci_dev_info_10df_f095, &pci_dev_info_10df_f098, @@ -128814,6 +146496,7 @@ static const pciDeviceInfo *pci_dev_list_10df[] = { &pci_dev_info_10df_f0e1, &pci_dev_info_10df_f0e5, &pci_dev_info_10df_f0f5, + &pci_dev_info_10df_f100, &pci_dev_info_10df_f700, &pci_dev_info_10df_f701, &pci_dev_info_10df_f800, @@ -128828,8 +146511,10 @@ static const pciDeviceInfo *pci_dev_list_10df[] = { &pci_dev_info_10df_fc00, &pci_dev_info_10df_fc10, &pci_dev_info_10df_fc20, + &pci_dev_info_10df_fc40, &pci_dev_info_10df_fd00, &pci_dev_info_10df_fe00, + &pci_dev_info_10df_fe05, &pci_dev_info_10df_ff00, NULL }; @@ -128934,6 +146619,7 @@ static const pciDeviceInfo *pci_dev_list_10ec[] = { &pci_dev_info_10ec_0139, &pci_dev_info_10ec_0260, &pci_dev_info_10ec_0261, + &pci_dev_info_10ec_0262, &pci_dev_info_10ec_0280, &pci_dev_info_10ec_0861, &pci_dev_info_10ec_0862, @@ -128974,8 +146660,12 @@ static const pciDeviceInfo *pci_dev_list_10ee[] = { &pci_dev_info_10ee_3fc4, &pci_dev_info_10ee_3fc5, &pci_dev_info_10ee_3fc6, + &pci_dev_info_10ee_8380, &pci_dev_info_10ee_8381, &pci_dev_info_10ee_d154, + &pci_dev_info_10ee_ebf0, + &pci_dev_info_10ee_ebf1, + &pci_dev_info_10ee_ebf2, NULL }; #endif @@ -129030,6 +146720,7 @@ static const pciDeviceInfo *pci_dev_list_10fc[] = { #define pci_dev_list_1100 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1101[] = { + &pci_dev_info_1101_0002, &pci_dev_info_1101_1060, &pci_dev_info_1101_1622, &pci_dev_info_1101_9100, @@ -129047,6 +146738,7 @@ static const pciDeviceInfo *pci_dev_list_1102[] = { &pci_dev_info_1102_0006, &pci_dev_info_1102_0007, &pci_dev_info_1102_0008, + &pci_dev_info_1102_0009, &pci_dev_info_1102_4001, &pci_dev_info_1102_7002, &pci_dev_info_1102_7003, @@ -129065,6 +146757,15 @@ static const pciDeviceInfo *pci_dev_list_1103[] = { &pci_dev_info_1103_0007, &pci_dev_info_1103_0008, &pci_dev_info_1103_0009, + &pci_dev_info_1103_1740, + &pci_dev_info_1103_1742, + &pci_dev_info_1103_2300, + &pci_dev_info_1103_2310, + &pci_dev_info_1103_2320, + &pci_dev_info_1103_2322, + &pci_dev_info_1103_2340, + &pci_dev_info_1103_3220, + &pci_dev_info_1103_3320, NULL }; #endif @@ -129081,6 +146782,7 @@ static const pciDeviceInfo *pci_dev_list_1105[] = { &pci_dev_info_1105_8476, &pci_dev_info_1105_8485, &pci_dev_info_1105_8486, + &pci_dev_info_1105_c622, NULL }; #endif @@ -129151,6 +146853,7 @@ static const pciDeviceInfo *pci_dev_list_1106[] = { &pci_dev_info_1106_1364, &pci_dev_info_1106_1571, &pci_dev_info_1106_1595, + &pci_dev_info_1106_2106, &pci_dev_info_1106_2204, &pci_dev_info_1106_2208, &pci_dev_info_1106_2238, @@ -129231,6 +146934,7 @@ static const pciDeviceInfo *pci_dev_list_1106[] = { &pci_dev_info_1106_324e, &pci_dev_info_1106_3258, &pci_dev_info_1106_3259, + &pci_dev_info_1106_3260, &pci_dev_info_1106_3269, &pci_dev_info_1106_3282, &pci_dev_info_1106_3287, @@ -129242,6 +146946,7 @@ static const pciDeviceInfo *pci_dev_list_1106[] = { &pci_dev_info_1106_3336, &pci_dev_info_1106_3337, &pci_dev_info_1106_3340, + &pci_dev_info_1106_3343, &pci_dev_info_1106_3344, &pci_dev_info_1106_3349, &pci_dev_info_1106_3351, @@ -129281,6 +146986,7 @@ static const pciDeviceInfo *pci_dev_list_1106[] = { &pci_dev_info_1106_5351, &pci_dev_info_1106_5364, &pci_dev_info_1106_6100, + &pci_dev_info_1106_6287, &pci_dev_info_1106_6327, &pci_dev_info_1106_6364, &pci_dev_info_1106_7204, @@ -129481,10 +147187,6 @@ static const pciDeviceInfo *pci_dev_list_1119[] = { &pci_dev_info_1119_000b, &pci_dev_info_1119_000c, &pci_dev_info_1119_000d, - &pci_dev_info_1119_0010, - &pci_dev_info_1119_0011, - &pci_dev_info_1119_0012, - &pci_dev_info_1119_0013, &pci_dev_info_1119_0100, &pci_dev_info_1119_0101, &pci_dev_info_1119_0102, @@ -129541,6 +147243,7 @@ static const pciDeviceInfo *pci_dev_list_1119[] = { &pci_dev_info_1119_0261, &pci_dev_info_1119_02ff, &pci_dev_info_1119_0300, + &pci_dev_info_1119_0301, NULL }; #endif @@ -129683,6 +147386,9 @@ static const pciDeviceInfo *pci_dev_list_1133[] = { &pci_dev_info_1133_e028, &pci_dev_info_1133_e02a, &pci_dev_info_1133_e02c, + &pci_dev_info_1133_e02e, + &pci_dev_info_1133_e032, + &pci_dev_info_1133_e034, NULL }; #endif @@ -129844,6 +147550,9 @@ static const pciDeviceInfo *pci_dev_list_114f[] = { &pci_dev_info_114f_00c9, &pci_dev_info_114f_00ca, &pci_dev_info_114f_00cb, + &pci_dev_info_114f_00cc, + &pci_dev_info_114f_00cd, + &pci_dev_info_114f_00ce, &pci_dev_info_114f_00d0, &pci_dev_info_114f_00d1, &pci_dev_info_114f_6001, @@ -129922,6 +147631,7 @@ static const pciDeviceInfo *pci_dev_list_1166[] = { &pci_dev_info_1166_0015, &pci_dev_info_1166_0016, &pci_dev_info_1166_0017, + &pci_dev_info_1166_0031, &pci_dev_info_1166_0036, &pci_dev_info_1166_0101, &pci_dev_info_1166_0103, @@ -129942,6 +147652,7 @@ static const pciDeviceInfo *pci_dev_list_1166[] = { &pci_dev_info_1166_0213, &pci_dev_info_1166_0214, &pci_dev_info_1166_0217, + &pci_dev_info_1166_021b, &pci_dev_info_1166_0220, &pci_dev_info_1166_0221, &pci_dev_info_1166_0223, @@ -129949,11 +147660,24 @@ static const pciDeviceInfo *pci_dev_list_1166[] = { &pci_dev_info_1166_0227, &pci_dev_info_1166_0230, &pci_dev_info_1166_0234, + &pci_dev_info_1166_0235, + &pci_dev_info_1166_0238, &pci_dev_info_1166_0240, &pci_dev_info_1166_0241, &pci_dev_info_1166_0242, &pci_dev_info_1166_024a, &pci_dev_info_1166_024b, + &pci_dev_info_1166_0406, + &pci_dev_info_1166_0408, + &pci_dev_info_1166_040a, + &pci_dev_info_1166_0410, + &pci_dev_info_1166_0411, + &pci_dev_info_1166_0412, + &pci_dev_info_1166_0414, + &pci_dev_info_1166_0416, + &pci_dev_info_1166_0420, + &pci_dev_info_1166_0421, + &pci_dev_info_1166_0422, NULL }; #endif @@ -130039,6 +147763,7 @@ static const pciDeviceInfo *pci_dev_list_1180[] = { &pci_dev_info_1180_0822, &pci_dev_info_1180_0832, &pci_dev_info_1180_0841, + &pci_dev_info_1180_0843, &pci_dev_info_1180_0852, NULL }; @@ -130073,10 +147798,15 @@ static const pciDeviceInfo *pci_dev_list_1186[] = { &pci_dev_info_1186_3a13, &pci_dev_info_1186_3a14, &pci_dev_info_1186_3a63, + &pci_dev_info_1186_3c00, &pci_dev_info_1186_4000, + &pci_dev_info_1186_4001, &pci_dev_info_1186_4300, &pci_dev_info_1186_4800, + &pci_dev_info_1186_4b00, &pci_dev_info_1186_4b01, + &pci_dev_info_1186_4b02, + &pci_dev_info_1186_4b03, &pci_dev_info_1186_4c00, &pci_dev_info_1186_8400, NULL @@ -130201,6 +147931,7 @@ static const pciDeviceInfo *pci_dev_list_11a9[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_11ab[] = { &pci_dev_info_11ab_0146, + &pci_dev_info_11ab_0f53, &pci_dev_info_11ab_11ab, &pci_dev_info_11ab_138f, &pci_dev_info_11ab_1fa6, @@ -130219,11 +147950,22 @@ static const pciDeviceInfo *pci_dev_list_11ab[] = { &pci_dev_info_11ab_4350, &pci_dev_info_11ab_4351, &pci_dev_info_11ab_4352, + &pci_dev_info_11ab_4353, + &pci_dev_info_11ab_4354, + &pci_dev_info_11ab_4356, + &pci_dev_info_11ab_435a, &pci_dev_info_11ab_4360, &pci_dev_info_11ab_4361, &pci_dev_info_11ab_4362, &pci_dev_info_11ab_4363, &pci_dev_info_11ab_4364, + &pci_dev_info_11ab_4365, + &pci_dev_info_11ab_4366, + &pci_dev_info_11ab_4367, + &pci_dev_info_11ab_4368, + &pci_dev_info_11ab_4369, + &pci_dev_info_11ab_436a, + &pci_dev_info_11ab_436b, &pci_dev_info_11ab_4611, &pci_dev_info_11ab_4620, &pci_dev_info_11ab_4801, @@ -130233,13 +147975,17 @@ static const pciDeviceInfo *pci_dev_list_11ab[] = { &pci_dev_info_11ab_5080, &pci_dev_info_11ab_5081, &pci_dev_info_11ab_6041, + &pci_dev_info_11ab_6042, &pci_dev_info_11ab_6081, &pci_dev_info_11ab_6101, + &pci_dev_info_11ab_6121, &pci_dev_info_11ab_6141, + &pci_dev_info_11ab_6145, &pci_dev_info_11ab_6450, &pci_dev_info_11ab_6460, &pci_dev_info_11ab_6480, &pci_dev_info_11ab_6485, + &pci_dev_info_11ab_7042, &pci_dev_info_11ab_f003, NULL }; @@ -130413,6 +148159,7 @@ static const pciDeviceInfo *pci_dev_list_11d4[] = { &pci_dev_info_11d4_1981, &pci_dev_info_11d4_1983, &pci_dev_info_11d4_1986, + &pci_dev_info_11d4_198b, &pci_dev_info_11d4_5340, NULL }; @@ -130498,7 +148245,10 @@ static const pciDeviceInfo *pci_dev_list_11f6[] = { #define pci_dev_list_11f7 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_11f8[] = { + &pci_dev_info_11f8_7364, &pci_dev_info_11f8_7375, + &pci_dev_info_11f8_7384, + &pci_dev_info_11f8_8000, NULL }; #endif @@ -130524,6 +148274,15 @@ static const pciDeviceInfo *pci_dev_list_11fe[] = { &pci_dev_info_11fe_000d, &pci_dev_info_11fe_000e, &pci_dev_info_11fe_000f, + &pci_dev_info_11fe_0040, + &pci_dev_info_11fe_0041, + &pci_dev_info_11fe_0042, + &pci_dev_info_11fe_0043, + &pci_dev_info_11fe_0044, + &pci_dev_info_11fe_0045, + &pci_dev_info_11fe_0047, + &pci_dev_info_11fe_004f, + &pci_dev_info_11fe_0052, &pci_dev_info_11fe_0801, &pci_dev_info_11fe_0802, &pci_dev_info_11fe_0803, @@ -130617,6 +148376,7 @@ static const pciDeviceInfo *pci_dev_list_1217[] = { &pci_dev_info_1217_7130, &pci_dev_info_1217_7134, &pci_dev_info_1217_7135, + &pci_dev_info_1217_7136, &pci_dev_info_1217_71e2, &pci_dev_info_1217_7212, &pci_dev_info_1217_7213, @@ -130653,7 +148413,16 @@ static const pciDeviceInfo *pci_dev_list_1220[] = { NULL }; #endif -#define pci_dev_list_1221 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1221[] = { + &pci_dev_info_1221_9172, + &pci_dev_info_1221_91a2, + &pci_dev_info_1221_91c3, + &pci_dev_info_1221_b152, + &pci_dev_info_1221_c103, + NULL +}; +#endif #define pci_dev_list_1222 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1223[] = { @@ -130933,6 +148702,7 @@ static const pciDeviceInfo *pci_dev_list_1274[] = { static const pciDeviceInfo *pci_dev_list_1278[] = { &pci_dev_info_1278_0701, &pci_dev_info_1278_0710, + &pci_dev_info_1278_1101, NULL }; #endif @@ -130996,6 +148766,7 @@ static const pciDeviceInfo *pci_dev_list_1282[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1283[] = { &pci_dev_info_1283_673a, + &pci_dev_info_1283_8152, &pci_dev_info_1283_8211, &pci_dev_info_1283_8212, &pci_dev_info_1283_8330, @@ -131188,7 +148959,15 @@ static const pciDeviceInfo *pci_dev_list_12c5[] = { }; #endif #define pci_dev_list_12c6 NULL -#define pci_dev_list_12c7 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_12c7[] = { + &pci_dev_info_12c7_0546, + &pci_dev_info_12c7_0647, + &pci_dev_info_12c7_0676, + &pci_dev_info_12c7_0685, + NULL +}; +#endif #define pci_dev_list_12c8 NULL #define pci_dev_list_12c9 NULL #define pci_dev_list_12ca NULL @@ -131369,7 +149148,21 @@ static const pciDeviceInfo *pci_dev_list_1307[] = { &pci_dev_info_1307_004d, &pci_dev_info_1307_0052, &pci_dev_info_1307_0054, + &pci_dev_info_1307_005d, &pci_dev_info_1307_005e, + &pci_dev_info_1307_005f, + &pci_dev_info_1307_0060, + &pci_dev_info_1307_0061, + &pci_dev_info_1307_0062, + &pci_dev_info_1307_0063, + &pci_dev_info_1307_0064, + &pci_dev_info_1307_0065, + &pci_dev_info_1307_0066, + &pci_dev_info_1307_0067, + &pci_dev_info_1307_0068, + &pci_dev_info_1307_006f, + &pci_dev_info_1307_0078, + &pci_dev_info_1307_0079, NULL }; #endif @@ -131600,13 +149393,16 @@ static const pciDeviceInfo *pci_dev_list_1360[] = { &pci_dev_info_1360_0102, &pci_dev_info_1360_0103, &pci_dev_info_1360_0104, + &pci_dev_info_1360_0105, &pci_dev_info_1360_0201, &pci_dev_info_1360_0202, &pci_dev_info_1360_0203, &pci_dev_info_1360_0204, + &pci_dev_info_1360_0205, &pci_dev_info_1360_0301, &pci_dev_info_1360_0302, &pci_dev_info_1360_0303, + &pci_dev_info_1360_0304, NULL }; #endif @@ -131763,10 +149559,29 @@ static const pciDeviceInfo *pci_dev_list_1389[] = { #define pci_dev_list_1392 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1393[] = { + &pci_dev_info_1393_0001, + &pci_dev_info_1393_1020, + &pci_dev_info_1393_1021, + &pci_dev_info_1393_1022, &pci_dev_info_1393_1040, + &pci_dev_info_1393_1041, + &pci_dev_info_1393_1042, + &pci_dev_info_1393_1043, + &pci_dev_info_1393_1044, + &pci_dev_info_1393_1080, + &pci_dev_info_1393_1140, &pci_dev_info_1393_1141, + &pci_dev_info_1393_1142, + &pci_dev_info_1393_1180, + &pci_dev_info_1393_1181, + &pci_dev_info_1393_1320, + &pci_dev_info_1393_1321, + &pci_dev_info_1393_1340, + &pci_dev_info_1393_1341, + &pci_dev_info_1393_1380, &pci_dev_info_1393_1680, &pci_dev_info_1393_1681, + &pci_dev_info_1393_1682, &pci_dev_info_1393_2040, &pci_dev_info_1393_2180, &pci_dev_info_1393_3200, @@ -131787,6 +149602,7 @@ static const pciDeviceInfo *pci_dev_list_1397[] = { &pci_dev_info_1397_16b8, &pci_dev_info_1397_2bd0, &pci_dev_info_1397_30b1, + &pci_dev_info_1397_b700, &pci_dev_info_1397_f001, NULL }; @@ -131822,6 +149638,7 @@ static const pciDeviceInfo *pci_dev_list_13a3[] = { &pci_dev_info_13a3_001d, &pci_dev_info_13a3_0020, &pci_dev_info_13a3_0026, + &pci_dev_info_13a3_002e, NULL }; #endif @@ -131882,6 +149699,7 @@ static const pciDeviceInfo *pci_dev_list_13c1[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_13c2[] = { &pci_dev_info_13c2_000e, + &pci_dev_info_13c2_1019, NULL }; #endif @@ -131922,7 +149740,12 @@ static const pciDeviceInfo *pci_dev_list_13d1[] = { }; #endif #define pci_dev_list_13d2 NULL -#define pci_dev_list_13d3 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_13d3[] = { + &pci_dev_info_13d3_3219, + NULL +}; +#endif #define pci_dev_list_13d4 NULL #define pci_dev_list_13d5 NULL #define pci_dev_list_13d6 NULL @@ -131965,6 +149788,7 @@ static const pciDeviceInfo *pci_dev_list_13ec[] = { static const pciDeviceInfo *pci_dev_list_13f0[] = { &pci_dev_info_13f0_0200, &pci_dev_info_13f0_0201, + &pci_dev_info_13f0_1021, &pci_dev_info_13f0_1023, NULL }; @@ -131986,6 +149810,7 @@ static const pciDeviceInfo *pci_dev_list_13f6[] = { &pci_dev_info_13f6_0101, &pci_dev_info_13f6_0111, &pci_dev_info_13f6_0211, + &pci_dev_info_13f6_8788, &pci_dev_info_13f6_9880, NULL }; @@ -132001,6 +149826,8 @@ static const pciDeviceInfo *pci_dev_list_13f6[] = { static const pciDeviceInfo *pci_dev_list_13fe[] = { &pci_dev_info_13fe_1240, &pci_dev_info_13fe_1600, + &pci_dev_info_13fe_1603, + &pci_dev_info_13fe_1604, &pci_dev_info_13fe_16ff, &pci_dev_info_13fe_1733, &pci_dev_info_13fe_1752, @@ -132071,7 +149898,22 @@ static const pciDeviceInfo *pci_dev_list_1412[] = { }; #endif #define pci_dev_list_1413 NULL -#define pci_dev_list_1414 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1414[] = { + &pci_dev_info_1414_5801, + &pci_dev_info_1414_5802, + &pci_dev_info_1414_5803, + &pci_dev_info_1414_5804, + &pci_dev_info_1414_5805, + &pci_dev_info_1414_5806, + &pci_dev_info_1414_5807, + &pci_dev_info_1414_580a, + &pci_dev_info_1414_580b, + &pci_dev_info_1414_580d, + &pci_dev_info_1414_5811, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1415[] = { &pci_dev_info_1415_8403, @@ -132112,6 +149954,10 @@ static const pciDeviceInfo *pci_dev_list_1420[] = { static const pciDeviceInfo *pci_dev_list_1425[] = { &pci_dev_info_1425_000b, &pci_dev_info_1425_000c, + &pci_dev_info_1425_0030, + &pci_dev_info_1425_0031, + &pci_dev_info_1425_0032, + &pci_dev_info_1425_0033, NULL }; #endif @@ -132243,6 +150089,9 @@ static const pciDeviceInfo *pci_dev_list_1462[] = { &pci_dev_info_1462_6834, &pci_dev_info_1462_7125, &pci_dev_info_1462_7235, + &pci_dev_info_1462_7242, + &pci_dev_info_1462_7250, + &pci_dev_info_1462_7327, &pci_dev_info_1462_8725, &pci_dev_info_1462_9000, &pci_dev_info_1462_9110, @@ -132251,6 +150100,7 @@ static const pciDeviceInfo *pci_dev_list_1462[] = { &pci_dev_info_1462_9510, &pci_dev_info_1462_9511, &pci_dev_info_1462_9591, + &pci_dev_info_1462_b834, NULL }; #endif @@ -132469,7 +150319,13 @@ static const pciDeviceInfo *pci_dev_list_14d2[] = { #define pci_dev_list_14d3 NULL #define pci_dev_list_14d4 NULL #define pci_dev_list_14d5 NULL -#define pci_dev_list_14d6 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_14d6[] = { + &pci_dev_info_14d6_6101, + &pci_dev_info_14d6_6201, + NULL +}; +#endif #define pci_dev_list_14d7 NULL #define pci_dev_list_14d8 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -132523,18 +150379,25 @@ static const pciDeviceInfo *pci_dev_list_14e4[] = { &pci_dev_info_14e4_1600, &pci_dev_info_14e4_1601, &pci_dev_info_14e4_1639, + &pci_dev_info_14e4_163a, &pci_dev_info_14e4_1644, &pci_dev_info_14e4_1645, &pci_dev_info_14e4_1646, &pci_dev_info_14e4_1647, &pci_dev_info_14e4_1648, + &pci_dev_info_14e4_1649, &pci_dev_info_14e4_164a, &pci_dev_info_14e4_164c, &pci_dev_info_14e4_164d, + &pci_dev_info_14e4_164e, + &pci_dev_info_14e4_164f, + &pci_dev_info_14e4_1650, &pci_dev_info_14e4_1653, &pci_dev_info_14e4_1654, + &pci_dev_info_14e4_1658, &pci_dev_info_14e4_1659, &pci_dev_info_14e4_165a, + &pci_dev_info_14e4_165b, &pci_dev_info_14e4_165d, &pci_dev_info_14e4_165e, &pci_dev_info_14e4_1668, @@ -132545,16 +150408,22 @@ static const pciDeviceInfo *pci_dev_list_14e4[] = { &pci_dev_info_14e4_1672, &pci_dev_info_14e4_1673, &pci_dev_info_14e4_1674, + &pci_dev_info_14e4_1676, &pci_dev_info_14e4_1677, &pci_dev_info_14e4_1678, &pci_dev_info_14e4_1679, &pci_dev_info_14e4_167a, &pci_dev_info_14e4_167b, + &pci_dev_info_14e4_167c, &pci_dev_info_14e4_167d, &pci_dev_info_14e4_167e, &pci_dev_info_14e4_167f, + &pci_dev_info_14e4_1680, + &pci_dev_info_14e4_1681, + &pci_dev_info_14e4_1684, &pci_dev_info_14e4_1693, &pci_dev_info_14e4_1696, + &pci_dev_info_14e4_1698, &pci_dev_info_14e4_169a, &pci_dev_info_14e4_169b, &pci_dev_info_14e4_169c, @@ -132580,6 +150449,7 @@ static const pciDeviceInfo *pci_dev_list_14e4[] = { &pci_dev_info_14e4_4210, &pci_dev_info_14e4_4211, &pci_dev_info_14e4_4212, + &pci_dev_info_14e4_4220, &pci_dev_info_14e4_4301, &pci_dev_info_14e4_4305, &pci_dev_info_14e4_4306, @@ -132597,7 +150467,9 @@ static const pciDeviceInfo *pci_dev_list_14e4[] = { &pci_dev_info_14e4_4324, &pci_dev_info_14e4_4325, &pci_dev_info_14e4_4326, + &pci_dev_info_14e4_4328, &pci_dev_info_14e4_4329, + &pci_dev_info_14e4_432b, &pci_dev_info_14e4_4344, &pci_dev_info_14e4_4401, &pci_dev_info_14e4_4402, @@ -132650,6 +150522,7 @@ static const pciDeviceInfo *pci_dev_list_14e4[] = { &pci_dev_info_14e4_5840, &pci_dev_info_14e4_5841, &pci_dev_info_14e4_5850, + &pci_dev_info_14e4_b800, NULL }; #endif @@ -132767,6 +150640,7 @@ static const pciDeviceInfo *pci_dev_list_14f1[] = { &pci_dev_info_14f1_2f30, &pci_dev_info_14f1_5045, &pci_dev_info_14f1_5047, + &pci_dev_info_14f1_5b7a, &pci_dev_info_14f1_8234, &pci_dev_info_14f1_8800, &pci_dev_info_14f1_8801, @@ -132910,6 +150784,9 @@ static const pciDeviceInfo *pci_dev_list_1524[] = { &pci_dev_info_1524_0550, &pci_dev_info_1524_0551, &pci_dev_info_1524_0610, + &pci_dev_info_1524_0730, + &pci_dev_info_1524_0750, + &pci_dev_info_1524_0751, &pci_dev_info_1524_1211, &pci_dev_info_1524_1225, &pci_dev_info_1524_1410, @@ -132943,6 +150820,7 @@ static const pciDeviceInfo *pci_dev_list_1532[] = { #define pci_dev_list_1533 NULL #define pci_dev_list_1534 NULL #define pci_dev_list_1535 NULL +#define pci_dev_list_1536 NULL #define pci_dev_list_1537 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1538[] = { @@ -133092,7 +150970,14 @@ static const pciDeviceInfo *pci_dev_list_157c[] = { #define pci_dev_list_158d NULL #define pci_dev_list_158e NULL #define pci_dev_list_158f NULL -#define pci_dev_list_1590 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1590[] = { + &pci_dev_info_1590_0001, + &pci_dev_info_1590_0002, + &pci_dev_info_1590_a01d, + NULL +}; +#endif #define pci_dev_list_1591 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1592[] = { @@ -133141,6 +151026,9 @@ static const pciDeviceInfo *pci_dev_list_15ad[] = { &pci_dev_info_15ad_0405, &pci_dev_info_15ad_0710, &pci_dev_info_15ad_0720, + &pci_dev_info_15ad_0740, + &pci_dev_info_15ad_0770, + &pci_dev_info_15ad_0801, NULL }; #define pci_dev_list_15ae NULL @@ -133149,6 +151037,7 @@ static const pciDeviceInfo *pci_dev_list_15ad[] = { #define pci_dev_list_15b2 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_15b3[] = { + &pci_dev_info_15b3_0191, &pci_dev_info_15b3_5274, &pci_dev_info_15b3_5a44, &pci_dev_info_15b3_5a45, @@ -133158,6 +151047,13 @@ static const pciDeviceInfo *pci_dev_list_15b3[] = { &pci_dev_info_15b3_6278, &pci_dev_info_15b3_6279, &pci_dev_info_15b3_6282, + &pci_dev_info_15b3_6340, + &pci_dev_info_15b3_634a, + &pci_dev_info_15b3_6354, + &pci_dev_info_15b3_6368, + &pci_dev_info_15b3_6732, + &pci_dev_info_15b3_673c, + &pci_dev_info_15b3_6750, NULL }; #endif @@ -133251,6 +151147,7 @@ static const pciDeviceInfo *pci_dev_list_15e2[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_15e8[] = { &pci_dev_info_15e8_0130, + &pci_dev_info_15e8_0131, NULL }; #endif @@ -133346,7 +151243,12 @@ static const pciDeviceInfo *pci_dev_list_163c[] = { NULL }; #endif -#define pci_dev_list_1657 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1657[] = { + &pci_dev_info_1657_0646, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_165a[] = { &pci_dev_info_165a_c100, @@ -133384,6 +151286,8 @@ static const pciDeviceInfo *pci_dev_list_1677[] = { NULL }; #endif +#define pci_dev_list_1678 NULL +#define pci_dev_list_1679 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_167b[] = { &pci_dev_info_167b_2102, @@ -133451,7 +151355,10 @@ static const pciDeviceInfo *pci_dev_list_16ab[] = { #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16ae[] = { + &pci_dev_info_16ae_0001, + &pci_dev_info_16ae_000a, &pci_dev_info_16ae_1141, + &pci_dev_info_16ae_1841, NULL }; #endif @@ -133462,6 +151369,7 @@ static const pciDeviceInfo *pci_dev_list_16ae[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16c6[] = { &pci_dev_info_16c6_8695, + &pci_dev_info_16c6_8842, NULL }; #endif @@ -133477,10 +151385,45 @@ static const pciDeviceInfo *pci_dev_list_16ca[] = { #define pci_dev_list_16ce NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16d5[] = { + &pci_dev_info_16d5_0504, + &pci_dev_info_16d5_0520, + &pci_dev_info_16d5_0521, + &pci_dev_info_16d5_1020, + &pci_dev_info_16d5_1065, + &pci_dev_info_16d5_2004, + &pci_dev_info_16d5_2020, + &pci_dev_info_16d5_2065, + &pci_dev_info_16d5_3020, + &pci_dev_info_16d5_3065, + &pci_dev_info_16d5_4243, + &pci_dev_info_16d5_4248, + &pci_dev_info_16d5_424b, + &pci_dev_info_16d5_4253, + &pci_dev_info_16d5_4312, + &pci_dev_info_16d5_4313, + &pci_dev_info_16d5_4322, + &pci_dev_info_16d5_4323, + &pci_dev_info_16d5_4350, + &pci_dev_info_16d5_4353, + &pci_dev_info_16d5_4357, + &pci_dev_info_16d5_4457, + &pci_dev_info_16d5_464d, + &pci_dev_info_16d5_4850, + &pci_dev_info_16d5_4a42, + &pci_dev_info_16d5_4a50, + &pci_dev_info_16d5_4a56, + &pci_dev_info_16d5_4b47, + &pci_dev_info_16d5_4c40, + &pci_dev_info_16d5_4c60, + &pci_dev_info_16d5_4d4d, &pci_dev_info_16d5_4d4e, + &pci_dev_info_16d5_524d, + &pci_dev_info_16d5_5335, + &pci_dev_info_16d5_5456, NULL }; #endif +#define pci_dev_list_16da NULL #define pci_dev_list_16df NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16e3[] = { @@ -133491,6 +151434,7 @@ static const pciDeviceInfo *pci_dev_list_16e3[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16e5[] = { &pci_dev_info_16e5_6000, + &pci_dev_info_16e5_6300, NULL }; #endif @@ -133526,6 +151470,7 @@ static const pciDeviceInfo *pci_dev_list_170b[] = { }; #endif #define pci_dev_list_170c NULL +#define pci_dev_list_1719 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1725[] = { &pci_dev_info_1725_7174, @@ -133542,6 +151487,7 @@ static const pciDeviceInfo *pci_dev_list_172a[] = { static const pciDeviceInfo *pci_dev_list_1734[] = { &pci_dev_info_1734_1078, &pci_dev_info_1734_1085, + &pci_dev_info_1734_1098, NULL }; #endif @@ -133572,12 +151518,20 @@ static const pciDeviceInfo *pci_dev_list_1743[] = { NULL }; #endif +#define pci_dev_list_1745 NULL #define pci_dev_list_1749 NULL #define pci_dev_list_174b NULL #define pci_dev_list_174d NULL #define pci_dev_list_175c NULL #define pci_dev_list_175e NULL +#define pci_dev_list_1760 NULL #define pci_dev_list_1775 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_177d[] = { + &pci_dev_info_177d_0001, + NULL +}; +#endif #define pci_dev_list_1787 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1796[] = { @@ -133587,6 +151541,7 @@ static const pciDeviceInfo *pci_dev_list_1796[] = { &pci_dev_info_1796_0004, &pci_dev_info_1796_0005, &pci_dev_info_1796_0006, + &pci_dev_info_1796_000d, NULL }; #endif @@ -133621,6 +151576,7 @@ static const pciDeviceInfo *pci_dev_list_17a0[] = { }; #endif #define pci_dev_list_17aa NULL +#define pci_dev_list_17ab NULL #define pci_dev_list_17af NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_17b3[] = { @@ -133660,6 +151616,7 @@ static const pciDeviceInfo *pci_dev_list_17d3[] = { &pci_dev_info_17d3_1220, &pci_dev_info_17d3_1230, &pci_dev_info_17d3_1260, + &pci_dev_info_17d3_1280, NULL }; #endif @@ -133673,8 +151630,6 @@ static const pciDeviceInfo *pci_dev_list_17d5[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_17db[] = { &pci_dev_info_17db_0101, - &pci_dev_info_17db_0201, - &pci_dev_info_17db_0202, NULL }; #endif @@ -133727,15 +151682,18 @@ static const pciDeviceInfo *pci_dev_list_1814[] = { &pci_dev_info_1814_0101, &pci_dev_info_1814_0200, &pci_dev_info_1814_0201, + &pci_dev_info_1814_0300, &pci_dev_info_1814_0301, &pci_dev_info_1814_0302, &pci_dev_info_1814_0401, + &pci_dev_info_1814_e932, NULL }; #endif #define pci_dev_list_1820 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1822[] = { + &pci_dev_info_1822_0001, &pci_dev_info_1822_4e35, NULL }; @@ -133753,6 +151711,12 @@ static const pciDeviceInfo *pci_dev_list_182e[] = { NULL }; #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_182f[] = { + &pci_dev_info_182f_000b, + NULL +}; +#endif #define pci_dev_list_1830 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_183b[] = { @@ -133788,6 +151752,24 @@ static const pciDeviceInfo *pci_dev_list_1867[] = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_186c[] = { + &pci_dev_info_186c_0612, + &pci_dev_info_186c_0614, + &pci_dev_info_186c_0622, + &pci_dev_info_186c_0624, + &pci_dev_info_186c_0625, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1876[] = { + &pci_dev_info_1876_a101, + &pci_dev_info_1876_a102, + &pci_dev_info_1876_a103, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_187e[] = { &pci_dev_info_187e_3403, &pci_dev_info_187e_340e, @@ -133815,6 +151797,7 @@ static const pciDeviceInfo *pci_dev_list_18ac[] = { &pci_dev_info_18ac_d800, &pci_dev_info_18ac_d810, &pci_dev_info_18ac_d820, + &pci_dev_info_18ac_db30, NULL }; #endif @@ -133876,6 +151859,10 @@ static const pciDeviceInfo *pci_dev_list_18f7[] = { &pci_dev_info_18f7_0004, &pci_dev_info_18f7_0005, &pci_dev_info_18f7_000a, + &pci_dev_info_18f7_000f, + &pci_dev_info_18f7_0010, + &pci_dev_info_18f7_0011, + &pci_dev_info_18f7_0014, NULL }; #endif @@ -133886,6 +151873,8 @@ static const pciDeviceInfo *pci_dev_list_1904[] = { NULL }; #endif +#define pci_dev_list_1905 NULL +#define pci_dev_list_1912 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1923[] = { &pci_dev_info_1923_0040, @@ -133919,9 +151908,24 @@ static const pciDeviceInfo *pci_dev_list_194a[] = { NULL }; #endif +#define pci_dev_list_1954 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1957[] = { &pci_dev_info_1957_0012, + &pci_dev_info_1957_0013, + &pci_dev_info_1957_0014, + &pci_dev_info_1957_0015, + &pci_dev_info_1957_0018, + &pci_dev_info_1957_0019, + &pci_dev_info_1957_001a, + &pci_dev_info_1957_0020, + &pci_dev_info_1957_0021, + &pci_dev_info_1957_0022, + &pci_dev_info_1957_0023, + &pci_dev_info_1957_0030, + &pci_dev_info_1957_0031, + &pci_dev_info_1957_0032, + &pci_dev_info_1957_0033, &pci_dev_info_1957_0080, &pci_dev_info_1957_0081, &pci_dev_info_1957_0082, @@ -133930,6 +151934,8 @@ static const pciDeviceInfo *pci_dev_list_1957[] = { &pci_dev_info_1957_0085, &pci_dev_info_1957_0086, &pci_dev_info_1957_0087, + &pci_dev_info_1957_7010, + &pci_dev_info_1957_7011, NULL }; #endif @@ -133944,6 +151950,7 @@ static const pciDeviceInfo *pci_dev_list_1966[] = { #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1969[] = { &pci_dev_info_1969_1048, + &pci_dev_info_1969_2048, NULL }; #endif @@ -134010,6 +152017,7 @@ static const pciDeviceInfo *pci_dev_list_19ae[] = { }; #endif #define pci_dev_list_19d4 NULL +#define pci_dev_list_19de NULL #define pci_dev_list_19e2 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_19e7[] = { @@ -134038,20 +152046,41 @@ static const pciDeviceInfo *pci_dev_list_1a08[] = { NULL }; #endif +#define pci_dev_list_1a0e NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1a1d[] = { &pci_dev_info_1a1d_1a17, NULL }; #endif +#define pci_dev_list_1a22 NULL #define pci_dev_list_1a29 NULL +#define pci_dev_list_1a2b NULL #define pci_dev_list_1a51 NULL +#define pci_dev_list_1a58 NULL #define pci_dev_list_1a5d NULL +#define pci_dev_list_1a68 NULL #define pci_dev_list_1a71 NULL -#define pci_dev_list_1a73 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1a73[] = { + &pci_dev_info_1a73_0001, + NULL +}; +#endif #define pci_dev_list_1a77 NULL #define pci_dev_list_1a78 NULL -#define pci_dev_list_1a8c NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1a8c[] = { + &pci_dev_info_1a8c_1100, + NULL +}; +#endif +#define pci_dev_list_1aae NULL +#define pci_dev_list_1ab9 NULL +#define pci_dev_list_1ae0 NULL +#define pci_dev_list_1ae8 NULL +#define pci_dev_list_1af4 NULL +#define pci_dev_list_1af5 NULL #define pci_dev_list_1b13 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1c1c[] = { @@ -134088,6 +152117,14 @@ static const pciDeviceInfo *pci_dev_list_1fc1[] = { }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1fc9[] = { + &pci_dev_info_1fc9_3009, + &pci_dev_info_1fc9_3010, + &pci_dev_info_1fc9_3014, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1fce[] = { &pci_dev_info_1fce_0001, NULL @@ -134188,6 +152225,18 @@ static const pciDeviceInfo *pci_dev_list_4033[] = { NULL }; #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_4040[] = { + &pci_dev_info_4040_0001, + &pci_dev_info_4040_0002, + &pci_dev_info_4040_0003, + &pci_dev_info_4040_0004, + &pci_dev_info_4040_0005, + &pci_dev_info_4040_0024, + &pci_dev_info_4040_0025, + NULL +}; +#endif #define pci_dev_list_4143 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_4144[] = { @@ -134225,6 +152274,8 @@ static const pciDeviceInfo *pci_dev_list_4916[] = { #define pci_dev_list_4943 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_494f[] = { + &pci_dev_info_494f_0c60, + &pci_dev_info_494f_0e60, &pci_dev_info_494f_10e8, NULL }; @@ -134642,17 +152693,36 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_10a0, &pci_dev_info_8086_10a1, &pci_dev_info_8086_10a4, + &pci_dev_info_8086_10a5, + &pci_dev_info_8086_10a7, + &pci_dev_info_8086_10a9, &pci_dev_info_8086_10b0, &pci_dev_info_8086_10b2, &pci_dev_info_8086_10b3, &pci_dev_info_8086_10b4, &pci_dev_info_8086_10b5, + &pci_dev_info_8086_10b6, &pci_dev_info_8086_10b9, &pci_dev_info_8086_10ba, &pci_dev_info_8086_10bb, &pci_dev_info_8086_10bc, + &pci_dev_info_8086_10bd, + &pci_dev_info_8086_10bf, + &pci_dev_info_8086_10c0, + &pci_dev_info_8086_10c2, + &pci_dev_info_8086_10c3, &pci_dev_info_8086_10c4, &pci_dev_info_8086_10c5, + &pci_dev_info_8086_10c6, + &pci_dev_info_8086_10c7, + &pci_dev_info_8086_10cb, + &pci_dev_info_8086_10d5, + &pci_dev_info_8086_10d6, + &pci_dev_info_8086_10d9, + &pci_dev_info_8086_10da, + &pci_dev_info_8086_10dd, + &pci_dev_info_8086_10e2, + &pci_dev_info_8086_10f5, &pci_dev_info_8086_1107, &pci_dev_info_8086_1130, &pci_dev_info_8086_1131, @@ -134940,6 +153010,9 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_27a1, &pci_dev_info_8086_27a2, &pci_dev_info_8086_27a6, + &pci_dev_info_8086_27ac, + &pci_dev_info_8086_27ad, + &pci_dev_info_8086_27ae, &pci_dev_info_8086_27b0, &pci_dev_info_8086_27b8, &pci_dev_info_8086_27b9, @@ -134997,12 +153070,12 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_284b, &pci_dev_info_8086_284f, &pci_dev_info_8086_2850, - &pci_dev_info_8086_2910, - &pci_dev_info_8086_2911, &pci_dev_info_8086_2912, &pci_dev_info_8086_2914, &pci_dev_info_8086_2916, + &pci_dev_info_8086_2917, &pci_dev_info_8086_2918, + &pci_dev_info_8086_2919, &pci_dev_info_8086_2920, &pci_dev_info_8086_2921, &pci_dev_info_8086_2922, @@ -135010,8 +153083,9 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_2925, &pci_dev_info_8086_2926, &pci_dev_info_8086_2928, + &pci_dev_info_8086_2929, + &pci_dev_info_8086_292c, &pci_dev_info_8086_292d, - &pci_dev_info_8086_292e, &pci_dev_info_8086_2930, &pci_dev_info_8086_2932, &pci_dev_info_8086_2934, @@ -135041,6 +153115,8 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_2980, &pci_dev_info_8086_2981, &pci_dev_info_8086_2982, + &pci_dev_info_8086_2983, + &pci_dev_info_8086_2984, &pci_dev_info_8086_2990, &pci_dev_info_8086_2991, &pci_dev_info_8086_2992, @@ -135104,10 +153180,138 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_2a05, &pci_dev_info_8086_2a06, &pci_dev_info_8086_2a07, - &pci_dev_info_8086_3092, + &pci_dev_info_8086_2a10, + &pci_dev_info_8086_2a11, + &pci_dev_info_8086_2a12, + &pci_dev_info_8086_2a13, + &pci_dev_info_8086_2a14, + &pci_dev_info_8086_2a15, + &pci_dev_info_8086_2a16, + &pci_dev_info_8086_2a17, + &pci_dev_info_8086_2a40, + &pci_dev_info_8086_2a41, + &pci_dev_info_8086_2a42, + &pci_dev_info_8086_2a43, + &pci_dev_info_8086_2a44, + &pci_dev_info_8086_2a45, + &pci_dev_info_8086_2a46, + &pci_dev_info_8086_2a47, + &pci_dev_info_8086_2a50, + &pci_dev_info_8086_2a51, + &pci_dev_info_8086_2a52, + &pci_dev_info_8086_2a53, + &pci_dev_info_8086_2c01, + &pci_dev_info_8086_2c10, + &pci_dev_info_8086_2c11, + &pci_dev_info_8086_2c14, + &pci_dev_info_8086_2c15, + &pci_dev_info_8086_2c18, + &pci_dev_info_8086_2c19, + &pci_dev_info_8086_2c1a, + &pci_dev_info_8086_2c1c, + &pci_dev_info_8086_2c20, + &pci_dev_info_8086_2c21, + &pci_dev_info_8086_2c22, + &pci_dev_info_8086_2c23, + &pci_dev_info_8086_2c28, + &pci_dev_info_8086_2c29, + &pci_dev_info_8086_2c2a, + &pci_dev_info_8086_2c2b, + &pci_dev_info_8086_2c30, + &pci_dev_info_8086_2c31, + &pci_dev_info_8086_2c32, + &pci_dev_info_8086_2c33, + &pci_dev_info_8086_2c40, + &pci_dev_info_8086_2e00, + &pci_dev_info_8086_2e01, + &pci_dev_info_8086_2e02, + &pci_dev_info_8086_2e03, + &pci_dev_info_8086_2e04, + &pci_dev_info_8086_2e05, + &pci_dev_info_8086_2e06, + &pci_dev_info_8086_2e07, + &pci_dev_info_8086_2e10, + &pci_dev_info_8086_2e11, + &pci_dev_info_8086_2e12, + &pci_dev_info_8086_2e13, + &pci_dev_info_8086_2e14, + &pci_dev_info_8086_2e15, + &pci_dev_info_8086_2e16, + &pci_dev_info_8086_2e17, + &pci_dev_info_8086_2e20, + &pci_dev_info_8086_2e21, + &pci_dev_info_8086_2e22, + &pci_dev_info_8086_2e23, + &pci_dev_info_8086_2e24, + &pci_dev_info_8086_2e25, + &pci_dev_info_8086_2e26, + &pci_dev_info_8086_2e27, + &pci_dev_info_8086_2e30, + &pci_dev_info_8086_2e31, + &pci_dev_info_8086_2e32, + &pci_dev_info_8086_2e33, + &pci_dev_info_8086_2e34, + &pci_dev_info_8086_2e35, + &pci_dev_info_8086_2e36, + &pci_dev_info_8086_2e37, + &pci_dev_info_8086_2e40, + &pci_dev_info_8086_2e41, + &pci_dev_info_8086_2e42, + &pci_dev_info_8086_2e43, + &pci_dev_info_8086_2e44, + &pci_dev_info_8086_2e45, + &pci_dev_info_8086_2e46, + &pci_dev_info_8086_2e47, &pci_dev_info_8086_3200, + &pci_dev_info_8086_3313, + &pci_dev_info_8086_331b, + &pci_dev_info_8086_3331, + &pci_dev_info_8086_3339, &pci_dev_info_8086_3340, &pci_dev_info_8086_3341, + &pci_dev_info_8086_3363, + &pci_dev_info_8086_33c3, + &pci_dev_info_8086_33cb, + &pci_dev_info_8086_3400, + &pci_dev_info_8086_3401, + &pci_dev_info_8086_3402, + &pci_dev_info_8086_3403, + &pci_dev_info_8086_3404, + &pci_dev_info_8086_3405, + &pci_dev_info_8086_3406, + &pci_dev_info_8086_3407, + &pci_dev_info_8086_3408, + &pci_dev_info_8086_3409, + &pci_dev_info_8086_340a, + &pci_dev_info_8086_340b, + &pci_dev_info_8086_340c, + &pci_dev_info_8086_340d, + &pci_dev_info_8086_340e, + &pci_dev_info_8086_340f, + &pci_dev_info_8086_3410, + &pci_dev_info_8086_3411, + &pci_dev_info_8086_3418, + &pci_dev_info_8086_3419, + &pci_dev_info_8086_3420, + &pci_dev_info_8086_3421, + &pci_dev_info_8086_3422, + &pci_dev_info_8086_3423, + &pci_dev_info_8086_3425, + &pci_dev_info_8086_3426, + &pci_dev_info_8086_3427, + &pci_dev_info_8086_3428, + &pci_dev_info_8086_3429, + &pci_dev_info_8086_342a, + &pci_dev_info_8086_342b, + &pci_dev_info_8086_342c, + &pci_dev_info_8086_342d, + &pci_dev_info_8086_342e, + &pci_dev_info_8086_342f, + &pci_dev_info_8086_3430, + &pci_dev_info_8086_3431, + &pci_dev_info_8086_3432, + &pci_dev_info_8086_3433, + &pci_dev_info_8086_3438, &pci_dev_info_8086_3500, &pci_dev_info_8086_3501, &pci_dev_info_8086_3504, @@ -135162,9 +153366,59 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_360e, &pci_dev_info_8086_360f, &pci_dev_info_8086_3610, + &pci_dev_info_8086_3a00, + &pci_dev_info_8086_3a02, + &pci_dev_info_8086_3a05, + &pci_dev_info_8086_3a06, + &pci_dev_info_8086_3a14, + &pci_dev_info_8086_3a16, + &pci_dev_info_8086_3a18, + &pci_dev_info_8086_3a1a, + &pci_dev_info_8086_3a20, + &pci_dev_info_8086_3a22, + &pci_dev_info_8086_3a25, + &pci_dev_info_8086_3a26, + &pci_dev_info_8086_3a30, + &pci_dev_info_8086_3a32, + &pci_dev_info_8086_3a34, + &pci_dev_info_8086_3a35, + &pci_dev_info_8086_3a36, + &pci_dev_info_8086_3a37, + &pci_dev_info_8086_3a38, + &pci_dev_info_8086_3a39, + &pci_dev_info_8086_3a3a, + &pci_dev_info_8086_3a3c, + &pci_dev_info_8086_3a3e, + &pci_dev_info_8086_3a40, + &pci_dev_info_8086_3a42, + &pci_dev_info_8086_3a44, + &pci_dev_info_8086_3a46, + &pci_dev_info_8086_3a48, + &pci_dev_info_8086_3a4a, + &pci_dev_info_8086_3a4c, + &pci_dev_info_8086_3a51, + &pci_dev_info_8086_3a55, + &pci_dev_info_8086_3a60, + &pci_dev_info_8086_3a62, + &pci_dev_info_8086_3a64, + &pci_dev_info_8086_3a65, + &pci_dev_info_8086_3a66, + &pci_dev_info_8086_3a67, + &pci_dev_info_8086_3a68, + &pci_dev_info_8086_3a69, + &pci_dev_info_8086_3a6a, + &pci_dev_info_8086_3a6c, + &pci_dev_info_8086_3a6e, + &pci_dev_info_8086_3a70, + &pci_dev_info_8086_3a72, + &pci_dev_info_8086_3a74, + &pci_dev_info_8086_3a76, + &pci_dev_info_8086_3a78, + &pci_dev_info_8086_3a7a, + &pci_dev_info_8086_3a7c, &pci_dev_info_8086_4000, - &pci_dev_info_8086_4008, - &pci_dev_info_8086_4010, + &pci_dev_info_8086_4001, + &pci_dev_info_8086_4003, &pci_dev_info_8086_4021, &pci_dev_info_8086_4022, &pci_dev_info_8086_4023, @@ -135178,6 +153432,7 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_402e, &pci_dev_info_8086_402f, &pci_dev_info_8086_4030, + &pci_dev_info_8086_4031, &pci_dev_info_8086_4032, &pci_dev_info_8086_4035, &pci_dev_info_8086_4036, @@ -135186,7 +153441,53 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_4223, &pci_dev_info_8086_4224, &pci_dev_info_8086_4227, + &pci_dev_info_8086_4229, + &pci_dev_info_8086_4230, + &pci_dev_info_8086_444e, &pci_dev_info_8086_5001, + &pci_dev_info_8086_5002, + &pci_dev_info_8086_5009, + &pci_dev_info_8086_500d, + &pci_dev_info_8086_500e, + &pci_dev_info_8086_500f, + &pci_dev_info_8086_5010, + &pci_dev_info_8086_5012, + &pci_dev_info_8086_5020, + &pci_dev_info_8086_5021, + &pci_dev_info_8086_5023, + &pci_dev_info_8086_5024, + &pci_dev_info_8086_5025, + &pci_dev_info_8086_5028, + &pci_dev_info_8086_5029, + &pci_dev_info_8086_502a, + &pci_dev_info_8086_502b, + &pci_dev_info_8086_502c, + &pci_dev_info_8086_5030, + &pci_dev_info_8086_5031, + &pci_dev_info_8086_5032, + &pci_dev_info_8086_5033, + &pci_dev_info_8086_5035, + &pci_dev_info_8086_5037, + &pci_dev_info_8086_5039, + &pci_dev_info_8086_503a, + &pci_dev_info_8086_503b, + &pci_dev_info_8086_503c, + &pci_dev_info_8086_503d, + &pci_dev_info_8086_503e, + &pci_dev_info_8086_503f, + &pci_dev_info_8086_5040, + &pci_dev_info_8086_5041, + &pci_dev_info_8086_5042, + &pci_dev_info_8086_5043, + &pci_dev_info_8086_5044, + &pci_dev_info_8086_5045, + &pci_dev_info_8086_5046, + &pci_dev_info_8086_5047, + &pci_dev_info_8086_5048, + &pci_dev_info_8086_5049, + &pci_dev_info_8086_504a, + &pci_dev_info_8086_504b, + &pci_dev_info_8086_504c, &pci_dev_info_8086_5200, &pci_dev_info_8086_5201, &pci_dev_info_8086_530d, @@ -135248,6 +153549,22 @@ static const pciDeviceInfo *pci_dev_list_8086[] = { &pci_dev_info_8086_7603, &pci_dev_info_8086_7800, &pci_dev_info_8086_8002, + &pci_dev_info_8086_8003, + &pci_dev_info_8086_8100, + &pci_dev_info_8086_8108, + &pci_dev_info_8086_8110, + &pci_dev_info_8086_8112, + &pci_dev_info_8086_8114, + &pci_dev_info_8086_8115, + &pci_dev_info_8086_8116, + &pci_dev_info_8086_8117, + &pci_dev_info_8086_8118, + &pci_dev_info_8086_8119, + &pci_dev_info_8086_811a, + &pci_dev_info_8086_811b, + &pci_dev_info_8086_811c, + &pci_dev_info_8086_811d, + &pci_dev_info_8086_811e, &pci_dev_info_8086_84c4, &pci_dev_info_8086_84c5, &pci_dev_info_8086_84ca, @@ -135426,6 +153743,8 @@ static const pciDeviceInfo *pci_dev_list_9005[] = { &pci_dev_info_9005_00c5, &pci_dev_info_9005_00cf, &pci_dev_info_9005_0241, + &pci_dev_info_9005_0242, + &pci_dev_info_9005_0243, &pci_dev_info_9005_0250, &pci_dev_info_9005_0279, &pci_dev_info_9005_0283, @@ -135434,6 +153753,8 @@ static const pciDeviceInfo *pci_dev_list_9005[] = { &pci_dev_info_9005_0286, &pci_dev_info_9005_0410, &pci_dev_info_9005_0412, + &pci_dev_info_9005_0415, + &pci_dev_info_9005_0416, &pci_dev_info_9005_041e, &pci_dev_info_9005_041f, &pci_dev_info_9005_0430, @@ -135566,13 +153887,15 @@ static const pciDeviceInfo *pci_dev_list_cddd[] = { #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_d161[] = { + &pci_dev_info_d161_0120, &pci_dev_info_d161_0205, &pci_dev_info_d161_0210, &pci_dev_info_d161_0405, - &pci_dev_info_d161_0406, &pci_dev_info_d161_0410, - &pci_dev_info_d161_0411, + &pci_dev_info_d161_0800, &pci_dev_info_d161_2400, + &pci_dev_info_d161_3400, + &pci_dev_info_d161_b410, NULL }; #endif @@ -135763,6 +154086,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x02ac, pci_vendor_02ac, pci_dev_list_02ac}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x02e0, pci_vendor_02e0, pci_dev_list_02e0}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0315, pci_vendor_0315, pci_dev_list_0315}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -135787,6 +154113,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x050d, pci_vendor_050d, pci_dev_list_050d}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x058f, pci_vendor_058f, pci_dev_list_058f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x05a9, pci_vendor_05a9, pci_dev_list_05a9}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -139674,6 +158003,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x1535, pci_vendor_1535, pci_dev_list_1535}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1536, pci_vendor_1536, pci_dev_list_1536}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1537, pci_vendor_1537, pci_dev_list_1537}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140341,6 +158673,12 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x1677, pci_vendor_1677, pci_dev_list_1677}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1678, pci_vendor_1678, pci_dev_list_1678}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1679, pci_vendor_1679, pci_dev_list_1679}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x167b, pci_vendor_167b, pci_dev_list_167b}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140410,6 +158748,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x16d5, pci_vendor_16d5, pci_dev_list_16d5}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16da, pci_vendor_16da, pci_dev_list_16da}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16df, pci_vendor_16df, pci_dev_list_16df}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140446,6 +158787,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x170c, pci_vendor_170c, pci_dev_list_170c}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1719, pci_vendor_1719, pci_dev_list_1719}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1725, pci_vendor_1725, pci_dev_list_1725}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140464,6 +158808,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x1743, pci_vendor_1743, pci_dev_list_1743}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1745, pci_vendor_1745, pci_dev_list_1745}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1749, pci_vendor_1749, pci_dev_list_1749}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140479,9 +158826,15 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x175e, pci_vendor_175e, pci_dev_list_175e}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1760, pci_vendor_1760, pci_dev_list_1760}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1775, pci_vendor_1775, pci_dev_list_1775}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x177d, pci_vendor_177d, pci_dev_list_177d}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1787, pci_vendor_1787, pci_dev_list_1787}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140503,6 +158856,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x17aa, pci_vendor_17aa, pci_dev_list_17aa}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17ab, pci_vendor_17ab, pci_dev_list_17ab}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17af, pci_vendor_17af, pci_dev_list_17af}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140581,6 +158937,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x182e, pci_vendor_182e, pci_dev_list_182e}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x182f, pci_vendor_182f, pci_dev_list_182f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1830, pci_vendor_1830, pci_dev_list_1830}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140617,6 +158976,12 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x1867, pci_vendor_1867, pci_dev_list_1867}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x186c, pci_vendor_186c, pci_dev_list_186c}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1876, pci_vendor_1876, pci_dev_list_1876}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x187e, pci_vendor_187e, pci_dev_list_187e}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140684,6 +159049,12 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x1904, pci_vendor_1904, pci_dev_list_1904}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1905, pci_vendor_1905, pci_dev_list_1905}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1912, pci_vendor_1912, pci_dev_list_1912}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1923, pci_vendor_1923, pci_dev_list_1923}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140702,6 +159073,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x194a, pci_vendor_194a, pci_dev_list_194a}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1954, pci_vendor_1954, pci_dev_list_1954}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1957, pci_vendor_1957, pci_dev_list_1957}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140756,6 +159130,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x19d4, pci_vendor_19d4, pci_dev_list_19d4}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x19de, pci_vendor_19de, pci_dev_list_19de}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x19e2, pci_vendor_19e2, pci_dev_list_19e2}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140769,18 +159146,33 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x1a08, pci_vendor_1a08, pci_dev_list_1a08}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a0e, pci_vendor_1a0e, pci_dev_list_1a0e}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a1d, pci_vendor_1a1d, pci_dev_list_1a1d}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a22, pci_vendor_1a22, pci_dev_list_1a22}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a29, pci_vendor_1a29, pci_dev_list_1a29}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a2b, pci_vendor_1a2b, pci_dev_list_1a2b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a51, pci_vendor_1a51, pci_dev_list_1a51}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a58, pci_vendor_1a58, pci_dev_list_1a58}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a5d, pci_vendor_1a5d, pci_dev_list_1a5d}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a68, pci_vendor_1a68, pci_dev_list_1a68}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a71, pci_vendor_1a71, pci_dev_list_1a71}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140796,6 +159188,24 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x1a8c, pci_vendor_1a8c, pci_dev_list_1a8c}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1aae, pci_vendor_1aae, pci_dev_list_1aae}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1ab9, pci_vendor_1ab9, pci_dev_list_1ab9}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1ae0, pci_vendor_1ae0, pci_dev_list_1ae0}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1ae8, pci_vendor_1ae8, pci_dev_list_1ae8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1af4, pci_vendor_1af4, pci_dev_list_1af4}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1af5, pci_vendor_1af5, pci_dev_list_1af5}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1b13, pci_vendor_1b13, pci_dev_list_1b13}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140814,6 +159224,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x1fc1, pci_vendor_1fc1, pci_dev_list_1fc1}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1fc9, pci_vendor_1fc9, pci_dev_list_1fc9}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1fce, pci_vendor_1fce, pci_dev_list_1fce}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -140879,6 +159292,9 @@ static const pciVendorInfo pciVendorInfoList[] = { {0x4033, pci_vendor_4033, pci_dev_list_4033}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x4040, pci_vendor_4040, pci_dev_list_4040}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x4143, pci_vendor_4143, pci_dev_list_4143}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -141294,6 +159710,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x02ac, pci_vendor_02ac, pci_ss_list_02ac}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x02e0, pci_vendor_02e0, pci_ss_list_02e0}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0315, pci_vendor_0315, pci_ss_list_0315}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -141318,6 +159737,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x050d, pci_vendor_050d, pci_ss_list_050d}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x058f, pci_vendor_058f, pci_ss_list_058f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x05a9, pci_vendor_05a9, pci_ss_list_05a9}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -145205,6 +163627,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x1535, pci_vendor_1535, pci_ss_list_1535}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1536, pci_vendor_1536, pci_ss_list_1536}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1537, pci_vendor_1537, pci_ss_list_1537}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -145872,6 +164297,12 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x1677, pci_vendor_1677, pci_ss_list_1677}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1678, pci_vendor_1678, pci_ss_list_1678}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1679, pci_vendor_1679, pci_ss_list_1679}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x167b, pci_vendor_167b, pci_ss_list_167b}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -145941,6 +164372,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x16d5, pci_vendor_16d5, pci_ss_list_16d5}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16da, pci_vendor_16da, pci_ss_list_16da}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16df, pci_vendor_16df, pci_ss_list_16df}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -145977,6 +164411,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x170c, pci_vendor_170c, pci_ss_list_170c}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1719, pci_vendor_1719, pci_ss_list_1719}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1725, pci_vendor_1725, pci_ss_list_1725}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -145995,6 +164432,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x1743, pci_vendor_1743, pci_ss_list_1743}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1745, pci_vendor_1745, pci_ss_list_1745}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1749, pci_vendor_1749, pci_ss_list_1749}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146010,9 +164450,15 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x175e, pci_vendor_175e, pci_ss_list_175e}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1760, pci_vendor_1760, pci_ss_list_1760}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1775, pci_vendor_1775, pci_ss_list_1775}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x177d, pci_vendor_177d, pci_ss_list_177d}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1787, pci_vendor_1787, pci_ss_list_1787}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146034,6 +164480,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x17aa, pci_vendor_17aa, pci_ss_list_17aa}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17ab, pci_vendor_17ab, pci_ss_list_17ab}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17af, pci_vendor_17af, pci_ss_list_17af}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146112,6 +164561,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x182e, pci_vendor_182e, pci_ss_list_182e}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x182f, pci_vendor_182f, pci_ss_list_182f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1830, pci_vendor_1830, pci_ss_list_1830}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146148,6 +164600,12 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x1867, pci_vendor_1867, pci_ss_list_1867}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x186c, pci_vendor_186c, pci_ss_list_186c}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1876, pci_vendor_1876, pci_ss_list_1876}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x187e, pci_vendor_187e, pci_ss_list_187e}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146215,6 +164673,12 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x1904, pci_vendor_1904, pci_ss_list_1904}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1905, pci_vendor_1905, pci_ss_list_1905}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1912, pci_vendor_1912, pci_ss_list_1912}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1923, pci_vendor_1923, pci_ss_list_1923}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146233,6 +164697,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x194a, pci_vendor_194a, pci_ss_list_194a}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1954, pci_vendor_1954, pci_ss_list_1954}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1957, pci_vendor_1957, pci_ss_list_1957}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146287,6 +164754,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x19d4, pci_vendor_19d4, pci_ss_list_19d4}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x19de, pci_vendor_19de, pci_ss_list_19de}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x19e2, pci_vendor_19e2, pci_ss_list_19e2}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146300,18 +164770,33 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x1a08, pci_vendor_1a08, pci_ss_list_1a08}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a0e, pci_vendor_1a0e, pci_ss_list_1a0e}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a1d, pci_vendor_1a1d, pci_ss_list_1a1d}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a22, pci_vendor_1a22, pci_ss_list_1a22}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a29, pci_vendor_1a29, pci_ss_list_1a29}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a2b, pci_vendor_1a2b, pci_ss_list_1a2b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a51, pci_vendor_1a51, pci_ss_list_1a51}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a58, pci_vendor_1a58, pci_ss_list_1a58}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a5d, pci_vendor_1a5d, pci_ss_list_1a5d}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1a68, pci_vendor_1a68, pci_ss_list_1a68}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a71, pci_vendor_1a71, pci_ss_list_1a71}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146327,6 +164812,24 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x1a8c, pci_vendor_1a8c, pci_ss_list_1a8c}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1aae, pci_vendor_1aae, pci_ss_list_1aae}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1ab9, pci_vendor_1ab9, pci_ss_list_1ab9}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1ae0, pci_vendor_1ae0, pci_ss_list_1ae0}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1ae8, pci_vendor_1ae8, pci_ss_list_1ae8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1af4, pci_vendor_1af4, pci_ss_list_1af4}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1af5, pci_vendor_1af5, pci_ss_list_1af5}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1b13, pci_vendor_1b13, pci_ss_list_1b13}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146345,6 +164848,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x1fc1, pci_vendor_1fc1, pci_ss_list_1fc1}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1fc9, pci_vendor_1fc9, pci_ss_list_1fc9}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1fce, pci_vendor_1fce, pci_ss_list_1fce}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -146410,6 +164916,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = { {0x4033, pci_vendor_4033, pci_ss_list_4033}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x4040, pci_vendor_4040, pci_ss_list_4040}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x4143, pci_vendor_4143, pci_ss_list_4143}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO |