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authorLuc Verhaegen <libv@skynet.be>2006-03-20 13:51:38 +0000
committerLuc Verhaegen <libv@skynet.be>2006-03-20 13:51:38 +0000
commit9880cc0faf4df3ecb23b1655d6d9b268f7aeb04f (patch)
tree1783faa6bd2ac02ec8f0e7e44173e93150cd5356
parent5202701a16abd894c349665ba77b7595d5dfe2d8 (diff)
Clean up card ids in ATIChipType; everything that's not mach64 is now
removed. Strip out code for those older devices.
-rw-r--r--ChangeLog21
-rw-r--r--src/atiadjust.c56
-rw-r--r--src/atibus.c18
-rw-r--r--src/atichip.h67
-rw-r--r--src/aticlock.c144
-rw-r--r--src/atilock.c348
-rw-r--r--src/atimode.c587
-rw-r--r--src/atipreinit.c153
-rw-r--r--src/atiprint.c32
-rw-r--r--src/atistruct.h6
-rw-r--r--src/ativga.c14
-rw-r--r--src/atiwonder.c150
-rw-r--r--src/atiwonderio.c25
13 files changed, 562 insertions, 1059 deletions
diff --git a/ChangeLog b/ChangeLog
index 6e95931..be29b4f 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,26 @@
2006-03-20 Luc Verhaegen <libv@skynet.be>
+ * src/atiadjust.c: (ATIAdjustPreInit), (ATIAdjustFrame):
+ * src/atibus.c: (ATIClaimResources):
+ * src/atichip.h:
+ * src/aticlock.c: (ATIClockPreInit), (ATIClockSave),
+ (ATIClockCalculate):
+ * src/atilock.c: (ATIUnlock), (ATILock):
+ * src/atimode.c: (ATIModePreInit), (ATIModeSave),
+ (ATIModeCalculate), (ATIModeSet):
+ * src/atipreinit.c: (ATIPreInit):
+ * src/atiprint.c: (ATIPrintRegisters):
+ * src/atistruct.h:
+ * src/ativga.c: (ATIVGAPreInit), (ATIVGACalculate):
+ * src/atiwonder.c: (ATIVGAWonderPreInit), (ATIVGAWonderSave),
+ (ATIVGAWonderCalculate), (ATIVGAWonderSet):
+ * src/atiwonderio.c: (ATIModifyExtReg):
+
+ Clean up card ids in ATIChipType; everything that's not mach64 is now
+ removed. Strip out code for those older devices.
+
+2006-03-20 Luc Verhaegen <libv@skynet.be>
+
* src/Makefile.am:
* src/ati.c: (Mach64ChipsetString):
* src/atichip.c:
diff --git a/src/atiadjust.c b/src/atiadjust.c
index f2fe10e..4c2b49c 100644
--- a/src/atiadjust.c
+++ b/src/atiadjust.c
@@ -55,31 +55,13 @@ ATIAdjustPreInit
{
unsigned long MaxBase;
-#ifndef AVOID_CPIO
+ pATI->AdjustDepth = (pATI->bitsPerPixel + 7) >> 3;
- if ((pATI->CPIO_VGAWonder) &&
- (pATI->Chip <= ATI_CHIP_18800_1) &&
- (pATI->VideoRAM == 256) &&
- (pATI->depth >= 8))
- {
- /* Strange, to say the least ... */
- pATI->AdjustDepth = (pATI->bitsPerPixel + 3) >> 2;
- pATI->AdjustMask = (unsigned long)(-32);
- }
- else
-
-#endif /* AVOID_CPIO */
-
- {
- pATI->AdjustDepth = (pATI->bitsPerPixel + 7) >> 3;
-
- pATI->AdjustMask = 64;
- while (pATI->AdjustMask % (unsigned long)(pATI->AdjustDepth))
- pATI->AdjustMask += 64;
- pATI->AdjustMask =
- ~(((pATI->AdjustMask / (unsigned long)(pATI->AdjustDepth)) >> 3) -
- 1);
- }
+ pATI->AdjustMask = 64;
+ while (pATI->AdjustMask % (unsigned long)(pATI->AdjustDepth))
+ pATI->AdjustMask += 64;
+ pATI->AdjustMask =
+ ~(((pATI->AdjustMask / (unsigned long)(pATI->AdjustDepth)) >> 3) - 1);
switch (pATI->NewHW.crtc)
{
@@ -97,10 +79,6 @@ ATIAdjustPreInit
{
pATI->AdjustMaxBase = 0xFFFFU << 3;
}
- else if (pATI->Chip <= ATI_CHIP_28800_6)
- {
- pATI->AdjustMaxBase = 0x03FFFFU << 3;
- }
else /* Mach32 & Mach64 */
{
pATI->AdjustMaxBase = 0x0FFFFFU << 3;
@@ -186,20 +164,14 @@ ATIAdjustFrame
if (pATI->CPIO_VGAWonder)
{
- if (pATI->Chip <= ATI_CHIP_18800_1)
- ATIModifyExtReg(pATI, 0xB0U, -1, 0x3FU, Base >> 10);
- else
- {
- ATIModifyExtReg(pATI, 0xB0U, -1, 0xBFU, Base >> 10);
- ATIModifyExtReg(pATI, 0xA3U, -1, 0xEFU, Base >> 13);
-
- /*
- * I don't know if this also applies to Mach64's, but give it a
- * shot...
- */
- if (pATI->Chip >= ATI_CHIP_68800)
- ATIModifyExtReg(pATI, 0xADU, -1, 0xF3U, Base >> 16);
- }
+ ATIModifyExtReg(pATI, 0xB0U, -1, 0xBFU, Base >> 10);
+ ATIModifyExtReg(pATI, 0xA3U, -1, 0xEFU, Base >> 13);
+
+ /*
+ * I don't know if this also applies to Mach64's, but give it a
+ * shot...
+ */
+ ATIModifyExtReg(pATI, 0xADU, -1, 0xF3U, Base >> 16);
}
}
else
diff --git a/src/atibus.c b/src/atibus.c
index 2ad130e..9fa4f7f 100644
--- a/src/atibus.c
+++ b/src/atibus.c
@@ -79,11 +79,8 @@ ATIClaimResources
* VGA aliases, but do decode VGA Wonder aliases whose most significant
* nibble is zero.
*/
- xf86ClaimFixedResources(
- (pATI->Chip <= ATI_CHIP_18800_1) ?
- (pATI->SharedVGA ? resVgaSparseShared : resVgaSparseExclusive) :
- (pATI->SharedVGA ? resVgaShared : resVgaExclusive),
- pATI->iEntity);
+ xf86ClaimFixedResources(pATI->SharedVGA ? resVgaShared : resVgaExclusive,
+ pATI->iEntity);
if (pATI->CPIO_VGAWonder)
{
@@ -92,10 +89,7 @@ ATIClaimResources
else
Resources[0].type = ResExcIoSparse | ResBus;
Resources[0].rBase = pATI->CPIO_VGAWonder;
- if (pATI->Chip <= ATI_CHIP_18800_1)
- Resources[0].rMask = 0x03FEU;
- else
- Resources[0].rMask = 0xF3FEU;
+ Resources[0].rMask = 0xF3FEU;
xf86ClaimFixedResources(Resources, pATI->iEntity);
@@ -107,12 +101,6 @@ ATIClaimResources
if (!Active && pATI->SharedAccelerator)
return;
- /* Claim 8514/A resources */
- if (pATI->ChipHasSUBSYS_CNTL)
- xf86ClaimFixedResources(
- pATI->SharedAccelerator ? res8514Shared : res8514Exclusive,
- pATI->iEntity);
-
/* Claim Mach64 sparse I/O resources */
if (pATI->CPIODecoding == SPARSE_IO) {
if (pATI->SharedAccelerator)
diff --git a/src/atichip.h b/src/atichip.h
index 0ccb0ad..af874cd 100644
--- a/src/atichip.h
+++ b/src/atichip.h
@@ -32,51 +32,28 @@
/*
* Chip-related definitions.
*/
-typedef enum
-{
- ATI_CHIP_NONE = 0,
-
-#ifndef AVOID_CPIO
-
- ATI_CHIP_VGA, /* Generic VGA */
- ATI_CHIP_18800,
- ATI_CHIP_18800_1,
- ATI_CHIP_28800_2,
- ATI_CHIP_28800_4,
- ATI_CHIP_28800_5,
- ATI_CHIP_28800_6,
- ATI_CHIP_8514A, /* 8514/A */
- ATI_CHIP_CT480, /* 8514/A clone */
- ATI_CHIP_38800_1, /* Mach8 */
- ATI_CHIP_68800, /* Mach32 */
- ATI_CHIP_68800_3, /* Mach32 */
- ATI_CHIP_68800_6, /* Mach32 */
- ATI_CHIP_68800LX, /* Mach32 */
- ATI_CHIP_68800AX, /* Mach32 */
-
-#endif /* AVOID_CPIO */
-
- ATI_CHIP_88800GXC, /* Mach64 */
- ATI_CHIP_88800GXD, /* Mach64 */
- ATI_CHIP_88800GXE, /* Mach64 */
- ATI_CHIP_88800GXF, /* Mach64 */
- ATI_CHIP_88800GX, /* Mach64 */
- ATI_CHIP_88800CX, /* Mach64 */
- ATI_CHIP_264CT, /* Mach64 */
- ATI_CHIP_264ET, /* Mach64 */
- ATI_CHIP_264VT, /* Mach64 */
- ATI_CHIP_264GT, /* Mach64 */
- ATI_CHIP_264VTB, /* Mach64 */
- ATI_CHIP_264GTB, /* Mach64 */
- ATI_CHIP_264VT3, /* Mach64 */
- ATI_CHIP_264GTDVD, /* Mach64 */
- ATI_CHIP_264LT, /* Mach64 */
- ATI_CHIP_264VT4, /* Mach64 */
- ATI_CHIP_264GT2C, /* Mach64 */
- ATI_CHIP_264GTPRO, /* Mach64 */
- ATI_CHIP_264LTPRO, /* Mach64 */
- ATI_CHIP_264XL, /* Mach64 */
- ATI_CHIP_MOBILITY /* Mach64 */
+typedef enum {
+ ATI_CHIP_88800GXC,
+ ATI_CHIP_88800GXD,
+ ATI_CHIP_88800GXE,
+ ATI_CHIP_88800GXF,
+ ATI_CHIP_88800GX,
+ ATI_CHIP_88800CX,
+ ATI_CHIP_264CT,
+ ATI_CHIP_264ET,
+ ATI_CHIP_264VT,
+ ATI_CHIP_264GT,
+ ATI_CHIP_264VTB,
+ ATI_CHIP_264GTB,
+ ATI_CHIP_264VT3,
+ ATI_CHIP_264GTDVD,
+ ATI_CHIP_264LT,
+ ATI_CHIP_264VT4,
+ ATI_CHIP_264GT2C,
+ ATI_CHIP_264GTPRO,
+ ATI_CHIP_264LTPRO,
+ ATI_CHIP_264XL,
+ ATI_CHIP_MOBILITY
} ATIChipType;
/* ati.c */
diff --git a/src/aticlock.c b/src/aticlock.c
index a9422e1..880792d 100644
--- a/src/aticlock.c
+++ b/src/aticlock.c
@@ -637,13 +637,6 @@ ProbeClocks:
#ifndef AVOID_CPIO
NumberOfDividers = 4;
- if ((pATI->Chip <= ATI_CHIP_18800)) {
- NumberOfUndividedClocks = 8;
- /* Actually, any undivided clock will do */
- CalibrationClockNumber = 1;
- CalibrationClockValue = 56644;
- }
- else
#endif /* AVOID_CPIO */
@@ -654,36 +647,31 @@ ProbeClocks:
CalibrationClockNumber = 7;
CalibrationClockValue = 36000;
- if (pATI->Chip >= ATI_CHIP_68800)
#endif /* AVOID_CPIO */
- {
- NumberOfDividers = 2;
- if (pATI->Chip >= ATI_CHIP_264CT)
- {
- NumberOfDividers = 1;
- NumberOfUndividedClocks = 4;
- CalibrationClockNumber = 1;
- CalibrationClockValue = 28322;
- } else {
- CalibrationClockNumber = 10 /* or 11 */;
- CalibrationClockValue = 75000 /* or 65000 */;
- }
+ NumberOfDividers = 2;
+ if (pATI->Chip >= ATI_CHIP_264CT) {
+ NumberOfDividers = 1;
+ NumberOfUndividedClocks = 4;
+ CalibrationClockNumber = 1;
+ CalibrationClockValue = 28322;
+ } else {
+ CalibrationClockNumber = 10 /* or 11 */;
+ CalibrationClockValue = 75000 /* or 65000 */;
+ }
- /*
- * When selecting clocks, all ATI accelerators use a different
- * clock ordering.
- */
+ /*
+ * When selecting clocks, all ATI accelerators use a different
+ * clock ordering.
+ */
#ifndef AVOID_CPIO
- if (pATI->NewHW.crtc == ATI_CRTC_VGA)
- {
- pATI->NewHW.ClockMap = ATIMachVGAClockMap;
- pATI->NewHW.ClockUnmap = ATIMachVGAClockUnmap;
- }
- else
+ if (pATI->NewHW.crtc == ATI_CRTC_VGA) {
+ pATI->NewHW.ClockMap = ATIMachVGAClockMap;
+ pATI->NewHW.ClockUnmap = ATIMachVGAClockUnmap;
+ } else
#endif /* AVOID_CPIO */
@@ -691,7 +679,6 @@ ProbeClocks:
pATI->NewHW.ClockMap = ATIAcceleratorClockMap;
pATI->NewHW.ClockUnmap = ATIAcceleratorClockUnmap;
}
- }
}
}
@@ -776,27 +763,13 @@ ProbeClocks:
if (pATI->CPIO_VGAWonder)
{
- /*
- * On adapters with crystals, switching to one of the
- * spare assignments doesn't do anything (i.e. the
- * previous setting remains in effect). So, disable
- * their selection.
- */
- if (((Index & 0x03U) == 0x02U) &&
- ((pATI->Chip <= ATI_CHIP_18800)))
- continue;
-
/* Start sequencer reset */
PutReg(SEQX, 0x00U, 0x00U);
/* Set high-order bits */
- if (pATI->Chip <= ATI_CHIP_18800) {
- ATIModifyExtReg(pATI, 0xB2U, -1, 0xBFU, Index << 4);
- } else {
- ATIModifyExtReg(pATI, 0xBEU, -1, 0xEFU, Index << 2);
- Index >>= 1;
- ATIModifyExtReg(pATI, 0xB9U, -1, 0xFDU, Index >> 1);
- }
+ ATIModifyExtReg(pATI, 0xBEU, -1, 0xEFU, Index << 2);
+ Index >>= 1;
+ ATIModifyExtReg(pATI, 0xB9U, -1, 0xFDU, Index >> 1);
/* Set clock divider bits */
ATIModifyExtReg(pATI, 0xB8U, -1, 0x00U,
@@ -956,22 +929,8 @@ ProbeClocks:
SpecificationClockLine, NumberOfUndividedClocks,
CalibrationClockNumber, 0);
-#ifndef AVOID_CPIO
-
- if ((pATI->Chip <= ATI_CHIP_18800)) {
- /* V3 and V4 adapters don't have clock chips */
- if (pATI->Clock > ATI_CLOCK_CRYSTALS)
- pATI->Clock = ATI_CLOCK_NONE;
- }
- else
-
-#endif /* AVOID_CPIO */
-
- {
- /* All others don't have crystals */
- if (pATI->Clock == ATI_CLOCK_CRYSTALS)
- pATI->Clock = ATI_CLOCK_NONE;
- }
+ if (pATI->Clock == ATI_CLOCK_CRYSTALS)
+ pATI->Clock = ATI_CLOCK_NONE;
}
else
{
@@ -1008,15 +967,7 @@ ProbeClocks:
{
pATI->OptionProbeClocks = TRUE;
}
- else
-
-#ifndef AVOID_CPIO
-
- if (pATI->Chip >= ATI_CHIP_18800)
-
-#endif /* AVOID_CPIO */
-
- {
+ else {
/*
* Check for clocks that are specified in the wrong order.
* This is meant to catch those who are trying to use the
@@ -1037,21 +988,8 @@ ProbeClocks:
}
}
}
- }
- else
- /* Ensure crystals are not matched to clock chips, and vice versa */
-
-#ifndef AVOID_CPIO
-
- if (pATI->Chip <= ATI_CHIP_18800) {
- if (pATI->Clock > ATI_CLOCK_CRYSTALS)
- pATI->OptionProbeClocks = TRUE;
- }
- else
-
-#endif /* AVOID_CPIO */
-
- {
+ } else {
+ /* Ensure crystals are not matched to clock chips, and vice versa */
if (pATI->Clock == ATI_CLOCK_CRYSTALS)
pATI->OptionProbeClocks = TRUE;
}
@@ -1202,16 +1140,8 @@ ATIClockSave
#ifndef AVOID_CPIO
- else if (pATI->Chip < ATI_CHIP_68800)
- {
- pATIHW->ClockMap = ATIVGAWonderClockMap;
- pATIHW->ClockUnmap = ATIVGAWonderClockUnmap;
- }
- else
- {
- pATIHW->ClockMap = ATIMachVGAClockMap;
- pATIHW->ClockUnmap = ATIMachVGAClockUnmap;
- }
+ pATIHW->ClockMap = ATIMachVGAClockMap;
+ pATIHW->ClockUnmap = ATIMachVGAClockUnmap;
#endif /* AVOID_CPIO */
@@ -1351,19 +1281,11 @@ ATIClockCalculate
if (pATI->CPIO_VGAWonder)
{
/* Set ATI clock select bits */
- if (pATI->Chip <= ATI_CHIP_18800)
- {
- pATIHW->b2 = (pATIHW->b2 & 0xBFU) |
- ((ClockSelect << 4) & 0x40U);
- }
- else
- {
- pATIHW->be = (pATIHW->be & 0xEFU) |
- ((ClockSelect << 2) & 0x10U);
- ClockSelect >>= 1;
- pATIHW->b9 = (pATIHW->b9 & 0xFDU) |
- ((ClockSelect >> 1) & 0x02U);
- }
+ pATIHW->be = (pATIHW->be & 0xEFU) |
+ ((ClockSelect << 2) & 0x10U);
+ ClockSelect >>= 1;
+ pATIHW->b9 = (pATIHW->b9 & 0xFDU) |
+ ((ClockSelect >> 1) & 0x02U);
/* Set clock divider bits */
pATIHW->b8 = (pATIHW->b8 & 0x3FU) |
diff --git a/src/atilock.c b/src/atilock.c
index 2d1a77d..02e3167 100644
--- a/src/atilock.c
+++ b/src/atilock.c
@@ -55,168 +55,116 @@ ATIUnlock
return;
pATI->Unlocked = TRUE;
-#ifndef AVOID_CPIO
-
- if (pATI->ChipHasSUBSYS_CNTL)
- {
- /* Save register values to be modified */
- pATI->LockData.clock_sel = inw(CLOCK_SEL);
- if (pATI->Chip >= ATI_CHIP_68800)
- {
- pATI->LockData.misc_options = inw(MISC_OPTIONS);
- pATI->LockData.mem_bndry = inw(MEM_BNDRY);
- pATI->LockData.mem_cfg = inw(MEM_CFG);
- }
-
- tmp = inw(SUBSYS_STAT) & _8PLANE;
-
- /* Reset the 8514/A and disable all interrupts */
- outw(SUBSYS_CNTL, tmp | (GPCTRL_RESET | CHPTEST_NORMAL));
- outw(SUBSYS_CNTL, tmp | (GPCTRL_ENAB | CHPTEST_NORMAL | RVBLNKFLG |
- RPICKFLAG | RINVALIDIO | RGPIDLE));
-
- /* Ensure VGA is enabled */
- outw(CLOCK_SEL, pATI->LockData.clock_sel &~DISABPASSTHRU);
- if (pATI->Chip >= ATI_CHIP_68800)
- {
- outw(MISC_OPTIONS, pATI->LockData.misc_options &
- ~(DISABLE_VGA | DISABLE_DAC));
- /* Disable any video memory boundary */
- outw(MEM_BNDRY, pATI->LockData.mem_bndry &
- ~(MEM_PAGE_BNDRY | MEM_BNDRY_ENA));
-
- /* Disable direct video memory aperture */
- outw(MEM_CFG, pATI->LockData.mem_cfg &
- ~(MEM_APERT_SEL | MEM_APERT_PAGE | MEM_APERT_LOC));
- }
-
- /* Wait for all activity to die down */
- ProbeWaitIdleEmpty();
- }
- else if (pATI->Chip >= ATI_CHIP_88800GXC)
-
-#endif /* AVOID_CPIO */
-
- {
- /* Reset everything */
- pATI->LockData.bus_cntl = inr(BUS_CNTL);
- if (pATI->Chip < ATI_CHIP_264VT4)
- {
- pATI->LockData.bus_cntl =
- (pATI->LockData.bus_cntl & ~BUS_HOST_ERR_INT_EN) |
- BUS_HOST_ERR_INT;
- if (pATI->Chip < ATI_CHIP_264VTB)
- pATI->LockData.bus_cntl =
- (pATI->LockData.bus_cntl & ~BUS_FIFO_ERR_INT_EN) |
- BUS_FIFO_ERR_INT;
- }
- tmp = pATI->LockData.bus_cntl & ~BUS_ROM_DIS;
+ /* Reset everything */
+ pATI->LockData.bus_cntl = inr(BUS_CNTL);
+ if (pATI->Chip < ATI_CHIP_264VT4) {
+ pATI->LockData.bus_cntl =
+ (pATI->LockData.bus_cntl & ~BUS_HOST_ERR_INT_EN) |
+ BUS_HOST_ERR_INT;
if (pATI->Chip < ATI_CHIP_264VTB)
- tmp |= SetBits(15, BUS_FIFO_WS);
- else
- tmp &= ~BUS_MASTER_DIS;
- if (pATI->Chip >= ATI_CHIP_264VT)
- tmp |= BUS_EXT_REG_EN; /* Enable Block 1 */
- outr(BUS_CNTL, tmp);
- pATI->LockData.crtc_int_cntl = inr(CRTC_INT_CNTL);
- outr(CRTC_INT_CNTL, (pATI->LockData.crtc_int_cntl & ~CRTC_INT_ENS) |
- CRTC_INT_ACKS);
+ pATI->LockData.bus_cntl =
+ (pATI->LockData.bus_cntl & ~BUS_FIFO_ERR_INT_EN) |
+ BUS_FIFO_ERR_INT;
+ }
+ tmp = pATI->LockData.bus_cntl & ~BUS_ROM_DIS;
+ if (pATI->Chip < ATI_CHIP_264VTB)
+ tmp |= SetBits(15, BUS_FIFO_WS);
+ else
+ tmp &= ~BUS_MASTER_DIS;
+ if (pATI->Chip >= ATI_CHIP_264VT)
+ tmp |= BUS_EXT_REG_EN; /* Enable Block 1 */
+ outr(BUS_CNTL, tmp);
+ pATI->LockData.crtc_int_cntl = inr(CRTC_INT_CNTL);
+ outr(CRTC_INT_CNTL, (pATI->LockData.crtc_int_cntl & ~CRTC_INT_ENS) |
+ CRTC_INT_ACKS);
#ifdef XF86DRI_DEVEL
- if (pATI->irq > 0)
- outr(CRTC_INT_CNTL, (inr(CRTC_INT_CNTL) & ~CRTC_INT_ACKS) |
- CRTC_VBLANK_INT_EN); /* Enable VBLANK interrupt - handled by DRM */
+ if (pATI->irq > 0)
+ outr(CRTC_INT_CNTL, (inr(CRTC_INT_CNTL) & ~CRTC_INT_ACKS) |
+ CRTC_VBLANK_INT_EN); /* Enable VBLANK interrupt - handled by DRM */
#endif /* XF86DRI_DEVEL */
- pATI->LockData.gen_test_cntl = inr(GEN_TEST_CNTL) &
- (GEN_OVR_OUTPUT_EN | GEN_OVR_POLARITY | GEN_CUR_EN |
- GEN_BLOCK_WR_EN);
- tmp = pATI->LockData.gen_test_cntl & ~GEN_CUR_EN;
- outr(GEN_TEST_CNTL, tmp | GEN_GUI_EN);
- outr(GEN_TEST_CNTL, tmp);
- outr(GEN_TEST_CNTL, tmp | GEN_GUI_EN);
- tmp = pATI->LockData.crtc_gen_cntl = inr(CRTC_GEN_CNTL) &
- ~(CRTC_EN | CRTC_LOCK_REGS);
+ pATI->LockData.gen_test_cntl = inr(GEN_TEST_CNTL) &
+ (GEN_OVR_OUTPUT_EN | GEN_OVR_POLARITY | GEN_CUR_EN |
+ GEN_BLOCK_WR_EN);
+ tmp = pATI->LockData.gen_test_cntl & ~GEN_CUR_EN;
+ outr(GEN_TEST_CNTL, tmp | GEN_GUI_EN);
+ outr(GEN_TEST_CNTL, tmp);
+ outr(GEN_TEST_CNTL, tmp | GEN_GUI_EN);
+ tmp = pATI->LockData.crtc_gen_cntl = inr(CRTC_GEN_CNTL) &
+ ~(CRTC_EN | CRTC_LOCK_REGS);
+ if (pATI->Chip >= ATI_CHIP_264XL)
+ tmp = (tmp & ~CRTC_INT_ENS_X) | CRTC_INT_ACKS_X;
+ outr(CRTC_GEN_CNTL, tmp | CRTC_EN);
+ outr(CRTC_GEN_CNTL, tmp);
+ outr(CRTC_GEN_CNTL, tmp | CRTC_EN);
+
+ if ((pATI->LCDPanelID >= 0) && (pATI->Chip != ATI_CHIP_264LT)) {
+ pATI->LockData.lcd_index = inr(LCD_INDEX);
if (pATI->Chip >= ATI_CHIP_264XL)
- tmp = (tmp & ~CRTC_INT_ENS_X) | CRTC_INT_ACKS_X;
- outr(CRTC_GEN_CNTL, tmp | CRTC_EN);
- outr(CRTC_GEN_CNTL, tmp);
- outr(CRTC_GEN_CNTL, tmp | CRTC_EN);
- if ((pATI->LCDPanelID >= 0) && (pATI->Chip != ATI_CHIP_264LT))
- {
- pATI->LockData.lcd_index = inr(LCD_INDEX);
- if (pATI->Chip >= ATI_CHIP_264XL)
- outr(LCD_INDEX, pATI->LockData.lcd_index &
- ~(LCD_MONDET_INT_EN | LCD_MONDET_INT));
+ outr(LCD_INDEX, pATI->LockData.lcd_index &
+ ~(LCD_MONDET_INT_EN | LCD_MONDET_INT));
- /*
- * Prevent BIOS initiated display switches on dual-CRT controllers.
- */
- if (!pATI->OptionBIOSDisplay && (pATI->Chip != ATI_CHIP_264XL))
- {
+ /*
+ * Prevent BIOS initiated display switches on dual-CRT controllers.
+ */
+ if (!pATI->OptionBIOSDisplay && (pATI->Chip != ATI_CHIP_264XL)) {
#ifdef TV_OUT
- pATI->LockData.scratch_reg3 = inr(SCRATCH_REG3) & ~DISPLAY_SWITCH_DISABLE;
- outr(SCRATCH_REG3, pATI->LockData.scratch_reg3);
+ pATI->LockData.scratch_reg3 = inr(SCRATCH_REG3) & ~DISPLAY_SWITCH_DISABLE;
+ outr(SCRATCH_REG3, pATI->LockData.scratch_reg3);
#else
- pATI->LockData.scratch_reg3 = inr(SCRATCH_REG3);
- outr(SCRATCH_REG3,
- pATI->LockData.scratch_reg3 | DISPLAY_SWITCH_DISABLE);
+ pATI->LockData.scratch_reg3 = inr(SCRATCH_REG3);
+ outr(SCRATCH_REG3,
+ pATI->LockData.scratch_reg3 | DISPLAY_SWITCH_DISABLE);
#endif /* TV_OUT */
- }
}
+ }
- pATI->LockData.mem_cntl = inr(MEM_CNTL);
- if (pATI->Chip < ATI_CHIP_264CT)
- outr(MEM_CNTL, pATI->LockData.mem_cntl &
- ~(CTL_MEM_BNDRY | CTL_MEM_BNDRY_EN));
+ pATI->LockData.mem_cntl = inr(MEM_CNTL);
+ if (pATI->Chip < ATI_CHIP_264CT)
+ outr(MEM_CNTL, pATI->LockData.mem_cntl &
+ ~(CTL_MEM_BNDRY | CTL_MEM_BNDRY_EN));
- /* Disable feature connector on integrated controllers */
- tmp = pATI->LockData.dac_cntl = inr(DAC_CNTL);
- if (pATI->Chip >= ATI_CHIP_264CT)
- tmp &= ~DAC_FEA_CON_EN;
+ /* Disable feature connector on integrated controllers */
+ tmp = pATI->LockData.dac_cntl = inr(DAC_CNTL);
+ if (pATI->Chip >= ATI_CHIP_264CT)
+ tmp &= ~DAC_FEA_CON_EN;
#ifndef AVOID_CPIO
- /* Ensure VGA aperture is enabled */
- pATI->LockData.config_cntl = inr(CONFIG_CNTL);
- tmp |= DAC_VGA_ADR_EN;
- outr(CONFIG_CNTL, pATI->LockData.config_cntl & ~CFG_VGA_DIS);
+ /* Ensure VGA aperture is enabled */
+ pATI->LockData.config_cntl = inr(CONFIG_CNTL);
+ tmp |= DAC_VGA_ADR_EN;
+ outr(CONFIG_CNTL, pATI->LockData.config_cntl & ~CFG_VGA_DIS);
#endif /* AVOID_CPIO */
- outr(DAC_CNTL, tmp);
-
- if (pATI->Chip >= ATI_CHIP_264VTB)
- {
- pATI->LockData.mpp_config = inr(MPP_CONFIG);
- pATI->LockData.mpp_strobe_seq = inr(MPP_STROBE_SEQ);
- pATI->LockData.tvo_cntl = inr(TVO_CNTL);
-
- if (pATI->Chip >= ATI_CHIP_264GT2C)
- {
- pATI->LockData.hw_debug = inr(HW_DEBUG);
-
- if (pATI->Chip >= ATI_CHIP_264GTPRO)
- {
- if (!(pATI->LockData.hw_debug & CMDFIFO_SIZE_EN))
- outr(HW_DEBUG,
- pATI->LockData.hw_debug | CMDFIFO_SIZE_EN);
-
- pATI->LockData.i2c_cntl_0 =
- inr(I2C_CNTL_0) | (I2C_CNTL_STAT | I2C_CNTL_HPTR_RST);
- outr(I2C_CNTL_0,
- pATI->LockData.i2c_cntl_0 & ~I2C_CNTL_INT_EN);
- pATI->LockData.i2c_cntl_1 = inr(I2C_CNTL_1);
- }
- else
- {
- if (pATI->LockData.hw_debug & CMDFIFO_SIZE_DIS)
- outr(HW_DEBUG,
- pATI->LockData.hw_debug & ~CMDFIFO_SIZE_DIS);
- }
+ outr(DAC_CNTL, tmp);
+
+ if (pATI->Chip >= ATI_CHIP_264VTB) {
+ pATI->LockData.mpp_config = inr(MPP_CONFIG);
+ pATI->LockData.mpp_strobe_seq = inr(MPP_STROBE_SEQ);
+ pATI->LockData.tvo_cntl = inr(TVO_CNTL);
+
+ if (pATI->Chip >= ATI_CHIP_264GT2C) {
+ pATI->LockData.hw_debug = inr(HW_DEBUG);
+
+ if (pATI->Chip >= ATI_CHIP_264GTPRO) {
+ if (!(pATI->LockData.hw_debug & CMDFIFO_SIZE_EN))
+ outr(HW_DEBUG, pATI->LockData.hw_debug | CMDFIFO_SIZE_EN);
+
+ pATI->LockData.i2c_cntl_0 =
+ inr(I2C_CNTL_0) | (I2C_CNTL_STAT | I2C_CNTL_HPTR_RST);
+ outr(I2C_CNTL_0,
+ pATI->LockData.i2c_cntl_0 & ~I2C_CNTL_INT_EN);
+ pATI->LockData.i2c_cntl_1 = inr(I2C_CNTL_1);
+ } else {
+ if (pATI->LockData.hw_debug & CMDFIFO_SIZE_DIS)
+ outr(HW_DEBUG,
+ pATI->LockData.hw_debug & ~CMDFIFO_SIZE_DIS);
}
}
@@ -243,20 +191,12 @@ ATIUnlock
ATIModifyExtReg(pATI, 0xB8U, pATI->LockData.b8, 0xC0U, 0x00U);
pATI->LockData.b9 = ATIGetExtReg(0xB9U);
ATIModifyExtReg(pATI, 0xB9U, pATI->LockData.b9, 0x7FU, 0x00U);
- if (pATI->Chip > ATI_CHIP_18800)
- {
- pATI->LockData.be = ATIGetExtReg(0xBEU);
- ATIModifyExtReg(pATI, 0xBEU, pATI->LockData.be, 0xFAU, 0x01U);
- if (pATI->Chip >= ATI_CHIP_28800_2)
- {
- pATI->LockData.a6 = ATIGetExtReg(0xA6U);
- ATIModifyExtReg(pATI, 0xA6U, pATI->LockData.a6,
- 0x7FU, 0x00U);
- pATI->LockData.ab = ATIGetExtReg(0xABU);
- ATIModifyExtReg(pATI, 0xABU, pATI->LockData.ab,
- 0xE7U, 0x00U);
- }
- }
+ pATI->LockData.be = ATIGetExtReg(0xBEU);
+ ATIModifyExtReg(pATI, 0xBEU, pATI->LockData.be, 0xFAU, 0x01U);
+ pATI->LockData.a6 = ATIGetExtReg(0xA6U);
+ ATIModifyExtReg(pATI, 0xA6U, pATI->LockData.a6, 0x7FU, 0x00U);
+ pATI->LockData.ab = ATIGetExtReg(0xABU);
+ ATIModifyExtReg(pATI, 0xABU, pATI->LockData.ab, 0xE7U, 0x00U);
}
if (pATI->LCDPanelID >= 0)
@@ -436,7 +376,7 @@ ATILock
#ifndef AVOID_CPIO
- CARD32 tmp, saved_lcd_gen_ctrl = 0, lcd_gen_ctrl = 0;
+ CARD32 saved_lcd_gen_ctrl = 0, lcd_gen_ctrl = 0;
#endif /* AVOID_CPIO */
@@ -517,91 +457,57 @@ ATILock
ATIModifyExtReg(pATI, 0xB6U, -1, 0xDDU, pATI->LockData.b6);
ATIModifyExtReg(pATI, 0xB8U, -1, 0xC0U, pATI->LockData.b8 & 0x03U);
ATIModifyExtReg(pATI, 0xB9U, -1, 0x7FU, pATI->LockData.b9);
- if (pATI->Chip > ATI_CHIP_18800)
- {
- ATIModifyExtReg(pATI, 0xBEU, -1, 0xFAU, pATI->LockData.be);
- if (pATI->Chip >= ATI_CHIP_28800_2)
- {
- ATIModifyExtReg(pATI, 0xA6U, -1, 0x7FU, pATI->LockData.a6);
- ATIModifyExtReg(pATI, 0xABU, -1, 0xE7U, pATI->LockData.ab);
- }
- }
+ ATIModifyExtReg(pATI, 0xBEU, -1, 0xFAU, pATI->LockData.be);
+ ATIModifyExtReg(pATI, 0xA6U, -1, 0x7FU, pATI->LockData.a6);
+ ATIModifyExtReg(pATI, 0xABU, -1, 0xE7U, pATI->LockData.ab);
ATIModifyExtReg(pATI, 0xB8U, -1, 0xC0U, pATI->LockData.b8);
}
}
- if (pATI->ChipHasSUBSYS_CNTL)
- {
- tmp = inw(SUBSYS_STAT) & _8PLANE;
-
- /* Reset the 8514/A and disable all interrupts */
- outw(SUBSYS_CNTL, tmp | (GPCTRL_RESET | CHPTEST_NORMAL));
- outw(SUBSYS_CNTL, tmp | (GPCTRL_ENAB | CHPTEST_NORMAL | RVBLNKFLG |
- RPICKFLAG | RINVALIDIO | RGPIDLE));
-
- /* Restore modified accelerator registers */
- outw(CLOCK_SEL, pATI->LockData.clock_sel);
- if (pATI->Chip >= ATI_CHIP_68800)
- {
- outw(MISC_OPTIONS, pATI->LockData.misc_options);
- outw(MEM_BNDRY, pATI->LockData.mem_bndry);
- outw(MEM_CFG, pATI->LockData.mem_cfg);
- }
-
- /* Wait for all activity to die down */
- ProbeWaitIdleEmpty();
- }
- else if (pATI->Chip >= ATI_CHIP_88800GXC)
-
#endif /* AVOID_CPIO */
+ /* Reset everything */
+ outr(BUS_CNTL, pATI->LockData.bus_cntl);
- {
- /* Reset everything */
- outr(BUS_CNTL, pATI->LockData.bus_cntl);
+ outr(CRTC_INT_CNTL, pATI->LockData.crtc_int_cntl);
- outr(CRTC_INT_CNTL, pATI->LockData.crtc_int_cntl);
+ outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl | GEN_GUI_EN);
+ outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl);
+ outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl | GEN_GUI_EN);
- outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl | GEN_GUI_EN);
- outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl);
- outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl | GEN_GUI_EN);
-
- outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl | CRTC_EN);
- outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl);
- outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl | CRTC_EN);
+ outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl | CRTC_EN);
+ outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl);
+ outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl | CRTC_EN);
#ifndef AVOID_CPIO
- outr(CONFIG_CNTL, pATI->LockData.config_cntl);
+ outr(CONFIG_CNTL, pATI->LockData.config_cntl);
#endif /* AVOID_CPIO */
- outr(DAC_CNTL, pATI->LockData.dac_cntl);
- if (pATI->Chip < ATI_CHIP_264CT)
- outr(MEM_CNTL, pATI->LockData.mem_cntl);
- if ((pATI->LCDPanelID >= 0) && (pATI->Chip != ATI_CHIP_264LT))
- {
- outr(LCD_INDEX, pATI->LockData.lcd_index);
+ outr(DAC_CNTL, pATI->LockData.dac_cntl);
+ if (pATI->Chip < ATI_CHIP_264CT)
+ outr(MEM_CNTL, pATI->LockData.mem_cntl);
+ if ((pATI->LCDPanelID >= 0) && (pATI->Chip != ATI_CHIP_264LT)) {
+ outr(LCD_INDEX, pATI->LockData.lcd_index);
#ifndef TV_OUT
- if (!pATI->OptionBIOSDisplay && (pATI->Chip != ATI_CHIP_264XL))
- outr(SCRATCH_REG3, pATI->LockData.scratch_reg3);
+ if (!pATI->OptionBIOSDisplay && (pATI->Chip != ATI_CHIP_264XL))
+ outr(SCRATCH_REG3, pATI->LockData.scratch_reg3);
#endif /* TV_OUT */
- }
- if (pATI->Chip >= ATI_CHIP_264VTB)
- {
- outr(MPP_CONFIG, pATI->LockData.mpp_config);
- outr(MPP_STROBE_SEQ, pATI->LockData.mpp_strobe_seq);
+ }
+
+ if (pATI->Chip >= ATI_CHIP_264VTB) {
+ outr(MPP_CONFIG, pATI->LockData.mpp_config);
+ outr(MPP_STROBE_SEQ, pATI->LockData.mpp_strobe_seq);
#ifndef TV_OUT
- outr(TVO_CNTL, pATI->LockData.tvo_cntl);
+ outr(TVO_CNTL, pATI->LockData.tvo_cntl);
#endif /* TV_OUT */
- if (pATI->Chip >= ATI_CHIP_264GT2C)
- {
- outr(HW_DEBUG, pATI->LockData.hw_debug);
- if (pATI->Chip >= ATI_CHIP_264GTPRO)
- {
- outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0);
- outr(I2C_CNTL_1, pATI->LockData.i2c_cntl_1);
- }
+ if (pATI->Chip >= ATI_CHIP_264GT2C) {
+ outr(HW_DEBUG, pATI->LockData.hw_debug);
+ if (pATI->Chip >= ATI_CHIP_264GTPRO) {
+ outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0);
+ outr(I2C_CNTL_1, pATI->LockData.i2c_cntl_1);
}
}
}
}
+
diff --git a/src/atimode.c b/src/atimode.c
index 88e373b..86104fe 100644
--- a/src/atimode.c
+++ b/src/atimode.c
@@ -269,91 +269,76 @@ ATIModePreInit
ATIVGAWonderPreInit(pATI, pATIHW);
}
- if (pATI->Chip >= ATI_CHIP_88800GXC)
-
#endif /* AVOID_CPIO */
+ /* Fill in Mach64 data */
+ ATIMach64PreInit(pScreenInfo, pATI, pATIHW);
- {
- /* Fill in Mach64 data */
- ATIMach64PreInit(pScreenInfo, pATI, pATIHW);
+ if (pATI->Chip >= ATI_CHIP_264CT) {
+ /* Ensure proper VCLK source */
+ pATIHW->pll_vclk_cntl = ATIMach64GetPLLReg(PLL_VCLK_CNTL) |
+ (PLL_VCLK_SRC_SEL | PLL_VCLK_RESET);
- if (pATI->Chip >= ATI_CHIP_264CT)
- {
- /* Ensure proper VCLK source */
- pATIHW->pll_vclk_cntl = ATIMach64GetPLLReg(PLL_VCLK_CNTL) |
- (PLL_VCLK_SRC_SEL | PLL_VCLK_RESET);
-
- /* Set provisional values for other PLL registers */
- pATIHW->pll_vclk_post_div = ATIMach64GetPLLReg(PLL_VCLK_POST_DIV);
- pATIHW->pll_vclk0_fb_div = ATIMach64GetPLLReg(PLL_VCLK0_FB_DIV);
- pATIHW->pll_vclk1_fb_div = ATIMach64GetPLLReg(PLL_VCLK1_FB_DIV);
- pATIHW->pll_vclk2_fb_div = ATIMach64GetPLLReg(PLL_VCLK2_FB_DIV);
- pATIHW->pll_vclk3_fb_div = ATIMach64GetPLLReg(PLL_VCLK3_FB_DIV);
- pATIHW->pll_xclk_cntl = ATIMach64GetPLLReg(PLL_XCLK_CNTL);
-
- /* For now disable extended reference and feedback dividers */
- if (pATI->Chip >= ATI_CHIP_264LT)
- pATIHW->pll_ext_vpll_cntl =
- ATIMach64GetPLLReg(PLL_EXT_VPLL_CNTL) &
- ~(PLL_EXT_VPLL_EN | PLL_EXT_VPLL_VGA_EN |
- PLL_EXT_VPLL_INSYNC);
-
- /* Initialise CRTC data for LCD panels */
- if (pATI->LCDPanelID >= 0)
- {
- if (pATI->Chip == ATI_CHIP_264LT)
- {
- pATIHW->lcd_gen_ctrl = inr(LCD_GEN_CTRL);
- }
- else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
- (pATI->Chip == ATI_CHIP_264XL) ||
- (pATI->Chip == ATI_CHIP_MOBILITY)) */
- {
- lcd_index = inr(LCD_INDEX);
- pATIHW->lcd_index = lcd_index &
- ~(LCD_REG_INDEX | LCD_DISPLAY_DIS | LCD_SRC_SEL |
- LCD_CRTC2_DISPLAY_DIS);
- if (pATI->Chip != ATI_CHIP_264XL)
- pATIHW->lcd_index |= LCD_CRTC2_DISPLAY_DIS;
- pATIHW->config_panel =
- ATIMach64GetLCDReg(LCD_CONFIG_PANEL) |
- DONT_SHADOW_HEND;
- pATIHW->lcd_gen_ctrl =
- ATIMach64GetLCDReg(LCD_GEN_CNTL) & ~CRTC_RW_SELECT;
- outr(LCD_INDEX, lcd_index);
- }
+ /* Set provisional values for other PLL registers */
+ pATIHW->pll_vclk_post_div = ATIMach64GetPLLReg(PLL_VCLK_POST_DIV);
+ pATIHW->pll_vclk0_fb_div = ATIMach64GetPLLReg(PLL_VCLK0_FB_DIV);
+ pATIHW->pll_vclk1_fb_div = ATIMach64GetPLLReg(PLL_VCLK1_FB_DIV);
+ pATIHW->pll_vclk2_fb_div = ATIMach64GetPLLReg(PLL_VCLK2_FB_DIV);
+ pATIHW->pll_vclk3_fb_div = ATIMach64GetPLLReg(PLL_VCLK3_FB_DIV);
+ pATIHW->pll_xclk_cntl = ATIMach64GetPLLReg(PLL_XCLK_CNTL);
- pATIHW->lcd_gen_ctrl &=
- ~(HORZ_DIVBY2_EN | DIS_HOR_CRT_DIVBY2 | MCLK_PM_EN |
- VCLK_DAC_PM_EN | USE_SHADOWED_VEND |
- USE_SHADOWED_ROWCUR | SHADOW_EN | SHADOW_RW_EN);
- pATIHW->lcd_gen_ctrl |= DONT_SHADOW_VPAR | LOCK_8DOT;
+ /* For now disable extended reference and feedback dividers */
+ if (pATI->Chip >= ATI_CHIP_264LT)
+ pATIHW->pll_ext_vpll_cntl =
+ ATIMach64GetPLLReg(PLL_EXT_VPLL_CNTL) &
+ ~(PLL_EXT_VPLL_EN | PLL_EXT_VPLL_VGA_EN |
+ PLL_EXT_VPLL_INSYNC);
+
+ /* Initialise CRTC data for LCD panels */
+ if (pATI->LCDPanelID >= 0) {
+ if (pATI->Chip == ATI_CHIP_264LT) {
+ pATIHW->lcd_gen_ctrl = inr(LCD_GEN_CTRL);
+ }
+ else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
+ (pATI->Chip == ATI_CHIP_264XL) ||
+ (pATI->Chip == ATI_CHIP_MOBILITY)) */ {
+ lcd_index = inr(LCD_INDEX);
+ pATIHW->lcd_index = lcd_index &
+ ~(LCD_REG_INDEX | LCD_DISPLAY_DIS | LCD_SRC_SEL |
+ LCD_CRTC2_DISPLAY_DIS);
+ if (pATI->Chip != ATI_CHIP_264XL)
+ pATIHW->lcd_index |= LCD_CRTC2_DISPLAY_DIS;
+ pATIHW->config_panel =
+ ATIMach64GetLCDReg(LCD_CONFIG_PANEL) |
+ DONT_SHADOW_HEND;
+ pATIHW->lcd_gen_ctrl =
+ ATIMach64GetLCDReg(LCD_GEN_CNTL) & ~CRTC_RW_SELECT;
+ outr(LCD_INDEX, lcd_index);
+ }
- if (!pATI->OptionPanelDisplay)
- {
- /*
- * Use primary CRTC to drive the CRT. Turn off panel
- * interface.
- */
- pATIHW->lcd_gen_ctrl &= ~LCD_ON;
+ pATIHW->lcd_gen_ctrl &=
+ ~(HORZ_DIVBY2_EN | DIS_HOR_CRT_DIVBY2 | MCLK_PM_EN |
+ VCLK_DAC_PM_EN | USE_SHADOWED_VEND |
+ USE_SHADOWED_ROWCUR | SHADOW_EN | SHADOW_RW_EN);
+ pATIHW->lcd_gen_ctrl |= DONT_SHADOW_VPAR | LOCK_8DOT;
+
+ if (!pATI->OptionPanelDisplay) {
+ /*
+ * Use primary CRTC to drive the CRT. Turn off panel
+ * interface.
+ */
+ pATIHW->lcd_gen_ctrl &= ~LCD_ON;
+ pATIHW->lcd_gen_ctrl |= CRT_ON;
+ } else {
+ /* Use primary CRTC to drive the panel */
+ pATIHW->lcd_gen_ctrl |= LCD_ON;
+
+ /* If requested, also force CRT on */
+ if (pATI->OptionCRTDisplay)
pATIHW->lcd_gen_ctrl |= CRT_ON;
- }
- else
- {
- /* Use primary CRTC to drive the panel */
- pATIHW->lcd_gen_ctrl |= LCD_ON;
-
- /* If requested, also force CRT on */
- if (pATI->OptionCRTDisplay)
- pATIHW->lcd_gen_ctrl |= CRT_ON;
- }
}
}
- else if (pATI->DAC == ATI_DAC_IBMRGB514)
- {
- ATIRGB514PreInit(pATI, pATIHW);
- }
- }
+ } else if (pATI->DAC == ATI_DAC_IBMRGB514)
+ ATIRGB514PreInit(pATI, pATIHW);
/* Set RAMDAC data */
ATIDACPreInit(pScreenInfo, pATI, pATIHW);
@@ -442,65 +427,53 @@ ATIModeSave
ATIVGAWonderSave(pATI, pATIHW);
}
- if (pATI->Chip >= ATI_CHIP_88800GXC)
-
#endif /* AVOID_CPIO */
- {
- /* Save Mach64 data */
- ATIMach64Save(pATI, pATIHW);
+ /* Save Mach64 data */
+ ATIMach64Save(pATI, pATIHW);
- if (pATI->Chip >= ATI_CHIP_264VTB)
- {
- /* Save DSP data */
- ATIDSPSave(pATI, pATIHW);
+ if (pATI->Chip >= ATI_CHIP_264VTB) {
+ /* Save DSP data */
+ ATIDSPSave(pATI, pATIHW);
- if (pATI->LCDPanelID >= 0)
- {
- /* Switch to shadow registers */
- if (pATI->Chip == ATI_CHIP_264LT)
- outr(LCD_GEN_CTRL, pATIHW->lcd_gen_ctrl | SHADOW_RW_EN);
- else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
- (pATI->Chip == ATI_CHIP_264XL) ||
- (pATI->Chip == ATI_CHIP_MOBILITY)) */
- ATIMach64PutLCDReg(LCD_GEN_CNTL,
- (pATIHW->lcd_gen_ctrl & ~CRTC_RW_SELECT) |
- SHADOW_RW_EN);
+ if (pATI->LCDPanelID >= 0) {
+ /* Switch to shadow registers */
+ if (pATI->Chip == ATI_CHIP_264LT)
+ outr(LCD_GEN_CTRL, pATIHW->lcd_gen_ctrl | SHADOW_RW_EN);
+ else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
+ (pATI->Chip == ATI_CHIP_264XL) ||
+ (pATI->Chip == ATI_CHIP_MOBILITY)) */
+ ATIMach64PutLCDReg(LCD_GEN_CNTL,
+ (pATIHW->lcd_gen_ctrl & ~CRTC_RW_SELECT) |
+ SHADOW_RW_EN);
#ifndef AVOID_CPIO
- /* Save shadow VGA CRTC registers */
- for (Index = 0;
- Index < NumberOf(pATIHW->shadow_vga);
- Index++)
- pATIHW->shadow_vga[Index] =
- GetReg(CRTX(pATI->CPIO_VGABase), Index);
+ /* Save shadow VGA CRTC registers */
+ for (Index = 0; Index < NumberOf(pATIHW->shadow_vga); Index++)
+ pATIHW->shadow_vga[Index] =
+ GetReg(CRTX(pATI->CPIO_VGABase), Index);
#endif /* AVOID_CPIO */
- /* Save shadow Mach64 CRTC registers */
- pATIHW->shadow_h_total_disp = inr(CRTC_H_TOTAL_DISP);
- pATIHW->shadow_h_sync_strt_wid = inr(CRTC_H_SYNC_STRT_WID);
- pATIHW->shadow_v_total_disp = inr(CRTC_V_TOTAL_DISP);
- pATIHW->shadow_v_sync_strt_wid = inr(CRTC_V_SYNC_STRT_WID);
-
- /* Restore CRTC selection and shadow state */
- if (pATI->Chip == ATI_CHIP_264LT)
- {
- outr(LCD_GEN_CTRL, pATIHW->lcd_gen_ctrl);
- }
- else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
- (pATI->Chip == ATI_CHIP_264XL) ||
- (pATI->Chip == ATI_CHIP_MOBILITY)) */
- {
- ATIMach64PutLCDReg(LCD_GEN_CNTL, pATIHW->lcd_gen_ctrl);
- outr(LCD_INDEX, pATIHW->lcd_index);
- }
+ /* Save shadow Mach64 CRTC registers */
+ pATIHW->shadow_h_total_disp = inr(CRTC_H_TOTAL_DISP);
+ pATIHW->shadow_h_sync_strt_wid = inr(CRTC_H_SYNC_STRT_WID);
+ pATIHW->shadow_v_total_disp = inr(CRTC_V_TOTAL_DISP);
+ pATIHW->shadow_v_sync_strt_wid = inr(CRTC_V_SYNC_STRT_WID);
+
+ /* Restore CRTC selection and shadow state */
+ if (pATI->Chip == ATI_CHIP_264LT) {
+ outr(LCD_GEN_CTRL, pATIHW->lcd_gen_ctrl);
+ } else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
+ (pATI->Chip == ATI_CHIP_264XL) ||
+ (pATI->Chip == ATI_CHIP_MOBILITY)) */ {
+ ATIMach64PutLCDReg(LCD_GEN_CNTL, pATIHW->lcd_gen_ctrl);
+ outr(LCD_INDEX, pATIHW->lcd_index);
}
}
- else if (pATI->DAC == ATI_DAC_IBMRGB514)
- ATIRGB514Save(pATI, pATIHW);
- }
+ } else if (pATI->DAC == ATI_DAC_IBMRGB514)
+ ATIRGB514Save(pATI, pATIHW);
/* Save RAMDAC state */
ATIDACSave(pATI, pATIHW);
@@ -615,119 +588,114 @@ ATIModeCalculate
if (pATI->CPIO_VGAWonder)
ATIVGAWonderCalculate(pATI, pATIHW, pMode);
- if (pATI->Chip >= ATI_CHIP_88800GXC)
- {
- if (pATI->Chip >= ATI_CHIP_264CT)
- {
- /*
- * Selected bits of accelerator & VGA CRTC registers are
- * actually copies of each other.
- */
- pATIHW->crtc_h_total_disp =
- SetBits(pMode->CrtcHTotal, CRTC_H_TOTAL) |
- SetBits(pMode->CrtcHDisplay, CRTC_H_DISP);
- pATIHW->crtc_h_sync_strt_wid =
- SetBits(pMode->CrtcHSyncStart, CRTC_H_SYNC_STRT) |
- SetBits(pMode->CrtcHSkew, CRTC_H_SYNC_DLY) | /* ? */
- SetBits(GetBits(pMode->CrtcHSyncStart, 0x0100U),
- CRTC_H_SYNC_STRT_HI) |
- SetBits(pMode->CrtcHSyncEnd, CRTC_H_SYNC_WID);
- if (pMode->Flags & V_NHSYNC)
- pATIHW->crtc_h_sync_strt_wid |= CRTC_H_SYNC_POL;
-
- pATIHW->crtc_v_total_disp =
- SetBits(pMode->CrtcVTotal, CRTC_V_TOTAL) |
- SetBits(pMode->CrtcVDisplay, CRTC_V_DISP);
- pATIHW->crtc_v_sync_strt_wid =
- SetBits(pMode->CrtcVSyncStart, CRTC_V_SYNC_STRT) |
- SetBits(pMode->CrtcVSyncEnd, CRTC_V_SYNC_END_VGA);
- if (pMode->Flags & V_NVSYNC)
- pATIHW->crtc_v_sync_strt_wid |= CRTC_V_SYNC_POL;
- }
+ if (pATI->Chip >= ATI_CHIP_264CT) {
+ /*
+ * Selected bits of accelerator & VGA CRTC registers are
+ * actually copies of each other.
+ */
+ pATIHW->crtc_h_total_disp =
+ SetBits(pMode->CrtcHTotal, CRTC_H_TOTAL) |
+ SetBits(pMode->CrtcHDisplay, CRTC_H_DISP);
+ pATIHW->crtc_h_sync_strt_wid =
+ SetBits(pMode->CrtcHSyncStart, CRTC_H_SYNC_STRT) |
+ SetBits(pMode->CrtcHSkew, CRTC_H_SYNC_DLY) | /* ? */
+ SetBits(GetBits(pMode->CrtcHSyncStart, 0x0100U),
+ CRTC_H_SYNC_STRT_HI) |
+ SetBits(pMode->CrtcHSyncEnd, CRTC_H_SYNC_WID);
+ if (pMode->Flags & V_NHSYNC)
+ pATIHW->crtc_h_sync_strt_wid |= CRTC_H_SYNC_POL;
+
+ pATIHW->crtc_v_total_disp =
+ SetBits(pMode->CrtcVTotal, CRTC_V_TOTAL) |
+ SetBits(pMode->CrtcVDisplay, CRTC_V_DISP);
+ pATIHW->crtc_v_sync_strt_wid =
+ SetBits(pMode->CrtcVSyncStart, CRTC_V_SYNC_STRT) |
+ SetBits(pMode->CrtcVSyncEnd, CRTC_V_SYNC_END_VGA);
+ if (pMode->Flags & V_NVSYNC)
+ pATIHW->crtc_v_sync_strt_wid |= CRTC_V_SYNC_POL;
+ }
- pATIHW->crtc_gen_cntl = inr(CRTC_GEN_CNTL) &
- ~(CRTC_DBL_SCAN_EN | CRTC_INTERLACE_EN |
- CRTC_HSYNC_DIS | CRTC_VSYNC_DIS | CRTC_CSYNC_EN |
- CRTC_PIX_BY_2_EN | CRTC_DISPLAY_DIS |
- CRTC_VGA_XOVERSCAN | CRTC_PIX_WIDTH |
- CRTC_BYTE_PIX_ORDER | CRTC_VGA_128KAP_PAGING |
- CRTC_VFC_SYNC_TRISTATE |
- CRTC_LOCK_REGS | /* Already off, but ... */
- CRTC_SYNC_TRISTATE | CRTC_EXT_DISP_EN |
- CRTC_DISP_REQ_EN | CRTC_VGA_LINEAR | CRTC_VGA_TEXT_132 |
- CRTC_CUR_B_TEST);
- /* Some of these are not relevent, but that doesn't matter */
- switch (pATI->depth)
- {
- case 1:
- pATIHW->crtc_gen_cntl |=
- SetBits(PIX_WIDTH_1BPP, CRTC_PIX_WIDTH);
- break;
-
- case 4:
- pATIHW->crtc_gen_cntl |=
- SetBits(PIX_WIDTH_4BPP, CRTC_PIX_WIDTH);
- break;
-
- case 8:
- pATIHW->crtc_gen_cntl |=
- SetBits(PIX_WIDTH_8BPP, CRTC_PIX_WIDTH);
- break;
-
- case 15:
- pATIHW->crtc_gen_cntl |=
- SetBits(PIX_WIDTH_15BPP, CRTC_PIX_WIDTH);
- break;
-
- case 16:
- pATIHW->crtc_gen_cntl |=
- SetBits(PIX_WIDTH_16BPP, CRTC_PIX_WIDTH);
- break;
-
- case 24:
- if (pATI->bitsPerPixel == 24)
- {
- pATIHW->crtc_gen_cntl |=
- SetBits(PIX_WIDTH_24BPP, CRTC_PIX_WIDTH);
- break;
- }
- if (pATI->bitsPerPixel != 32)
- break;
- /* Fall through */
+ pATIHW->crtc_gen_cntl = inr(CRTC_GEN_CNTL) &
+ ~(CRTC_DBL_SCAN_EN | CRTC_INTERLACE_EN |
+ CRTC_HSYNC_DIS | CRTC_VSYNC_DIS | CRTC_CSYNC_EN |
+ CRTC_PIX_BY_2_EN | CRTC_DISPLAY_DIS |
+ CRTC_VGA_XOVERSCAN | CRTC_PIX_WIDTH |
+ CRTC_BYTE_PIX_ORDER | CRTC_VGA_128KAP_PAGING |
+ CRTC_VFC_SYNC_TRISTATE |
+ CRTC_LOCK_REGS | /* Already off, but ... */
+ CRTC_SYNC_TRISTATE | CRTC_EXT_DISP_EN |
+ CRTC_DISP_REQ_EN | CRTC_VGA_LINEAR | CRTC_VGA_TEXT_132 |
+ CRTC_CUR_B_TEST);
+ /* Some of these are not relevent, but that doesn't matter */
+ switch (pATI->depth) {
+ case 1:
+ pATIHW->crtc_gen_cntl |=
+ SetBits(PIX_WIDTH_1BPP, CRTC_PIX_WIDTH);
+ break;
- case 32:
- pATIHW->crtc_gen_cntl |=
- SetBits(PIX_WIDTH_32BPP, CRTC_PIX_WIDTH);
- break;
+ case 4:
+ pATIHW->crtc_gen_cntl |=
+ SetBits(PIX_WIDTH_4BPP, CRTC_PIX_WIDTH);
+ break;
- default:
- break;
- }
-#if 0 /* This isn't needed, but is kept for reference */
- if (pMode->Flags & V_DBLSCAN)
- pATIHW->crtc_gen_cntl |= CRTC_DBL_SCAN_EN;
-#endif
- if (pMode->Flags & V_INTERLACE)
- pATIHW->crtc_gen_cntl |= CRTC_INTERLACE_EN;
- if ((pMode->Flags & (V_CSYNC | V_PCSYNC)) || pATI->OptionCSync)
- pATIHW->crtc_gen_cntl |= CRTC_CSYNC_EN;
- if (pATI->depth <= 4)
- pATIHW->crtc_gen_cntl |= CRTC_EN | CRTC_CNT_EN;
- else
+ case 8:
+ pATIHW->crtc_gen_cntl |=
+ SetBits(PIX_WIDTH_8BPP, CRTC_PIX_WIDTH);
+ break;
+
+ case 15:
+ pATIHW->crtc_gen_cntl |=
+ SetBits(PIX_WIDTH_15BPP, CRTC_PIX_WIDTH);
+ break;
+
+ case 16:
+ pATIHW->crtc_gen_cntl |=
+ SetBits(PIX_WIDTH_16BPP, CRTC_PIX_WIDTH);
+ break;
+
+ case 24:
+ if (pATI->bitsPerPixel == 24) {
pATIHW->crtc_gen_cntl |=
- CRTC_EN | CRTC_VGA_LINEAR | CRTC_CNT_EN;
+ SetBits(PIX_WIDTH_24BPP, CRTC_PIX_WIDTH);
+ break;
+ }
+ if (pATI->bitsPerPixel != 32)
+ break;
+ /* Fall through */
+
+ case 32:
+ pATIHW->crtc_gen_cntl |=
+ SetBits(PIX_WIDTH_32BPP, CRTC_PIX_WIDTH);
+ break;
+
+ default:
+ break;
}
+#if 0 /* This isn't needed, but is kept for reference */
+ if (pMode->Flags & V_DBLSCAN)
+ pATIHW->crtc_gen_cntl |= CRTC_DBL_SCAN_EN;
+#endif
+ if (pMode->Flags & V_INTERLACE)
+ pATIHW->crtc_gen_cntl |= CRTC_INTERLACE_EN;
+ if ((pMode->Flags & (V_CSYNC | V_PCSYNC)) || pATI->OptionCSync)
+ pATIHW->crtc_gen_cntl |= CRTC_CSYNC_EN;
+ if (pATI->depth <= 4)
+ pATIHW->crtc_gen_cntl |= CRTC_EN | CRTC_CNT_EN;
+ else
+ pATIHW->crtc_gen_cntl |=
+ CRTC_EN | CRTC_VGA_LINEAR | CRTC_CNT_EN;
+
break;
#endif /* AVOID_CPIO */
- case ATI_CRTC_MACH64:
- /* Fill in Mach64 data */
- ATIMach64Calculate(pATI, pATIHW, pMode);
- break;
+ case ATI_CRTC_MACH64:
+ /* Fill in Mach64 data */
+ ATIMach64Calculate(pATI, pATIHW, pMode);
+ break;
- default:
- break;
+ default:
+ break;
}
/* Set up LCD register values */
@@ -1047,66 +1015,56 @@ ATIModeSet
#endif /* AVOID_CPIO */
- if (pATI->Chip >= ATI_CHIP_88800GXC)
- {
- /* Stop CRTC */
- outr(CRTC_GEN_CNTL,
- pATIHW->crtc_gen_cntl & ~(CRTC_EXT_DISP_EN | CRTC_EN));
+ /* Stop CRTC */
+ outr(CRTC_GEN_CNTL,
+ pATIHW->crtc_gen_cntl & ~(CRTC_EXT_DISP_EN | CRTC_EN));
+
+ if (pATI->Chip >= ATI_CHIP_264CT) {
+ ATIMach64PutPLLReg(PLL_VCLK_CNTL, pATIHW->pll_vclk_cntl);
+ ATIMach64PutPLLReg(PLL_VCLK_POST_DIV, pATIHW->pll_vclk_post_div);
+ ATIMach64PutPLLReg(PLL_VCLK0_FB_DIV, pATIHW->pll_vclk0_fb_div);
+ ATIMach64PutPLLReg(PLL_VCLK1_FB_DIV, pATIHW->pll_vclk1_fb_div);
+ ATIMach64PutPLLReg(PLL_VCLK2_FB_DIV, pATIHW->pll_vclk2_fb_div);
+ ATIMach64PutPLLReg(PLL_VCLK3_FB_DIV, pATIHW->pll_vclk3_fb_div);
+ ATIMach64PutPLLReg(PLL_XCLK_CNTL, pATIHW->pll_xclk_cntl);
+ if (pATI->Chip >= ATI_CHIP_264LT)
+ ATIMach64PutPLLReg(PLL_EXT_VPLL_CNTL, pATIHW->pll_ext_vpll_cntl);
+ ATIMach64PutPLLReg(PLL_VCLK_CNTL,
+ pATIHW->pll_vclk_cntl & ~PLL_VCLK_RESET);
+
+ /* Load LCD registers */
+ if (pATI->LCDPanelID >= 0) {
+ if (pATI->Chip == ATI_CHIP_264LT) {
+ /* Update non-shadow registers first */
+ outr(LCD_GEN_CTRL, pATIHW->lcd_gen_ctrl & ~SHADOW_RW_EN);
- if (pATI->Chip >= ATI_CHIP_264CT)
- {
- ATIMach64PutPLLReg(PLL_VCLK_CNTL, pATIHW->pll_vclk_cntl);
- ATIMach64PutPLLReg(PLL_VCLK_POST_DIV, pATIHW->pll_vclk_post_div);
- ATIMach64PutPLLReg(PLL_VCLK0_FB_DIV, pATIHW->pll_vclk0_fb_div);
- ATIMach64PutPLLReg(PLL_VCLK1_FB_DIV, pATIHW->pll_vclk1_fb_div);
- ATIMach64PutPLLReg(PLL_VCLK2_FB_DIV, pATIHW->pll_vclk2_fb_div);
- ATIMach64PutPLLReg(PLL_VCLK3_FB_DIV, pATIHW->pll_vclk3_fb_div);
- ATIMach64PutPLLReg(PLL_XCLK_CNTL, pATIHW->pll_xclk_cntl);
- if (pATI->Chip >= ATI_CHIP_264LT)
- ATIMach64PutPLLReg(PLL_EXT_VPLL_CNTL,
- pATIHW->pll_ext_vpll_cntl);
- ATIMach64PutPLLReg(PLL_VCLK_CNTL,
- pATIHW->pll_vclk_cntl & ~PLL_VCLK_RESET);
-
- /* Load LCD registers */
- if (pATI->LCDPanelID >= 0)
- {
- if (pATI->Chip == ATI_CHIP_264LT)
- {
- /* Update non-shadow registers first */
- outr(LCD_GEN_CTRL, pATIHW->lcd_gen_ctrl & ~SHADOW_RW_EN);
-
- /* Temporarily disable stretching */
- outr(HORZ_STRETCHING, pATIHW->horz_stretching &
- ~(HORZ_STRETCH_MODE | HORZ_STRETCH_EN));
- outr(VERT_STRETCHING, pATIHW->vert_stretching &
- ~(VERT_STRETCH_RATIO1 | VERT_STRETCH_RATIO2 |
- VERT_STRETCH_USE0 | VERT_STRETCH_EN));
- }
- else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
- (pATI->Chip == ATI_CHIP_264XL) ||
- (pATI->Chip == ATI_CHIP_MOBILITY)) */
- {
- /* Update non-shadow registers first */
- ATIMach64PutLCDReg(LCD_CONFIG_PANEL, pATIHW->config_panel);
- ATIMach64PutLCDReg(LCD_GEN_CNTL, pATIHW->lcd_gen_ctrl &
- ~(CRTC_RW_SELECT | SHADOW_RW_EN));
-
- /* Temporarily disable stretching */
- ATIMach64PutLCDReg(LCD_HORZ_STRETCHING,
- pATIHW->horz_stretching &
- ~(HORZ_STRETCH_MODE | HORZ_STRETCH_EN));
- ATIMach64PutLCDReg(LCD_VERT_STRETCHING,
- pATIHW->vert_stretching &
- ~(VERT_STRETCH_RATIO1 | VERT_STRETCH_RATIO2 |
- VERT_STRETCH_USE0 | VERT_STRETCH_EN));
- }
+ /* Temporarily disable stretching */
+ outr(HORZ_STRETCHING, pATIHW->horz_stretching &
+ ~(HORZ_STRETCH_MODE | HORZ_STRETCH_EN));
+ outr(VERT_STRETCHING, pATIHW->vert_stretching &
+ ~(VERT_STRETCH_RATIO1 | VERT_STRETCH_RATIO2 |
+ VERT_STRETCH_USE0 | VERT_STRETCH_EN));
+ } else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
+ (pATI->Chip == ATI_CHIP_264XL) ||
+ (pATI->Chip == ATI_CHIP_MOBILITY)) */ {
+ /* Update non-shadow registers first */
+ ATIMach64PutLCDReg(LCD_CONFIG_PANEL, pATIHW->config_panel);
+ ATIMach64PutLCDReg(LCD_GEN_CNTL, pATIHW->lcd_gen_ctrl &
+ ~(CRTC_RW_SELECT | SHADOW_RW_EN));
+
+ /* Temporarily disable stretching */
+ ATIMach64PutLCDReg(LCD_HORZ_STRETCHING,
+ pATIHW->horz_stretching &
+ ~(HORZ_STRETCH_MODE | HORZ_STRETCH_EN));
+ ATIMach64PutLCDReg(LCD_VERT_STRETCHING,
+ pATIHW->vert_stretching &
+ ~(VERT_STRETCH_RATIO1 | VERT_STRETCH_RATIO2 |
+ VERT_STRETCH_USE0 | VERT_STRETCH_EN));
}
}
}
- switch (pATIHW->crtc)
- {
+ switch (pATIHW->crtc) {
#ifndef AVOID_CPIO
@@ -1131,40 +1089,37 @@ ATIModeSet
ATIVGASet(pATI, pATIHW);
/* Load Mach64 registers */
- if (pATI->Chip >= ATI_CHIP_88800GXC)
- {
- /* Load MMIO registers */
- if (pATI->Block0Base)
- ATIMach64Set(pATI, pATIHW);
-
- outr(CRTC_GEN_CNTL, pATIHW->crtc_gen_cntl);
- outr(CUR_CLR0, pATIHW->cur_clr0);
- outr(CUR_CLR1, pATIHW->cur_clr1);
- outr(CUR_OFFSET, pATIHW->cur_offset);
- outr(CUR_HORZ_VERT_POSN, pATIHW->cur_horz_vert_posn);
- outr(CUR_HORZ_VERT_OFF, pATIHW->cur_horz_vert_off);
- outr(BUS_CNTL, pATIHW->bus_cntl);
- outr(MEM_VGA_WP_SEL, pATIHW->mem_vga_wp_sel);
- outr(MEM_VGA_RP_SEL, pATIHW->mem_vga_rp_sel);
- outr(DAC_CNTL, pATIHW->dac_cntl);
- outr(GEN_TEST_CNTL, pATIHW->gen_test_cntl | GEN_GUI_EN);
- outr(GEN_TEST_CNTL, pATIHW->gen_test_cntl);
- outr(GEN_TEST_CNTL, pATIHW->gen_test_cntl | GEN_GUI_EN);
- outr(CONFIG_CNTL, pATIHW->config_cntl);
- if (pATI->Chip >= ATI_CHIP_264CT)
- {
- outr(CRTC_H_TOTAL_DISP, pATIHW->crtc_h_total_disp);
- outr(CRTC_H_SYNC_STRT_WID, pATIHW->crtc_h_sync_strt_wid);
- outr(CRTC_V_TOTAL_DISP, pATIHW->crtc_v_total_disp);
- outr(CRTC_V_SYNC_STRT_WID, pATIHW->crtc_v_sync_strt_wid);
- outr(CRTC_OFF_PITCH, pATIHW->crtc_off_pitch);
- if (pATI->Chip >= ATI_CHIP_264VTB)
- {
- outr(MEM_CNTL, pATIHW->mem_cntl);
- outr(MPP_CONFIG, pATIHW->mpp_config);
- outr(MPP_STROBE_SEQ, pATIHW->mpp_strobe_seq);
- outr(TVO_CNTL, pATIHW->tvo_cntl);
- }
+ /* Load MMIO registers */
+ if (pATI->Block0Base)
+ ATIMach64Set(pATI, pATIHW);
+
+ outr(CRTC_GEN_CNTL, pATIHW->crtc_gen_cntl);
+ outr(CUR_CLR0, pATIHW->cur_clr0);
+ outr(CUR_CLR1, pATIHW->cur_clr1);
+ outr(CUR_OFFSET, pATIHW->cur_offset);
+ outr(CUR_HORZ_VERT_POSN, pATIHW->cur_horz_vert_posn);
+ outr(CUR_HORZ_VERT_OFF, pATIHW->cur_horz_vert_off);
+ outr(BUS_CNTL, pATIHW->bus_cntl);
+ outr(MEM_VGA_WP_SEL, pATIHW->mem_vga_wp_sel);
+ outr(MEM_VGA_RP_SEL, pATIHW->mem_vga_rp_sel);
+ outr(DAC_CNTL, pATIHW->dac_cntl);
+ outr(GEN_TEST_CNTL, pATIHW->gen_test_cntl | GEN_GUI_EN);
+ outr(GEN_TEST_CNTL, pATIHW->gen_test_cntl);
+ outr(GEN_TEST_CNTL, pATIHW->gen_test_cntl | GEN_GUI_EN);
+ outr(CONFIG_CNTL, pATIHW->config_cntl);
+
+ if (pATI->Chip >= ATI_CHIP_264CT) {
+ outr(CRTC_H_TOTAL_DISP, pATIHW->crtc_h_total_disp);
+ outr(CRTC_H_SYNC_STRT_WID, pATIHW->crtc_h_sync_strt_wid);
+ outr(CRTC_V_TOTAL_DISP, pATIHW->crtc_v_total_disp);
+ outr(CRTC_V_SYNC_STRT_WID, pATIHW->crtc_v_sync_strt_wid);
+ outr(CRTC_OFF_PITCH, pATIHW->crtc_off_pitch);
+
+ if (pATI->Chip >= ATI_CHIP_264VTB) {
+ outr(MEM_CNTL, pATIHW->mem_cntl);
+ outr(MPP_CONFIG, pATIHW->mpp_config);
+ outr(MPP_STROBE_SEQ, pATIHW->mpp_strobe_seq);
+ outr(TVO_CNTL, pATIHW->tvo_cntl);
}
}
diff --git a/src/atipreinit.c b/src/atipreinit.c
index b5283ea..b0cf9cb 100644
--- a/src/atipreinit.c
+++ b/src/atipreinit.c
@@ -1324,39 +1324,17 @@ ATIPreInit(ScrnInfoPtr pScreenInfo, int flags)
* For Mach64 adapters, pick up, from the BIOS, the type of programmable
* clock generator (if any), and various information about it.
*/
+ /* Set up non-zero defaults */
+ pATI->ClockDescriptor = ATIClockDescriptors[ATI_CLOCK_FIXED];
+ pATI->ClockNumberToProgramme = -1;
+ pATI->ProgrammableClock = -1;
-#ifndef AVOID_CPIO
-
- if (pATI->Chip >= ATI_CHIP_88800GXC)
-
-#endif /* AVOID_CPIO */
-
- {
- /* Set up non-zero defaults */
- pATI->ClockDescriptor = ATIClockDescriptors[ATI_CLOCK_FIXED];
- pATI->ClockNumberToProgramme = -1;
- pATI->ProgrammableClock = -1;
-
- Mach64BIOSParse(pScreenInfo, BIOS, BIOSSize);
+ Mach64BIOSParse(pScreenInfo, BIOS, BIOSSize);
- Mach64PreInitGetClockInfo(pScreenInfo, pGDev);
- }
+ Mach64PreInitGetClockInfo(pScreenInfo, pGDev);
ATIUnlock(pATI); /* Unlock registers */
-#ifndef AVOID_CPIO
-
- /* Sometimes, the BIOS lies about the chip */
- if ((pATI->Chip >= ATI_CHIP_28800_4) && (pATI->Chip <= ATI_CHIP_28800_6))
- {
- IOValue = GetBits(ATIGetExtReg(0xAAU), 0x0FU) +
- (ATI_CHIP_28800_4 - 4);
- if ((IOValue <= ATI_CHIP_28800_6) && (IOValue > pATI->Chip))
- pATI->Chip = IOValue;
- }
-
-#endif /* AVOID_CPIO */
-
/* Report what was found */
xf86DrvMsg(pScreenInfo->scrnIndex, X_PROBED,
"%s graphics controller detected.\n",
@@ -1526,7 +1504,7 @@ ATIPreInit(ScrnInfoPtr pScreenInfo, int flags)
#ifndef AVOID_CPIO
- if ((pATI->Chip >= ATI_CHIP_88800GXC) && (pATI->depth >= 8))
+ if (pATI->depth >= 8)
#endif /* AVOID_CPIO */
@@ -2192,73 +2170,26 @@ ATIPreInit(ScrnInfoPtr pScreenInfo, int flags)
#ifndef AVOID_CPIO
AcceleratorVideoRAM = pScreenInfo->videoRam;
- if (pATI->Chip == ATI_CHIP_VGA)
- {
- if (pATI->depth <= 4)
- VGAVideoRAM = 256;
- else
- VGAVideoRAM = 64;
-
- /* For VGA, allow a lower override */
- if ((pGDev->videoRam > 0) && (pGDev->videoRam < VGAVideoRAM))
- VGAVideoRAM = pGDev->videoRam;
- }
- else if (pATI->CPIO_VGAWonder)
+ if (pATI->CPIO_VGAWonder)
{
/*
* XXX There's an assumption here that the values retrieved are those
* set by BIOS initialisation.
*/
- if (pATI->Chip <= ATI_CHIP_18800_1)
- {
- VGAVideoRAM =
- videoRamSizes[GetBits(ATIGetExtReg(0xBBU), 0x20U) + 1];
- if (AcceleratorVideoRAM > 512)
- AcceleratorVideoRAM = 512;
- }
+ IOValue = ATIGetExtReg(0xB0U);
+ if (IOValue & 0x08U)
+ VGAVideoRAM = 1024;
+ else if (IOValue & 0x10U)
+ VGAVideoRAM = 512;
else
- {
- IOValue = ATIGetExtReg(0xB0U);
- if (IOValue & 0x08U)
- VGAVideoRAM = 1024;
- else if (IOValue & 0x10U)
- VGAVideoRAM = 512;
- else
- VGAVideoRAM = 256;
- if (AcceleratorVideoRAM > 1024)
- AcceleratorVideoRAM = 1024;
- }
+ VGAVideoRAM = 256;
+ if (AcceleratorVideoRAM > 1024)
+ AcceleratorVideoRAM = 1024;
}
/* Check for hardware limitations */
if (!AcceleratorVideoRAM)
- {
pScreenInfo->videoRam = pATI->VideoRAM = VGAVideoRAM;
-
- /*
- * VGA Wonder V3's, V4's and V5's don't appear to support banking in
- * planar modes.
- */
- if ((pATI->depth <= 4) &&
- (pATI->Chip <= ATI_CHIP_18800_1) &&
- (VGAVideoRAM > 256))
- {
- if (pATI->OptionDevel)
- {
- xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE,
- "Virtual resolutions requiring more than %s kB\n of video"
- " memory might not function properly.\n",
- (pATI->depth == 1) ? "64" : "256");
- }
- else
- {
- xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE,
- "VideoRAM reduced to 256 kB due to hardware"
- " limitations.\n");
- pScreenInfo->videoRam = 256;
- }
- }
- }
else if ((pATI->NewHW.crtc == ATI_CRTC_MACH64) ||
(pATI->Chip >= ATI_CHIP_264CT))
@@ -2562,9 +2493,7 @@ ATIPreInit(ScrnInfoPtr pScreenInfo, int flags)
* However, it's possible that there is more video memory than VGA Wonder
* can architecturally handle.
*/
- if (((pATI->Chip < ATI_CHIP_68800) || (pATI->Chip > ATI_CHIP_68800AX)) &&
- (AcceleratorVideoRAM < pScreenInfo->videoRam))
- {
+ if (AcceleratorVideoRAM < pScreenInfo->videoRam) {
if (pATI->OptionDevel)
{
if (pATI->depth == 1)
@@ -2690,17 +2619,9 @@ ATIPreInit(ScrnInfoPtr pScreenInfo, int flags)
else
{
pATIHW->crtc = ATI_CRTC_VGA;
-#if 0 /* ___NOT_YET___ */
- if (pATI->ChipHasSUBSYS_CNTL)
- {
- }
- else
-#endif
- if ((pATI->Chip >= ATI_CHIP_88800GXC) &&
- (pATI->LockData.crtc_gen_cntl & CRTC_EXT_DISP_EN))
- {
+
+ if (pATI->LockData.crtc_gen_cntl & CRTC_EXT_DISP_EN)
pATIHW->crtc = ATI_CRTC_MACH64;
- }
if (pATI->depth <= 4)
{
@@ -2938,18 +2859,12 @@ ATIPreInit(ScrnInfoPtr pScreenInfo, int flags)
#ifndef AVOID_CPIO
/*
- * 80 MHz is too high in some cases. Limit 18800-x's to 40
- * MHz. Don't exceed the memory clock on VGA Wonder capables
+ * 80 MHz is too high in some cases.
+ * Don't exceed the memory clock on VGA Wonder capables
* with less than 1 MB, if using a packed mode.
*/
- if ((pATI->Chip == ATI_CHIP_18800) ||
- (pATI->Chip == ATI_CHIP_18800_1))
- {
- DefaultmaxClock = 40000;
- }
- else if (pATI->CPIO_VGAWonder &&
- (pATI->VideoRAM < 1024) &&
- (pATI->depth >= 8))
+ if (pATI->CPIO_VGAWonder && (pATI->VideoRAM < 1024) &&
+ (pATI->depth >= 8))
{
DefaultmaxClock =
(GetBits(BIOSByte(0x44U), 0x04U) * 5000) + 40000;
@@ -3002,14 +2917,6 @@ ATIPreInit(ScrnInfoPtr pScreenInfo, int flags)
{
minPitch = 8;
}
- else if (pATI->CPIO_VGAWonder &&
- (pATI->Chip <= ATI_CHIP_18800_1) &&
- (pATI->VideoRAM == 256) &&
- (pATI->depth >= 8))
- {
- minPitch = 32; /* Very strange, but true */
- maxPitch = 0x3FU;
- }
#endif /* AVOID_CPIO */
@@ -3048,20 +2955,6 @@ ATIPreInit(ScrnInfoPtr pScreenInfo, int flags)
if (ATIClockRange.interlaceAllowed && (pATI->Chip < ATI_CHIP_264CT))
pScreenInfo->maxVValue <<= 1;
- /*
- * 18800-x and 28800-x do not support interlaced modes when the
- * scanline pitch is 2048 pixels or more. For 18800-x's with 256
- * kB of video memory, the limit for 8bpp is 1024.
- */
- if (ATIClockRange.interlaceAllowed &&
- (pATI->Chip <= ATI_CHIP_28800_6))
- {
- if (minPitch == 32)
- pATI->MaximumInterlacedPitch = 0x1FU * 32;
- else
- pATI->MaximumInterlacedPitch = 0x7FU * minPitch;
- }
-
Strategy |= LOOKUP_CLKDIV2;
break;
diff --git a/src/atiprint.c b/src/atiprint.c
index faa544a..4962d71 100644
--- a/src/atiprint.c
+++ b/src/atiprint.c
@@ -470,27 +470,6 @@ ATIPrintRegisters
"ATI extended VGA", 0);
}
- if (pATI->ChipHasSUBSYS_CNTL)
- {
- xf86ErrorFVerb(4, "\n 8514/A register values:");
- for (Index = 0x02E8U; Index <= 0x0FEE8; Index += 0x0400U)
- {
- if (!((Index - 0x02E8U) & 0x0C00U))
- xf86ErrorFVerb(4, "\n 0x%04X: ", Index);
- xf86ErrorFVerb(4, " %04X", inw(Index));
- }
-
- xf86ErrorFVerb(4, "\n\n Mach8/Mach32 register values:");
- for (Index = 0x02EEU; Index <= 0x0FEEE; Index += 0x0400U) {
- if (!((Index - 0x02EEU) & 0x0C00U))
- xf86ErrorFVerb(4, "\n 0x%04X: ", Index);
- xf86ErrorFVerb(4, " %04X", inw(Index));
- }
-
- xf86ErrorFVerb(4, "\n");
- }
- else
-
#endif /* AVOID_CPIO */
if (pATI->Chip == ATI_CHIP_264LT)
@@ -555,16 +534,7 @@ ATIPrintRegisters
outr(TV_OUT_INDEX, tv_out_index);
xf86ErrorFVerb(4, "\n");
- }
- else
-
-#ifndef AVOID_CPIO
-
- if (pATI->Chip >= ATI_CHIP_88800GXC)
-
-#endif /* AVOID_CPIO */
-
- {
+ } else {
#ifdef AVOID_CPIO
diff --git a/src/atistruct.h b/src/atistruct.h
index 9b2af3b..72b6f99 100644
--- a/src/atistruct.h
+++ b/src/atistruct.h
@@ -184,12 +184,6 @@ typedef struct _ATIRec
CARD8 Chip;
-#ifndef AVOID_CPIO
-
- CARD8 ChipHasSUBSYS_CNTL;
-
-#endif /* AVOID_CPIO */
-
/*
* Processor I/O decoding definitions.
*/
diff --git a/src/ativga.c b/src/ativga.c
index 36ec26f..cd0824c 100644
--- a/src/ativga.c
+++ b/src/ativga.c
@@ -67,11 +67,7 @@ ATIVGAPreInit
pATIHW->seq[4] = 0x0AU;
/* Initialise CRTC register values */
- if ((pATI->depth >= 8) &&
- ((pATI->Chip >= ATI_CHIP_264CT) ||
- (pATI->CPIO_VGAWonder &&
- (pATI->Chip <= ATI_CHIP_18800_1) &&
- (pATI->VideoRAM == 256))))
+ if ((pATI->depth >= 8) && (pATI->Chip >= ATI_CHIP_264CT))
pATIHW->crt[19] = pATI->displayWidth >> 3;
else
pATIHW->crt[19] = pATI->displayWidth >> 4;
@@ -179,8 +175,7 @@ ATIVGACalculate
pMode->CrtcHAdjusted = TRUE;
pMode->CrtcHDisplay = (pMode->HDisplay >> 3) - 1;
pMode->CrtcHBlankStart = (pMode->HDisplay >> 3);
- if ((pATI->Chip == ATI_CHIP_18800_1) ||
- (pATI->Chip >= ATI_CHIP_264CT))
+ if (pATI->Chip >= ATI_CHIP_264CT)
pMode->CrtcHBlankStart--;
pMode->CrtcHSyncStart = pMode->HSyncStart >> 3;
if (pATI->LCDPanelID >= 0)
@@ -325,10 +320,7 @@ ATIVGACalculate
}
pMode->CrtcVDisplay--;
- if (pATI->Chip == ATI_CHIP_18800)
- pMode->CrtcVBlankStart++;
- else
- pMode->CrtcVBlankStart--;
+ pMode->CrtcVBlankStart--;
if (pATI->LCDPanelID >= 0)
{
pMode->CrtcVSyncStart--;
diff --git a/src/atiwonder.c b/src/atiwonder.c
index 85111c2..2aa7898 100644
--- a/src/atiwonder.c
+++ b/src/atiwonder.c
@@ -79,17 +79,13 @@ ATIVGAWonderPreInit
pATIHW->b6 = 0x40U;
else
pATIHW->b6 = 0x04U;
- if (pATI->Chip <= ATI_CHIP_18800)
- pATIHW->ba = 0x08U;
- else if (pATI->Chip >= ATI_CHIP_28800_2)
- {
- if (pATI->VideoRAM > 256)
- pATIHW->b6 |= 0x01U;
- pATIHW->bf = ATIGetExtReg(0xBFU) & 0x5FU;
- pATIHW->a3 = ATIGetExtReg(0xA3U) & 0x67U;
- pATIHW->ab = ATIGetExtReg(0xABU) & 0xE7U;
- pATIHW->ae = ATIGetExtReg(0xAEU) & 0xE0U;
- }
+
+ if (pATI->VideoRAM > 256)
+ pATIHW->b6 |= 0x01U;
+ pATIHW->bf = ATIGetExtReg(0xBFU) & 0x5FU;
+ pATIHW->a3 = ATIGetExtReg(0xA3U) & 0x67U;
+ pATIHW->ab = ATIGetExtReg(0xABU) & 0xE7U;
+ pATIHW->ae = ATIGetExtReg(0xAEU) & 0xE0U;
}
/*
@@ -115,21 +111,15 @@ ATIVGAWonderSave
pATIHW->b9 = ATIGetExtReg(0xB9U);
pATIHW->ba = ATIGetExtReg(0xBAU);
pATIHW->bd = ATIGetExtReg(0xBDU);
- if (pATI->Chip > ATI_CHIP_18800)
- {
- pATIHW->be = ATIGetExtReg(0xBEU);
- if (pATI->Chip >= ATI_CHIP_28800_2)
- {
- pATIHW->bf = ATIGetExtReg(0xBFU);
- pATIHW->a3 = ATIGetExtReg(0xA3U);
- pATIHW->a6 = ATIGetExtReg(0xA6U);
- pATIHW->a7 = ATIGetExtReg(0xA7U);
- pATIHW->ab = ATIGetExtReg(0xABU);
- pATIHW->ac = ATIGetExtReg(0xACU);
- pATIHW->ad = ATIGetExtReg(0xADU);
- pATIHW->ae = ATIGetExtReg(0xAEU);
- }
- }
+ pATIHW->be = ATIGetExtReg(0xBEU);
+ pATIHW->bf = ATIGetExtReg(0xBFU);
+ pATIHW->a3 = ATIGetExtReg(0xA3U);
+ pATIHW->a6 = ATIGetExtReg(0xA6U);
+ pATIHW->a7 = ATIGetExtReg(0xA7U);
+ pATIHW->ab = ATIGetExtReg(0xABU);
+ pATIHW->ac = ATIGetExtReg(0xACU);
+ pATIHW->ad = ATIGetExtReg(0xADU);
+ pATIHW->ae = ATIGetExtReg(0xAEU);
}
/*
@@ -147,20 +137,6 @@ ATIVGAWonderCalculate
)
{
/* Set up the default horizontal display enable skew */
- if ((pATI->Chip >= ATI_CHIP_28800_2) && (pATI->Chip <= ATI_CHIP_28800_6) &&
- !(pMode->Flags & V_HSKEW))
- {
- /*
- * Modes using the higher clock frequencies need a non-zero Display
- * Enable Skew. The following number has been empirically determined
- * to be somewhere between 4.2 and 4.7 MHz.
- */
-# define DisplayEnableSkewThreshold 4500
-
- /* Set a reasonable default Display Enable Skew */
- pMode->HSkew = pMode->CrtcHSkew =
- ATIDivide(pMode->SynthClock, DisplayEnableSkewThreshold, 0, 0);
- }
pMode->Flags |= V_HSKEW;
/*
@@ -169,60 +145,28 @@ ATIVGAWonderCalculate
pATIHW->b0 = 0x00U;
if (pATI->depth >= 8)
pATIHW->b0 = 0x20U;
- if (pATI->Chip >= ATI_CHIP_28800_2)
- {
- if (pATI->VideoRAM > 512)
- pATIHW->b0 |= 0x08U;
- else if (pATI->VideoRAM > 256)
- pATIHW->b0 |= 0x10U;
- }
- else if (pATI->depth <= 4)
- {
- if (pATI->VideoRAM > 256)
- pATIHW->b0 |= 0x08U;
- }
- else
- {
- if (pATI->VideoRAM > 256)
- pATIHW->b0 |= 0x18U;
- else
- pATIHW->b0 |= 0x06U;
- }
+
+ if (pATI->VideoRAM > 512)
+ pATIHW->b0 |= 0x08U;
+ else if (pATI->VideoRAM > 256)
+ pATIHW->b0 |= 0x10U;
+
pATIHW->b1 = ATIGetExtReg(0xB1U) & 0x04U;
- /*
- * Setting the following bit causes hangs on return to text mode from
- * packed modes on 18800-1's. The hang occurs because the adapter's I/O
- * response is completely disabled when the register is rewritten. The
- * adapter can then only be re-enabled with a powerdown. The bit, when on,
- * blanks out the overscan.
- */
- if ((pATI->Chip == ATI_CHIP_18800_1) && (pATI->depth >= 8))
- pATIHW->b5 = 0x00U;
- else
- pATIHW->b5 = 0x01U;
+
+ /* This bit, when on, blanks out the overscan. */
+ pATIHW->b5 = 0x01U;
pATIHW->b8 = ATIGetExtReg(0xB8U) & 0xC0U;
pATIHW->b9 = ATIGetExtReg(0xB9U) & 0x7FU;
pATIHW->bd = ATIGetExtReg(0xBDU) & 0x02U;
- if (pATI->Chip <= ATI_CHIP_18800)
- pATIHW->b2 = ATIGetExtReg(0xB2U) & 0xC0U;
- else
- {
- pATIHW->b2 = 0x00U;
- pATIHW->be = (ATIGetExtReg(0xBEU) & 0x30U) | 0x09U;
- if (pATI->Chip >= ATI_CHIP_28800_2)
- {
- pATIHW->a6 = (ATIGetExtReg(0xA6U) & 0x38U) | 0x04U;
- pATIHW->a7 = (ATIGetExtReg(0xA7U) & 0xBEU) ;
- pATIHW->ac = (ATIGetExtReg(0xACU) & 0x8EU) ;
- }
- }
+ pATIHW->b2 = 0x00U;
+ pATIHW->be = (ATIGetExtReg(0xBEU) & 0x30U) | 0x09U;
+ pATIHW->a6 = (ATIGetExtReg(0xA6U) & 0x38U) | 0x04U;
+ pATIHW->a7 = (ATIGetExtReg(0xA7U) & 0xBEU) ;
+ pATIHW->ac = (ATIGetExtReg(0xACU) & 0x8EU) ;
+
if (pMode->Flags & V_INTERLACE)
- { /* Enable interlace */
- if (pATI->Chip <= ATI_CHIP_18800)
- pATIHW->b2 |= 0x01U;
- else
- pATIHW->be |= 0x02U;
- }
+ pATIHW->be |= 0x02U; /* Enable interlace */
+
#if 0 /* This is no longer needed but is left in for reference */
if (pMode->Flags & V_DBLSCAN) /* Enable doublescan */
pATIHW->b1 |= 0x08U;
@@ -235,7 +179,7 @@ ATIVGAWonderCalculate
{
if (pMode->HSkew <= 3)
pATIHW->b5 |= 0x04U;
- else if (pATI->Chip >= ATI_CHIP_28800_2)
+ else
switch ((pMode->HSkew + 4) >> 3)
{
case 1: /* Use ATI override */
@@ -276,23 +220,15 @@ ATIVGAWonderSet
ATIHWPtr pATIHW
)
{
- if (pATI->Chip <= ATI_CHIP_18800)
- ATIModifyExtReg(pATI, 0xB2U, -1, 0x00U, pATIHW->b2);
- else
- {
- ATIModifyExtReg(pATI, 0xBEU, -1, 0x00U, pATIHW->be);
- if (pATI->Chip >= ATI_CHIP_28800_2)
- {
- ATIModifyExtReg(pATI, 0xBFU, -1, 0x00U, pATIHW->bf);
- ATIModifyExtReg(pATI, 0xA3U, -1, 0x00U, pATIHW->a3);
- ATIModifyExtReg(pATI, 0xA6U, -1, 0x00U, pATIHW->a6);
- ATIModifyExtReg(pATI, 0xA7U, -1, 0x00U, pATIHW->a7);
- ATIModifyExtReg(pATI, 0xABU, -1, 0x00U, pATIHW->ab);
- ATIModifyExtReg(pATI, 0xACU, -1, 0x00U, pATIHW->ac);
- ATIModifyExtReg(pATI, 0xADU, -1, 0x00U, pATIHW->ad);
- ATIModifyExtReg(pATI, 0xAEU, -1, 0x00U, pATIHW->ae);
- }
- }
+ ATIModifyExtReg(pATI, 0xBEU, -1, 0x00U, pATIHW->be);
+ ATIModifyExtReg(pATI, 0xBFU, -1, 0x00U, pATIHW->bf);
+ ATIModifyExtReg(pATI, 0xA3U, -1, 0x00U, pATIHW->a3);
+ ATIModifyExtReg(pATI, 0xA6U, -1, 0x00U, pATIHW->a6);
+ ATIModifyExtReg(pATI, 0xA7U, -1, 0x00U, pATIHW->a7);
+ ATIModifyExtReg(pATI, 0xABU, -1, 0x00U, pATIHW->ab);
+ ATIModifyExtReg(pATI, 0xACU, -1, 0x00U, pATIHW->ac);
+ ATIModifyExtReg(pATI, 0xADU, -1, 0x00U, pATIHW->ad);
+ ATIModifyExtReg(pATI, 0xAEU, -1, 0x00U, pATIHW->ae);
ATIModifyExtReg(pATI, 0xB0U, -1, 0x00U, pATIHW->b0);
ATIModifyExtReg(pATI, 0xB1U, -1, 0x00U, pATIHW->b1);
ATIModifyExtReg(pATI, 0xB3U, -1, 0x00U, pATIHW->b3);
diff --git a/src/atiwonderio.c b/src/atiwonderio.c
index 853c58a..dc6ac33 100644
--- a/src/atiwonderio.c
+++ b/src/atiwonderio.c
@@ -61,30 +61,7 @@ ATIModifyExtReg
if (CurrentValue == NewValue)
return;
- /*
- * The following is taken from ATI's VGA Wonder programmer's reference
- * manual which says that this is needed to "ensure the proper state of the
- * 8/16 bit ROM toggle". I suspect a timing glitch appeared in the 18800
- * after its die was cast. 18800-1 and later chips do not exhibit this
- * problem.
- */
- if ((pATI->Chip <= ATI_CHIP_18800) && (Index == 0xB2U) &&
- ((NewValue ^ 0x40U) & CurrentValue & 0x40U))
- {
- CARD8 misc = inb(R_GENMO);
- CARD8 bb = ATIGetExtReg(0xBBU);
-
- outb(GENMO, (misc & 0xF3U) | 0x04U | ((bb & 0x10U) >> 1));
- CurrentValue &= (CARD8)(~0x40U);
- ATIPutExtReg(0xB2U, CurrentValue);
- ATIDelay(5);
- outb(GENMO, misc);
- ATIDelay(5);
- if (CurrentValue != NewValue)
- ATIPutExtReg(0xB2U, NewValue);
- }
- else
- ATIPutExtReg(Index, NewValue);
+ ATIPutExtReg(Index, NewValue);
}
#endif /* AVOID_CPIO */