Import i915 and i965 dri drivers from debian's mesa 7.7-4.

50 files changed, 115 insertions, 166 deletions

diff --git a/configure.ac b/configure.ac
index d339ca1..191dec4 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,7 +1,7 @@
 # Process this file with autoconf to produce a configure script
 
 AC_PREREQ(2.57)
-AC_INIT([mesa-dri-i9xx], 7.7.0, [], mesa-dri-i9xx)
+AC_INIT([mesa-dri-i9xx], 7.7.1, [], mesa-dri-i9xx)
 
 AM_INIT_AUTOMAKE([dist-bzip2])
 
diff --git a/i915/i830_context.c b/i915/i830_context.c
index 840946f..7be18cb 100644
--- a/i915/i830_context.c
+++ b/i915/i830_context.c
@@ -28,14 +28,11 @@
 #include "i830_context.h"
 #include "main/imports.h"
 #include "texmem.h"
-#include "intel_tex.h"
 #include "tnl/tnl.h"
 #include "tnl/t_vertex.h"
 #include "tnl/t_context.h"
 #include "tnl/t_pipeline.h"
-#include "utils.h"
 #include "intel_span.h"
-#include "intel_pixel.h"
 #include "intel_tris.h"
 
 /***************************************
diff --git a/i915/i915_context.c b/i915/i915_context.c
index 7d4c7cf..4767016 100644
--- a/i915/i915_context.c
+++ b/i915/i915_context.c
@@ -28,7 +28,6 @@
 #include "i915_context.h"
 #include "main/imports.h"
 #include "main/macros.h"
-#include "intel_tex.h"
 #include "intel_tris.h"
 #include "tnl/t_context.h"
 #include "tnl/t_pipeline.h"
@@ -38,15 +37,11 @@
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/tnl.h"
 
-#include "utils.h"
 #include "i915_reg.h"
 #include "i915_program.h"
 
-#include "intel_regions.h"
-#include "intel_batchbuffer.h"
 #include "intel_tris.h"
 #include "intel_span.h"
-#include "intel_pixel.h"
 
 /***************************************
  * Mesa's Driver Functions
diff --git a/i915/i915_debug_fp.c b/i915/i915_debug_fp.c
index 84347a0..bf500e5 100644
--- a/i915/i915_debug_fp.c
+++ b/i915/i915_debug_fp.c
@@ -30,9 +30,6 @@
 #include "i915_reg.h"
 #include "i915_debug.h"
 #include "main/imports.h"
-#include "shader/program.h"
-#include "shader/prog_instruction.h"
-#include "shader/prog_print.h"
 
 #define PRINTF( ... ) _mesa_printf( __VA_ARGS__ )
 
diff --git a/i915/i915_program.c b/i915/i915_program.c
index e7908bd..3902c69 100644
--- a/i915/i915_program.c
+++ b/i915/i915_program.c
@@ -245,7 +245,7 @@ GLuint i915_emit_texld( struct i915_fragment_program *p,
    }
    else {
       assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
-      assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
+      assert(dest == UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
       /* Can't use unsaved temps for coords, as the phase boundary would result
        * in the contents becoming undefined.
        */
diff --git a/i915/i915_texstate.c b/i915/i915_texstate.c
index de25848..825f1db 100644
--- a/i915/i915_texstate.c
+++ b/i915/i915_texstate.c
@@ -196,10 +196,11 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
 	 state[I915_TEXREG_MS3] |= MS3_TILE_WALK;
    }
 
-   /* We get one field with fraction bits to cover the maximum addressable (smallest
-    * resolution) LOD.  Use it to cover both MAX_LEVEL and MAX_LOD.
+   /* We get one field with fraction bits for the maximum addressable
+    * (lowest resolution) LOD.  Use it to cover both MAX_LEVEL and
+    * MAX_LOD.
     */
-   maxlod = MIN2(tObj->MaxLod, tObj->MaxLevel - tObj->BaseLevel);
+   maxlod = MIN2(tObj->MaxLod, tObj->_MaxLevel - tObj->BaseLevel);
    state[I915_TEXREG_MS4] =
       ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) |
        MS4_CUBE_FACE_ENA_MASK |
diff --git a/i915/i915_vtbl.c b/i915/i915_vtbl.c
index ff97e5a..668e02e 100644
--- a/i915/i915_vtbl.c
+++ b/i915/i915_vtbl.c
@@ -37,7 +37,6 @@
 #include "tnl/t_vertex.h"
 
 #include "intel_batchbuffer.h"
-#include "intel_tex.h"
 #include "intel_regions.h"
 #include "intel_tris.h"
 #include "intel_fbo.h"
diff --git a/i915/intel_render.c b/i915/intel_render.c
index 410052b..ec20939 100644
--- a/i915/intel_render.c
+++ b/i915/intel_render.c
@@ -117,7 +117,7 @@ intelDmaPrimitive(struct intel_context *intel, GLenum prim)
    intel_set_prim(intel, hw_prim[prim]);
 }
 
-static inline GLuint intel_get_vb_max(struct intel_context *intel)
+static INLINE GLuint intel_get_vb_max(struct intel_context *intel)
 {
    GLuint ret;
 
@@ -129,7 +129,7 @@ static inline GLuint intel_get_vb_max(struct intel_context *intel)
    return ret;
 }
 
-static inline GLuint intel_get_current_max(struct intel_context *intel)
+static INLINE GLuint intel_get_current_max(struct intel_context *intel)
 {
 
    if (intel->intelScreen->no_vbo)
diff --git a/i915/intel_tris.c b/i915/intel_tris.c
index bc527aa..65db947 100644
--- a/i915/intel_tris.c
+++ b/i915/intel_tris.c
@@ -52,7 +52,6 @@
 #include "intel_buffers.h"
 #include "intel_reg.h"
 #include "intel_span.h"
-#include "intel_tex.h"
 #include "intel_chipset.h"
 #include "i830_context.h"
 #include "i830_reg.h"
diff --git a/i965/brw_cc.c b/i965/brw_cc.c
index bac1c3a..9a38631 100644
--- a/i965/brw_cc.c
+++ b/i965/brw_cc.c
@@ -34,9 +34,7 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 #include "brw_util.h"
-#include "intel_fbo.h"
 #include "main/macros.h"
-#include "main/enums.h"
 
 static void prepare_cc_vp( struct brw_context *brw )
 {
diff --git a/i965/brw_clip_line.c b/i965/brw_clip_line.c
index fa9648f..67861ac 100644
--- a/i965/brw_clip_line.c
+++ b/i965/brw_clip_line.c
@@ -39,7 +39,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 
diff --git a/i965/brw_clip_point.c b/i965/brw_clip_point.c
index 8458f61..7f47634 100644
--- a/i965/brw_clip_point.c
+++ b/i965/brw_clip_point.c
@@ -39,7 +39,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 
diff --git a/i965/brw_clip_state.c b/i965/brw_clip_state.c
index 234b374..79ae5c7 100644
--- a/i965/brw_clip_state.c
+++ b/i965/brw_clip_state.c
@@ -32,7 +32,6 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "main/macros.h"
 
 struct brw_clip_unit_key {
    unsigned int total_grf;
diff --git a/i965/brw_clip_tri.c b/i965/brw_clip_tri.c
index cf79224..8d5ca41 100644
--- a/i965/brw_clip_tri.c
+++ b/i965/brw_clip_tri.c
@@ -39,7 +39,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 static void release_tmps( struct brw_clip_compile *c )
diff --git a/i965/brw_clip_unfilled.c b/i965/brw_clip_unfilled.c
index ad1bfa4..f36d22f 100644
--- a/i965/brw_clip_unfilled.c
+++ b/i965/brw_clip_unfilled.c
@@ -39,7 +39,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 
diff --git a/i965/brw_clip_util.c b/i965/brw_clip_util.c
index 5a73abd..b7f8c25 100644
--- a/i965/brw_clip_util.c
+++ b/i965/brw_clip_util.c
@@ -40,7 +40,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 
diff --git a/i965/brw_context.c b/i965/brw_context.c
index aaa2d80..6b5c3be 100644
--- a/i965/brw_context.c
+++ b/i965/brw_context.c
@@ -33,24 +33,15 @@
 #include "main/imports.h"
 #include "main/api_noop.h"
 #include "main/macros.h"
-/* #include "main/vtxfmt.h" */
 #include "main/simple_list.h"
 #include "shader/shader_api.h"
 
 #include "brw_context.h"
-#include "brw_defines.h"
 #include "brw_draw.h"
 #include "brw_state.h"
-#include "brw_vs.h"
-#include "intel_tex.h"
-#include "intel_blit.h"
-#include "intel_batchbuffer.h"
-#include "intel_pixel.h"
 #include "intel_span.h"
 #include "tnl/t_pipeline.h"
 
-#include "utils.h"
-
 
 /***************************************
  * Mesa's Driver Functions
diff --git a/i965/brw_disasm.c b/i965/brw_disasm.c
index 9fef230..130bd0f 100644
--- a/i965/brw_disasm.c
+++ b/i965/brw_disasm.c
@@ -365,6 +365,7 @@ static int format (FILE *f, char *format, ...)
     va_start (args, format);
 
     vsnprintf (buf, sizeof (buf) - 1, format, args);
+    va_end (args);
     string (f, buf);
     return 0;
 }
diff --git a/i965/brw_draw.c b/i965/brw_draw.c
index 8bcb608..e17680a 100644
--- a/i965/brw_draw.c
+++ b/i965/brw_draw.c
@@ -39,10 +39,8 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_state.h"
-#include "brw_fallback.h"
 
 #include "intel_batchbuffer.h"
-#include "intel_buffer_objects.h"
 
 #define FILE_DEBUG_FLAG DEBUG_BATCH
 
diff --git a/i965/brw_draw_upload.c b/i965/brw_draw_upload.c
index ee684f6..16b2529 100644
--- a/i965/brw_draw_upload.c
+++ b/i965/brw_draw_upload.c
@@ -29,19 +29,15 @@
 #include "main/glheader.h"
 #include "main/bufferobj.h"
 #include "main/context.h"
-#include "main/state.h"
-/* #include "main/api_validate.h" */
 #include "main/enums.h"
 
 #include "brw_draw.h"
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_state.h"
-#include "brw_fallback.h"
 
 #include "intel_batchbuffer.h"
 #include "intel_buffer_objects.h"
-#include "intel_tex.h"
 
 static GLuint double_types[5] = {
    0,
@@ -249,8 +245,10 @@ static void wrap_buffers( struct brw_context *brw,
     */
    /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH
       FAKE TO PUSH THIS STUFF */
-//   if (!brw->intel.ttm)
-//      dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
+   /*
+   if (!brw->intel.ttm)
+      dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
+    */
 }
 
 static void get_space( struct brw_context *brw,
diff --git a/i965/brw_eu_emit.c b/i965/brw_eu_emit.c
index 7ceabba..c8fb0a2 100644
--- a/i965/brw_eu_emit.c
+++ b/i965/brw_eu_emit.c
@@ -199,7 +199,7 @@ void brw_set_src1( struct brw_instruction *insn,
        * in the future:
        */
       assert (reg.address_mode == BRW_ADDRESS_DIRECT);
-      //assert (reg.file == BRW_GENERAL_REGISTER_FILE);
+      /* assert (reg.file == BRW_GENERAL_REGISTER_FILE); */
 
       if (insn->header.access_mode == BRW_ALIGN_1) {
 	 insn->bits3.da1.src1_subreg_nr = reg.subnr;
@@ -853,7 +853,7 @@ void brw_land_fwd_jump(struct brw_compile *p,
        jmpi = 2;
 
    assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI);
-   assert(jmp_insn->bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE);
+   assert(jmp_insn->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE);
 
    jmp_insn->bits3.ud = jmpi * ((landing - jmp_insn) - 1);
 }
diff --git a/i965/brw_fallback.c b/i965/brw_fallback.c
index 562a178..1914feb 100644
--- a/i965/brw_fallback.c
+++ b/i965/brw_fallback.c
@@ -36,7 +36,6 @@
 #include "swrast/swrast.h"
 #include "tnl/tnl.h"
 #include "brw_context.h"
-#include "brw_fallback.h"
 #include "intel_chipset.h"
 #include "intel_fbo.h"
 #include "intel_regions.h"
diff --git a/i965/brw_gs_emit.c b/i965/brw_gs_emit.c
index 0fc5b02..e9b71ed 100644
--- a/i965/brw_gs_emit.c
+++ b/i965/brw_gs_emit.c
@@ -40,7 +40,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_gs.h"
 
 static void brw_gs_alloc_regs( struct brw_gs_compile *c,
diff --git a/i965/brw_gs_state.c b/i965/brw_gs_state.c
index ed9d2ff..d291f5b 100644
--- a/i965/brw_gs_state.c
+++ b/i965/brw_gs_state.c
@@ -34,7 +34,6 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "main/macros.h"
 
 struct brw_gs_unit_key {
    unsigned int total_grf;
diff --git a/i965/brw_program.c b/i965/brw_program.c
index bac6918..e3b6fcc 100644
--- a/i965/brw_program.c
+++ b/i965/brw_program.c
@@ -37,7 +37,6 @@
 #include "tnl/tnl.h"
 
 #include "brw_context.h"
-#include "brw_util.h"
 #include "brw_wm.h"
 
 static void brwBindProgram( GLcontext *ctx,
diff --git a/i965/brw_sf_state.c b/i965/brw_sf_state.c
index bb69435..b76ed98 100644
--- a/i965/brw_sf_state.c
+++ b/i965/brw_sf_state.c
@@ -35,7 +35,6 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 #include "main/macros.h"
-#include "intel_fbo.h"
 
 static void upload_sf_vp(struct brw_context *brw)
 {
diff --git a/i965/brw_state.h b/i965/brw_state.h
index b129b1f..14d5319 100644
--- a/i965/brw_state.h
+++ b/i965/brw_state.h
@@ -35,7 +35,7 @@
 
 #include "brw_context.h"
 
-static inline void
+static INLINE void
 brw_add_validated_bo(struct brw_context *brw, dri_bo *bo)
 {
    assert(brw->state.validated_bo_count < ARRAY_SIZE(brw->state.validated_bos));
diff --git a/i965/brw_vs_emit.c b/i965/brw_vs_emit.c
index 27aac8b..e6ff9f1 100644
--- a/i965/brw_vs_emit.c
+++ b/i965/brw_vs_emit.c
@@ -770,7 +770,13 @@ get_constant(struct brw_vs_compile *c,
    if (c->current_const[argIndex].index != src->Index || relAddr) {
       struct brw_reg addrReg = c->regs[PROGRAM_ADDRESS][0];
 
-      c->current_const[argIndex].index = src->Index;
+      /* If using a non-relative-addressed constant, then keep track of it for
+       * later use without reloading.
+       */
+      if (relAddr)
+	 c->current_const[argIndex].index = -1;
+      else
+	 c->current_const[argIndex].index = src->Index;
 
 #if 0
       printf("  fetch const[%d] for arg %d into reg %d\n",
diff --git a/i965/brw_vs_surface_state.c b/i965/brw_vs_surface_state.c
index 3bc9840..22ff341 100644
--- a/i965/brw_vs_surface_state.c
+++ b/i965/brw_vs_surface_state.c
@@ -35,7 +35,6 @@
 
 #include "brw_context.h"
 #include "brw_state.h"
-#include "brw_defines.h"
 
 /* Creates a new VS constant buffer reflecting the current VS program's
  * constants, if needed by the VS program.
diff --git a/i965/brw_vtbl.c b/i965/brw_vtbl.c
index 34aaea3..daf1964 100644
--- a/i965/brw_vtbl.c
+++ b/i965/brw_vtbl.c
@@ -44,7 +44,6 @@
 #include "brw_state.h"
 #include "brw_draw.h"
 #include "brw_state.h"
-#include "brw_fallback.h"
 #include "brw_vs.h"
 #include "brw_wm.h"
 
diff --git a/i965/brw_wm.c b/i965/brw_wm.c
index 6895f64..802236e 100644
--- a/i965/brw_wm.c
+++ b/i965/brw_wm.c
@@ -30,7 +30,6 @@
   */
              
 #include "brw_context.h"
-#include "brw_util.h"
 #include "brw_wm.h"
 #include "brw_state.h"
 
diff --git a/i965/brw_wm_emit.c b/i965/brw_wm_emit.c
index 5390fd2..c6d10f5 100644
--- a/i965/brw_wm_emit.c
+++ b/i965/brw_wm_emit.c
@@ -692,7 +692,7 @@ void emit_xpd(struct brw_compile *p,
 {
    GLuint i;
 
-   assert(!(mask & WRITEMASK_W) == WRITEMASK_X);
+   assert((mask & WRITEMASK_W) != WRITEMASK_W);
    
    for (i = 0 ; i < 3; i++) {
       if (mask & (1<<i)) {
@@ -1084,7 +1084,7 @@ static void emit_kil_nv( struct brw_wm_compile *c )
 
    brw_push_insn_state(p);
    brw_set_mask_control(p, BRW_MASK_DISABLE);
-   brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK
+   brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); /* IMASK */
    brw_AND(p, r0uw, c->emit_mask_reg, r0uw);
    brw_pop_insn_state(p);
 }
diff --git a/i965/brw_wm_glsl.c b/i965/brw_wm_glsl.c
index e8c2cb6..7e5533e 100644
--- a/i965/brw_wm_glsl.c
+++ b/i965/brw_wm_glsl.c
@@ -743,7 +743,7 @@ static void emit_kil(struct brw_wm_compile *c)
     struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
     brw_push_insn_state(p);
     brw_set_mask_control(p, BRW_MASK_DISABLE);
-    brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK
+    brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); /* IMASK */
     brw_AND(p, depth, c->emit_mask_reg, depth);
     brw_pop_insn_state(p);
 }
diff --git a/i965/brw_wm_surface_state.c b/i965/brw_wm_surface_state.c
index 8335e5a..afb36b7 100644
--- a/i965/brw_wm_surface_state.c
+++ b/i965/brw_wm_surface_state.c
@@ -522,7 +522,8 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
       GLubyte color_mask[4];
       GLboolean color_blend;
       uint32_t tiling;
-      uint32_t draw_offset;
+      uint32_t draw_x;
+      uint32_t draw_y;
    } key;
 
    memset(&key, 0, sizeof(key));
@@ -564,7 +565,8 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
       }
       key.pitch = region->pitch;
       key.cpp = region->cpp;
-      key.draw_offset = region->draw_offset; /* cur 3d or cube face offset */
+      key.draw_x = region->draw_x;
+      key.draw_y = region->draw_y;
    } else {
       key.surface_type = BRW_SURFACE_NULL;
       key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
@@ -572,7 +574,8 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
       key.width = 1;
       key.height = 1;
       key.cpp = 4;
-      key.draw_offset = 0;
+      key.draw_x = 0;
+      key.draw_y = 0;
    }
    /* _NEW_COLOR */
    memcpy(key.color_mask, ctx->Color.ColorMask,
@@ -602,25 +605,32 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
       surf.ss0.surface_format = key.surface_format;
       surf.ss0.surface_type = key.surface_type;
       if (key.tiling == I915_TILING_NONE) {
-	 surf.ss1.base_addr = key.draw_offset;
+	 surf.ss1.base_addr = (key.draw_x + key.draw_y * key.pitch) * key.cpp;
       } else {
-	 uint32_t tile_offset = key.draw_offset % 4096;
-
-	 surf.ss1.base_addr = key.draw_offset - tile_offset;
-
-	 assert(BRW_IS_G4X(brw) || tile_offset == 0);
-	 if (BRW_IS_G4X(brw)) {
-	    if (key.tiling == I915_TILING_X) {
-	       /* Note that the low bits of these fields are missing, so
-		* there's the possibility of getting in trouble.
-		*/
-	       surf.ss5.x_offset = (tile_offset % 512) / key.cpp / 4;
-	       surf.ss5.y_offset = tile_offset / 512 / 2;
-	    } else {
-	       surf.ss5.x_offset = (tile_offset % 128) / key.cpp / 4;
-	       surf.ss5.y_offset = tile_offset / 128 / 2;
-	    }
+	 uint32_t tile_base, tile_x, tile_y;
+	 uint32_t pitch = key.pitch * key.cpp;
+
+	 if (key.tiling == I915_TILING_X) {
+	    tile_x = key.draw_x % (512 / key.cpp);
+	    tile_y = key.draw_y % 8;
+	    tile_base = ((key.draw_y / 8) * (8 * pitch));
+	    tile_base += (key.draw_x - tile_x) / (512 / key.cpp) * 4096;
+	 } else {
+	    /* Y */
+	    tile_x = key.draw_x % (128 / key.cpp);
+	    tile_y = key.draw_y % 32;
+	    tile_base = ((key.draw_y / 32) * (32 * pitch));
+	    tile_base += (key.draw_x - tile_x) / (128 / key.cpp) * 4096;
 	 }
+	 assert(BRW_IS_G4X(brw) || (tile_x == 0 && tile_y == 0));
+	 assert(tile_x % 4 == 0);
+	 assert(tile_y % 2 == 0);
+	 /* Note that the low bits of these fields are missing, so
+	  * there's the possibility of getting in trouble.
+	  */
+	 surf.ss1.base_addr = tile_base;
+	 surf.ss5.x_offset = tile_x / 4;
+	 surf.ss5.y_offset = tile_y / 2;
       }
       if (region_bo != NULL)
 	 surf.ss1.base_addr += region_bo->offset; /* reloc */
diff --git a/shared/intel_blit.c b/shared/intel_blit.c
index 9f638b0..94bf1ce 100644
--- a/shared/intel_blit.c
+++ b/shared/intel_blit.c
@@ -38,7 +38,6 @@
 #include "intel_reg.h"
 #include "intel_regions.h"
 #include "intel_batchbuffer.h"
-#include "intel_chipset.h"
 
 #define FILE_DEBUG_FLAG DEBUG_BLIT
 
@@ -377,6 +376,7 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
       GLint cx, cy, cw, ch;
       drm_clip_rect_t clear;
       int i;
+      drm_intel_bo *aper_array[2];
 
       /* Get clear bounds after locking */
       cx = fb->_Xmin;
@@ -527,6 +527,15 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
                assert(x1 < x2);
                assert(y1 < y2);
 
+	       /* do space check before going any further */
+	       aper_array[0] = intel->batch->buf;
+	       aper_array[1] = write_buffer;
+
+	       if (drm_intel_bufmgr_check_aperture_space(aper_array,
+							 ARRAY_SIZE(aper_array)) != 0) {
+		  intel_batchbuffer_flush(intel->batch);
+	       }
+
                BEGIN_BATCH(6, REFERENCES_CLIPRECTS);
                OUT_BATCH(CMD);
                OUT_BATCH(BR13);
diff --git a/shared/intel_buffers.c b/shared/intel_buffers.c
index 0564318..78ea6eb 100644
--- a/shared/intel_buffers.c
+++ b/shared/intel_buffers.c
@@ -28,10 +28,8 @@
 #include "intel_context.h"
 #include "intel_buffers.h"
 #include "intel_fbo.h"
-#include "intel_regions.h"
 #include "intel_batchbuffer.h"
 #include "main/framebuffer.h"
-#include "drirenderbuffer.h"
 
 
 /**
diff --git a/shared/intel_clear.c b/shared/intel_clear.c
index f682ee3..583976f 100644
--- a/shared/intel_clear.c
+++ b/shared/intel_clear.c
@@ -33,12 +33,9 @@
 
 #include "intel_context.h"
 #include "intel_blit.h"
-#include "intel_chipset.h"
 #include "intel_clear.h"
 #include "intel_fbo.h"
-#include "intel_pixel.h"
 #include "intel_regions.h"
-#include "intel_batchbuffer.h"
 
 #define FILE_DEBUG_FLAG DEBUG_BLIT
 
diff --git a/shared/intel_context.c b/shared/intel_context.c
index dd24b71..6275df3 100644
--- a/shared/intel_context.c
+++ b/shared/intel_context.c
@@ -28,7 +28,6 @@
 
 #include "main/glheader.h"
 #include "main/context.h"
-/* #include "main/arrayobj.h" */
 #include "main/extensions.h"
 #include "main/framebuffer.h"
 #include "main/imports.h"
diff --git a/shared/intel_context.h b/shared/intel_context.h
index eb7be7d..1afec09 100644
--- a/shared/intel_context.h
+++ b/shared/intel_context.h
@@ -354,14 +354,14 @@ extern char *__progname;
 #define ALIGN(value, alignment)  ((value + alignment - 1) & ~(alignment - 1))
 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
 
-static inline uint32_t
+static INLINE uint32_t
 U_FIXED(float value, uint32_t frac_bits)
 {
    value *= (1 << frac_bits);
    return value < 0 ? 0 : value;
 }
 
-static inline uint32_t
+static INLINE uint32_t
 S_FIXED(float value, uint32_t frac_bits)
 {
    return value * (1 << frac_bits);
@@ -588,7 +588,7 @@ is_power_of_two(uint32_t value)
    return (value & (value - 1)) == 0;
 }
 
-static inline void
+static INLINE void
 intel_bo_map_gtt_preferred(struct intel_context *intel,
 			   drm_intel_bo *bo,
 			   GLboolean write)
@@ -599,7 +599,7 @@ intel_bo_map_gtt_preferred(struct intel_context *intel,
       drm_intel_bo_map(bo, write);
 }
 
-static inline void
+static INLINE void
 intel_bo_unmap_gtt_preferred(struct intel_context *intel,
 			     drm_intel_bo *bo)
 {
diff --git a/shared/intel_pixel.c b/shared/intel_pixel.c
index 993e427..f4e7d4b 100644
--- a/shared/intel_pixel.c
+++ b/shared/intel_pixel.c
@@ -29,14 +29,7 @@
 #include "main/state.h"
 #include "main/bufferobj.h"
 #include "main/context.h"
-#include "main/enable.h"
-#include "main/matrix.h"
-#include "main/texstate.h"
-#include "main/varray.h"
-#include "main/viewport.h"
 #include "swrast/swrast.h"
-#include "shader/arbprogram.h"
-#include "shader/program.h"
 
 #include "intel_context.h"
 #include "intel_pixel.h"
diff --git a/shared/intel_pixel_bitmap.c b/shared/intel_pixel_bitmap.c
index 204a233..6bb497b 100644
--- a/shared/intel_pixel_bitmap.c
+++ b/shared/intel_pixel_bitmap.c
@@ -32,11 +32,11 @@
 #include "main/mtypes.h"
 #include "main/macros.h"
 #include "main/bufferobj.h"
+#include "main/polygon.h"
 #include "main/pixelstore.h"
 #include "main/polygon.h"
 #include "main/state.h"
 #include "main/teximage.h"
-#include "main/texenv.h"
 #include "main/texobj.h"
 #include "main/texstate.h"
 #include "main/texparam.h"
@@ -45,7 +45,6 @@
 #include "main/enable.h"
 #include "main/viewport.h"
 #include "shader/arbprogram.h"
-#include "glapi/dispatch.h"
 #include "swrast/swrast.h"
 
 #include "intel_screen.h"
@@ -53,7 +52,6 @@
 #include "intel_batchbuffer.h"
 #include "intel_blit.h"
 #include "intel_regions.h"
-#include "intel_buffer_objects.h"
 #include "intel_buffers.h"
 #include "intel_pixel.h"
 #include "intel_reg.h"
@@ -165,7 +163,7 @@ static GLuint get_bitmap_rect(GLsizei width, GLsizei height,
  * Returns the low Y value of the vertical range given, flipped according to
  * whether the framebuffer is or not.
  */
-static inline int
+static INLINE int
 y_flip(struct gl_framebuffer *fb, int y, int height)
 {
    if (fb->Name != 0)
diff --git a/shared/intel_pixel_draw.c b/shared/intel_pixel_draw.c
index 9b382e3..3a35634 100644
--- a/shared/intel_pixel_draw.c
+++ b/shared/intel_pixel_draw.c
@@ -46,10 +46,7 @@
 #include "drivers/common/meta.h"
 
 #include "intel_context.h"
-#include "intel_batchbuffer.h"
-#include "intel_blit.h"
 #include "intel_buffers.h"
-#include "intel_regions.h"
 #include "intel_pixel.h"
 #include "intel_fbo.h"
 
diff --git a/shared/intel_pixel_read.c b/shared/intel_pixel_read.c
index 20424e2..8e3db4d 100644
--- a/shared/intel_pixel_read.c
+++ b/shared/intel_pixel_read.c
@@ -36,7 +36,6 @@
 
 #include "intel_screen.h"
 #include "intel_context.h"
-#include "intel_batchbuffer.h"
 #include "intel_blit.h"
 #include "intel_buffers.h"
 #include "intel_regions.h"
@@ -173,6 +172,8 @@ do_blit_readpixels(GLcontext * ctx,
    struct intel_buffer_object *dst = intel_buffer_object(pack->BufferObj);
    GLuint dst_offset;
    GLuint rowLength;
+   drm_intel_bo *dst_buffer;
+   drm_clip_rect_t read_bounds, rect, src_rect;
 
    if (INTEL_DEBUG & DEBUG_PIXEL)
       _mesa_printf("%s\n", __FUNCTION__);
@@ -213,58 +214,47 @@ do_blit_readpixels(GLcontext * ctx,
       return GL_FALSE;
    }
    else {
-      rowLength = -rowLength;
+      if (ctx->ReadBuffer->Name == 0)
+	 rowLength = -rowLength;
    }
 
    dst_offset = (GLintptr) _mesa_image_address(2, pack, pixels, width, height,
 					       format, type, 0, 0, 0);
 
+   GLboolean all = (width * height * src->cpp == dst->Base.Size &&
+		    x == 0 && dst_offset == 0);
 
-   /* Although the blits go on the command buffer, need to do this and
-    * fire with lock held to guarentee cliprects are correct.
-    */
-   intelFlush(&intel->ctx);
-   LOCK_HARDWARE(intel);
+   dst_buffer = intel_bufferobj_buffer(intel, dst,
+					       all ? INTEL_WRITE_FULL :
+					       INTEL_WRITE_PART);
 
-   if (intel->driReadDrawable->numClipRects) {
-      GLboolean all = (width * height * src->cpp == dst->Base.Size &&
-                       x == 0 && dst_offset == 0);
-
-      dri_bo *dst_buffer = intel_bufferobj_buffer(intel, dst,
-						  all ? INTEL_WRITE_FULL :
-						  INTEL_WRITE_PART);
-      __DRIdrawablePrivate *dPriv = intel->driReadDrawable;
-      int nbox = dPriv->numClipRects;
-      drm_clip_rect_t *box = dPriv->pClipRects;
-      drm_clip_rect_t rect;
-      drm_clip_rect_t src_rect;
-      int i;
-
-      src_rect.x1 = dPriv->x + x;
-      src_rect.y1 = dPriv->y + dPriv->h - (y + height);
-      src_rect.x2 = src_rect.x1 + width;
-      src_rect.y2 = src_rect.y1 + height;
-
-
-
-      for (i = 0; i < nbox; i++) {
-         if (!intel_intersect_cliprects(&rect, &src_rect, &box[i]))
-            continue;
-
-         if (!intelEmitCopyBlit(intel,
-				src->cpp,
-				src->pitch, src->buffer, 0, src->tiling,
-				rowLength, dst_buffer, dst_offset, GL_FALSE,
-				rect.x1,
-				rect.y1,
-				rect.x1 - src_rect.x1,
-				rect.y2 - src_rect.y2,
-				rect.x2 - rect.x1, rect.y2 - rect.y1,
-				GL_COPY)) {
-	    UNLOCK_HARDWARE(intel);
-	    return GL_FALSE;
-	 }
-      }
+   src_rect.x1 = x;
+   if (ctx->ReadBuffer->Name == 0)
+      src_rect.y1 = ctx->ReadBuffer->Height - (y + height);
+   else
+      src_rect.y1 = y;
+   src_rect.x2 = src_rect.x1 + width;
+   src_rect.y2 = src_rect.y1 + height;
+
+   read_bounds.x1 = 0;
+   read_bounds.y1 = 0;
+   read_bounds.x2 = ctx->ReadBuffer->Width;
+   read_bounds.y2 = ctx->ReadBuffer->Height;
+
+   if (!intel_intersect_cliprects(&rect, &src_rect, &read_bounds))
+      return GL_TRUE;
+
+   if (!intelEmitCopyBlit(intel,
+			  src->cpp,
+			  src->pitch, src->buffer, 0, src->tiling,
+			  rowLength, dst_buffer, dst_offset, GL_FALSE,
+			  rect.x1,
+			  rect.y1,
+			  rect.x1 - src_rect.x1,
+			  rect.y2 - src_rect.y2,
+			  rect.x2 - rect.x1, rect.y2 - rect.y1,
+			  GL_COPY)) {
+      return GL_FALSE;
    }
    UNLOCK_HARDWARE(intel);
 
diff --git a/shared/intel_regions.c b/shared/intel_regions.c
index 8097516..6641cc7 100644
--- a/shared/intel_regions.c
+++ b/shared/intel_regions.c
@@ -48,7 +48,6 @@
 #include "intel_buffer_objects.h"
 #include "intel_bufmgr.h"
 #include "intel_batchbuffer.h"
-#include "intel_chipset.h"
 
 #define FILE_DEBUG_FLAG DEBUG_REGION
 
@@ -445,6 +444,7 @@ intel_region_attach_pbo(struct intel_context *intel,
    region->pbo->region = region;
    dri_bo_reference(buffer);
    region->buffer = buffer;
+   region->tiling = I915_TILING_NONE;
 }
 
 
diff --git a/shared/intel_screen.c b/shared/intel_screen.c
index 789135b..f3de7d1 100644
--- a/shared/intel_screen.c
+++ b/shared/intel_screen.c
@@ -38,12 +38,9 @@
 #include "intel_buffers.h"
 #include "intel_bufmgr.h"
 #include "intel_chipset.h"
-#include "intel_extensions.h"
 #include "intel_fbo.h"
-#include "intel_regions.h"
 #include "intel_swapbuffers.h"
 #include "intel_screen.h"
-#include "intel_span.h"
 #include "intel_tex.h"
 
 #include "i915_drm.h"
diff --git a/shared/intel_state.c b/shared/intel_state.c
index 4ee7423..f18e625 100644
--- a/shared/intel_state.c
+++ b/shared/intel_state.c
@@ -35,8 +35,6 @@
 
 #include "intel_screen.h"
 #include "intel_context.h"
-#include "intel_regions.h"
-#include "swrast/swrast.h"
 
 int
 intel_translate_shadow_compare_func(GLenum func)
diff --git a/shared/intel_swapbuffers.c b/shared/intel_swapbuffers.c
index 7d035b9..5af2f5f 100644
--- a/shared/intel_swapbuffers.c
+++ b/shared/intel_swapbuffers.c
@@ -29,7 +29,6 @@
 #include "intel_buffers.h"
 #include "intel_swapbuffers.h"
 #include "intel_fbo.h"
-#include "intel_batchbuffer.h"
 #include "drirenderbuffer.h"
 #include "vblank.h"
 #include "i915_drm.h"
diff --git a/shared/intel_tex_copy.c b/shared/intel_tex_copy.c
index 767d04d..a80cab3 100644
--- a/shared/intel_tex_copy.c
+++ b/shared/intel_tex_copy.c
@@ -36,7 +36,6 @@
 
 #include "intel_screen.h"
 #include "intel_context.h"
-#include "intel_batchbuffer.h"
 #include "intel_buffers.h"
 #include "intel_mipmap_tree.h"
 #include "intel_regions.h"
@@ -109,7 +108,7 @@ do_copy_texsubimage(struct intel_context *intel,
       return GL_FALSE;
    }
 
-   //   intelFlush(ctx);
+   /* intelFlush(ctx); */
    LOCK_HARDWARE(intel);
    {
       drm_intel_bo *dst_bo = intel_region_buffer(intel,
@@ -160,13 +159,14 @@ do_copy_texsubimage(struct intel_context *intel,
 			     intelImage->mt->cpp,
 			     src_pitch,
 			     src->buffer,
-			     src->draw_offset,
+			     0,
 			     src->tiling,
 			     intelImage->mt->pitch,
 			     dst_bo,
 			     0,
 			     intelImage->mt->region->tiling,
-			     x, y, image_x + dstx, image_y + dsty,
+			     src->draw_x + x, src->draw_y + y,
+			     image_x + dstx, image_y + dsty,
 			     width, height,
 			     GL_COPY)) {
 	 UNLOCK_HARDWARE(intel);
diff --git a/shared/intel_tex_image.c b/shared/intel_tex_image.c
index 66d61f9..d85ab43 100644
--- a/shared/intel_tex_image.c
+++ b/shared/intel_tex_image.c
@@ -7,7 +7,6 @@
 #include "main/convolve.h"
 #include "main/context.h"
 #include "main/formats.h"
-#include "main/image.h"
 #include "main/texcompress.h"
 #include "main/texstore.h"
 #include "main/texgetimage.h"
@@ -242,7 +241,8 @@ try_pbo_upload(struct intel_context *intel,
       if (!intelEmitCopyBlit(intel,
 			     intelImage->mt->cpp,
 			     src_stride, src_buffer, src_offset, GL_FALSE,
-			     dst_stride, dst_buffer, 0, GL_FALSE,
+			     dst_stride, dst_buffer, 0,
+			     intelImage->mt->region->tiling,
 			     0, 0, dst_x, dst_y, width, height,
 			     GL_COPY)) {
 	 UNLOCK_HARDWARE(intel);
diff --git a/shared/intel_tex_validate.c b/shared/intel_tex_validate.c
index c9a24ac..ed5c5d8 100644
--- a/shared/intel_tex_validate.c
+++ b/shared/intel_tex_validate.c
@@ -2,10 +2,8 @@
 #include "main/macros.h"
 
 #include "intel_context.h"
-#include "intel_batchbuffer.h"
 #include "intel_mipmap_tree.h"
 #include "intel_tex.h"
-#include "intel_chipset.h"
 
 #define FILE_DEBUG_FLAG DEBUG_TEXTURE