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path: root/hw/mips_timer.c
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2011-03-21change all other clock references to use nanosecond resolution accessorsPaolo Bonzini1-5/+5
This was done with: sed -i 's/qemu_get_clock\>/qemu_get_clock_ns/' \ $(git grep -l 'qemu_get_clock\>' ) sed -i 's/qemu_new_timer\>/qemu_new_timer_ns/' \ $(git grep -l 'qemu_new_timer\>' ) after checking that get_clock and new_timer never occur twice on the same line. There were no missed occurrences; however, even if there had been, they would have been caught by the compiler. There was exactly one false positive in qemu_run_timers: - current_time = qemu_get_clock (clock); + current_time = qemu_get_clock_ns (clock); which is of course not in this patch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2011-01-18mips: Expire late timers when reading cp0_countEdgar E. Iglesias1-2/+10
When reading cp0_count from a timer with a late trigger that should already have expired, expire it and raise the timer irq. This makes it possible for guest code (e.g, Linux) that first read cp0_count, then compare it with cp0_compare and check for raised timer interrupt lines to run reliably. Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-18mips: Break out cpu_mips_timer_expireEdgar E. Iglesias1-14/+22
Reorganize for future patches, no functional change. Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-03-27Compile some MIPS devices only onceBlue Swirl1-1/+1
Move CPU specific declarations to a separate file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-14mips: add header to mips_int.c and mips_timer.cAurelien Jarno1-0/+22
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-11Unexport ticks_per_sec variable. Create get_ticks_per_sec() functionJuan Quintela1-5/+5
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-3/+1
This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-08target-mips: CP0 Random register improvementsaurel321-3/+8
- Use a LFSR to generate the random value - Make sure to not return the same value twice Based on a patch by Hervé Poussineau. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6233 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14MIPS: remove empty cpu_mips_irqctrl_init()aurel321-4/+0
cpu_mips_irqctrl_init() function in hw/mips_timer.c is empty. Attached patch removes it, and its callers. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5214 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29Add instruction counter.pbrook1-0/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11Optimize MIPS timer read/write functionsaurel321-31/+25
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4190 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Break up vl.h.pbrook1-1/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-25Timer start/stop implementation, by Aurelien Jarno.ths1-5/+24
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-06Partial support for 34K multithreading, not functional yet.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07Unify IRQ handling.pbrook1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Fix disabling of the Cause register for R2.ths1-11/+11
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2612 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18Fix BD flag handling, cause register contents, implement some more bitsths1-0/+7
for R2 interrupt handling. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths1-4/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06Move the MIPS CPU timer in a seperate file, by Alec Voropay.ths1-0/+85
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2225 c046a42c-6fe2-441c-8c8c-71466251a162
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