diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/acpi.c | 8 | ||||
| -rw-r--r-- | hw/adb.c | 4 | ||||
| -rw-r--r-- | hw/adlib.c | 3 | ||||
| -rw-r--r-- | hw/ads7846.c | 4 | ||||
| -rw-r--r-- | hw/an5206.c | 5 | ||||
| -rw-r--r-- | hw/apb_pci.c | 3 | ||||
| -rw-r--r-- | hw/apic.c | 4 | ||||
| -rw-r--r-- | hw/arm-misc.h | 33 | ||||
| -rw-r--r-- | hw/arm_boot.c | 4 | ||||
| -rw-r--r-- | hw/arm_pic.c | 4 | ||||
| -rw-r--r-- | hw/arm_pic.h | 23 | ||||
| -rw-r--r-- | hw/arm_sysctl.c | 5 | ||||
| -rw-r--r-- | hw/arm_timer.c | 5 | ||||
| -rw-r--r-- | hw/armv7m.c | 4 | ||||
| -rw-r--r-- | hw/armv7m_nvic.c | 5 | ||||
| -rw-r--r-- | hw/audiodev.h | 12 | ||||
| -rw-r--r-- | hw/boards.h | 94 | ||||
| -rw-r--r-- | hw/cdrom.c | 3 | ||||
| -rw-r--r-- | hw/cirrus_vga.c | 5 | ||||
| -rw-r--r-- | hw/cs4231.c | 3 | ||||
| -rw-r--r-- | hw/cuda.c | 4 | ||||
| -rw-r--r-- | hw/devices.h | 19 | ||||
| -rw-r--r-- | hw/dma.c | 3 | ||||
| -rw-r--r-- | hw/ds1225y.c | 4 | ||||
| -rw-r--r-- | hw/dummy_m68k.c | 4 | ||||
| -rw-r--r-- | hw/ecc.c | 3 | ||||
| -rw-r--r-- | hw/eepro100.c | 4 | ||||
| -rw-r--r-- | hw/eeprom93xx.c | 1 | ||||
| -rw-r--r-- | hw/eeprom93xx.h | 2 | ||||
| -rw-r--r-- | hw/es1370.c | 5 | ||||
| -rw-r--r-- | hw/esp.c | 7 | ||||
| -rw-r--r-- | hw/etraxfs.c | 4 | ||||
| -rw-r--r-- | hw/etraxfs_ser.c | 2 | ||||
| -rw-r--r-- | hw/etraxfs_timer.c | 3 | ||||
| -rw-r--r-- | hw/fdc.c | 6 | ||||
| -rw-r--r-- | hw/fdc.h | 12 | ||||
| -rw-r--r-- | hw/flash.h | 40 | ||||
| -rw-r--r-- | hw/grackle_pci.c | 4 | ||||
| -rw-r--r-- | hw/gt64xxx.c | 5 | ||||
| -rw-r--r-- | hw/gumstix.c | 8 | ||||
| -rw-r--r-- | hw/heathrow_pic.c | 2 | ||||
| -rw-r--r-- | hw/hw.h | 99 | ||||
| -rw-r--r-- | hw/i2c.c | 5 | ||||
| -rw-r--r-- | hw/i2c.h | 15 | ||||
| -rw-r--r-- | hw/i8254.c | 5 | ||||
| -rw-r--r-- | hw/i8259.c | 5 | ||||
| -rw-r--r-- | hw/ide.c | 9 | ||||
| -rw-r--r-- | hw/integratorcp.c | 9 | ||||
| -rw-r--r-- | hw/iommu.c | 3 | ||||
| -rw-r--r-- | hw/irq.c | 3 | ||||
| -rw-r--r-- | hw/irq.h | 9 | ||||
| -rw-r--r-- | hw/isa.h | 24 | ||||
| -rw-r--r-- | hw/isa_mmio.c | 3 | ||||
| -rw-r--r-- | hw/jazz_led.c | 4 | ||||
| -rw-r--r-- | hw/lsi53c895a.c | 4 | ||||
| -rw-r--r-- | hw/m48t59.c | 7 | ||||
| -rw-r--r-- | hw/m48t59.h | 13 | ||||
| -rw-r--r-- | hw/mac_dbdma.c | 2 | ||||
| -rw-r--r-- | hw/mac_nvram.c | 2 | ||||
| -rw-r--r-- | hw/macio.c | 3 | ||||
| -rw-r--r-- | hw/max111x.c | 3 | ||||
| -rw-r--r-- | hw/max7310.c | 7 | ||||
| -rw-r--r-- | hw/mc146818rtc.c | 6 | ||||
| -rw-r--r-- | hw/mcf.h | 21 | ||||
| -rw-r--r-- | hw/mcf5206.c | 5 | ||||
| -rw-r--r-- | hw/mcf5208.c | 7 | ||||
| -rw-r--r-- | hw/mcf_fec.c | 4 | ||||
| -rw-r--r-- | hw/mcf_intc.c | 3 | ||||
| -rw-r--r-- | hw/mcf_uart.c | 4 | ||||
| -rw-r--r-- | hw/mips.h | 25 | ||||
| -rw-r--r-- | hw/mips_int.c | 3 | ||||
| -rw-r--r-- | hw/mips_malta.c | 12 | ||||
| -rw-r--r-- | hw/mips_mipssim.c | 8 | ||||
| -rw-r--r-- | hw/mips_pica61.c | 8 | ||||
| -rw-r--r-- | hw/mips_r4k.c | 8 | ||||
| -rw-r--r-- | hw/mips_timer.c | 4 | ||||
| -rw-r--r-- | hw/mipsnet.c | 5 | ||||
| -rw-r--r-- | hw/mpcore.c | 4 | ||||
| -rw-r--r-- | hw/nand.c | 6 | ||||
| -rw-r--r-- | hw/ne2000.c | 4 | ||||
| -rw-r--r-- | hw/nvram.h | 41 | ||||
| -rw-r--r-- | hw/omap.c | 11 | ||||
| -rw-r--r-- | hw/omap.h | 7 | ||||
| -rw-r--r-- | hw/omap1_clk.c | 3 | ||||
| -rw-r--r-- | hw/omap_i2c.c | 4 | ||||
| -rw-r--r-- | hw/omap_lcdc.c | 4 | ||||
| -rw-r--r-- | hw/omap_mmc.c | 6 | ||||
| -rw-r--r-- | hw/openpic.c | 4 | ||||
| -rw-r--r-- | hw/palm.c | 8 | ||||
| -rw-r--r-- | hw/parallel.c | 5 | ||||
| -rw-r--r-- | hw/pc.c | 11 | ||||
| -rw-r--r-- | hw/pc.h | 145 | ||||
| -rw-r--r-- | hw/pci.c | 5 | ||||
| -rw-r--r-- | hw/pci.h | 138 | ||||
| -rw-r--r-- | hw/pckbd.c | 6 | ||||
| -rw-r--r-- | hw/pcmcia.h | 50 | ||||
| -rw-r--r-- | hw/pcnet.c | 6 | ||||
| -rw-r--r-- | hw/pcspk.c | 6 | ||||
| -rw-r--r-- | hw/pflash_cfi01.c | 5 | ||||
| -rw-r--r-- | hw/pflash_cfi02.c | 5 | ||||
| -rw-r--r-- | hw/piix_pci.c | 5 | ||||
| -rw-r--r-- | hw/pl011.c | 4 | ||||
| -rw-r--r-- | hw/pl022.c | 3 | ||||
| -rw-r--r-- | hw/pl031.c | 5 | ||||
| -rw-r--r-- | hw/pl050.c | 4 | ||||
| -rw-r--r-- | hw/pl061.c | 3 | ||||
| -rw-r--r-- | hw/pl080.c | 3 | ||||
| -rw-r--r-- | hw/pl110.c | 4 | ||||
| -rw-r--r-- | hw/pl181.c | 3 | ||||
| -rw-r--r-- | hw/pl190.c | 5 | ||||
| -rw-r--r-- | hw/ppc.c | 6 | ||||
| -rw-r--r-- | hw/ppc.h | 31 | ||||
| -rw-r--r-- | hw/ppc405_boards.c | 8 | ||||
| -rw-r--r-- | hw/ppc405_uc.c | 6 | ||||
| -rw-r--r-- | hw/ppc4xx_devs.c | 4 | ||||
| -rw-r--r-- | hw/ppc_chrp.c | 9 | ||||
| -rw-r--r-- | hw/ppc_mac.h | 54 | ||||
| -rw-r--r-- | hw/ppc_oldworld.c | 10 | ||||
| -rw-r--r-- | hw/ppc_prep.c | 11 | ||||
| -rw-r--r-- | hw/prep_pci.c | 4 | ||||
| -rw-r--r-- | hw/primecell.h | 59 | ||||
| -rw-r--r-- | hw/ps2.c | 4 | ||||
| -rw-r--r-- | hw/ps2.h | 10 | ||||
| -rw-r--r-- | hw/ptimer.c | 3 | ||||
| -rw-r--r-- | hw/pxa.h | 6 | ||||
| -rw-r--r-- | hw/pxa2xx.c | 14 | ||||
| -rw-r--r-- | hw/pxa2xx_dma.c | 3 | ||||
| -rw-r--r-- | hw/pxa2xx_gpio.c | 3 | ||||
| -rw-r--r-- | hw/pxa2xx_lcd.c | 6 | ||||
| -rw-r--r-- | hw/pxa2xx_mmci.c | 7 | ||||
| -rw-r--r-- | hw/pxa2xx_pcmcia.c | 3 | ||||
| -rw-r--r-- | hw/pxa2xx_pic.c | 3 | ||||
| -rw-r--r-- | hw/pxa2xx_timer.c | 5 | ||||
| -rw-r--r-- | hw/r2d.c | 5 | ||||
| -rw-r--r-- | hw/realview.c | 10 | ||||
| -rw-r--r-- | hw/realview_gic.c | 4 | ||||
| -rw-r--r-- | hw/rtl8139.c | 5 | ||||
| -rw-r--r-- | hw/sb16.c | 6 | ||||
| -rw-r--r-- | hw/scsi-disk.c | 4 | ||||
| -rw-r--r-- | hw/scsi-disk.h | 33 | ||||
| -rw-r--r-- | hw/sd.c | 2 | ||||
| -rw-r--r-- | hw/sd.h | 2 | ||||
| -rw-r--r-- | hw/serial.c | 5 | ||||
| -rw-r--r-- | hw/sh.h | 38 | ||||
| -rw-r--r-- | hw/sh7750.c | 4 | ||||
| -rw-r--r-- | hw/sh7750_regnames.c | 3 | ||||
| -rw-r--r-- | hw/sh_intc.c | 3 | ||||
| -rw-r--r-- | hw/sh_serial.c | 4 | ||||
| -rw-r--r-- | hw/sh_timer.c | 4 | ||||
| -rw-r--r-- | hw/shix.c | 5 | ||||
| -rw-r--r-- | hw/slavio_intctl.c | 5 | ||||
| -rw-r--r-- | hw/slavio_misc.c | 5 | ||||
| -rw-r--r-- | hw/slavio_serial.c | 6 | ||||
| -rw-r--r-- | hw/slavio_timer.c | 4 | ||||
| -rw-r--r-- | hw/smbus.c | 6 | ||||
| -rw-r--r-- | hw/smbus.h | 2 | ||||
| -rw-r--r-- | hw/smbus_eeprom.c | 4 | ||||
| -rw-r--r-- | hw/smc91c111.c | 4 | ||||
| -rw-r--r-- | hw/sparc32_dma.c | 4 | ||||
| -rw-r--r-- | hw/sparc32_dma.h | 14 | ||||
| -rw-r--r-- | hw/spitz.c | 14 | ||||
| -rw-r--r-- | hw/ssd0303.c | 4 | ||||
| -rw-r--r-- | hw/ssd0323.c | 4 | ||||
| -rw-r--r-- | hw/stellaris.c | 10 | ||||
| -rw-r--r-- | hw/sun4m.c | 11 | ||||
| -rw-r--r-- | hw/sun4m.h | 73 | ||||
| -rw-r--r-- | hw/sun4u.c | 11 | ||||
| -rw-r--r-- | hw/tc58128.c | 4 | ||||
| -rw-r--r-- | hw/tcx.c | 4 | ||||
| -rw-r--r-- | hw/tsc210x.c | 6 | ||||
| -rw-r--r-- | hw/unin_pci.c | 5 | ||||
| -rw-r--r-- | hw/usb-hid.c | 4 | ||||
| -rw-r--r-- | hw/usb-hub.c | 3 | ||||
| -rw-r--r-- | hw/usb-msd.c | 5 | ||||
| -rw-r--r-- | hw/usb-ohci.c | 5 | ||||
| -rw-r--r-- | hw/usb-uhci.c | 5 | ||||
| -rw-r--r-- | hw/usb-wacom.c | 4 | ||||
| -rw-r--r-- | hw/usb.c | 3 | ||||
| -rw-r--r-- | hw/usb.h | 17 | ||||
| -rw-r--r-- | hw/versatile_pci.c | 4 | ||||
| -rw-r--r-- | hw/versatilepb.c | 10 | ||||
| -rw-r--r-- | hw/vga.c | 5 | ||||
| -rw-r--r-- | hw/vmmouse.c | 5 | ||||
| -rw-r--r-- | hw/vmport.c | 6 | ||||
| -rw-r--r-- | hw/vmware_vga.c | 4 | ||||
| -rw-r--r-- | hw/wm8750.c | 4 |
186 files changed, 1709 insertions, 234 deletions
@@ -16,7 +16,13 @@ * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "pci.h" +#include "qemu-timer.h" +#include "sysemu.h" +#include "i2c.h" +#include "smbus.h" //#define DEBUG @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ppc_mac.h" +#include "console.h" /* ADB commands */ #define ADB_BUSRESET 0x00 diff --git a/hw/adlib.c b/hw/adlib.c index 805365e70..af4660bbc 100644 --- a/hw/adlib.c +++ b/hw/adlib.c @@ -22,7 +22,8 @@ * THE SOFTWARE. */ #include <assert.h> -#include "vl.h" +#include "hw.h" +#include "audiodev.h" #define ADLIB_KILL_TIMERS 1 diff --git a/hw/ads7846.c b/hw/ads7846.c index c26ce2583..578bb5493 100644 --- a/hw/ads7846.c +++ b/hw/ads7846.c @@ -7,7 +7,9 @@ * This code is licensed under the GNU GPL v2. */ -#include <vl.h> +#include "hw.h" +#include "devices.h" +#include "console.h" struct ads7846_state_s { qemu_irq interrupt; diff --git a/hw/an5206.c b/hw/an5206.c index b5f93f671..5e12ed854 100644 --- a/hw/an5206.c +++ b/hw/an5206.c @@ -6,7 +6,10 @@ * This code is licenced under the GPL */ -#include "vl.h" +#include "hw.h" +#include "mcf.h" +#include "sysemu.h" +#include "boards.h" #define KERNEL_LOAD_ADDR 0x10000 #define AN5206_MBAR_ADDR 0x10000000 diff --git a/hw/apb_pci.c b/hw/apb_pci.c index fe9189247..73dcf5c13 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -26,7 +26,8 @@ Ultrasparc PCI host is called the PCI Bus Module (PBM). The APB is the secondary PCI bridge. */ -#include "vl.h" +#include "hw.h" +#include "pci.h" typedef target_phys_addr_t pci_addr_t; #include "pci_host.h" @@ -17,7 +17,9 @@ * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "qemu-timer.h" //#define DEBUG_APIC //#define DEBUG_IOAPIC diff --git a/hw/arm-misc.h b/hw/arm-misc.h new file mode 100644 index 000000000..f8011182d --- /dev/null +++ b/hw/arm-misc.h @@ -0,0 +1,33 @@ +/* + * Misc ARM declarations + * + * Copyright (c) 2006 CodeSourcery. + * Written by Paul Brook + * + * This code is licenced under the LGPL. + * + */ + +#ifndef ARM_MISC_H +#define ARM_MISC_H 1 + +/* The CPU is also modeled as an interrupt controller. */ +#define ARM_PIC_CPU_IRQ 0 +#define ARM_PIC_CPU_FIQ 1 +qemu_irq *arm_pic_init_cpu(CPUState *env); + +/* armv7m.c */ +qemu_irq *armv7m_init(int flash_size, int sram_size, + const char *kernel_filename, const char *cpu_model); + +/* arm_boot.c */ + +void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, + const char *kernel_cmdline, const char *initrd_filename, + int board_id, target_phys_addr_t loader_start); + +/* armv7m_nvic.c */ +qemu_irq *armv7m_nvic_init(CPUState *env); + +#endif /* !ARM_MISC_H */ + diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 8ef14ab4e..8335e69a7 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -7,7 +7,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "arm-misc.h" +#include "sysemu.h" #define KERNEL_ARGS_ADDR 0x100 #define KERNEL_LOAD_ADDR 0x00010000 diff --git a/hw/arm_pic.c b/hw/arm_pic.c index 7f4a694d9..1fe55b71b 100644 --- a/hw/arm_pic.c +++ b/hw/arm_pic.c @@ -7,8 +7,8 @@ * This code is licenced under the LGPL */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "arm-misc.h" /* Stub functions for hardware that doesn't exist. */ void pic_info(void) diff --git a/hw/arm_pic.h b/hw/arm_pic.h deleted file mode 100644 index 1eba2baab..000000000 --- a/hw/arm_pic.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Generic ARM Programmable Interrupt Controller support. - * - * Copyright (c) 2006 CodeSourcery. - * Written by Paul Brook - * - * This code is licenced under the LGPL. - * - * Arm hardware uses a wide variety of interrupt handling hardware. - * This provides a generic framework for connecting interrupt sources and - * inputs. - */ - -#ifndef ARM_INTERRUPT_H -#define ARM_INTERRUPT_H 1 - -/* The CPU is also modeled as an interrupt controller. */ -#define ARM_PIC_CPU_IRQ 0 -#define ARM_PIC_CPU_FIQ 1 -qemu_irq *arm_pic_init_cpu(CPUState *env); - -#endif /* !ARM_INTERRUPT_H */ - diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c index e3179e2a9..e1d5a56c0 100644 --- a/hw/arm_sysctl.c +++ b/hw/arm_sysctl.c @@ -7,8 +7,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "arm-misc.h" +#include "sysemu.h" #define LOCK_VALUE 0xa05f diff --git a/hw/arm_timer.c b/hw/arm_timer.c index 3df386af4..417d53db8 100644 --- a/hw/arm_timer.c +++ b/hw/arm_timer.c @@ -7,8 +7,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "arm-misc.h" +#include "qemu-timer.h" /* Common timer implementation. */ diff --git a/hw/armv7m.c b/hw/armv7m.c index f0a90e12d..b2bad3c2e 100644 --- a/hw/armv7m.c +++ b/hw/armv7m.c @@ -7,7 +7,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "arm-misc.h" +#include "sysemu.h" /* Bitbanded IO. Each word corresponds to a single bit. */ diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index d30408288..99ea9873a 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -10,8 +10,9 @@ * NVIC. Much of that is also implemented here. */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "qemu-timer.h" +#include "arm-misc.h" #define GIC_NIRQ 64 #define NCPU 1 diff --git a/hw/audiodev.h b/hw/audiodev.h new file mode 100644 index 000000000..18cdf6708 --- /dev/null +++ b/hw/audiodev.h @@ -0,0 +1,12 @@ +/* es1370.c */ +int es1370_init (PCIBus *bus, AudioState *s); + +/* sb16.c */ +int SB16_init (AudioState *s, qemu_irq *pic); + +/* adlib.c */ +int Adlib_init (AudioState *s, qemu_irq *pic); + +/* gus.c */ +int GUS_init (AudioState *s, qemu_irq *pic); + diff --git a/hw/boards.h b/hw/boards.h new file mode 100644 index 000000000..7eee86631 --- /dev/null +++ b/hw/boards.h @@ -0,0 +1,94 @@ +/* Declarations for use by board files for creating devices. */ + +#ifndef HW_BOARDS_H +#define HW_BOARDS_H + +typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, + const char *boot_device, + DisplayState *ds, const char **fd_filename, int snapshot, + const char *kernel_filename, const char *kernel_cmdline, + const char *initrd_filename, const char *cpu_model); + +typedef struct QEMUMachine { + const char *name; + const char *desc; + QEMUMachineInitFunc *init; + struct QEMUMachine *next; +} QEMUMachine; + +int qemu_register_machine(QEMUMachine *m); + +/* Axis ETRAX. */ +extern QEMUMachine bareetraxfs_machine; + +/* pc.c */ +extern QEMUMachine pc_machine; +extern QEMUMachine isapc_machine; + +/* ppc.c */ +extern QEMUMachine prep_machine; +extern QEMUMachine core99_machine; +extern QEMUMachine heathrow_machine; +extern QEMUMachine ref405ep_machine; +extern QEMUMachine taihu_machine; + +/* mips_r4k.c */ +extern QEMUMachine mips_machine; + +/* mips_malta.c */ +extern QEMUMachine mips_malta_machine; + +/* mips_pica61.c */ +extern QEMUMachine mips_pica61_machine; + +/* mips_mipssim.c */ +extern QEMUMachine mips_mipssim_machine; + +/* shix.c */ +extern QEMUMachine shix_machine; + +/* r2d.c */ +extern QEMUMachine r2d_machine; + +/* sun4m.c */ +extern QEMUMachine ss5_machine, ss10_machine, ss600mp_machine; + +/* sun4u.c */ +extern QEMUMachine sun4u_machine; + +/* integratorcp.c */ +extern QEMUMachine integratorcp_machine; + +/* versatilepb.c */ +extern QEMUMachine versatilepb_machine; +extern QEMUMachine versatileab_machine; + +/* realview.c */ +extern QEMUMachine realview_machine; + +/* spitz.c */ +extern QEMUMachine akitapda_machine; +extern QEMUMachine spitzpda_machine; +extern QEMUMachine borzoipda_machine; +extern QEMUMachine terrierpda_machine; + +/* palm.c */ +extern QEMUMachine palmte_machine; + +/* gumstix.c */ +extern QEMUMachine connex_machine; + +/* stellaris.c */ +extern QEMUMachine lm3s811evb_machine; +extern QEMUMachine lm3s6965evb_machine; + +/* an5206.c */ +extern QEMUMachine an5206_machine; + +/* mcf5208.c */ +extern QEMUMachine mcf5208evb_machine; + +/* dummy_m68k.c */ +extern QEMUMachine dummy_m68k_machine; + +#endif diff --git a/hw/cdrom.c b/hw/cdrom.c index 4f1fce18f..2aa4d3b25 100644 --- a/hw/cdrom.c +++ b/hw/cdrom.c @@ -25,7 +25,8 @@ /* ??? Most of the ATAPI emulation is still in ide.c. It should be moved here. */ -#include <vl.h> +#include "qemu-common.h" +#include "scsi-disk.h" static void lba_to_msf(uint8_t *buf, int lba) { diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c index 85bf4a21f..c35edf260 100644 --- a/hw/cirrus_vga.c +++ b/hw/cirrus_vga.c @@ -26,7 +26,10 @@ * Reference: Finn Thogersons' VGADOC4b * available at http://home.worldonline.dk/~finth/ */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "pci.h" +#include "console.h" #include "vga_int.h" /* diff --git a/hw/cs4231.c b/hw/cs4231.c index 982980038..11a6add75 100644 --- a/hw/cs4231.c +++ b/hw/cs4231.c @@ -21,7 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sun4m.h" /* debug CS4231 */ //#define DEBUG_CS @@ -22,8 +22,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" #include "ppc_mac.h" +#include "qemu-timer.h" +#include "sysemu.h" /* XXX: implement all timer modes */ diff --git a/hw/devices.h b/hw/devices.h new file mode 100644 index 000000000..382774565 --- /dev/null +++ b/hw/devices.h @@ -0,0 +1,19 @@ +#ifndef QEMU_DEVICES_H +#define QEMU_DEVICES_H + +/* Devices that have nowhere better to go. */ + +/* smc91c111.c */ +void smc91c111_init(NICInfo *, uint32_t, qemu_irq); + +/* ssd0323.c */ +int ssd0323_xfer_ssi(void *opaque, int data); +void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p); + +/* ads7846.c */ +struct ads7846_state_s; +uint32_t ads7846_read(void *opaque); +void ads7846_write(void *opaque, uint32_t value); +struct ads7846_state_s *ads7846_init(qemu_irq penirq); + +#endif @@ -21,7 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "isa.h" /* #define DEBUG_DMA */ diff --git a/hw/ds1225y.c b/hw/ds1225y.c index 7851096fa..8de20fb93 100644 --- a/hw/ds1225y.c +++ b/hw/ds1225y.c @@ -22,7 +22,9 @@ * THE SOFTWARE.
*/
-#include "vl.h"
+#include "hw.h"
+#include "mips.h"
+#include "nvram.h"
typedef enum
{
diff --git a/hw/dummy_m68k.c b/hw/dummy_m68k.c index 722554711..812162048 100644 --- a/hw/dummy_m68k.c +++ b/hw/dummy_m68k.c @@ -6,7 +6,9 @@ * This code is licenced under the GPL */ -#include "vl.h" +#include "hw.h" +#include "sysemu.h" +#include "boards.h" #define KERNEL_LOAD_ADDR 0x10000 @@ -8,7 +8,8 @@ * This code is licensed under the GNU GPL v2. */ -#include "vl.h" +#include "hw.h" +#include "flash.h" /* * Pre-calculated 256-way 1 byte column parity. Table borrowed from Linux. diff --git a/hw/eepro100.c b/hw/eepro100.c index 975aeb172..84d1e52ac 100644 --- a/hw/eepro100.c +++ b/hw/eepro100.c @@ -40,7 +40,9 @@ #include <assert.h> #include <stddef.h> /* offsetof */ -#include "vl.h" +#include "hw.h" +#include "pci.h" +#include "net.h" #include "eeprom93xx.h" /* Common declarations for all PCI devices. */ diff --git a/hw/eeprom93xx.c b/hw/eeprom93xx.c index 14f018914..896cffd44 100644 --- a/hw/eeprom93xx.c +++ b/hw/eeprom93xx.c @@ -37,6 +37,7 @@ */ #include <assert.h> +#include "hw.h" #include "eeprom93xx.h" /* Debug EEPROM emulation. */ diff --git a/hw/eeprom93xx.h b/hw/eeprom93xx.h index fde4912e8..4e257f6e8 100644 --- a/hw/eeprom93xx.h +++ b/hw/eeprom93xx.h @@ -21,8 +21,6 @@ #ifndef EEPROM93XX_H #define EEPROM93XX_H -#include "vl.h" - typedef struct _eeprom_t eeprom_t; /* Create a new EEPROM with (nwords * 2) bytes. */ diff --git a/hw/es1370.c b/hw/es1370.c index d607a9485..754f621a1 100644 --- a/hw/es1370.c +++ b/hw/es1370.c @@ -26,7 +26,10 @@ /* #define VERBOSE_ES1370 */ #define SILENT_ES1370 -#include "vl.h" +#include "hw.h" +#include "audiodev.h" +#include "audio/audio.h" +#include "pci.h" /* Missing stuff: SCTRL_P[12](END|ST)INC @@ -21,7 +21,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "block.h" +#include "scsi-disk.h" +#include "sun4m.h" +/* FIXME: Only needed for MAX_DISKS, which is probably wrong. */ +#include "sysemu.h" /* debug ESP card */ //#define DEBUG_ESP diff --git a/hw/etraxfs.c b/hw/etraxfs.c index da2196834..ba4d4009e 100644 --- a/hw/etraxfs.c +++ b/hw/etraxfs.c @@ -23,7 +23,9 @@ */ #include <time.h> #include <sys/time.h> -#include "vl.h" +#include "hw.h" +#include "sysemu.h" +#include "boards.h" extern FILE *logfile; diff --git a/hw/etraxfs_ser.c b/hw/etraxfs_ser.c index 3ff6ff77c..bb2aeb76a 100644 --- a/hw/etraxfs_ser.c +++ b/hw/etraxfs_ser.c @@ -24,7 +24,7 @@ #include <stdio.h> #include <ctype.h> -#include "vl.h" +#include "hw.h" #define RW_TR_DMA_EN 0xb0026004 #define RW_DOUT 0xb002601c diff --git a/hw/etraxfs_timer.c b/hw/etraxfs_timer.c index 1c2e4035f..efa6bf9b6 100644 --- a/hw/etraxfs_timer.c +++ b/hw/etraxfs_timer.c @@ -23,7 +23,8 @@ */ #include <stdio.h> #include <sys/time.h> -#include "vl.h" +#include "hw.h" +#include "qemu-timer.h" void etrax_ack_irq(CPUState *env, uint32_t mask); @@ -25,7 +25,11 @@ * The controller is used in Sun4m systems in a slightly different * way. There are changes in DOR register and DMA is not available. */ -#include "vl.h" +#include "hw.h" +#include "fdc.h" +#include "block.h" +#include "qemu-timer.h" +#include "isa.h" /********************************************************/ /* debug Floppy devices */ diff --git a/hw/fdc.h b/hw/fdc.h new file mode 100644 index 000000000..50de25088 --- /dev/null +++ b/hw/fdc.h @@ -0,0 +1,12 @@ +/* fdc.c */ +#define MAX_FD 2 +extern BlockDriverState *fd_table[MAX_FD]; + +typedef struct fdctrl_t fdctrl_t; + +fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, + target_phys_addr_t io_base, + BlockDriverState **fds); +fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base, + BlockDriverState **fds); +int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); diff --git a/hw/flash.h b/hw/flash.h new file mode 100644 index 000000000..e3c898a34 --- /dev/null +++ b/hw/flash.h @@ -0,0 +1,40 @@ +/* NOR flash devices */ +typedef struct pflash_t pflash_t; + +pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, + BlockDriverState *bs, + uint32_t sector_len, int nb_blocs, int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3); + +/* nand.c */ +struct nand_flash_s; +struct nand_flash_s *nand_init(int manf_id, int chip_id); +void nand_done(struct nand_flash_s *s); +void nand_setpins(struct nand_flash_s *s, + int cle, int ale, int ce, int wp, int gnd); +void nand_getpins(struct nand_flash_s *s, int *rb); +void nand_setio(struct nand_flash_s *s, uint8_t value); +uint8_t nand_getio(struct nand_flash_s *s); + +#define NAND_MFR_TOSHIBA 0x98 +#define NAND_MFR_SAMSUNG 0xec +#define NAND_MFR_FUJITSU 0x04 +#define NAND_MFR_NATIONAL 0x8f +#define NAND_MFR_RENESAS 0x07 +#define NAND_MFR_STMICRO 0x20 +#define NAND_MFR_HYNIX 0xad +#define NAND_MFR_MICRON 0x2c + +/* ecc.c */ +struct ecc_state_s { + uint8_t cp; /* Column parity */ + uint16_t lp[2]; /* Line parity */ + uint16_t count; +}; + +uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample); +void ecc_reset(struct ecc_state_s *s); +void ecc_put(QEMUFile *f, struct ecc_state_s *s); +void ecc_get(QEMUFile *f, struct ecc_state_s *s); + diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index af63a4155..91d426102 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -23,8 +23,10 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" #include "ppc_mac.h" +#include "pci.h" + typedef target_phys_addr_t pci_addr_t; #include "pci_host.h" diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index 65e16b2f7..07f046a92 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -22,7 +22,10 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "mips.h" +#include "pci.h" +#include "pc.h" typedef target_phys_addr_t pci_addr_t; #include "pci_host.h" diff --git a/hw/gumstix.c b/hw/gumstix.c index 235bd2e3a..0b6dd0b3f 100644 --- a/hw/gumstix.c +++ b/hw/gumstix.c @@ -8,7 +8,13 @@ * This code is licensed under the GNU GPL v2. */ -#include "vl.h" +#include "hw.h" +#include "pxa.h" +#include "net.h" +#include "flash.h" +#include "sysemu.h" +#include "devices.h" +#include "boards.h" /* Board init. */ enum gumstix_model_e { connex }; diff --git a/hw/heathrow_pic.c b/hw/heathrow_pic.c index 44dc97a2d..dc2a30c85 100644 --- a/hw/heathrow_pic.c +++ b/hw/heathrow_pic.c @@ -22,7 +22,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" #include "ppc_mac.h" //#define DEBUG diff --git a/hw/hw.h b/hw/hw.h new file mode 100644 index 000000000..3589adee3 --- /dev/null +++ b/hw/hw.h @@ -0,0 +1,99 @@ +/* Declarations for use by hardware emulation. */ +#ifndef QEMU_HW_H +#define QEMU_HW_H + +#include "qemu-common.h" +#include "irq.h" + +/* VM Load/Save */ + +QEMUFile *qemu_fopen(const char *filename, const char *mode); +void qemu_fflush(QEMUFile *f); +void qemu_fclose(QEMUFile *f); +void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); +void qemu_put_byte(QEMUFile *f, int v); +void qemu_put_be16(QEMUFile *f, unsigned int v); +void qemu_put_be32(QEMUFile *f, unsigned int v); +void qemu_put_be64(QEMUFile *f, uint64_t v); +int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); +int qemu_get_byte(QEMUFile *f); +unsigned int qemu_get_be16(QEMUFile *f); +unsigned int qemu_get_be32(QEMUFile *f); +uint64_t qemu_get_be64(QEMUFile *f); + +static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) +{ + qemu_put_be64(f, *pv); +} + +static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) +{ + qemu_put_be32(f, *pv); +} + +static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) +{ + qemu_put_be16(f, *pv); +} + +static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) +{ + qemu_put_byte(f, *pv); +} + +static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) +{ + *pv = qemu_get_be64(f); +} + +static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) +{ + *pv = qemu_get_be32(f); +} + +static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) +{ + *pv = qemu_get_be16(f); +} + +static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) +{ + *pv = qemu_get_byte(f); +} + +#ifdef NEED_CPU_H +#if TARGET_LONG_BITS == 64 +#define qemu_put_betl qemu_put_be64 +#define qemu_get_betl qemu_get_be64 +#define qemu_put_betls qemu_put_be64s +#define qemu_get_betls qemu_get_be64s +#else +#define qemu_put_betl qemu_put_be32 +#define qemu_get_betl qemu_get_be32 +#define qemu_put_betls qemu_put_be32s +#define qemu_get_betls qemu_get_be32s +#endif +#endif + +int64_t qemu_ftell(QEMUFile *f); +int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); + +typedef void SaveStateHandler(QEMUFile *f, void *opaque); +typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); + +int register_savevm(const char *idstr, + int instance_id, + int version_id, + SaveStateHandler *save_state, + LoadStateHandler *load_state, + void *opaque); + +typedef void QEMUResetHandler(void *opaque); + +void qemu_register_reset(QEMUResetHandler *func, void *opaque); + +/* These should really be in isa.h, but are here to make pc.h happy. */ +typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); +typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); + +#endif @@ -7,7 +7,8 @@ * This code is licenced under the LGPL. */ -#include "vl.h" +#include "hw.h" +#include "i2c.h" struct i2c_bus { @@ -30,7 +31,7 @@ i2c_slave *i2c_slave_init(i2c_bus *bus, int address, int size) i2c_slave *dev; if (size < sizeof(i2c_slave)) - cpu_abort(cpu_single_env, "I2C struct too small"); + hw_error("I2C struct too small"); dev = (i2c_slave *)qemu_mallocz(size); dev->address = address; @@ -13,8 +13,6 @@ enum i2c_event { I2C_NACK /* Masker NACKed a receive byte. */ }; -typedef struct i2c_slave i2c_slave; - /* Master to slave. */ typedef int (*i2c_send_cb)(i2c_slave *s, uint8_t data); /* Slave to master. */ @@ -34,8 +32,6 @@ struct i2c_slave void *next; }; -typedef struct i2c_bus i2c_bus; - i2c_bus *i2c_init_bus(void); i2c_slave *i2c_slave_init(i2c_bus *bus, int address, int size); void i2c_set_slave_address(i2c_slave *dev, int address); @@ -50,6 +46,14 @@ void i2c_bus_load(QEMUFile *f, i2c_bus *bus); void i2c_slave_save(QEMUFile *f, i2c_slave *dev); void i2c_slave_load(QEMUFile *f, i2c_slave *dev); +/* max111x.c */ +struct max111x_s; +uint32_t max111x_read(void *opaque); +void max111x_write(void *opaque, uint32_t value); +struct max111x_s *max1110_init(qemu_irq cb); +struct max111x_s *max1111_init(qemu_irq cb); +void max111x_set_input(struct max111x_s *s, int line, uint8_t value); + /* max7310.c */ i2c_slave *max7310_init(i2c_bus *bus); void max7310_reset(i2c_slave *i2c); @@ -64,4 +68,7 @@ void wm8750_data_req_set(i2c_slave *i2c, void wm8750_dac_dat(void *opaque, uint32_t sample); uint32_t wm8750_adc_dat(void *opaque); +/* ssd0303.c */ +void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address); + #endif diff --git a/hw/i8254.c b/hw/i8254.c index 54407de4d..0c59aa3f6 100644 --- a/hw/i8254.c +++ b/hw/i8254.c @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "isa.h" +#include "qemu-timer.h" //#define DEBUG_PIT diff --git a/hw/i8259.c b/hw/i8259.c index 1e256d96b..23e66a804 100644 --- a/hw/i8259.c +++ b/hw/i8259.c @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "isa.h" +#include "console.h" /* debug PIC */ //#define DEBUG_PIC @@ -22,7 +22,14 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "pci.h" +#include "scsi-disk.h" +#include "pcmcia.h" +#include "block.h" +#include "qemu-timer.h" +#include "sysemu.h" /* debug IDE devices */ //#define DEBUG_IDE diff --git a/hw/integratorcp.c b/hw/integratorcp.c index 31e7d7d0e..621122631 100644 --- a/hw/integratorcp.c +++ b/hw/integratorcp.c @@ -7,8 +7,13 @@ * This code is licenced under the GPL */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "primecell.h" +#include "devices.h" +#include "sysemu.h" +#include "boards.h" +#include "arm-misc.h" +#include "net.h" void DMA_run (void) { diff --git a/hw/iommu.c b/hw/iommu.c index c90f09bca..adc3bc015 100644 --- a/hw/iommu.c +++ b/hw/iommu.c @@ -21,7 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sun4m.h" /* debug iommu */ //#define DEBUG_IOMMU @@ -21,7 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "qemu-common.h" +#include "irq.h" struct IRQState { qemu_irq_handler handler; @@ -1,8 +1,11 @@ +#ifndef QEMU_IRQ_H +#define QEMU_IRQ_H + /* Generic IRQ/GPIO pin infrastructure. */ +/* FIXME: Rmove one of these. */ typedef void (*qemu_irq_handler)(void *opaque, int n, int level); - -typedef struct IRQState *qemu_irq; +typedef void SetIRQFunc(void *opaque, int irq_num, int level); void qemu_set_irq(qemu_irq irq, int level); @@ -21,3 +24,5 @@ qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n); /* Returns a new IRQ with opposite polarity. */ qemu_irq qemu_irq_invert(qemu_irq irq); + +#endif diff --git a/hw/isa.h b/hw/isa.h new file mode 100644 index 000000000..89b3004a5 --- /dev/null +++ b/hw/isa.h @@ -0,0 +1,24 @@ +/* ISA bus */ + +extern target_phys_addr_t isa_mem_base; + +int register_ioport_read(int start, int length, int size, + IOPortReadFunc *func, void *opaque); +int register_ioport_write(int start, int length, int size, + IOPortWriteFunc *func, void *opaque); +void isa_unassign_ioport(int start, int length); + +void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size); + +/* dma.c */ +int DMA_get_channel_mode (int nchan); +int DMA_read_memory (int nchan, void *buf, int pos, int size); +int DMA_write_memory (int nchan, void *buf, int pos, int size); +void DMA_hold_DREQ (int nchan); +void DMA_release_DREQ (int nchan); +void DMA_schedule(int nchan); +void DMA_run (void); +void DMA_init (int high_page_enable); +void DMA_register_channel (int nchan, + DMA_transfer_handler transfer_handler, + void *opaque); diff --git a/hw/isa_mmio.c b/hw/isa_mmio.c index 4e7914e6b..351961120 100644 --- a/hw/isa_mmio.c +++ b/hw/isa_mmio.c @@ -22,7 +22,8 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "isa.h" static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr, uint32_t val) diff --git a/hw/jazz_led.c b/hw/jazz_led.c index 1c7c176ed..a0eea26b5 100644 --- a/hw/jazz_led.c +++ b/hw/jazz_led.c @@ -22,7 +22,9 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "mips.h" +#include "console.h" #include "pixel_ops.h" //#define DEBUG_LED diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c index e9866baac..c841db184 100644 --- a/hw/lsi53c895a.c +++ b/hw/lsi53c895a.c @@ -10,7 +10,9 @@ /* ??? Need to check if the {read,write}[wl] routines work properly on big-endian targets. */ -#include "vl.h" +#include "hw.h" +#include "pci.h" +#include "scsi-disk.h" //#define DEBUG_LSI //#define DEBUG_LSI_REG diff --git a/hw/m48t59.c b/hw/m48t59.c index 34979ad10..57291faa9 100644 --- a/hw/m48t59.c +++ b/hw/m48t59.c @@ -21,8 +21,11 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" -#include "m48t59.h" +#include "hw.h" +#include "nvram.h" +#include "isa.h" +#include "qemu-timer.h" +#include "sysemu.h" //#define DEBUG_NVRAM diff --git a/hw/m48t59.h b/hw/m48t59.h deleted file mode 100644 index f2eb4b1e3..000000000 --- a/hw/m48t59.h +++ /dev/null @@ -1,13 +0,0 @@ -#if !defined (__M48T59_H__) -#define __M48T59_H__ - -typedef struct m48t59_t m48t59_t; - -void m48t59_write (void *private, uint32_t addr, uint32_t val); -uint32_t m48t59_read (void *private, uint32_t addr); -void m48t59_toggle_lock (void *private, int lock); -m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base, - uint32_t io_base, uint16_t size, - int type); - -#endif /* !defined (__M48T59_H__) */ diff --git a/hw/mac_dbdma.c b/hw/mac_dbdma.c index 62c9746e7..74003e60a 100644 --- a/hw/mac_dbdma.c +++ b/hw/mac_dbdma.c @@ -22,7 +22,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" #include "ppc_mac.h" /* DBDMA: currently no op - should suffice right now */ diff --git a/hw/mac_nvram.c b/hw/mac_nvram.c index 8997abb9e..7304ac27e 100644 --- a/hw/mac_nvram.c +++ b/hw/mac_nvram.c @@ -22,7 +22,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" #include "ppc_mac.h" struct MacIONVRAMState { diff --git a/hw/macio.c b/hw/macio.c index 5a5db4773..7f0d9f791 100644 --- a/hw/macio.c +++ b/hw/macio.c @@ -22,8 +22,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" #include "ppc_mac.h" +#include "pci.h" typedef struct macio_state_t macio_state_t; struct macio_state_t { diff --git a/hw/max111x.c b/hw/max111x.c index 8425bee57..cc3ded1df 100644 --- a/hw/max111x.c +++ b/hw/max111x.c @@ -7,7 +7,8 @@ * This code is licensed under the GNU GPLv2. */ -#include <vl.h> +#include "hw.h" +#include "i2c.h" struct max111x_s { qemu_irq interrupt; diff --git a/hw/max7310.c b/hw/max7310.c index 6b180d9b6..75e56c719 100644 --- a/hw/max7310.c +++ b/hw/max7310.c @@ -7,7 +7,8 @@ * This file is licensed under GNU GPL. */ -#include "vl.h" +#include "hw.h" +#include "i2c.h" struct max7310_s { i2c_slave i2c; @@ -182,7 +183,7 @@ static void max7310_gpio_set(void *opaque, int line, int level) { struct max7310_s *s = (struct max7310_s *) opaque; if (line >= sizeof(s->handler) / sizeof(*s->handler) || line < 0) - cpu_abort(cpu_single_env, "bad GPIO line"); + hw_error("bad GPIO line"); if (level) s->level |= s->direction & (1 << line); @@ -220,7 +221,7 @@ void max7310_gpio_out_set(i2c_slave *i2c, int line, qemu_irq handler) { struct max7310_s *s = (struct max7310_s *) i2c; if (line >= sizeof(s->handler) / sizeof(*s->handler) || line < 0) - cpu_abort(cpu_single_env, "bad GPIO line"); + hw_error("bad GPIO line"); s->handler[line] = handler; } diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index be9c63db2..8c8076b26 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -21,7 +21,11 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "qemu-timer.h" +#include "sysemu.h" +#include "pc.h" +#include "isa.h" //#define DEBUG_CMOS diff --git a/hw/mcf.h b/hw/mcf.h new file mode 100644 index 000000000..91f2821f1 --- /dev/null +++ b/hw/mcf.h @@ -0,0 +1,21 @@ +#ifndef HW_MCF_H +#define HW_MCF_H +/* Motorola ColdFire device prototypes. */ + +/* mcf_uart.c */ +uint32_t mcf_uart_read(void *opaque, target_phys_addr_t addr); +void mcf_uart_write(void *opaque, target_phys_addr_t addr, uint32_t val); +void *mcf_uart_init(qemu_irq irq, CharDriverState *chr); +void mcf_uart_mm_init(target_phys_addr_t base, qemu_irq irq, + CharDriverState *chr); + +/* mcf_intc.c */ +qemu_irq *mcf_intc_init(target_phys_addr_t base, CPUState *env); + +/* mcf_fec.c */ +void mcf_fec_init(NICInfo *nd, target_phys_addr_t base, qemu_irq *irq); + +/* mcf5206.c */ +qemu_irq *mcf5206_init(uint32_t base, CPUState *env); + +#endif diff --git a/hw/mcf5206.c b/hw/mcf5206.c index 32117ae52..449ca12f5 100644 --- a/hw/mcf5206.c +++ b/hw/mcf5206.c @@ -5,7 +5,10 @@ * * This code is licenced under the GPL */ -#include "vl.h" +#include "hw.h" +#include "mcf.h" +#include "qemu-timer.h" +#include "sysemu.h" /* General purpose timer module. */ typedef struct { diff --git a/hw/mcf5208.c b/hw/mcf5208.c index 93f78906d..b3389f079 100644 --- a/hw/mcf5208.c +++ b/hw/mcf5208.c @@ -5,7 +5,12 @@ * * This code is licenced under the GPL */ -#include "vl.h" +#include "hw.h" +#include "mcf.h" +#include "qemu-timer.h" +#include "sysemu.h" +#include "net.h" +#include "boards.h" #define SYS_FREQ 66000000 diff --git a/hw/mcf_fec.c b/hw/mcf_fec.c index a21810806..c5482c9e1 100644 --- a/hw/mcf_fec.c +++ b/hw/mcf_fec.c @@ -5,7 +5,9 @@ * * This code is licenced under the GPL */ -#include "vl.h" +#include "hw.h" +#include "net.h" +#include "mcf.h" /* For crc32 */ #include <zlib.h> diff --git a/hw/mcf_intc.c b/hw/mcf_intc.c index e469c3119..4e99aeb4f 100644 --- a/hw/mcf_intc.c +++ b/hw/mcf_intc.c @@ -5,7 +5,8 @@ * * This code is licenced under the GPL */ -#include "vl.h" +#include "hw.h" +#include "mcf.h" typedef struct { uint64_t ipr; diff --git a/hw/mcf_uart.c b/hw/mcf_uart.c index ab0f54f4d..01973a02f 100644 --- a/hw/mcf_uart.c +++ b/hw/mcf_uart.c @@ -5,7 +5,9 @@ * * This code is licenced under the GPL */ -#include "vl.h" +#include "hw.h" +#include "mcf.h" +#include "qemu-char.h" typedef struct { uint8_t mr[2]; diff --git a/hw/mips.h b/hw/mips.h new file mode 100644 index 000000000..0196b6ced --- /dev/null +++ b/hw/mips.h @@ -0,0 +1,25 @@ +#ifndef HW_MIPS_H +#define HW_MIPS_H +/* Definitions for mips board emulation. */ + +/* gt64xxx.c */ +PCIBus *pci_gt64120_init(qemu_irq *pic); + +/* ds1225y.c */ +typedef struct ds1225y_t ds1225y_t; +ds1225y_t *ds1225y_init(target_phys_addr_t mem_base, const char *filename); + +/* mipsnet.c */ +void mipsnet_init(int base, qemu_irq irq, NICInfo *nd); + +/* jazz_led.c */ +extern void jazz_led_init(DisplayState *ds, target_phys_addr_t base); + +/* mips_int.c */ +extern void cpu_mips_irq_init_cpu(CPUState *env); + +/* mips_timer.c */ +extern void cpu_mips_clock_init(CPUState *); +extern void cpu_mips_irqctrl_init (void); + +#endif diff --git a/hw/mips_int.c b/hw/mips_int.c index f4e22dcf8..ad48b4f70 100644 --- a/hw/mips_int.c +++ b/hw/mips_int.c @@ -1,4 +1,5 @@ -#include "vl.h" +#include "hw.h" +#include "mips.h" #include "cpu.h" /* Raise IRQ to CPU if necessary. It must be called every time the active diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 2c193be23..9ce8232fd 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -22,7 +22,17 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "net.h" +#include "boards.h" +#include "smbus.h" +#include "mips.h" +#include "pci.h" +#include "qemu-char.h" +#include "sysemu.h" +#include "audio/audio.h" +#include "boards.h" #ifdef TARGET_WORDS_BIGENDIAN #define BIOS_FILENAME "mips_bios.bin" diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c index 0c755a9ed..b9eec84f6 100644 --- a/hw/mips_mipssim.c +++ b/hw/mips_mipssim.c @@ -24,7 +24,13 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "mips.h" +#include "pc.h" +#include "isa.h" +#include "net.h" +#include "sysemu.h" +#include "boards.h" #ifdef TARGET_WORDS_BIGENDIAN #define BIOS_FILENAME "mips_bios.bin" diff --git a/hw/mips_pica61.c b/hw/mips_pica61.c index 97c5ced4d..6e9f34505 100644 --- a/hw/mips_pica61.c +++ b/hw/mips_pica61.c @@ -22,7 +22,13 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "mips.h" +#include "isa.h" +#include "pc.h" +#include "fdc.h" +#include "sysemu.h" +#include "boards.h" #ifdef TARGET_WORDS_BIGENDIAN #define BIOS_FILENAME "mips_bios.bin" diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index acdb384cd..42effb365 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -7,7 +7,13 @@ * All peripherial devices are attached to this "bus" with * the standard PC ISA addresses. */ -#include "vl.h" +#include "hw.h" +#include "mips.h" +#include "pc.h" +#include "isa.h" +#include "net.h" +#include "sysemu.h" +#include "boards.h" #ifdef TARGET_WORDS_BIGENDIAN #define BIOS_FILENAME "mips_bios.bin" diff --git a/hw/mips_timer.c b/hw/mips_timer.c index b295bdbfe..3e7d5e3ee 100644 --- a/hw/mips_timer.c +++ b/hw/mips_timer.c @@ -1,4 +1,6 @@ -#include "vl.h" +#include "hw.h" +#include "mips.h" +#include "qemu-timer.h" void cpu_mips_irqctrl_init (void) { diff --git a/hw/mipsnet.c b/hw/mipsnet.c index 97bc276b7..5a74ad962 100644 --- a/hw/mipsnet.c +++ b/hw/mipsnet.c @@ -1,4 +1,7 @@ -#include "vl.h" +#include "hw.h" +#include "mips.h" +#include "net.h" +#include "isa.h" //#define DEBUG_MIPSNET_SEND //#define DEBUG_MIPSNET_RECEIVE diff --git a/hw/mpcore.c b/hw/mpcore.c index cc33208e0..d5b28fe4b 100644 --- a/hw/mpcore.c +++ b/hw/mpcore.c @@ -7,7 +7,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "qemu-timer.h" +#include "primecell.h" #define MPCORE_PRIV_BASE 0x10100000 #define NCPU 4 @@ -11,7 +11,11 @@ #ifndef NAND_IO -# include "vl.h" +# include "hw.h" +# include "flash.h" +# include "block.h" +/* FIXME: Pass block device as an argument. */ +# include "sysemu.h" # define NAND_CMD_READ0 0x00 # define NAND_CMD_READ1 0x01 diff --git a/hw/ne2000.c b/hw/ne2000.c index 689216c6a..92023eb71 100644 --- a/hw/ne2000.c +++ b/hw/ne2000.c @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pci.h" +#include "net.h" /* debug NE2000 card */ //#define DEBUG_NE2000 diff --git a/hw/nvram.h b/hw/nvram.h new file mode 100644 index 000000000..174704bf6 --- /dev/null +++ b/hw/nvram.h @@ -0,0 +1,41 @@ +#ifndef NVRAM_H +#define NVRAM_H + +/* NVRAM helpers */ +typedef uint32_t (*nvram_read_t)(void *private, uint32_t addr); +typedef void (*nvram_write_t)(void *private, uint32_t addr, uint32_t val); +typedef struct nvram_t { + void *opaque; + nvram_read_t read_fn; + nvram_write_t write_fn; +} nvram_t; + +void NVRAM_set_byte (nvram_t *nvram, uint32_t addr, uint8_t value); +uint8_t NVRAM_get_byte (nvram_t *nvram, uint32_t addr); +void NVRAM_set_word (nvram_t *nvram, uint32_t addr, uint16_t value); +uint16_t NVRAM_get_word (nvram_t *nvram, uint32_t addr); +void NVRAM_set_lword (nvram_t *nvram, uint32_t addr, uint32_t value); +uint32_t NVRAM_get_lword (nvram_t *nvram, uint32_t addr); +void NVRAM_set_string (nvram_t *nvram, uint32_t addr, + const unsigned char *str, uint32_t max); +int NVRAM_get_string (nvram_t *nvram, uint8_t *dst, uint16_t addr, int max); +void NVRAM_set_crc (nvram_t *nvram, uint32_t addr, + uint32_t start, uint32_t count); +int PPC_NVRAM_set_params (nvram_t *nvram, uint16_t NVRAM_size, + const unsigned char *arch, + uint32_t RAM_size, int boot_device, + uint32_t kernel_image, uint32_t kernel_size, + const char *cmdline, + uint32_t initrd_image, uint32_t initrd_size, + uint32_t NVRAM_image, + int width, int height, int depth); +typedef struct m48t59_t m48t59_t; + +void m48t59_write (void *private, uint32_t addr, uint32_t val); +uint32_t m48t59_read (void *private, uint32_t addr); +void m48t59_toggle_lock (void *private, int lock); +m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base, + uint32_t io_base, uint16_t size, + int type); + +#endif /* !NVRAM_H */ @@ -18,8 +18,13 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "arm-misc.h" +#include "omap.h" +#include "sysemu.h" +#include "qemu-timer.h" +/* We use pc-style serial ports. */ +#include "pc.h" /* Should signal the TCMI */ uint32_t omap_badwidth_read8(void *opaque, target_phys_addr_t addr) @@ -4716,7 +4721,7 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size, omap_dpll_init(&s->dpll[1], 0xfffed000, omap_findclk(s, "dpll2")); omap_dpll_init(&s->dpll[2], 0xfffed100, omap_findclk(s, "dpll3")); - s->mmc = omap_mmc_init(0xfffb7800, s->irq[1][OMAP_INT_OQN], + s->mmc = omap_mmc_init(0xfffb7800, sd_bdrv, s->irq[1][OMAP_INT_OQN], &s->drq[OMAP_DMA_MMC_TX], omap_findclk(s, "mmc_ck")); s->mpuio = omap_mpuio_init(0xfffb5000, @@ -513,6 +513,7 @@ struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq, /* omap_mmc.c */ struct omap_mmc_s; struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base, + BlockDriverState *bd, qemu_irq irq, qemu_irq dma[], omap_clk clk); void omap_mmc_reset(struct omap_mmc_s *s); void omap_mmc_handlers(struct omap_mmc_s *s, qemu_irq ro, qemu_irq cover); @@ -788,4 +789,10 @@ inline static int debug_register_io_memory(int io_index, # define cpu_register_io_memory debug_register_io_memory # endif +/* Not really omap specific, but is the only thing that uses the + uwire interface. */ +/* tsc210x.c */ +struct uwire_slave_s *tsc2102_init(qemu_irq pint, AudioState *audio); +struct i2s_codec_s *tsc210x_codec(struct uwire_slave_s *chip); + #endif /* hw_omap_h */ diff --git a/hw/omap1_clk.c b/hw/omap1_clk.c index b2ec23c13..37daec266 100644 --- a/hw/omap1_clk.c +++ b/hw/omap1_clk.c @@ -20,7 +20,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#include "vl.h" +#include "hw.h" +#include "omap.h" struct clk { const char *name; diff --git a/hw/omap_i2c.c b/hw/omap_i2c.c index 878c046ce..fd37974cc 100644 --- a/hw/omap_i2c.c +++ b/hw/omap_i2c.c @@ -18,7 +18,9 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#include "vl.h" +#include "hw.h" +#include "i2c.h" +#include "omap.h" struct omap_i2c_s { target_phys_addr_t base; diff --git a/hw/omap_lcdc.c b/hw/omap_lcdc.c index 543d1f2bd..c6565d1db 100644 --- a/hw/omap_lcdc.c +++ b/hw/omap_lcdc.c @@ -18,7 +18,9 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#include "vl.h" +#include "hw.h" +#include "console.h" +#include "omap.h" struct omap_lcd_panel_s { target_phys_addr_t base; diff --git a/hw/omap_mmc.c b/hw/omap_mmc.c index 30ba9b685..0a7ae8712 100644 --- a/hw/omap_mmc.c +++ b/hw/omap_mmc.c @@ -18,7 +18,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#include "vl.h" +#include "hw.h" +#include "omap.h" #include "sd.h" struct omap_mmc_s { @@ -507,6 +508,7 @@ void omap_mmc_reset(struct omap_mmc_s *host) } struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base, + BlockDriverState *bd, qemu_irq irq, qemu_irq dma[], omap_clk clk) { int iomemtype; @@ -523,7 +525,7 @@ struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base, cpu_register_physical_memory(s->base, 0x800, iomemtype); /* Instantiate the storage */ - s->card = sd_init(sd_bdrv); + s->card = sd_init(bd); return s; } diff --git a/hw/openpic.c b/hw/openpic.c index 54830c31b..32cf54e48 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -32,7 +32,9 @@ * Serial interrupts, as implemented in Raven chipset are not supported yet. * */ -#include "vl.h" +#include "hw.h" +#include "ppc_mac.h" +#include "pci.h" //#define DEBUG_OPENPIC @@ -18,7 +18,13 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#include "vl.h" +#include "hw.h" +#include "audio/audio.h" +#include "sysemu.h" +#include "console.h" +#include "omap.h" +#include "boards.h" +#include "arm-misc.h" static uint32_t static_readb(void *opaque, target_phys_addr_t offset) { diff --git a/hw/parallel.c b/hw/parallel.c index bda3f3a20..dfcd5c2c3 100644 --- a/hw/parallel.c +++ b/hw/parallel.c @@ -22,7 +22,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "qemu-char.h" +#include "isa.h" +#include "pc.h" //#define DEBUG_PARALLEL @@ -21,7 +21,16 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "fdc.h" +#include "pci.h" +#include "block.h" +#include "sysemu.h" +#include "audio/audio.h" +#include "net.h" +#include "smbus.h" +#include "boards.h" /* output Bochs bios info messages */ //#define DEBUG_BIOS diff --git a/hw/pc.h b/hw/pc.h new file mode 100644 index 000000000..beb711c0c --- /dev/null +++ b/hw/pc.h @@ -0,0 +1,145 @@ +#ifndef HW_PC_H +#define HW_PC_H +/* PC-style peripherals (also used by other machines). */ + +/* serial.c */ + +SerialState *serial_init(int base, qemu_irq irq, CharDriverState *chr); +SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, + qemu_irq irq, CharDriverState *chr, + int ioregister); +uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr); +void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value); +uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr); +void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value); +uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr); +void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value); + +/* parallel.c */ + +typedef struct ParallelState ParallelState; +ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr); +ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr); + +/* i8259.c */ + +typedef struct PicState2 PicState2; +extern PicState2 *isa_pic; +void pic_set_irq(int irq, int level); +void pic_set_irq_new(void *opaque, int irq, int level); +qemu_irq *i8259_init(qemu_irq parent_irq); +void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, + void *alt_irq_opaque); +int pic_read_irq(PicState2 *s); +void pic_update_irq(PicState2 *s); +uint32_t pic_intack_read(PicState2 *s); +void pic_info(void); +void irq_info(void); + +/* APIC */ +typedef struct IOAPICState IOAPICState; + +int apic_init(CPUState *env); +int apic_accept_pic_intr(CPUState *env); +int apic_get_interrupt(CPUState *env); +IOAPICState *ioapic_init(void); +void ioapic_set_irq(void *opaque, int vector, int level); + +/* i8254.c */ + +#define PIT_FREQ 1193182 + +typedef struct PITState PITState; + +PITState *pit_init(int base, qemu_irq irq); +void pit_set_gate(PITState *pit, int channel, int val); +int pit_get_gate(PITState *pit, int channel); +int pit_get_initial_count(PITState *pit, int channel); +int pit_get_mode(PITState *pit, int channel); +int pit_get_out(PITState *pit, int channel, int64_t current_time); + +/* vmport.c */ +void vmport_init(CPUState *env); +void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque); + +/* vmmouse.c */ +void *vmmouse_init(void *m); + +/* pckbd.c */ + +void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); +void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, + target_phys_addr_t base, int it_shift); + +/* mc146818rtc.c */ + +typedef struct RTCState RTCState; + +RTCState *rtc_init(int base, qemu_irq irq); +RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq); +void rtc_set_memory(RTCState *s, int addr, int val); +void rtc_set_date(RTCState *s, const struct tm *tm); + +/* pc.c */ +extern int fd_bootchk; + +void ioport_set_a20(int enable); +int ioport_get_a20(void); + +/* acpi.c */ +extern int acpi_enabled; +i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base); +void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); +void acpi_bios_init(void); + +/* pcspk.c */ +void pcspk_init(PITState *); +int pcspk_audio_init(AudioState *, qemu_irq *pic); + +/* piix_pci.c */ +PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic); +void i440fx_set_smm(PCIDevice *d, int val); +int piix3_init(PCIBus *bus, int devfn); +void i440fx_init_memory_mappings(PCIDevice *d); + +int piix4_init(PCIBus *bus, int devfn); + +/* vga.c */ + +#ifndef TARGET_SPARC +#define VGA_RAM_SIZE (8192 * 1024) +#else +#define VGA_RAM_SIZE (9 * 1024 * 1024) +#endif + +int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base, + unsigned long vga_ram_offset, int vga_ram_size); +int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, + unsigned long vga_ram_offset, int vga_ram_size, + unsigned long vga_bios_offset, int vga_bios_size); +int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base, + unsigned long vga_ram_offset, int vga_ram_size, + target_phys_addr_t vram_base, target_phys_addr_t ctrl_base, + int it_shift); + +/* cirrus_vga.c */ +void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, + unsigned long vga_ram_offset, int vga_ram_size); +void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, + unsigned long vga_ram_offset, int vga_ram_size); + +/* ide.c */ +void isa_ide_init(int iobase, int iobase2, qemu_irq irq, + BlockDriverState *hd0, BlockDriverState *hd1); +void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, + int secondary_ide_enabled); +void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, + qemu_irq *pic); +void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, + qemu_irq *pic); + +/* ne2000.c */ + +void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd); + +#endif @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pci.h" +#include "console.h" +#include "net.h" //#define DEBUG_PCI diff --git a/hw/pci.h b/hw/pci.h new file mode 100644 index 000000000..075754514 --- /dev/null +++ b/hw/pci.h @@ -0,0 +1,138 @@ +#ifndef QEMU_PCI_H +#define QEMU_PCI_H + +/* PCI includes legacy ISA access. */ +#include "isa.h" + +/* PCI bus */ + +extern target_phys_addr_t pci_mem_base; + +typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, + uint32_t address, uint32_t data, int len); +typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, + uint32_t address, int len); +typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, + uint32_t addr, uint32_t size, int type); + +#define PCI_ADDRESS_SPACE_MEM 0x00 +#define PCI_ADDRESS_SPACE_IO 0x01 +#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 + +typedef struct PCIIORegion { + uint32_t addr; /* current PCI mapping address. -1 means not mapped */ + uint32_t size; + uint8_t type; + PCIMapIORegionFunc *map_func; +} PCIIORegion; + +#define PCI_ROM_SLOT 6 +#define PCI_NUM_REGIONS 7 + +#define PCI_DEVICES_MAX 64 + +#define PCI_VENDOR_ID 0x00 /* 16 bits */ +#define PCI_DEVICE_ID 0x02 /* 16 bits */ +#define PCI_COMMAND 0x04 /* 16 bits */ +#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ +#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ +#define PCI_CLASS_DEVICE 0x0a /* Device class */ +#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ +#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ +#define PCI_MIN_GNT 0x3e /* 8 bits */ +#define PCI_MAX_LAT 0x3f /* 8 bits */ + +struct PCIDevice { + /* PCI config space */ + uint8_t config[256]; + + /* the following fields are read only */ + PCIBus *bus; + int devfn; + char name[64]; + PCIIORegion io_regions[PCI_NUM_REGIONS]; + + /* do not access the following fields */ + PCIConfigReadFunc *config_read; + PCIConfigWriteFunc *config_write; + /* ??? This is a PC-specific hack, and should be removed. */ + int irq_index; + + /* IRQ objects for the INTA-INTD pins. */ + qemu_irq *irq; + + /* Current IRQ levels. Used internally by the generic PCI code. */ + int irq_state[4]; +}; + +PCIDevice *pci_register_device(PCIBus *bus, const char *name, + int instance_size, int devfn, + PCIConfigReadFunc *config_read, + PCIConfigWriteFunc *config_write); + +void pci_register_io_region(PCIDevice *pci_dev, int region_num, + uint32_t size, int type, + PCIMapIORegionFunc *map_func); + +uint32_t pci_default_read_config(PCIDevice *d, + uint32_t address, int len); +void pci_default_write_config(PCIDevice *d, + uint32_t address, uint32_t val, int len); +void pci_device_save(PCIDevice *s, QEMUFile *f); +int pci_device_load(PCIDevice *s, QEMUFile *f); + +typedef void (*pci_set_irq_fn)(qemu_irq *pic, int irq_num, int level); +typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); +PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, + qemu_irq *pic, int devfn_min, int nirq); + +void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn); +void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); +uint32_t pci_data_read(void *opaque, uint32_t addr, int len); +int pci_bus_num(PCIBus *s); +void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)); + +void pci_info(void); +PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id, + pci_map_irq_fn map_irq, const char *name); + +/* lsi53c895a.c */ +void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); +void *lsi_scsi_init(PCIBus *bus, int devfn); + +/* vmware_vga.c */ +void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, + unsigned long vga_ram_offset, int vga_ram_size); + +/* usb-uhci.c */ +void usb_uhci_piix3_init(PCIBus *bus, int devfn); +void usb_uhci_piix4_init(PCIBus *bus, int devfn); + +/* usb-ohci.c */ +void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn); + +/* eepro100.c */ + +void pci_i82551_init(PCIBus *bus, NICInfo *nd, int devfn); +void pci_i82557b_init(PCIBus *bus, NICInfo *nd, int devfn); +void pci_i82559er_init(PCIBus *bus, NICInfo *nd, int devfn); + +/* ne2000.c */ + +void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn); + +/* rtl8139.c */ + +void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn); + +/* pcnet.c */ +void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn); + +/* prep_pci.c */ +PCIBus *pci_prep_init(qemu_irq *pic); + +/* apb_pci.c */ +PCIBus *pci_apb_init(target_phys_addr_t special_base, target_phys_addr_t mem_base, + qemu_irq *pic); + +#endif diff --git a/hw/pckbd.c b/hw/pckbd.c index 9b96b1cba..738ce61d6 100644 --- a/hw/pckbd.c +++ b/hw/pckbd.c @@ -21,7 +21,11 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "isa.h" +#include "pc.h" +#include "ps2.h" +#include "sysemu.h" /* debug PC keyboard */ //#define DEBUG_KBD diff --git a/hw/pcmcia.h b/hw/pcmcia.h new file mode 100644 index 000000000..bfa23babe --- /dev/null +++ b/hw/pcmcia.h @@ -0,0 +1,50 @@ +/* PCMCIA/Cardbus */ + +struct pcmcia_socket_s { + qemu_irq irq; + int attached; + const char *slot_string; + const char *card_string; +}; + +void pcmcia_socket_register(struct pcmcia_socket_s *socket); +void pcmcia_socket_unregister(struct pcmcia_socket_s *socket); +void pcmcia_info(void); + +struct pcmcia_card_s { + void *state; + struct pcmcia_socket_s *slot; + int (*attach)(void *state); + int (*detach)(void *state); + const uint8_t *cis; + int cis_len; + + /* Only valid if attached */ + uint8_t (*attr_read)(void *state, uint32_t address); + void (*attr_write)(void *state, uint32_t address, uint8_t value); + uint16_t (*common_read)(void *state, uint32_t address); + void (*common_write)(void *state, uint32_t address, uint16_t value); + uint16_t (*io_read)(void *state, uint32_t address); + void (*io_write)(void *state, uint32_t address, uint16_t value); +}; + +#define CISTPL_DEVICE 0x01 /* 5V Device Information Tuple */ +#define CISTPL_NO_LINK 0x14 /* No Link Tuple */ +#define CISTPL_VERS_1 0x15 /* Level 1 Version Tuple */ +#define CISTPL_JEDEC_C 0x18 /* JEDEC ID Tuple */ +#define CISTPL_JEDEC_A 0x19 /* JEDEC ID Tuple */ +#define CISTPL_CONFIG 0x1a /* Configuration Tuple */ +#define CISTPL_CFTABLE_ENTRY 0x1b /* 16-bit PCCard Configuration */ +#define CISTPL_DEVICE_OC 0x1c /* Additional Device Information */ +#define CISTPL_DEVICE_OA 0x1d /* Additional Device Information */ +#define CISTPL_DEVICE_GEO 0x1e /* Additional Device Information */ +#define CISTPL_DEVICE_GEO_A 0x1f /* Additional Device Information */ +#define CISTPL_MANFID 0x20 /* Manufacture ID Tuple */ +#define CISTPL_FUNCID 0x21 /* Function ID Tuple */ +#define CISTPL_FUNCE 0x22 /* Function Extension Tuple */ +#define CISTPL_END 0xff /* Tuple End */ +#define CISTPL_ENDMARK 0xff + +/* dscm1xxxx.c */ +struct pcmcia_card_s *dscm1xxxx_init(BlockDriverState *bdrv); + diff --git a/hw/pcnet.c b/hw/pcnet.c index 71a05da8d..5a6c36c28 100644 --- a/hw/pcnet.c +++ b/hw/pcnet.c @@ -35,7 +35,10 @@ * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR92C990.txt */ -#include "vl.h" +#include "hw.h" +#include "pci.h" +#include "net.h" +#include "qemu-timer.h" //#define PCNET_DEBUG //#define PCNET_DEBUG_IO @@ -2008,6 +2011,7 @@ void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn) /* SPARC32 interface */ #if defined (TARGET_SPARC) && !defined(TARGET_SPARC64) // Avoid compile failure +#include "sun4m.h" static void parent_lance_reset(void *opaque, int irq, int level) { diff --git a/hw/pcspk.c b/hw/pcspk.c index 2cbeff377..9bb248b80 100644 --- a/hw/pcspk.c +++ b/hw/pcspk.c @@ -22,7 +22,11 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "isa.h" +#include "audio/audio.h" +#include "qemu-timer.h" #define PCSPK_BUF_LEN 1792 #define PCSPK_SAMPLE_RATE 32000 diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c index 22bf025ff..065dd2c80 100644 --- a/hw/pflash_cfi01.c +++ b/hw/pflash_cfi01.c @@ -37,7 +37,10 @@ * It does not implement much more ... */ -#include "vl.h" +#include "hw.h" +#include "flash.h" +#include "block.h" +#include "qemu-timer.h" #define PFLASH_BUG(fmt, args...) \ do { \ diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c index 08f88900f..eaf6750bb 100644 --- a/hw/pflash_cfi02.c +++ b/hw/pflash_cfi02.c @@ -36,7 +36,10 @@ * It does not implement multiple sectors erase */ -#include "vl.h" +#include "hw.h" +#include "flash.h" +#include "qemu-timer.h" +#include "block.h" //#define PFLASH_DEBUG #ifdef PFLASH_DEBUG diff --git a/hw/piix_pci.c b/hw/piix_pci.c index 3c04e3a08..75f412a91 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -22,7 +22,10 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "pci.h" + typedef uint32_t pci_addr_t; #include "pci_host.h" diff --git a/hw/pl011.c b/hw/pl011.c index 903755414..91c52cc31 100644 --- a/hw/pl011.c +++ b/hw/pl011.c @@ -7,7 +7,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "qemu-char.h" +#include "primecell.h" typedef struct { uint32_t base; diff --git a/hw/pl022.c b/hw/pl022.c index d7c735b7c..54a581b88 100644 --- a/hw/pl022.c +++ b/hw/pl022.c @@ -7,7 +7,8 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "primecell.h" //#define DEBUG_PL022 1 diff --git a/hw/pl031.c b/hw/pl031.c index 7e8098ba5..68e9005c0 100644 --- a/hw/pl031.c +++ b/hw/pl031.c @@ -9,7 +9,10 @@ * */ -#include"vl.h" +#include "hw.h" +#include "primecell.h" +#include "qemu-timer.h" +#include "sysemu.h" //#define DEBUG_PL031 diff --git a/hw/pl050.c b/hw/pl050.c index 1f56261b4..7b890e9c9 100644 --- a/hw/pl050.c +++ b/hw/pl050.c @@ -7,7 +7,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "primecell.h" +#include "ps2.h" typedef struct { void *dev; diff --git a/hw/pl061.c b/hw/pl061.c index fa5004a96..791427252 100644 --- a/hw/pl061.c +++ b/hw/pl061.c @@ -8,7 +8,8 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "primecell.h" //#define DEBUG_PL061 1 diff --git a/hw/pl080.c b/hw/pl080.c index d581024ca..059e66702 100644 --- a/hw/pl080.c +++ b/hw/pl080.c @@ -7,7 +7,8 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "primecell.h" #define PL080_MAX_CHANNELS 8 #define PL080_CONF_E 0x1 diff --git a/hw/pl110.c b/hw/pl110.c index 97cbee545..e5b2b2363 100644 --- a/hw/pl110.c +++ b/hw/pl110.c @@ -7,7 +7,9 @@ * This code is licenced under the GNU LGPL */ -#include "vl.h" +#include "hw.h" +#include "primecell.h" +#include "console.h" #define PL110_CR_EN 0x001 #define PL110_CR_BGR 0x100 diff --git a/hw/pl181.c b/hw/pl181.c index bd067ddac..5eb46d0f8 100644 --- a/hw/pl181.c +++ b/hw/pl181.c @@ -7,7 +7,8 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "primecell.h" #include "sd.h" //#define DEBUG_PL181 1 diff --git a/hw/pl190.c b/hw/pl190.c index 79ba3ab79..abc28468e 100644 --- a/hw/pl190.c +++ b/hw/pl190.c @@ -7,8 +7,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "primecell.h" +#include "arm-misc.h" /* The number of virtual priority levels. 16 user vectors plus the unvectored IRQ. Chained interrupts would require an additional level @@ -21,7 +21,11 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ppc.h" +#include "qemu-timer.h" +#include "sysemu.h" +#include "nvram.h" //#define PPC_DEBUG_IRQ //#define PPC_DEBUG_TB diff --git a/hw/ppc.h b/hw/ppc.h new file mode 100644 index 000000000..0a3d4ff06 --- /dev/null +++ b/hw/ppc.h @@ -0,0 +1,31 @@ +/* PowerPC hardware exceptions management helpers */ +typedef void (*clk_setup_cb)(void *opaque, uint32_t freq); +typedef struct clk_setup_t clk_setup_t; +struct clk_setup_t { + clk_setup_cb cb; + void *opaque; +}; +static inline void clk_setup (clk_setup_t *clk, uint32_t freq) +{ + if (clk->cb != NULL) + (*clk->cb)(clk->opaque, freq); +} + +clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq); +/* Embedded PowerPC DCR management */ +typedef target_ulong (*dcr_read_cb)(void *opaque, int dcrn); +typedef void (*dcr_write_cb)(void *opaque, int dcrn, target_ulong val); +int ppc_dcr_init (CPUState *env, int (*dcr_read_error)(int dcrn), + int (*dcr_write_error)(int dcrn)); +int ppc_dcr_register (CPUState *env, int dcrn, void *opaque, + dcr_read_cb drc_read, dcr_write_cb dcr_write); +clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq); +/* Embedded PowerPC reset */ +void ppc40x_core_reset (CPUState *env); +void ppc40x_chip_reset (CPUState *env); +void ppc40x_system_reset (CPUState *env); +void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); + +extern CPUWriteMemoryFunc *PPC_io_write[]; +extern CPUReadMemoryFunc *PPC_io_read[]; +void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c index ab134418f..7fd53d3ca 100644 --- a/hw/ppc405_boards.c +++ b/hw/ppc405_boards.c @@ -21,8 +21,14 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ppc.h" #include "ppc405.h" +#include "nvram.h" +#include "flash.h" +#include "sysemu.h" +#include "block.h" +#include "boards.h" extern int loglevel; extern FILE *logfile; diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c index efbc399d2..0a2f087d8 100644 --- a/hw/ppc405_uc.c +++ b/hw/ppc405_uc.c @@ -21,8 +21,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ppc.h" #include "ppc405.h" +#include "pc.h" +#include "qemu-timer.h" +#include "sysemu.h" extern int loglevel; extern FILE *logfile; diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c index 72490b089..be7187929 100644 --- a/hw/ppc4xx_devs.c +++ b/hw/ppc4xx_devs.c @@ -21,8 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ppc.h" #include "ppc4xx.h" +#include "sysemu.h" extern int loglevel; extern FILE *logfile; diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c index 8fb8e5d20..34e192183 100644 --- a/hw/ppc_chrp.c +++ b/hw/ppc_chrp.c @@ -22,8 +22,15 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ppc.h" #include "ppc_mac.h" +#include "nvram.h" +#include "pc.h" +#include "pci.h" +#include "net.h" +#include "sysemu.h" +#include "boards.h" /* UniN device */ static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value) diff --git a/hw/ppc_mac.h b/hw/ppc_mac.h index 7ed7b55a9..3a26cdef9 100644 --- a/hw/ppc_mac.h +++ b/hw/ppc_mac.h @@ -68,4 +68,58 @@ void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len); uint32_t macio_nvram_read (void *opaque, uint32_t addr); void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val); +/* adb.c */ + +#define MAX_ADB_DEVICES 16 + +#define ADB_MAX_OUT_LEN 16 + +typedef struct ADBDevice ADBDevice; + +/* buf = NULL means polling */ +typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, + const uint8_t *buf, int len); +typedef int ADBDeviceReset(ADBDevice *d); + +struct ADBDevice { + struct ADBBusState *bus; + int devaddr; + int handler; + ADBDeviceRequest *devreq; + ADBDeviceReset *devreset; + void *opaque; +}; + +typedef struct ADBBusState { + ADBDevice devices[MAX_ADB_DEVICES]; + int nb_devices; + int poll_index; +} ADBBusState; + +int adb_request(ADBBusState *s, uint8_t *buf_out, + const uint8_t *buf, int len); +int adb_poll(ADBBusState *s, uint8_t *buf_out); + +ADBDevice *adb_register_device(ADBBusState *s, int devaddr, + ADBDeviceRequest *devreq, + ADBDeviceReset *devreset, + void *opaque); +void adb_kbd_init(ADBBusState *bus); +void adb_mouse_init(ADBBusState *bus); + +extern ADBBusState adb_bus; + +/* openpic.c */ +/* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */ +enum { + OPENPIC_OUTPUT_INT = 0, /* IRQ */ + OPENPIC_OUTPUT_CINT, /* critical IRQ */ + OPENPIC_OUTPUT_MCK, /* Machine check event */ + OPENPIC_OUTPUT_DEBUG, /* Inconditional debug event */ + OPENPIC_OUTPUT_RESET, /* Core reset event */ + OPENPIC_OUTPUT_NB, +}; +qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, + qemu_irq **irqs, qemu_irq irq_out); + #endif /* !defined(__PPC_MAC_H__) */ diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c index ef638767f..ac09c831f 100644 --- a/hw/ppc_oldworld.c +++ b/hw/ppc_oldworld.c @@ -22,8 +22,16 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ppc.h" #include "ppc_mac.h" +#include "nvram.h" +#include "pc.h" +#include "sysemu.h" +#include "net.h" +#include "isa.h" +#include "pci.h" +#include "boards.h" /* temporary frame buffer OSI calls for the video.x driver. The right solution is to modify the driver to use VGA PCI I/Os */ diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c index 1d2a85da1..4fcd5dd1a 100644 --- a/hw/ppc_prep.c +++ b/hw/ppc_prep.c @@ -21,7 +21,16 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "nvram.h" +#include "pc.h" +#include "fdc.h" +#include "net.h" +#include "sysemu.h" +#include "isa.h" +#include "pci.h" +#include "ppc.h" +#include "boards.h" //#define HARD_DEBUG_PPC_IO //#define DEBUG_PPC_IO diff --git a/hw/prep_pci.c b/hw/prep_pci.c index 8c8a4988d..815db5308 100644 --- a/hw/prep_pci.c +++ b/hw/prep_pci.c @@ -22,7 +22,9 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pci.h" + typedef uint32_t pci_addr_t; #include "pci_host.h" diff --git a/hw/primecell.h b/hw/primecell.h new file mode 100644 index 000000000..072390bf0 --- /dev/null +++ b/hw/primecell.h @@ -0,0 +1,59 @@ +#ifndef PRIMECELL_H +#define PRIMECELL_H + +/* Declarations for ARM PrimeCell based periperals. */ +/* Also includes some devices that are currently only used by the + ARM boards. */ + +/* pl031.c */ +void pl031_init(uint32_t base, qemu_irq irq); + +/* pl110.c */ +void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq, int); + +/* pl011.c */ +enum pl011_type { + PL011_ARM, + PL011_LUMINARY +}; + +void pl011_init(uint32_t base, qemu_irq irq, CharDriverState *chr, + enum pl011_type type); + +/* pl022.c */ +void pl022_init(uint32_t base, qemu_irq irq, int (*xfer_cb)(void *, int), + void *opaque); + +/* pl050.c */ +void pl050_init(uint32_t base, qemu_irq irq, int is_mouse); + +/* pl061.c */ +qemu_irq *pl061_init(uint32_t base, qemu_irq irq, qemu_irq **out); + +/* pl080.c */ +void *pl080_init(uint32_t base, qemu_irq irq, int nchannels); + +/* pl181.c */ +void pl181_init(uint32_t base, BlockDriverState *bd, + qemu_irq irq0, qemu_irq irq1); + +/* pl190.c */ +qemu_irq *pl190_init(uint32_t base, qemu_irq irq, qemu_irq fiq); + +/* realview_gic.c */ +qemu_irq *realview_gic_init(uint32_t base, qemu_irq parent_irq); + +/* mpcore.c */ +extern qemu_irq *mpcore_irq_init(qemu_irq *cpu_irq); + +/* arm-timer.c */ +void sp804_init(uint32_t base, qemu_irq irq); +void icp_pit_init(uint32_t base, qemu_irq *pic, int irq); + +/* arm_sysctl.c */ +void arm_sysctl_init(uint32_t base, uint32_t sys_id); + +/* versatile_pci.c */ +PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview); + +#endif @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ps2.h" +#include "console.h" /* debug PC keyboard */ //#define DEBUG_KBD diff --git a/hw/ps2.h b/hw/ps2.h new file mode 100644 index 000000000..f2c091edd --- /dev/null +++ b/hw/ps2.h @@ -0,0 +1,10 @@ +/* ps2.c */ +void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); +void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); +void ps2_write_mouse(void *, int val); +void ps2_write_keyboard(void *, int val); +uint32_t ps2_read_data(void *); +void ps2_queue(void *, int b); +void ps2_keyboard_set_translation(void *opaque, int mode); +void ps2_mouse_fake_event(void *opaque); + diff --git a/hw/ptimer.c b/hw/ptimer.c index d81503adc..7dd6d3110 100644 --- a/hw/ptimer.c +++ b/hw/ptimer.c @@ -5,7 +5,8 @@ * * This code is licenced under the GNU LGPL. */ -#include "vl.h" +#include "hw.h" +#include "qemu-timer.h" struct ptimer_state @@ -95,7 +95,7 @@ void pxa2xx_lcdc_oritentation(void *opaque, int angle); /* pxa2xx_mmci.c */ struct pxa2xx_mmci_s; struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base, - qemu_irq irq, void *dma); + BlockDriverState *bd, qemu_irq irq, void *dma); void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly, qemu_irq coverswitch); @@ -207,4 +207,8 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, DisplayState *ds, const char *revision); struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, DisplayState *ds); +/* usb-ohci.c */ +void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn, + qemu_irq irq); + #endif /* PXA_H */ diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index 9f7771f2d..00cb2370a 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -7,7 +7,13 @@ * This code is licenced under the GPL. */ -# include "vl.h" +#include "hw.h" +#include "pxa.h" +#include "sysemu.h" +#include "pc.h" +#include "i2c.h" +#include "qemu-timer.h" +#include "qemu-char.h" static struct { target_phys_addr_t io_base; @@ -2064,7 +2070,8 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, s->gpio = pxa2xx_gpio_init(0x40e00000, s->env, s->pic, 121); - s->mmc = pxa2xx_mmci_init(0x41100000, s->pic[PXA2XX_PIC_MMC], s->dma); + s->mmc = pxa2xx_mmci_init(0x41100000, sd_bdrv, s->pic[PXA2XX_PIC_MMC], + s->dma); for (i = 0; pxa270_serial[i].io_base; i ++) if (serial_hds[i]) @@ -2180,7 +2187,8 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, s->gpio = pxa2xx_gpio_init(0x40e00000, s->env, s->pic, 85); - s->mmc = pxa2xx_mmci_init(0x41100000, s->pic[PXA2XX_PIC_MMC], s->dma); + s->mmc = pxa2xx_mmci_init(0x41100000, sd_bdrv, s->pic[PXA2XX_PIC_MMC], + s->dma); for (i = 0; pxa255_serial[i].io_base; i ++) if (serial_hds[i]) diff --git a/hw/pxa2xx_dma.c b/hw/pxa2xx_dma.c index 4c60ffd00..23bdae909 100644 --- a/hw/pxa2xx_dma.c +++ b/hw/pxa2xx_dma.c @@ -8,7 +8,8 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "pxa.h" struct pxa2xx_dma_channel_s { target_phys_addr_t descr; diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c index b6e598a98..9f5184438 100644 --- a/hw/pxa2xx_gpio.c +++ b/hw/pxa2xx_gpio.c @@ -7,7 +7,8 @@ * This code is licensed under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "pxa.h" #define PXA2XX_GPIO_BANKS 4 diff --git a/hw/pxa2xx_lcd.c b/hw/pxa2xx_lcd.c index 7ae9ba633..56328e9f4 100644 --- a/hw/pxa2xx_lcd.c +++ b/hw/pxa2xx_lcd.c @@ -7,8 +7,12 @@ * This code is licensed under the GPLv2. */ -#include "vl.h" +#include "hw.h" +#include "console.h" +#include "pxa.h" #include "pixel_ops.h" +/* FIXME: For graphic_rotate. Should probably be done in common code. */ +#include "sysemu.h" typedef void (*drawfn)(uint32_t *, uint8_t *, const uint8_t *, int, int); diff --git a/hw/pxa2xx_mmci.c b/hw/pxa2xx_mmci.c index 7eb7c7941..6e244a96c 100644 --- a/hw/pxa2xx_mmci.c +++ b/hw/pxa2xx_mmci.c @@ -7,7 +7,8 @@ * This code is licensed under the GPLv2. */ -#include "vl.h" +#include "hw.h" +#include "pxa.h" #include "sd.h" struct pxa2xx_mmci_s { @@ -522,7 +523,7 @@ static int pxa2xx_mmci_load(QEMUFile *f, void *opaque, int version_id) } struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base, - qemu_irq irq, void *dma) + BlockDriverState *bd, qemu_irq irq, void *dma) { int iomemtype; struct pxa2xx_mmci_s *s; @@ -537,7 +538,7 @@ struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base, cpu_register_physical_memory(base, 0x00100000, iomemtype); /* Instantiate the actual storage */ - s->card = sd_init(sd_bdrv); + s->card = sd_init(bd); register_savevm("pxa2xx_mmci", 0, 0, pxa2xx_mmci_save, pxa2xx_mmci_load, s); diff --git a/hw/pxa2xx_pcmcia.c b/hw/pxa2xx_pcmcia.c index f1399f467..f5d805a7c 100644 --- a/hw/pxa2xx_pcmcia.c +++ b/hw/pxa2xx_pcmcia.c @@ -7,7 +7,8 @@ * This code is licensed under the GPLv2. */ -#include "vl.h" +#include "hw.h" +#include "pcmcia.h" struct pxa2xx_pcmcia_s { struct pcmcia_socket_s slot; diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c index c9012e8db..a3611b88b 100644 --- a/hw/pxa2xx_pic.c +++ b/hw/pxa2xx_pic.c @@ -8,7 +8,8 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "pxa.h" #define ICIP 0x00 /* Interrupt Controller IRQ Pending register */ #define ICMR 0x04 /* Interrupt Controller Mask register */ diff --git a/hw/pxa2xx_timer.c b/hw/pxa2xx_timer.c index 982420502..90777f822 100644 --- a/hw/pxa2xx_timer.c +++ b/hw/pxa2xx_timer.c @@ -7,7 +7,10 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "qemu-timer.h" +#include "sysemu.h" +#include "pxa.h" #define OSMR0 0x00 #define OSMR1 0x04 @@ -22,7 +22,10 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sh.h" +#include "sysemu.h" +#include "boards.h" #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */ #define SDRAM_SIZE 0x04000000 diff --git a/hw/realview.c b/hw/realview.c index e02deeed7..808df1064 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -7,8 +7,14 @@ * This code is licenced under the GPL. */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "arm-misc.h" +#include "primecell.h" +#include "devices.h" +#include "pci.h" +#include "net.h" +#include "sysemu.h" +#include "boards.h" /* Board init. */ diff --git a/hw/realview_gic.c b/hw/realview_gic.c index cbc961491..639db846b 100644 --- a/hw/realview_gic.c +++ b/hw/realview_gic.c @@ -7,8 +7,8 @@ * This code is licenced under the GPL. */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "arm-misc.h" #define GIC_NIRQ 96 #define NCPU 1 diff --git a/hw/rtl8139.c b/hw/rtl8139.c index dc06f6617..868cbbae8 100644 --- a/hw/rtl8139.c +++ b/hw/rtl8139.c @@ -43,7 +43,10 @@ * Added rx/tx buffer reset when enabling rx/tx operation */ -#include "vl.h" +#include "hw.h" +#include "pci.h" +#include "qemu-timer.h" +#include "net.h" /* debug RTL8139 card */ //#define DEBUG_RTL8139 1 @@ -21,7 +21,11 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "audiodev.h" +#include "audio/audio.h" +#include "isa.h" +#include "qemu-timer.h" #define LENOFA(a) ((int) (sizeof(a)/sizeof(a[0]))) diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c index 384c098a0..700b91446 100644 --- a/hw/scsi-disk.c +++ b/hw/scsi-disk.c @@ -25,7 +25,9 @@ do { printf("scsi-disk: " fmt , ##args); } while (0) #define BADF(fmt, args...) \ do { fprintf(stderr, "scsi-disk: " fmt , ##args); } while (0) -#include "vl.h" +#include "qemu-common.h" +#include "block.h" +#include "scsi-disk.h" #define SENSE_NO_SENSE 0 #define SENSE_NOT_READY 2 diff --git a/hw/scsi-disk.h b/hw/scsi-disk.h new file mode 100644 index 000000000..9071cec49 --- /dev/null +++ b/hw/scsi-disk.h @@ -0,0 +1,33 @@ +#ifndef SCSI_DISK_H +#define SCSI_DISK_H + +/* scsi-disk.c */ +enum scsi_reason { + SCSI_REASON_DONE, /* Command complete. */ + SCSI_REASON_DATA /* Transfer complete, more data required. */ +}; + +typedef struct SCSIDevice SCSIDevice; +typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag, + uint32_t arg); + +SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, + int tcq, + scsi_completionfn completion, + void *opaque); +void scsi_disk_destroy(SCSIDevice *s); + +int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun); +/* SCSI data transfers are asynchrnonous. However, unlike the block IO + layer the completion routine may be called directly by + scsi_{read,write}_data. */ +void scsi_read_data(SCSIDevice *s, uint32_t tag); +int scsi_write_data(SCSIDevice *s, uint32_t tag); +void scsi_cancel_io(SCSIDevice *s, uint32_t tag); +uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag); + +/* cdrom.c */ +int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); +int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); + +#endif @@ -29,6 +29,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include "hw.h" +#include "block.h" #include "sd.h" //#define DEBUG_SD 1 @@ -29,8 +29,6 @@ #ifndef __hw_sd_h #define __hw_sd_h 1 -#include <vl.h> - #define OUT_OF_RANGE (1 << 31) #define ADDRESS_ERROR (1 << 30) #define BLOCK_LEN_ERROR (1 << 29) diff --git a/hw/serial.c b/hw/serial.c index 36a7cc4e3..c5d9db5fa 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "qemu-char.h" +#include "isa.h" +#include "pc.h" //#define DEBUG_SERIAL diff --git a/hw/sh.h b/hw/sh.h new file mode 100644 index 000000000..57a2485cb --- /dev/null +++ b/hw/sh.h @@ -0,0 +1,38 @@ +#ifndef QEMU_SH_H +#define QEMU_SH_H +/* Definitions for SH board emulation. */ + +/* sh7750.c */ +struct SH7750State; + +struct SH7750State *sh7750_init(CPUState * cpu); + +typedef struct { + /* The callback will be triggered if any of the designated lines change */ + uint16_t portamask_trigger; + uint16_t portbmask_trigger; + /* Return 0 if no action was taken */ + int (*port_change_cb) (uint16_t porta, uint16_t portb, + uint16_t * periph_pdtra, + uint16_t * periph_portdira, + uint16_t * periph_pdtrb, + uint16_t * periph_portdirb); +} sh7750_io_device; + +int sh7750_register_io_device(struct SH7750State *s, + sh7750_io_device * device); +/* sh_timer.c */ +#define TMU012_FEAT_TOCR (1 << 0) +#define TMU012_FEAT_3CHAN (1 << 1) +#define TMU012_FEAT_EXTCLK (1 << 2) +void tmu012_init(uint32_t base, int feat, uint32_t freq); + +/* sh_serial.c */ +#define SH_SERIAL_FEAT_SCIF (1 << 0) +void sh_serial_init (target_phys_addr_t base, int feat, + uint32_t freq, CharDriverState *chr); + +/* tc58128.c */ +int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); + +#endif diff --git a/hw/sh7750.c b/hw/sh7750.c index 1e2d91719..82317d7ea 100644 --- a/hw/sh7750.c +++ b/hw/sh7750.c @@ -24,7 +24,9 @@ */ #include <stdio.h> #include <assert.h> -#include "vl.h" +#include "hw.h" +#include "sh.h" +#include "sysemu.h" #include "sh7750_regs.h" #include "sh7750_regnames.h" #include "sh_intc.h" diff --git a/hw/sh7750_regnames.c b/hw/sh7750_regnames.c index 551ce8057..51283c9db 100644 --- a/hw/sh7750_regnames.c +++ b/hw/sh7750_regnames.c @@ -1,4 +1,5 @@ -#include "vl.h" +#include "hw.h" +#include "sh.h" #include "sh7750_regs.h" #define REGNAME(r) {r, #r}, diff --git a/hw/sh_intc.c b/hw/sh_intc.c index 7e8f16782..647f1cba9 100644 --- a/hw/sh_intc.c +++ b/hw/sh_intc.c @@ -10,7 +10,8 @@ #include <assert.h> #include "sh_intc.h" -#include "vl.h" +#include "hw.h" +#include "sh.h" //#define DEBUG_INTC diff --git a/hw/sh_serial.c b/hw/sh_serial.c index 03a096c1b..1336780d1 100644 --- a/hw/sh_serial.c +++ b/hw/sh_serial.c @@ -24,7 +24,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sh.h" +#include "qemu-char.h" #include <assert.h> //#define DEBUG_SERIAL diff --git a/hw/sh_timer.c b/hw/sh_timer.c index 40f3930cf..6be895300 100644 --- a/hw/sh_timer.c +++ b/hw/sh_timer.c @@ -8,7 +8,9 @@ * This code is licenced under the GPL. */ -#include "vl.h" +#include "hw.h" +#include "sh.h" +#include "qemu-timer.h" //#define DEBUG_TIMER @@ -27,7 +27,10 @@ More information in target-sh4/README.sh4 */ -#include "vl.h" +#include "hw.h" +#include "sh.h" +#include "sysemu.h" +#include "boards.h" #define BIOS_FILENAME "shix_bios.bin" #define BIOS_ADDRESS 0xA0000000 diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c index 541222877..448e5bfde 100644 --- a/hw/slavio_intctl.c +++ b/hw/slavio_intctl.c @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sun4m.h" +#include "console.h" + //#define DEBUG_IRQ_COUNT //#define DEBUG_IRQ diff --git a/hw/slavio_misc.c b/hw/slavio_misc.c index 236c4a1b7..67e1c0d7d 100644 --- a/hw/slavio_misc.c +++ b/hw/slavio_misc.c @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sun4m.h" +#include "sysemu.h" + /* debug misc */ //#define DEBUG_MISC diff --git a/hw/slavio_serial.c b/hw/slavio_serial.c index 2eb3379b4..534a438a1 100644 --- a/hw/slavio_serial.c +++ b/hw/slavio_serial.c @@ -21,7 +21,11 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sun4m.h" +#include "qemu-char.h" +#include "console.h" + /* debug serial */ //#define DEBUG_SERIAL diff --git a/hw/slavio_timer.c b/hw/slavio_timer.c index 14fd40262..a81b34ff5 100644 --- a/hw/slavio_timer.c +++ b/hw/slavio_timer.c @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sun4m.h" +#include "qemu-timer.h" //#define DEBUG_TIMER diff --git a/hw/smbus.c b/hw/smbus.c index 103e9177b..81e887b2a 100644 --- a/hw/smbus.c +++ b/hw/smbus.c @@ -9,7 +9,9 @@ /* TODO: Implement PEC. */ -#include "vl.h" +#include "hw.h" +#include "i2c.h" +#include "smbus.h" //#define DEBUG_SMBUS 1 @@ -194,7 +196,7 @@ SMBusDevice *smbus_device_init(i2c_bus *bus, int address, int size) SMBusDevice *dev; if (size < sizeof(SMBusDevice)) - cpu_abort(cpu_single_env, "SMBus struct too small"); + hw_error("SMBus struct too small"); dev = (SMBusDevice *)i2c_slave_init(bus, address, size); dev->i2c.event = smbus_i2c_event; diff --git a/hw/smbus.h b/hw/smbus.h index 0d35bb68a..b6b066240 100644 --- a/hw/smbus.h +++ b/hw/smbus.h @@ -22,7 +22,7 @@ * THE SOFTWARE. */ -typedef struct SMBusDevice SMBusDevice; +#include "i2c.h" struct SMBusDevice { /* The SMBus protocol is implemented on top of I2C. */ diff --git a/hw/smbus_eeprom.c b/hw/smbus_eeprom.c index cf54c34c3..39cf1ce41 100644 --- a/hw/smbus_eeprom.c +++ b/hw/smbus_eeprom.c @@ -22,7 +22,9 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "i2c.h" +#include "smbus.h" //#define DEBUG diff --git a/hw/smc91c111.c b/hw/smc91c111.c index 25e6f79c7..410051d3c 100644 --- a/hw/smc91c111.c +++ b/hw/smc91c111.c @@ -7,7 +7,9 @@ * This code is licenced under the GPL */ -#include "vl.h" +#include "hw.h" +#include "net.h" +#include "devices.h" /* For crc32 */ #include <zlib.h> diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c index 3c80fd67f..742f2d871 100644 --- a/hw/sparc32_dma.c +++ b/hw/sparc32_dma.c @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sparc32_dma.h" +#include "sun4m.h" /* debug DMA */ //#define DEBUG_DMA diff --git a/hw/sparc32_dma.h b/hw/sparc32_dma.h new file mode 100644 index 000000000..00b892164 --- /dev/null +++ b/hw/sparc32_dma.h @@ -0,0 +1,14 @@ +#ifndef SPARC32_DMA_H +#define SPARC32_DMA_H + +/* sparc32_dma.c */ +void *sparc32_dma_init(target_phys_addr_t daddr, qemu_irq parent_irq, + void *iommu, qemu_irq **dev_irq, qemu_irq **reset); +void ledma_memory_read(void *opaque, target_phys_addr_t addr, + uint8_t *buf, int len, int do_bswap); +void ledma_memory_write(void *opaque, target_phys_addr_t addr, + uint8_t *buf, int len, int do_bswap); +void espdma_memory_read(void *opaque, uint8_t *buf, int len); +void espdma_memory_write(void *opaque, uint8_t *buf, int len); + +#endif diff --git a/hw/spitz.c b/hw/spitz.c index 14be70c70..c82992150 100644 --- a/hw/spitz.c +++ b/hw/spitz.c @@ -7,7 +7,19 @@ * This code is licensed under the GNU GPL v2. */ -#include "vl.h" +#include "hw.h" +#include "pxa.h" +#include "arm-misc.h" +#include "sysemu.h" +#include "pcmcia.h" +#include "i2c.h" +#include "flash.h" +#include "qemu-timer.h" +#include "devices.h" +#include "console.h" +#include "block.h" +#include "audio/audio.h" +#include "boards.h" #define spitz_printf(format, ...) \ fprintf(stderr, "%s: " format, __FUNCTION__, ##__VA_ARGS__) diff --git a/hw/ssd0303.c b/hw/ssd0303.c index 138cfc7fa..383a6232b 100644 --- a/hw/ssd0303.c +++ b/hw/ssd0303.c @@ -10,7 +10,9 @@ /* The controller can support a variety of different displays, but we only implement one. Most of the commends relating to brightness and geometry setup are ignored. */ -#include "vl.h" +#include "hw.h" +#include "i2c.h" +#include "console.h" //#define DEBUG_SSD0303 1 diff --git a/hw/ssd0323.c b/hw/ssd0323.c index 67361bce2..8c5ab424e 100644 --- a/hw/ssd0323.c +++ b/hw/ssd0323.c @@ -10,7 +10,9 @@ /* The controller can support a variety of different displays, but we only implement one. Most of the commends relating to brightness and geometry setup are ignored. */ -#include "vl.h" +#include "hw.h" +#include "devices.h" +#include "console.h" //#define DEBUG_SSD0323 1 diff --git a/hw/stellaris.c b/hw/stellaris.c index 62f2c0344..cc47b9dbc 100644 --- a/hw/stellaris.c +++ b/hw/stellaris.c @@ -7,8 +7,14 @@ * This code is licenced under the GPL. */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "arm-misc.h" +#include "primecell.h" +#include "devices.h" +#include "qemu-timer.h" +#include "i2c.h" +#include "sysemu.h" +#include "boards.h" typedef const struct { const char *name; diff --git a/hw/sun4m.c b/hw/sun4m.c index 9f15e45b1..7187956a4 100644 --- a/hw/sun4m.c +++ b/hw/sun4m.c @@ -21,8 +21,15 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" -#include "m48t59.h" +#include "hw.h" +#include "qemu-timer.h" +#include "sun4m.h" +#include "nvram.h" +#include "sparc32_dma.h" +#include "fdc.h" +#include "sysemu.h" +#include "net.h" +#include "boards.h" #include "firmware_abi.h" //#define DEBUG_IRQ diff --git a/hw/sun4m.h b/hw/sun4m.h new file mode 100644 index 000000000..12fa83223 --- /dev/null +++ b/hw/sun4m.h @@ -0,0 +1,73 @@ +#ifndef SUN4M_H +#define SUN4M_H + +/* Devices used by sparc32 system. */ + +/* iommu.c */ +void *iommu_init(target_phys_addr_t addr, uint32_t version); +void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr, + uint8_t *buf, int len, int is_write); +static inline void sparc_iommu_memory_read(void *opaque, + target_phys_addr_t addr, + uint8_t *buf, int len) +{ + sparc_iommu_memory_rw(opaque, addr, buf, len, 0); +} + +static inline void sparc_iommu_memory_write(void *opaque, + target_phys_addr_t addr, + uint8_t *buf, int len) +{ + sparc_iommu_memory_rw(opaque, addr, buf, len, 1); +} + +/* tcx.c */ +void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base, + unsigned long vram_offset, int vram_size, int width, int height, + int depth); + +/* slavio_intctl.c */ +void *slavio_intctl_init(target_phys_addr_t addr, target_phys_addr_t addrg, + const uint32_t *intbit_to_level, + qemu_irq **irq, qemu_irq **cpu_irq, + qemu_irq **parent_irq, unsigned int cputimer); +void slavio_pic_info(void *opaque); +void slavio_irq_info(void *opaque); + +/* slavio_timer.c */ +void slavio_timer_init_all(target_phys_addr_t base, qemu_irq master_irq, + qemu_irq *cpu_irqs); + +/* slavio_serial.c */ +SerialState *slavio_serial_init(target_phys_addr_t base, qemu_irq irq, + CharDriverState *chr1, CharDriverState *chr2); +void slavio_serial_ms_kbd_init(target_phys_addr_t base, qemu_irq irq); + +/* slavio_misc.c */ +void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, + qemu_irq irq); +void slavio_set_power_fail(void *opaque, int power_failing); + +/* esp.c */ +void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id); +void *esp_init(BlockDriverState **bd, target_phys_addr_t espaddr, + void *dma_opaque, qemu_irq irq, qemu_irq *reset); + +/* cs4231.c */ +void cs_init(target_phys_addr_t base, int irq, void *intctl); + +/* sparc32_dma.c */ +void *sparc32_dma_init(target_phys_addr_t daddr, qemu_irq parent_irq, + void *iommu, qemu_irq **dev_irq, qemu_irq **reset); +void ledma_memory_read(void *opaque, target_phys_addr_t addr, + uint8_t *buf, int len, int do_bswap); +void ledma_memory_write(void *opaque, target_phys_addr_t addr, + uint8_t *buf, int len, int do_bswap); +void espdma_memory_read(void *opaque, uint8_t *buf, int len); +void espdma_memory_write(void *opaque, uint8_t *buf, int len); + +/* pcnet.c */ +void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque, + qemu_irq irq, qemu_irq *reset); + +#endif diff --git a/hw/sun4u.c b/hw/sun4u.c index 588b1c311..336a74c13 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -21,8 +21,15 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" -#include "m48t59.h" +#include "hw.h" +#include "pci.h" +#include "pc.h" +#include "nvram.h" +#include "fdc.h" +#include "net.h" +#include "qemu-timer.h" +#include "sysemu.h" +#include "boards.h" #include "firmware_abi.h" #define KERNEL_LOAD_ADDR 0x00404000 diff --git a/hw/tc58128.c b/hw/tc58128.c index a8b26f7e8..2cd176b94 100644 --- a/hw/tc58128.c +++ b/hw/tc58128.c @@ -1,5 +1,7 @@ #include <assert.h> -#include "vl.h" +#include "hw.h" +#include "sh.h" +#include "sysemu.h" #define CE1 0x0100 #define CE2 0x0200 @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "sun4m.h" +#include "console.h" #include "pixel_ops.h" #define MAXX 1024 diff --git a/hw/tsc210x.c b/hw/tsc210x.c index 50d3edacd..f04b19d33 100644 --- a/hw/tsc210x.c +++ b/hw/tsc210x.c @@ -19,7 +19,11 @@ * MA 02111-1307 USA */ -#include "vl.h" +#include "hw.h" +#include "audio/audio.h" +#include "qemu-timer.h" +#include "console.h" +#include "omap.h" #define TSC_DATA_REGISTERS_PAGE 0x0 #define TSC_CONTROL_REGISTERS_PAGE 0x1 diff --git a/hw/unin_pci.c b/hw/unin_pci.c index 8728f119c..60fdea890 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "ppc_mac.h" +#include "pci.h" + typedef target_phys_addr_t pci_addr_t; #include "pci_host.h" diff --git a/hw/usb-hid.c b/hw/usb-hid.c index aebcf032c..6ea6c4da5 100644 --- a/hw/usb-hid.c +++ b/hw/usb-hid.c @@ -22,7 +22,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "console.h" +#include "usb.h" /* HID interface requests */ #define GET_REPORT 0xa101 diff --git a/hw/usb-hub.c b/hw/usb-hub.c index 1dcac3ca6..97c3d0522 100644 --- a/hw/usb-hub.c +++ b/hw/usb-hub.c @@ -21,7 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "qemu-common.h" +#include "usb.h" //#define DEBUG diff --git a/hw/usb-msd.c b/hw/usb-msd.c index b1ad9ec09..7ee9cc1da 100644 --- a/hw/usb-msd.c +++ b/hw/usb-msd.c @@ -7,7 +7,10 @@ * This code is licenced under the LGPL. */ -#include "vl.h" +#include "qemu-common.h" +#include "usb.h" +#include "block.h" +#include "scsi-disk.h" //#define DEBUG_MSD diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c index a85d38e44..255cba7c9 100644 --- a/hw/usb-ohci.c +++ b/hw/usb-ohci.c @@ -27,7 +27,10 @@ * o BIOS work to boot from USB storage */ -#include "vl.h" +#include "hw.h" +#include "qemu-timer.h" +#include "usb.h" +#include "pci.h" //#define DEBUG_OHCI /* Dump packet contents. */ diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c index 26a079500..1ebe9591e 100644 --- a/hw/usb-uhci.c +++ b/hw/usb-uhci.c @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "usb.h" +#include "pci.h" +#include "qemu-timer.h" //#define DEBUG //#define DEBUG_PACKET diff --git a/hw/usb-wacom.c b/hw/usb-wacom.c index 99b8f9eb7..cc3579c58 100644 --- a/hw/usb-wacom.c +++ b/hw/usb-wacom.c @@ -25,7 +25,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "console.h" +#include "usb.h" /* Interface requests */ #define WACOM_GET_REPORT 0x2101 @@ -21,7 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "qemu-common.h" +#include "usb.h" void usb_attach(USBPort *port, USBDevice *dev) { @@ -202,15 +202,6 @@ void usb_packet_complete(USBPacket *p); /* usb hub */ USBDevice *usb_hub_init(int nb_ports); -/* usb-uhci.c */ -void usb_uhci_piix3_init(PCIBus *bus, int devfn); -void usb_uhci_piix4_init(PCIBus *bus, int devfn); - -/* usb-ohci.c */ -void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn); -void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn, - qemu_irq irq); - /* usb-linux.c */ USBDevice *usb_host_device_open(const char *devname); void usb_host_info(void); @@ -225,3 +216,11 @@ USBDevice *usb_msd_init(const char *filename); /* usb-wacom.c */ USBDevice *usb_wacom_init(void); + +/* usb ports of the VM */ + +void qemu_register_usb_port(USBPort *port, void *opaque, int index, + usb_attachfn attach); + +#define VM_USB_HUB_SIZE 8 + diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c index 68f18ef3f..67cee88e8 100644 --- a/hw/versatile_pci.c +++ b/hw/versatile_pci.c @@ -7,7 +7,9 @@ * This code is licenced under the LGPL. */ -#include "vl.h" +#include "hw.h" +#include "pci.h" +#include "primecell.h" static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr) { diff --git a/hw/versatilepb.c b/hw/versatilepb.c index 4e8e76e26..fa5f57a49 100644 --- a/hw/versatilepb.c +++ b/hw/versatilepb.c @@ -7,8 +7,14 @@ * This code is licenced under the GPL. */ -#include "vl.h" -#include "arm_pic.h" +#include "hw.h" +#include "arm-misc.h" +#include "primecell.h" +#include "devices.h" +#include "net.h" +#include "sysemu.h" +#include "pci.h" +#include "boards.h" /* Primary interrupt controller. */ @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "console.h" +#include "pc.h" +#include "pci.h" #include "vga_int.h" #include "pixel_ops.h" diff --git a/hw/vmmouse.c b/hw/vmmouse.c index 3c4f6671b..0a93b15e6 100644 --- a/hw/vmmouse.c +++ b/hw/vmmouse.c @@ -21,7 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "console.h" +#include "ps2.h" +#include "pc.h" /* debug only vmmouse */ //#define DEBUG_VMMOUSE diff --git a/hw/vmport.c b/hw/vmport.c index bf56b84c5..8044c9fe6 100644 --- a/hw/vmport.c +++ b/hw/vmport.c @@ -21,8 +21,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" -#include "cpu-all.h" +#include "hw.h" +#include "isa.h" +#include "pc.h" +#include "sysemu.h" #define VMPORT_CMD_GETVERSION 0x0a #define VMPORT_CMD_GETRAMSIZE 0x14 diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c index e850952da..7937e071b 100644 --- a/hw/vmware_vga.c +++ b/hw/vmware_vga.c @@ -21,7 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "console.h" +#include "pci.h" #define VERBOSE #define EMBED_STDVGA diff --git a/hw/wm8750.c b/hw/wm8750.c index b999890ef..245d56fb0 100644 --- a/hw/wm8750.c +++ b/hw/wm8750.c @@ -7,7 +7,9 @@ * This file is licensed under GNU GPL. */ -#include "vl.h" +#include "hw.h" +#include "i2c.h" +#include "audio/audio.h" #define IN_PORT_N 3 #define OUT_PORT_N 3 |