diff options
| author | John Crispin <blogic@openwrt.org> | 2012-04-30 11:33:09 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-05-15 17:49:23 +0200 |
| commit | 6697c6933048aabe94f0049070f7ec09cd52baa8 (patch) | |
| tree | 5c155125c4f1daed435c696e5d8aa5bb70d9abd6 /arch/mips/include | |
| parent | 215ed2009c83615896ee060c08fe574894f084a6 (diff) | |
MIPS: lantiq: cleanup reset code
Add 2 new soc specifc handlers and remove superflous pr_notice calls.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3705/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/mach-lantiq/lantiq.h | 3 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 10 |
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h index ce2f02929d2..7a90190bc38 100644 --- a/arch/mips/include/asm/mach-lantiq/lantiq.h +++ b/arch/mips/include/asm/mach-lantiq/lantiq.h @@ -48,7 +48,8 @@ extern spinlock_t ebu_lock; extern void ltq_disable_irq(struct irq_data *data); extern void ltq_mask_and_ack_irq(struct irq_data *data); extern void ltq_enable_irq(struct irq_data *data); - +/* find out what bootsource we have */ +extern unsigned char ltq_boot_select(void); /* find out what caused the last cpu reset */ extern int ltq_reset_cause(void); #define LTQ_RST_CAUSE_WDTRST 0x20 diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h index af6c0f06313..15eb4dc6ec0 100644 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h @@ -49,6 +49,16 @@ #define LTQ_ASC1_BASE_ADDR 0x1E100C00 #define LTQ_ASC_SIZE 0x400 +/* BOOT_SEL - find what boot media we have */ +#define BS_EXT_ROM 0x0 +#define BS_FLASH 0x1 +#define BS_MII0 0x2 +#define BS_PCI 0x3 +#define BS_UART1 0x4 +#define BS_SPI 0x5 +#define BS_NAND 0x6 +#define BS_RMII0 0x7 + /* * during early_printk no ioremap is possible * lets use KSEG1 instead |