1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
|
/*
* Copyright 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <stdio.h>
#include "CUnit/Basic.h"
#include "amdgpu_test.h"
#include "amdgpu_drm.h"
#define BUFFER_SIZE (4*1024)
#define BUFFER_ALIGN (4*1024)
static amdgpu_device_handle device_handle;
static uint32_t major_version;
static uint32_t minor_version;
static amdgpu_bo_handle buffer_handle;
static uint64_t virtual_mc_base_address;
static amdgpu_va_handle va_handle;
static void amdgpu_bo_export_import(void);
static void amdgpu_bo_metadata(void);
static void amdgpu_bo_map_unmap(void);
CU_TestInfo bo_tests[] = {
{ "Export/Import", amdgpu_bo_export_import },
#if 0
{ "Metadata", amdgpu_bo_metadata },
#endif
{ "CPU map/unmap", amdgpu_bo_map_unmap },
CU_TEST_INFO_NULL,
};
int suite_bo_tests_init(void)
{
struct amdgpu_bo_alloc_request req = {0};
amdgpu_bo_handle buf_handle;
uint64_t va;
int r;
r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
&minor_version, &device_handle);
if (r)
return CUE_SINIT_FAILED;
req.alloc_size = BUFFER_SIZE;
req.phys_alignment = BUFFER_ALIGN;
req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
if (r)
return CUE_SINIT_FAILED;
r = amdgpu_va_range_alloc(device_handle,
amdgpu_gpu_va_range_general,
BUFFER_SIZE, BUFFER_ALIGN, 0,
&va, &va_handle, 0);
if (r)
goto error_va_alloc;
r = amdgpu_bo_va_op(buf_handle, 0, BUFFER_SIZE, va, 0, AMDGPU_VA_OP_MAP);
if (r)
goto error_va_map;
buffer_handle = buf_handle;
virtual_mc_base_address = va;
return CUE_SUCCESS;
error_va_map:
amdgpu_va_range_free(va_handle);
error_va_alloc:
amdgpu_bo_free(buf_handle);
return CUE_SINIT_FAILED;
}
int suite_bo_tests_clean(void)
{
int r;
r = amdgpu_bo_va_op(buffer_handle, 0, BUFFER_SIZE,
virtual_mc_base_address, 0,
AMDGPU_VA_OP_UNMAP);
if (r)
return CUE_SCLEAN_FAILED;
r = amdgpu_va_range_free(va_handle);
if (r)
return CUE_SCLEAN_FAILED;
r = amdgpu_bo_free(buffer_handle);
if (r)
return CUE_SCLEAN_FAILED;
r = amdgpu_device_deinitialize(device_handle);
if (r)
return CUE_SCLEAN_FAILED;
return CUE_SUCCESS;
}
static void amdgpu_bo_export_import_do_type(enum amdgpu_bo_handle_type type)
{
struct amdgpu_bo_import_result res = {0};
uint32_t shared_handle;
int r;
r = amdgpu_bo_export(buffer_handle, type, &shared_handle);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_import(device_handle, type, shared_handle, &res);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(res.buf_handle, buffer_handle);
CU_ASSERT_EQUAL(res.alloc_size, BUFFER_SIZE);
r = amdgpu_bo_free(res.buf_handle);
CU_ASSERT_EQUAL(r, 0);
}
static void amdgpu_bo_export_import(void)
{
amdgpu_bo_export_import_do_type(amdgpu_bo_handle_type_gem_flink_name);
amdgpu_bo_export_import_do_type(amdgpu_bo_handle_type_dma_buf_fd);
}
static void amdgpu_bo_metadata(void)
{
struct amdgpu_bo_metadata meta = {0};
struct amdgpu_bo_info info = {0};
int r;
meta.size_metadata = 1;
meta.umd_metadata[0] = 0xdeadbeef;
r = amdgpu_bo_set_metadata(buffer_handle, &meta);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_query_info(buffer_handle, &info);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(info.metadata.size_metadata, 1);
CU_ASSERT_EQUAL(info.metadata.umd_metadata[0], 0xdeadbeef);
}
static void amdgpu_bo_map_unmap(void)
{
uint32_t *ptr;
int i, r;
r = amdgpu_bo_cpu_map(buffer_handle, (void **)&ptr);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_NOT_EQUAL(ptr, NULL);
for (i = 0; i < (BUFFER_SIZE / 4); ++i)
ptr[i] = 0xdeadbeef;
r = amdgpu_bo_cpu_unmap(buffer_handle);
CU_ASSERT_EQUAL(r, 0);
}
|
