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| author | Dave Gordon <david.s.gordon@intel.com> | 2016-03-07 19:37:43 +0000 |
|---|---|---|
| committer | John Harrison <John.C.Harrison@Intel.com> | 2016-06-28 17:19:29 +0100 |
| commit | e16237614e25e6ba89d64663cfceb70dea789da8 (patch) | |
| tree | 3b2adfbfa7dfd8a83a40d5126b65dd76e70ea570 /mm | |
| parent | d35d0a2d2aa8347c497124b9e8912972fbd561ae (diff) | |
drm/i915: refactor & correct GEN6 PIPE_CONTROL code
The code in gen6_render_ring_flush() wasn't quite right; whereas the
workarounds were emitted with GFX_OP_PIPE_CONTROL(5) (allowing for a
QWord write), the final PIPE_CONTROL used GFX_OP_PIPE_CONTROL(4) even
though it would also have the PIPE_CONTROL_QW_WRITE flag set. This may
(should?) have resulted in the next instruction word being consumed as
data, or the PIPE_CONTROL not working as intended due to the flags-vs-
length mismatch.
The refactored code has a Gen6-specific function which will emit a
complete PIPE_CONTROL sequence, with the correct number of extension
DWords. The emit-workarounds and emit-flush functions are then trivially
expressed as calls to the new low-level function.
Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions