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authorDave Gordon <david.s.gordon@intel.com>2015-08-24 19:50:16 +0100
committerJohn Harrison <John.C.Harrison@Intel.com>2016-06-28 17:19:12 +0100
commit2414f1a5ad643ee812d4b71e0be81c770efd5c41 (patch)
treefe48266e7f01fd8b5e452b6d628b0d66faab8d68 /drivers
parent64d2caf9f41c07c3e9c6f393c095ab92104c2745 (diff)
drm/i915/error: report ctx id & desc for each request in the queue
Also decode and output CSB entries, in time order For: VIZ-2021 Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h1
-rw-r--r--drivers/gpu/drm/i915/i915_gpu_error.c39
2 files changed, 32 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a308c630ebfd..9112bdfd7b4b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -539,6 +539,7 @@ struct drm_i915_error_state {
struct drm_i915_error_object *wa_ctx;
struct drm_i915_error_request {
+ uint64_t ctx_desc;
long jiffies;
u32 seqno;
u32 tail;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index c127a95f0d3f..1bd5e2388508 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -309,9 +309,26 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
err_printf(m, " EXECLIST_CSB_WR: 0x%08x\n", ring->execlist_csb_write_pointer);
err_printf(m, " EXECLIST_CSB_RD: 0x%08x\n", ring->execlist_csb_read_pointer);
- for (i = 0; i < 6; i++) {
- err_printf(m, " EXECLIST_CSB[%d]: 0x%08x\n", i, ring->execlist_csb[i]);
- err_printf(m, " EXECLIST_CTX[%d]: 0x%08x\n", i, ring->execlist_ctx[i]);
+#define GEN8_CTX_STATUS_IDLE_ACTIVE (1 << 0)
+#define GEN8_CTX_STATUS_PREEMPTED (1 << 1)
+#define GEN8_CTX_STATUS_ELEMENT_SWITCH (1 << 2)
+#define GEN8_CTX_STATUS_ACTIVE_IDLE (1 << 3)
+#define GEN8_CTX_STATUS_COMPLETE (1 << 4)
+#define GEN8_CTX_STATUS_LITE_RESTORE (1 << 15)
+
+ for (i = 1; i <= 6; ++i) {
+ int n = (ring->execlist_csb_write_pointer + i) % 6;
+ u32 csb = ring->execlist_csb[n];
+
+ err_printf(m, " EXECLIST_CTX/CSB[%d]: 0x%08x 0x%08x ",
+ n, ring->execlist_ctx[n], csb);
+ err_printf(m, "%s %s %s %s %s %s\n",
+ csb & GEN8_CTX_STATUS_IDLE_ACTIVE ? "I->A" : " ",
+ csb & GEN8_CTX_STATUS_PREEMPTED ? "PRMT" : " ",
+ csb & GEN8_CTX_STATUS_ELEMENT_SWITCH ? "ELSW" : " ",
+ csb & GEN8_CTX_STATUS_ACTIVE_IDLE ? "A->I" : " ",
+ csb & GEN8_CTX_STATUS_COMPLETE ? "DONE" : " ",
+ csb & GEN8_CTX_STATUS_LITE_RESTORE ? "LITE" : " ");
}
}
@@ -466,10 +483,14 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
dev_priv->engine[i].name,
error->ring[i].num_requests);
for (j = 0; j < error->ring[i].num_requests; j++) {
- err_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
- error->ring[i].requests[j].seqno,
- error->ring[i].requests[j].jiffies,
- error->ring[i].requests[j].tail);
+ struct drm_i915_error_request *erq;
+
+ erq = &error->ring[i].requests[j];
+ err_printf(m, " seqno 0x%08x, tail 0x%08x, "
+ "emitted %ld, ctx_desc 0x%08x_%08x\n",
+ erq->seqno, erq->tail, erq->jiffies,
+ upper_32_bits(erq->ctx_desc),
+ lower_32_bits(erq->ctx_desc));
}
}
@@ -1160,6 +1181,7 @@ static void i915_gem_record_rings(struct drm_device *dev,
count = 0;
list_for_each_entry(request, &engine->request_list, list) {
+ struct intel_context *ctx = request->ctx;
struct drm_i915_error_request *erq;
if (count >= error->ring[i].num_requests) {
@@ -1182,8 +1204,9 @@ static void i915_gem_record_rings(struct drm_device *dev,
}
erq = &error->ring[i].requests[count++];
- erq->seqno = request->seqno;
+ erq->ctx_desc = intel_lr_context_descriptor(ctx, engine);
erq->jiffies = request->emitted_jiffies;
+ erq->seqno = request->seqno;
erq->tail = request->postfix;
}
}