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authorJohn Harrison <John.C.Harrison@Intel.com>2016-02-04 11:21:37 +0000
committerJohn Harrison <John.C.Harrison@Intel.com>2016-05-06 14:12:58 +0100
commitc72b57a16323b2b84f2ba064788b4dc40004a18d (patch)
tree7c99e3a71d9f1e4e47a9e80f7c3a7b693e83d48c /drivers/gpu/drm
parent48300d7dc75ee9235a8bf71916ec174a18e1c76c (diff)
drm/i915: Add scheduler hook to GPU reset
When the watchdog resets the GPU, all interrupts get disabled despite the reference count remaining. As the scheduler probably had interrupts enabled during the reset (it would have been waiting for the bad batch to complete), it must be poked to tell it that the interrupt has been disabled. v5: New patch in series. v6: Updated to newer nightly (lots of ring -> engine renaming). Updated to use 'to_i915()' instead of dev_private. Converted all enum labels to uppercase. [review feedback from Joonas Lahtinen] For: VIZ-1587 Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c2
-rw-r--r--drivers/gpu/drm/i915/i915_scheduler.c11
-rw-r--r--drivers/gpu/drm/i915/i915_scheduler.h1
3 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9271b927cf5e..992a3ea83b73 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3327,6 +3327,8 @@ static void i915_gem_reset_engine_cleanup(struct drm_i915_private *dev_priv,
}
intel_ring_init_seqno(engine, engine->last_submitted_seqno);
+
+ i915_scheduler_reset_cleanup(engine);
}
void i915_gem_reset(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c
index 580b9d24031d..9c3150a133b1 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.c
+++ b/drivers/gpu/drm/i915/i915_scheduler.c
@@ -821,6 +821,17 @@ void i915_scheduler_clean_node(struct i915_scheduler_queue_entry *node)
}
}
+void i915_scheduler_reset_cleanup(struct intel_engine_cs *engine)
+{
+ struct drm_i915_private *dev_priv = to_i915(engine->dev);
+ struct i915_scheduler *scheduler = dev_priv->scheduler;
+
+ if (scheduler->flags[engine->id] & I915_SF_INTERRUPTS_ENABLED) {
+ engine->irq_put(engine);
+ scheduler->flags[engine->id] &= ~I915_SF_INTERRUPTS_ENABLED;
+ }
+}
+
static bool i915_scheduler_remove(struct i915_scheduler *scheduler,
struct intel_engine_cs *engine,
struct list_head *remove)
diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h
index 92dd5df1fcf6..4e7c0a784dcd 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.h
+++ b/drivers/gpu/drm/i915/i915_scheduler.h
@@ -106,6 +106,7 @@ bool i915_scheduler_is_enabled(struct drm_device *dev);
int i915_scheduler_init(struct drm_device *dev);
void i915_scheduler_destroy(struct drm_i915_private *dev_priv);
void i915_scheduler_closefile(struct drm_device *dev, struct drm_file *file);
+void i915_scheduler_reset_cleanup(struct intel_engine_cs *engine);
void i915_scheduler_clean_node(struct i915_scheduler_queue_entry *node);
int i915_scheduler_queue_execbuffer(struct i915_scheduler_queue_entry *qe);
bool i915_scheduler_notify_request(struct drm_i915_gem_request *req);