diff options
author | John Harrison <John.C.Harrison@Intel.com> | 2014-04-02 16:57:46 +0100 |
---|---|---|
committer | John Harrison <John.C.Harrison@Intel.com> | 2016-05-06 14:12:48 +0100 |
commit | c074a4390afbbac57ac2f534f98cf1cee8c660c0 (patch) | |
tree | f2a514c76ea1e5a6a209593b90f545e2d5b07335 | |
parent | d0a7904c4d71afefe297d44085941d134fd5acd5 (diff) |
drm/i915: Prelude to splitting i915_gem_do_execbuffer in two
The scheduler decouples the submission of batch buffers to the driver
with their submission to the hardware. This basically means splitting
the execbuffer() function in half. This change rearranges some code
ready for the split to occur.
v5: Dropped runtime PM calls as they conflict with the mutex lock.
Instead of being done at the lowest submission level, they are now
left right at the top driver entry level. [feedback from Chris Wilson]
v6: Updated to newer nightly (lots of ring -> engine renaming).
For: VIZ-1587
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 41 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 18 |
2 files changed, 38 insertions, 21 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 7c4c0b69f3e4..f908b829886e 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -970,10 +970,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req, if (flush_domains & I915_GEM_DOMAIN_GTT) wmb(); - /* Unconditionally invalidate gpu caches and ensure that we do flush - * any residual writes from the previous batch. - */ - return intel_ring_invalidate_all_caches(req); + return 0; } static bool @@ -1241,17 +1238,6 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, u32 instp_mask; int ret; - ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas); - if (ret) - return ret; - - ret = i915_switch_context(params->request); - if (ret) - return ret; - - WARN(params->ctx->ppgtt && params->ctx->ppgtt->pd_dirty_rings & (1<<engine->id), - "%s didn't clear reload\n", engine->name); - instp_mode = args->flags & I915_EXEC_CONSTANTS_MASK; instp_mask = I915_EXEC_CONSTANTS_MASK; switch (instp_mode) { @@ -1285,6 +1271,30 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, return -EINVAL; } + ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas); + if (ret) + return ret; + + i915_gem_execbuffer_move_to_active(vmas, params->request); + + /* To be split into two functions here... */ + + /* + * Unconditionally invalidate gpu caches and ensure that we do flush + * any residual writes from the previous batch. + */ + ret = intel_ring_invalidate_all_caches(params->request); + if (ret) + return ret; + + /* Switch to the correct context for the batch */ + ret = i915_switch_context(params->request); + if (ret) + return ret; + + WARN(params->ctx->ppgtt && params->ctx->ppgtt->pd_dirty_rings & (1<<engine->id), + "%s didn't clear reload\n", engine->name); + if (engine == &dev_priv->engine[RCS] && instp_mode != dev_priv->relative_constants_mode) { ret = intel_ring_begin(params->request, 4); @@ -1321,7 +1331,6 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags); - i915_gem_execbuffer_move_to_active(vmas, params->request); i915_gem_execbuffer_retire_commands(params); return 0; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index a351a0e7a9cf..5866342950bb 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -690,10 +690,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req, if (flush_domains & I915_GEM_DOMAIN_GTT) wmb(); - /* Unconditionally invalidate gpu caches and ensure that we do flush - * any residual writes from the previous batch. - */ - return logical_ring_invalidate_all_caches(req); + return 0; } int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request) @@ -989,6 +986,18 @@ int intel_execlists_submission(struct i915_execbuffer_params *params, if (ret) return ret; + i915_gem_execbuffer_move_to_active(vmas, params->request); + + /* To be split into two functions here... */ + + /* + * Unconditionally invalidate gpu caches and ensure that we do flush + * any residual writes from the previous batch. + */ + ret = logical_ring_invalidate_all_caches(params->request); + if (ret) + return ret; + if (engine == &dev_priv->engine[RCS] && instp_mode != dev_priv->relative_constants_mode) { ret = intel_logical_ring_begin(params->request, 4); @@ -1013,7 +1022,6 @@ int intel_execlists_submission(struct i915_execbuffer_params *params, trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags); - i915_gem_execbuffer_move_to_active(vmas, params->request); i915_gem_execbuffer_retire_commands(params); return 0; |