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authorJohn Harrison <John.C.Harrison@Intel.com>2014-06-13 17:02:18 +0100
committerJohn Harrison <John.C.Harrison@Intel.com>2016-05-06 14:12:58 +0100
commit0815f31c418b3302ba5ffdc64bcb1a436c34ba0a (patch)
treedd97fcac0d1b28251adfa2b7924c3287295bc0ba
parentc72b57a16323b2b84f2ba064788b4dc40004a18d (diff)
drm/i915: Added a module parameter to allow the scheduler to be disabled
It can be useful to be able to disable the GPU scheduler via a module parameter for debugging purposes. v5: Converted from a multi-feature 'overrides' mask to a single 'enable' boolean. Further features (e.g. pre-emption) will now be separate 'enable' booleans added later. [Chris Wilson] v6: Moved scheduler parameter declaration to correct place in i915_params struct. [review feedback from Matt Roper] For: VIZ-1587 Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> CC: Matt Roper <matthew.d.roper@intel.com>
-rw-r--r--drivers/gpu/drm/i915/i915_params.c4
-rw-r--r--drivers/gpu/drm/i915/i915_params.h1
-rw-r--r--drivers/gpu/drm/i915/i915_scheduler.c5
3 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 1779f02e6df8..2422d80371b2 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -58,6 +58,7 @@ struct i915_params i915 __read_mostly = {
.guc_log_level = -1,
.enable_dp_mst = true,
.inject_load_failure = 0,
+ .enable_scheduler = 0,
};
module_param_named(modeset, i915.modeset, int, 0400);
@@ -210,3 +211,6 @@ MODULE_PARM_DESC(enable_dp_mst,
module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400);
MODULE_PARM_DESC(inject_load_failure,
"Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
+
+module_param_named_unsafe(enable_scheduler, i915.enable_scheduler, int, 0600);
+MODULE_PARM_DESC(enable_scheduler, "Enable scheduler (0 = disable [default], 1 = enable)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 02bc27804291..44b08b3d5b90 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -50,6 +50,7 @@ struct i915_params {
int mmio_debug;
int edp_vswing;
unsigned int inject_load_failure;
+ int enable_scheduler;
/* leave bools at the end to not create holes */
bool enable_hangcheck;
bool fastboot;
diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c
index 9c3150a133b1..13084fb92378 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.c
+++ b/drivers/gpu/drm/i915/i915_scheduler.c
@@ -42,6 +42,9 @@ bool i915_scheduler_is_enabled(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
+ if (!i915.enable_scheduler)
+ return false;
+
return dev_priv->scheduler != NULL;
}
@@ -593,7 +596,7 @@ int i915_scheduler_queue_execbuffer(struct i915_scheduler_queue_entry *qe)
int incomplete;
/* Bypass the scheduler and send the buffer immediately? */
- if (1/*!i915.enable_scheduler*/)
+ if (!i915.enable_scheduler)
return i915_scheduler_queue_execbuffer_bypass(qe);
node = kmalloc(sizeof(*node), GFP_KERNEL);