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authorEric Engestrom <eric@engestrom.ch>2016-04-03 19:48:09 +0100
committerEmil Velikov <emil.l.velikov@gmail.com>2016-04-07 18:15:56 +0100
commit723a6944c0ba8f6b25302adbea40b9d662f7b8ea (patch)
tree4a4621a29a05b39f74e0432f7127be5fce49295c
parent7b356f4b5e8e2aed4311291fffaff1e608fbf1d1 (diff)
intel: Fix spelling mistakes
Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
-rw-r--r--intel/intel_bufmgr_fake.c2
-rw-r--r--intel/intel_bufmgr_gem.c2
-rw-r--r--intel/intel_decode.c2
-rw-r--r--intel/tests/gen5-3d.batch-ref.txt2
-rw-r--r--intel/tests/gen6-3d.batch-ref.txt2
5 files changed, 5 insertions, 5 deletions
diff --git a/intel/intel_bufmgr_fake.c b/intel/intel_bufmgr_fake.c
index 7f4c7b9fad53..24b3732aa14a 100644
--- a/intel/intel_bufmgr_fake.c
+++ b/intel/intel_bufmgr_fake.c
@@ -312,7 +312,7 @@ _fence_wait_internal(drm_intel_bufmgr_fake *bufmgr_fake, int seq)
*
* Assume that in userland we treat sequence numbers as ints, which
* makes some of the comparisons convenient, since the sequence
- * numbers are all postive signed integers.
+ * numbers are all positive signed integers.
*
* From this we get several cases we need to handle. Here's a timeline.
* 0x2 0x7 0x7ffffff8 0x7ffffffd
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index dc28200ffecc..0a4012beec58 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -3379,7 +3379,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
bufmgr_gem->gtt_size > 256*1024*1024) {
/* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't
* be used for tiled blits. To simplify the accounting, just
- * substract the unmappable part (fixed to 256MB on all known
+ * subtract the unmappable part (fixed to 256MB on all known
* gen3 devices) if the kernel advertises it. */
bufmgr_gem->gtt_size -= 256*1024*1024;
}
diff --git a/intel/intel_decode.c b/intel/intel_decode.c
index 287c34277db1..803d20293ff2 100644
--- a/intel/intel_decode.c
+++ b/intel/intel_decode.c
@@ -3598,7 +3598,7 @@ decode_3d_965(struct drm_intel_decode *ctx)
instr_out(ctx, 0, "3DSTATE_DEPTH_BUFFER\n");
if (IS_GEN5(devid) || IS_GEN6(devid))
instr_out(ctx, 1,
- "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Seperate Stencil %d\n",
+ "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Separate Stencil %d\n",
get_965_surfacetype(data[1] >> 29),
get_965_depthformat((data[1] >> 18) & 0x7),
(data[1] & 0x0001ffff) + 1,
diff --git a/intel/tests/gen5-3d.batch-ref.txt b/intel/tests/gen5-3d.batch-ref.txt
index a0271ab7ffb2..51dd85f36c75 100644
--- a/intel/tests/gen5-3d.batch-ref.txt
+++ b/intel/tests/gen5-3d.batch-ref.txt
@@ -24,7 +24,7 @@
0x1230005c: 0x00000000: dword 3
0x12300060: 0x00000000: dword 4
0x12300064: 0x79050004: 3DSTATE_DEPTH_BUFFER
-0x12300068: 0x2c0805ff: 2D, z24s8, pitch = 1536 bytes, tiled, HiZ 0, Seperate Stencil 0
+0x12300068: 0x2c0805ff: 2D, z24s8, pitch = 1536 bytes, tiled, HiZ 0, Separate Stencil 0
0x1230006c: 0x00000000: depth offset
0x12300070: 0x09584ac0: 300x300
0x12300074: 0x00000000: volume depth
diff --git a/intel/tests/gen6-3d.batch-ref.txt b/intel/tests/gen6-3d.batch-ref.txt
index 9035663d2bb2..04cbddc7319d 100644
--- a/intel/tests/gen6-3d.batch-ref.txt
+++ b/intel/tests/gen6-3d.batch-ref.txt
@@ -140,7 +140,7 @@
0x1230022c: 0x00000000:
0x12300230: 0x00000000:
0x12300234: 0x79050005: 3DSTATE_DEPTH_BUFFER
-0x12300238: 0x2c6c05ff: 2D, unknown, pitch = 1536 bytes, tiled, HiZ 1, Seperate Stencil 1
+0x12300238: 0x2c6c05ff: 2D, unknown, pitch = 1536 bytes, tiled, HiZ 1, Separate Stencil 1
0x1230023c: 0x00000000: depth offset
0x12300240: 0x09584ac0: 300x300
0x12300244: 0x00000000: volume depth