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-rw-r--r--src/intel/isl/isl.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index b9795c3d3d4..fe752d0a28c 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1962,17 +1962,18 @@ isl_surf_init_s(const struct isl_device *dev,
if (tiling == ISL_TILING_GFX12_CCS)
base_alignment_B = MAX(base_alignment_B, 4096);
- /* Platforms using an aux map require that images be 64K-aligned if
- * they're going to used with CCS. This is because the Aux translation
- * table maps main surface addresses to aux addresses at a 64K (in the
- * main surface) granularity. Because we don't know for sure in ISL if
- * a surface will use CCS, we have to guess based on the DISABLE_AUX
- * usage bit. The one thing we do know is that we haven't enable CCS on
- * linear images yet so we can avoid the extra alignment there.
+ /* Platforms using an aux map require that images be granularity-aligned
+ * if they're going to used with CCS. This is because the Aux translation
+ * table maps main surface addresses to aux addresses at a granularity in
+ * the main surface. Because we don't know for sure in ISL if a surface
+ * will use CCS, we have to guess based on the DISABLE_AUX usage bit. The
+ * one thing we do know is that we haven't enable CCS on linear images
+ * yet so we can avoid the extra alignment there.
*/
if (dev->info->has_aux_map &&
!(info->usage & ISL_SURF_USAGE_DISABLE_AUX_BIT)) {
- base_alignment_B = MAX(base_alignment_B, 64 * 1024);
+ base_alignment_B = MAX(base_alignment_B, dev->info->verx10 >= 125 ?
+ 1024 * 1024 : 64 * 1024);
}
}