6 files changed, 12 insertions, 6 deletions
diff --git a/src/amd/vulkan/meta/radv_meta.c b/src/amd/vulkan/meta/radv_meta.c
index 777aab7d558..9441f2c9dc9 100644
--- a/src/amd/vulkan/meta/radv_meta.c
+++ b/src/amd/vulkan/meta/radv_meta.c
@@ -663,7 +663,7 @@ radv_meta_build_resolve_shader_core(struct radv_device *device, nir_builder *b,
       accum = nir_fadd(b, accum, sample);
    }
 
-   accum = nir_fdiv(b, accum, nir_imm_float(b, samples));
+   accum = nir_fdiv_imm(b, accum, samples);
    nir_store_var(b, color, accum, 0xf);
 
    if (device->physical_device->use_fmask) {
diff --git a/src/amd/vulkan/meta/radv_meta_etc_decode.c b/src/amd/vulkan/meta/radv_meta_etc_decode.c
index 060d756c529..707ba93cd99 100644
--- a/src/amd/vulkan/meta/radv_meta_etc_decode.c
+++ b/src/amd/vulkan/meta/radv_meta_etc_decode.c
@@ -449,8 +449,8 @@ build_shader(struct radv_device *dev)
       nir_pop_if(&b, NULL);
       nir_ssa_def *col[4];
       for (unsigned i = 0; i < 3; ++i)
-         col[i] = nir_fdiv(&b, nir_i2f32(&b, nir_channel(&b, nir_load_var(&b, rgb_result), i)),
-                           nir_imm_float(&b, 255.0));
+         col[i] = nir_fdiv_imm(&b, nir_i2f32(&b, nir_channel(&b, nir_load_var(&b, rgb_result), i)),
+                               255.0);
       col[3] = nir_load_var(&b, alpha_result);
       nir_store_var(&b, color, nir_vec(&b, col, 4), 0xf);
    }
diff --git a/src/amd/vulkan/meta/radv_meta_resolve_cs.c b/src/amd/vulkan/meta/radv_meta_resolve_cs.c
index ab1377e2093..7b21ef4feab 100644
--- a/src/amd/vulkan/meta/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/meta/radv_meta_resolve_cs.c
@@ -177,7 +177,7 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
       }
 
       if (resolve_mode == VK_RESOLVE_MODE_AVERAGE_BIT)
-         outval = nir_fdiv(&b, outval, nir_imm_float(&b, samples));
+         outval = nir_fdiv_imm(&b, outval, samples);
    }
 
    nir_ssa_def *coord = nir_vec4(&b, nir_channel(&b, img_coord, 0), nir_channel(&b, img_coord, 1),
diff --git a/src/amd/vulkan/meta/radv_meta_resolve_fs.c b/src/amd/vulkan/meta/radv_meta_resolve_fs.c
index 8e0d52bfe3f..58392e1c498 100644
--- a/src/amd/vulkan/meta/radv_meta_resolve_fs.c
+++ b/src/amd/vulkan/meta/radv_meta_resolve_fs.c
@@ -305,7 +305,7 @@ build_depth_stencil_resolve_fragment_shader(struct radv_device *dev, int samples
       }
 
       if (resolve_mode == VK_RESOLVE_MODE_AVERAGE_BIT)
-         outval = nir_fdiv(&b, outval, nir_imm_float(&b, samples));
+         outval = nir_fdiv_imm(&b, outval, samples);
    }
 
    nir_store_var(&b, fs_out, outval, 0x1);
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index b6890b54c7d..13557f782ca 100644
--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
@@ -820,6 +820,12 @@ nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 }
 
 static inline nir_ssa_def *
+nir_fdiv_imm(nir_builder *build, nir_ssa_def *x, double y)
+{
+   return nir_fdiv(build, x, nir_imm_floatN_t(build, y, x->bit_size));
+}
+
+static inline nir_ssa_def *
 nir_iand_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 {
    assert(x->bit_size <= 64);
diff --git a/src/compiler/nir/nir_format_convert.h b/src/compiler/nir/nir_format_convert.h
index 68c5b59854c..079d55d617e 100644
--- a/src/compiler/nir/nir_format_convert.h
+++ b/src/compiler/nir/nir_format_convert.h
@@ -314,7 +314,7 @@ nir_format_linear_to_srgb(nir_builder *b, nir_ssa_def *c)
 static inline nir_ssa_def *
 nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def *c)
 {
-   nir_ssa_def *linear = nir_fdiv(b, c, nir_imm_float(b, 12.92f));
+   nir_ssa_def *linear = nir_fdiv_imm(b, c, 12.92f);
    nir_ssa_def *curved =
       nir_fpow(b, nir_fmul_imm(b, nir_fadd_imm(b, c, 0.055f),
                                   1.0 / 1.055f),