diff options
| author | Rohan Garg <rohan.garg@intel.com> | 2024-08-19 11:17:44 +0200 |
|---|---|---|
| committer | Eric Engestrom <eric@engestrom.ch> | 2024-08-21 11:07:02 +0200 |
| commit | dd89329cc6f756e2d0ebd9512854592612a925bc (patch) | |
| tree | 5b019d045d312a2460bf3881490598a1bc4e0e7f /src/intel | |
| parent | 55670b0676aa470145c63858a097651aa6e8dbc1 (diff) | |
anv: program a custom byte stride on Xe2 for indirect draws
Xe2 allows us to program in a custom byte stride for indirect draws
Backport-to: 24.2
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30690>
(cherry picked from commit dc23db2a0ddf1e223e90356bdac7dae3cf1c0a69)
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/vulkan/genX_cmd_draw.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/intel/vulkan/genX_cmd_draw.c b/src/intel/vulkan/genX_cmd_draw.c index 9cd51af5c20..13a7d92d3fd 100644 --- a/src/intel/vulkan/genX_cmd_draw.c +++ b/src/intel/vulkan/genX_cmd_draw.c @@ -1654,6 +1654,14 @@ emit_indirect_draws(struct anv_cmd_buffer *cmd_buffer, if (cmd_buffer->state.conditional_render_enabled) genX(cmd_emit_conditional_render_predicate)(cmd_buffer); +#if GFX_VER >= 20 + if (execute_indirect_supported) { + anv_batch_emit(&cmd_buffer->batch, GENX(STATE_BYTE_STRIDE), sb_stride) { + sb_stride.ByteStride = indirect_data_stride; + sb_stride.ByteStrideEnable = !aligned_stride; + } + } +#endif uint32_t offset = 0; for (uint32_t i = 0; i < draw_count; i++) { struct anv_address draw = anv_address_add(indirect_data_addr, offset); @@ -1708,7 +1716,7 @@ emit_indirect_draws(struct anv_cmd_buffer *cmd_buffer, * need to emit one instruction per draw, but we're still avoiding * the register loads with MI commands. */ - if (aligned_stride) + if (aligned_stride || GFX_VER >= 20) break; #else unreachable("EXECUTE_INDIRECT_DRAW instruction expectation mismatch"); |