diff options
author | José Roberto de Souza <jose.souza@intel.com> | 2023-04-06 10:26:12 -0700 |
---|---|---|
committer | Eric Engestrom <eric@engestrom.ch> | 2024-08-20 18:42:12 +0200 |
commit | 98c3209098a4ea79965e16011fcb37ba5b990a2d (patch) | |
tree | 9e1eb4b99fda1632f7e244d97887509ebdb1e215 /src/intel | |
parent | aa3304fedfae6ea35f7c442e7658782419786296 (diff) |
intel/isl/gfx20: Alow hierarchial depth buffer write through for multi sampled surfaces
BSpec: 56419
Backport-to: 24.2
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29615>
(cherry picked from commit 2553878fbae8904e8c08c5b4eae48ea9b1231ccf)
Diffstat (limited to 'src/intel')
-rw-r--r-- | src/intel/isl/isl.h | 3 | ||||
-rw-r--r-- | src/intel/isl/isl_emit_depth_stencil.c | 14 |
2 files changed, 10 insertions, 7 deletions
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 28638015f36..d72d7db1c0e 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -834,7 +834,8 @@ enum isl_aux_usage { * CCS-compressed surface contains valid data at all times. * * :invariant: The surface is a color surface - * :invariant: :c:member:`isl_surf.samples` == 1 + * :invariant: :c:member:`isl_surf.samples` == 1 for GFX 12, GFX 20 can + * be multisampled */ ISL_AUX_USAGE_HIZ_CCS_WT, diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c index 4b7daa4b60e..dd3dd62b08e 100644 --- a/src/intel/isl/isl_emit_depth_stencil.c +++ b/src/intel/isl/isl_emit_depth_stencil.c @@ -355,11 +355,12 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch, hiz.HierarchicalDepthBufferWriteThruEnable = info->hiz_usage == ISL_AUX_USAGE_HIZ_CCS_WT; - /* The bspec docs for this bit are fairly unclear about exactly what is - * and isn't supported with HiZ write-through. It's fairly clear that - * you can't sample from a multisampled depth buffer with CCS. This - * limitation isn't called out explicitly but the docs for the CCS_E - * value of RENDER_SURFACE_STATE::AuxiliarySurfaceMode say: +#if GFX_VER == 12 + /* The bspec docs up to GFX 12 for this bit are fairly unclear about + * exactly what is and isn't supported with HiZ write-through. It's + * fairly clear that you can't sample from a multisampled depth buffer + * with CCS. This limitation isn't called out explicitly but the docs + * for the CCS_E value of RENDER_SURFACE_STATE::AuxiliarySurfaceMode say: * * "If Number of multisamples > 1, programming this value means MSAA * compression is enabled for that surface. Auxiliary surface is MSC @@ -386,7 +387,8 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch, */ if (hiz.HierarchicalDepthBufferWriteThruEnable) assert(info->depth_surf->samples == 1); -#endif +#endif /* #if GFX_VER == 12 */ +#endif /* #if GFX_VER >= 12 */ #if GFX_VER >= 8 /* From the SKL PRM Vol2a: |