diff options
| author | Jordan Justen <jordan.l.justen@intel.com> | 2016-06-11 16:27:48 -0700 |
|---|---|---|
| committer | Jordan Justen <jordan.l.justen@intel.com> | 2016-08-25 01:38:11 -0700 |
| commit | d9b769549febbbba96968281f7d3a509a234eb86 (patch) | |
| tree | b924f61ae72edfd6cce2036ee04c49836df8ef7b | |
| parent | b88e5bfc72a3277d1c09e6b1972ce67286bc4e31 (diff) | |
i965: Track that the stencil data was updated when clearing
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clear.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 1dfff090c08..18b8fcbe200 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -239,6 +239,14 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) } } + if (mask & BUFFER_BIT_STENCIL) { + struct intel_renderbuffer *stencil_irb = + intel_get_renderbuffer(fb, BUFFER_STENCIL); + struct intel_mipmap_tree *mt = stencil_irb->mt; + if (mt && mt->stencil_mt) + mt->stencil_mt->r8stencil_needs_update = true; + } + /* BLORP is currently only supported on Gen6+. */ if (brw->gen >= 6 && (mask & BUFFER_BITS_COLOR)) { const bool encode_srgb = ctx->Color.sRGBEnabled; |