summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>2022-08-26 10:15:46 +0200
committerMarge Bot <emma+marge@anholt.net>2022-09-01 17:02:17 +0000
commitb7adf82928955654e3a541674bcea912f2fa97ee (patch)
tree2086cc1b6bc82b38767382f8108921d4089f7d3b
parente9fb732d0a806ddf3fcd2123bc0651838358d95f (diff)
radv: stop setting num_tess_patches for the GS stage
It's never read. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>
-rw-r--r--src/amd/vulkan/radv_shader_info.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index 23cf42c0819..2b54f843fae 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -815,8 +815,6 @@ radv_nir_shader_info_link(struct radv_device *device, const struct radv_pipeline
stages[MESA_SHADER_TESS_EVAL].info.num_tess_patches =
stages[MESA_SHADER_TESS_CTRL].info.num_tess_patches;
- stages[MESA_SHADER_GEOMETRY].info.num_tess_patches =
- stages[MESA_SHADER_TESS_CTRL].info.num_tess_patches;
if (!radv_use_llvm_for_stage(device, MESA_SHADER_VERTEX)) {
/* When the number of TCS input and output vertices are the same (typically 3):