diff options
| author | Georg Lehmann <dadschoorse@gmail.com> | 2024-08-29 22:08:15 +0200 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2024-09-02 11:09:55 +0000 |
| commit | 607cf5a8e91a357d12b3f9f80aa0211805acb69c (patch) | |
| tree | b7d979d212e981137243584df8dea9ae87dcdd44 | |
| parent | 88733827030a054a89c6fb5d83fb2564d289021d (diff) | |
aco/ra: unconditionally replace literal with sgpr when promoting to VOP3
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
| -rw-r--r-- | src/amd/compiler/aco_register_allocation.cpp | 24 |
1 files changed, 8 insertions, 16 deletions
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index 867d8c6aff6..997fc1551d4 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -3235,17 +3235,13 @@ register_allocation(Program* program, ra_test_policy policy) instr->operands[2].physReg() != vcc)); if (instr_needs_vop3) { - /* if the first operand is a literal, we have to move it to a reg */ + /* If the first operand is a literal, we have to move it to an sgpr + * for generations without VOP3+literal support. + * Both literals and sgprs count towards the constant bus limit, + * so this is always valid. + */ if (instr->operands.size() && instr->operands[0].isLiteral() && program->gfx_level < GFX10) { - bool can_sgpr = true; - /* check, if we have to move to vgpr */ - for (const Operand& op : instr->operands) { - if (op.isTemp() && op.getTemp().type() == RegType::sgpr) { - can_sgpr = false; - break; - } - } /* disable definitions and re-enable operands */ RegisterFile tmp_file(register_file); for (const Definition& def : instr->definitions) @@ -3254,16 +3250,12 @@ register_allocation(Program* program, ra_test_policy policy) if (op.isTemp() && op.isFirstKill()) tmp_file.block(op.physReg(), op.regClass()); } - Temp tmp = program->allocateTmp(can_sgpr ? s1 : v1); + Temp tmp = program->allocateTmp(s1); ctx.assignments.emplace_back(); PhysReg reg = get_reg(ctx, tmp_file, tmp, parallelcopy, instr); update_renames(ctx, register_file, parallelcopy, instr, rename_not_killed_ops); - aco_ptr<Instruction> mov; - if (can_sgpr) - mov.reset(create_instruction(aco_opcode::s_mov_b32, Format::SOP1, 1, 1)); - else - mov.reset(create_instruction(aco_opcode::v_mov_b32, Format::VOP1, 1, 1)); + Instruction* mov = create_instruction(aco_opcode::s_mov_b32, Format::SOP1, 1, 1); mov->operands[0] = instr->operands[0]; mov->definitions[0] = Definition(tmp); mov->definitions[0].setFixed(reg); @@ -3272,7 +3264,7 @@ register_allocation(Program* program, ra_test_policy policy) instr->operands[0].setFixed(reg); instr->operands[0].setFirstKill(true); - instructions.emplace_back(std::move(mov)); + instructions.emplace_back(mov); } /* change the instruction to VOP3 to enable an arbitrary register pair as dst */ |