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2017-04-06intel/aubinator_error_decode: Avoid exit when using a pageraubinatorJordan Justen1-4/+12
I have an error state which includes an ascii85 section that fails to decode. If we exit early when using a pager, it confuses the terminal. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2017-04-06intel/aubinator_error_decode: Avoid printing long ascii85 linesJordan Justen1-2/+3
Since '---' can exist within an ascii85 encoded string, we should avoid these strings when looking for header lines in the error state file. One of the things we do inside the 'if (dashes) {' block is to print the entire line. Since these the ascii85 lines are extremely long it makes it difficult to then view the aubinator_error_decode output. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2017-04-06intel/aubinator: Stop searching after a custom handler is foundJordan Justen1-1/+3
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-04-06intel/gen_decoder: return -1 for unknown command formatsJordan Justen4-17/+27
Decoding with aubinator encountered a command of 0xffffffff. With the previous code, it caused aubinator to jump 255 + 2 dwords to start decoding again. Instead we can attempt to detect the known instruction formats. If the format is not recognized, then we can advance just 1 dword. v2: * Update aubinator_error_decode * Actually convert the length variable returned into a *signed* integer in aubinator.c, intel_batchbuffer.c and aubinator_error_decode.c. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-04-06intel/gen_decoder: Fix length for Media State/Object commandsJordan Justen1-2/+10
From BDW PRM, Volume 6: Command Stream Programming, 'Render Command Header Format'. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-04-06intel/aubinator_error_decode: Fix structure decode dataJordan Justen1-1/+1
The call to gen_print_group should provide a pointer to the beginning of the the structure data, not the start of the batch data. Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-04-06st/pbo: select the right swizzle for instance IDsNicolai Hähnle1-1/+2
The system value only has an X component, and radeonsi started checking that in debug builds. Reported-by: Michel Dänzer <michel.daenzer@amd.com> Fixes: 4cf29427770f ("radeonsi: support 64-bit system values") Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05anv/query: Busy-wait for available query entriesJason Ekstrand1-6/+56
Before, we were just looking at whether or not the user wanted us to wait and waiting on the BO. Some clients, such as the Serious engine, use a single query pool for hundreds of individual query results where the writes for those queries may be split across several command buffers. In this scenario, the individual query we're looking for may become available long before the BO is idle so waiting on the query pool BO to be finished is wasteful. This commit makes us instead busy-loop on each query until it's available. This significantly reduces pipeline bubbles and improves performance of The Talos Principle on medium settings (where the GPU isn't overloaded with drawing) by around 20% on my SkyLake gt4. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Eero Tamminen <eero.t.tamminen@intel.com> Tested-by: Grazvydas Ignotas <notasas@gmail.com>
2017-04-05anv/device: Add a helper for querying whether a BO is busyJason Ekstrand3-6/+47
This is a bit more efficient than using GEM_WAIT with a timeout of 0. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-04-05swr: [rasterizer core] SIMD16 Frontend WIPTim Rowley4-75/+1299
Implement widened binner for SIMD16 Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05swr: [rasterizer core] Enable 8x2 backendTim Rowley1-1/+1
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05swr: [rasterizer codegen] remove copy of makoTim Rowley18-7201/+0
mako is already a mesa build requirement, extra copy not needed. Tested building against mesa build baseline (mako-0.8.0). Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05swr: [rasterizer core/memory] Move intrinics to _simd functionsTim Rowley5-117/+112
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05swr: [rasterizer core] Programmable sample position supportTim Rowley12-596/+267
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05swr: [configure.ac/scons] require c++14Tim Rowley3-7/+7
New C++ features used by upcoming swr changes. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05swr: [rasterizer core] Fix center sample patternTim Rowley3-26/+26
Fix long hidden bug in rasterizer handling of center sample pattern. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05swr: [rasterizer core/memory] Fix missing avx512 storetileTim Rowley3-23/+14
Fix pre-processor macro handing to eliminate silently missing implementation for AVX512. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05swr: [rasterizer core] SIMD16 Frontend WIPTim Rowley2-37/+14
Implement widened VS output for SIMD16 Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-06mesa: use internal function when deleting buffersTimothy Arceri1-16/+16
This avoids validation and looking up the buffer target for a second time. Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-06mesa: rework bind_buffer_object()Timothy Arceri1-18/+16
This allows internal users to pass buffer objects directly and allows for KHR_no_error support to be more easily added. Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-06mesa: small texstate tidy upTimothy Arceri1-4/+5
Possibly more efficient, either way it makes the code easier to follow. Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-06mesa: tidy up renderbuffer RefCount initialisationTimothy Arceri3-4/+1
42aaa548 changed the renderbuffer initialisation of RefCount from 1 to 0. This is inconsitent with how we use RefCount elsewhere. Also every driver implementation of NewRenderbuffer() calls _mesa_init_renderbuffer() so its safe to set it there. Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-05Revert "etnaviv: Cannot render to rb-swapped formats"Christian Gmeiner1-5/+2
This reverts commit 658568941d5e232d690e1ffbcddbd6ea9685693a. With the help of shader variants we can render to rb-swapped formats now. Fixes about 60 piglits. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-05etnaviv: add support for rb swapChristian Gmeiner4-0/+38
If we render to rb swapped format we will create a shader variant doing the involved swizzing in the pixel shader. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-05etnaviv: adapt shader-db output for variant supportChristian Gmeiner1-15/+15
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-04-05etnaviv: bring back shader-db tracesChristian Gmeiner1-0/+9
If shader-db run, create a standard variant immediately (as otherwise nothing will trigger the shader to be actually compiled). Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-04-05etnaviv: add etna_shader_key and generate variants if neededChristian Gmeiner8-29/+97
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-05etnaviv: pass a preallocated variant to compilerChristian Gmeiner4-38/+62
In the long run the compiler needs to know the specifc variant 'key' in order to compile appropriate assembly. With this commit the variant knows its shader and we are able pass the preallocated variant into etna_compile_shader(..). This saves us from passing extra ptrs everywhere. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-04-05etnaviv: make specs constChristian Gmeiner1-1/+1
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-05etnaviv: add struct etna_shader_stateChristian Gmeiner5-23/+24
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-04-05etnaviv: add basic shader variant supportChristian Gmeiner3-4/+60
This commit adds some basic infrastructure to handle shader variants. We are still creating exactly one shader variant for each shader. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-04-05etnaviv: s/etna_shader/etna_shader_variantChristian Gmeiner7-34/+34
Prep work to add shader variant support. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-05etnaviv: remove not needed forward declarationsChristian Gmeiner1-2/+0
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-05gallium/util: honour LIBUNWIND_CFLAGSEmil Velikov1-0/+1
Fixes: 70c272004f72 ("gallium/util: libunwind support") Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-05travis: Add radeonsi to continuous integrationRhys Kidd1-1/+1
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Andres Gomez <agomez@igalia.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-05travis: Add radv vulkan driver to continuous integrationRhys Kidd1-0/+1
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Andres Gomez <agomez@igalia.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-05anv: provide required gem stubs for the testsEmil Velikov1-0/+19
Introduce stubs to anv_gem_stub.c that match the anv_gem.c ones. Otherwise we may get link-time errors, when building the tests. v2: Introduce all the missing stubs at once. Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Vinson Lee <vlee@freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100574 Fixes: c964f0e485d ("anv: Query the kernel for reset status") Fixes: 651ec926fc1 ("anv: Add support for 48-bit addresses") Fixes: 060a6434eca ("anv: Advertise larger heap sizes") Signed-off-by: Emil Velikov <emil.velikov@collabora.com> --- I've intentionally kept the order the same identical to the anv_gem.c. This way we can easily grep & diff in the future ;-)
2017-04-05configure.ac: pthread-stubs is not a thing on GNU/kFreeBSDEmil Velikov1-1/+1
As mentioned on the xcb mailing list, the platform uses the GLIBC forwarding mechanism. https://lists.freedesktop.org/archives/xcb/2016-November/010896.html Cc: Andreas Boll <andreas.boll.dev@gmail.com> Reported-by: Andreas Boll <andreas.boll.dev@gmail.com> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-05st/clover: Fix build after shrink of pipe_boxAaron Watry1-3/+3
Fixes: 3dfe61e ("gallium: decrease the size of pipe_box - 24 -> 16 bytes") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100569 Signed-off-by: Aaron Watry <awatry@gmail.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Tested-by: Vinson Lee <vlee@freedesktop.org>
2017-04-05radeonsi: add new polaris10 pci idAlex Deucher1-0/+1
Reviewed-by: Christian König <christian.koenig@amd.com> Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-05radeonsi: enable ARB_shader_ballotNicolai Hähnle3-2/+5
Require LLVM 5.0 or later because LLVM 4.0 is easily fooled into putting the lane select of llvm.amdgcn.readlane into a VGPR and then fails to continue to compile. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05radeonsi: optimization barriers to work around LLVM deficienciesNicolai Hähnle1-4/+12
Notably, llvm.amdgcn.readfirstlane and llvm.amdgcn.icmp may be hoisted out of loops or if/else branches in cases like if (cond) { v = readFirstInvocationARB(x); ... use v ... } else { v = readFirstInvocationARB(x); ... use v ... } ===> v = readFirstInvocationARB(x); if (cond) { ... use v ... } else { ... use v ... } The optimization barrier is a heavy hammer to stop that until LLVM is taught the semantics of the intrinsic properly. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05radeonsi: strengthen emit_optimization_barrierNicolai Hähnle2-4/+38
LLVM will lift inline assembly out of if-else-blocks if both paths have the same inline assembly. Prevent this by adding an irrelevant unique text to the assembly. This requires the LLVM assembly parser to be initialized. Furthermore, allow forcing subsequent computations to happen after the optimization barrier by defining a data dependency. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05radeonsi: emit TGSI_OPCODE_READ_*Nicolai Hähnle1-0/+38
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05radeonsi: emit TGSI_OPCODE_BALLOTNicolai Hähnle1-0/+18
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05radeonsi: implement TGSI_SEMANTIC_SUBGROUP_*Nicolai Hähnle1-0/+40
64-bit system values are stored as v2i32 to simplify the fetch logic. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05radeonsi: support 64-bit system valuesNicolai Hähnle1-4/+20
For simplicitly, always store system values as 32-bit values or arrays of 32-bit values. 64-bit values are unpacked and packed accordingly. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05radeonsi: bump RADEON_LLVM_MAX_SYSTEM_VALUESNicolai Hähnle2-1/+3
ARB_shader_ballot introduces 7 new system values that can be used in all shader stages. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05st/mesa: enable ARB_shader_ballotNicolai Hähnle1-0/+1
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05st/glsl_to_tgsi: implement ARB_shader_ballot system variablesNicolai Hähnle1-0/+16
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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