diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2015-03-04 12:53:45 -0800 |
|---|---|---|
| committer | Neil Roberts <neil@linux.intel.com> | 2015-03-20 13:25:41 +0000 |
| commit | 706b916960c898cfc24110f14fa4def84caaba93 (patch) | |
| tree | e541046469ab4f1e47bafdac36bd155307a20256 | |
| parent | bc4b18d2977a94a6fb513bf5955236a0e92298ca (diff) | |
i965/skl: Break down SIMD16 3-source instructions when required.
Several steppings of Skylake fail when using SIMD16 with 3-source
instructions (such as MAD).
This implements WaDisableSIMD16On3SrcInstr and fixes ~190 Piglit
tests.
Based on a patch by Neil Roberts.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 6eebee16ed..3aa5c3c664 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -1559,6 +1559,12 @@ fs_generator::enable_debug(const char *shader_name) static bool brw_supports_simd16_3src(const struct brw_context *brw) { + /* WaDisableSIMD16On3SrcInstr: 3-source instructions don't work in SIMD16 + * on a few steppings of Skylake. + */ + if (brw->gen == 9) + return brw->revision != 2 && brw->revision != 3 && brw->revision != -1; + return brw->is_haswell || brw->gen >= 8; } |